[RISCV] Match vcompress during shuffle lowering (#117748)
[llvm-project.git] / llvm / lib / Target / Mips / MipsPostLegalizerCombiner.cpp
blobbd8a065011c9287ab3b8853a31c9ca8b3839fa89
1 //=== lib/CodeGen/GlobalISel/MipsPostLegalizerCombiner.cpp ----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This pass does combining of machine instructions at the generic MI level,
10 // after the legalizer.
12 //===----------------------------------------------------------------------===//
14 #include "MCTargetDesc/MipsMCTargetDesc.h"
15 #include "Mips.h"
16 #include "MipsLegalizerInfo.h"
17 #include "MipsSubtarget.h"
18 #include "llvm/CodeGen/GlobalISel/Combiner.h"
19 #include "llvm/CodeGen/GlobalISel/CombinerHelper.h"
20 #include "llvm/CodeGen/GlobalISel/CombinerInfo.h"
21 #include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h"
22 #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
23 #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
24 #include "llvm/CodeGen/MachineDominators.h"
25 #include "llvm/CodeGen/TargetPassConfig.h"
26 #include "llvm/Target/TargetMachine.h"
28 #define GET_GICOMBINER_DEPS
29 #include "MipsGenPostLegalizeGICombiner.inc"
30 #undef GET_GICOMBINER_DEPS
32 #define DEBUG_TYPE "mips-postlegalizer-combiner"
34 using namespace llvm;
35 using namespace MIPatternMatch;
37 namespace {
38 #define GET_GICOMBINER_TYPES
39 #include "MipsGenPostLegalizeGICombiner.inc"
40 #undef GET_GICOMBINER_TYPES
42 class MipsPostLegalizerCombinerImpl : public Combiner {
43 protected:
44 const MipsPostLegalizerCombinerImplRuleConfig &RuleConfig;
45 const MipsSubtarget &STI;
46 // TODO: Make CombinerHelper methods const.
47 mutable CombinerHelper Helper;
49 public:
50 MipsPostLegalizerCombinerImpl(
51 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
52 GISelKnownBits &KB, GISelCSEInfo *CSEInfo,
53 const MipsPostLegalizerCombinerImplRuleConfig &RuleConfig,
54 const MipsSubtarget &STI, MachineDominatorTree *MDT,
55 const LegalizerInfo *LI);
57 static const char *getName() { return "MipsPostLegalizerCombiner"; }
59 bool tryCombineAll(MachineInstr &I) const override;
61 private:
62 #define GET_GICOMBINER_CLASS_MEMBERS
63 #include "MipsGenPostLegalizeGICombiner.inc"
64 #undef GET_GICOMBINER_CLASS_MEMBERS
67 #define GET_GICOMBINER_IMPL
68 #include "MipsGenPostLegalizeGICombiner.inc"
69 #undef GET_GICOMBINER_IMPL
71 MipsPostLegalizerCombinerImpl::MipsPostLegalizerCombinerImpl(
72 MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
73 GISelKnownBits &KB, GISelCSEInfo *CSEInfo,
74 const MipsPostLegalizerCombinerImplRuleConfig &RuleConfig,
75 const MipsSubtarget &STI, MachineDominatorTree *MDT,
76 const LegalizerInfo *LI)
77 : Combiner(MF, CInfo, TPC, &KB, CSEInfo), RuleConfig(RuleConfig), STI(STI),
78 Helper(Observer, B, /*IsPreLegalize*/ false, &KB, MDT, LI),
79 #define GET_GICOMBINER_CONSTRUCTOR_INITS
80 #include "MipsGenPostLegalizeGICombiner.inc"
81 #undef GET_GICOMBINER_CONSTRUCTOR_INITS
85 // Pass boilerplate
86 // ================
88 class MipsPostLegalizerCombiner : public MachineFunctionPass {
89 public:
90 static char ID;
92 MipsPostLegalizerCombiner(bool IsOptNone = false);
94 StringRef getPassName() const override { return "MipsPostLegalizerCombiner"; }
96 bool runOnMachineFunction(MachineFunction &MF) override;
98 void getAnalysisUsage(AnalysisUsage &AU) const override;
100 private:
101 bool IsOptNone;
102 MipsPostLegalizerCombinerImplRuleConfig RuleConfig;
104 } // end anonymous namespace
106 void MipsPostLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
107 AU.addRequired<TargetPassConfig>();
108 AU.setPreservesCFG();
109 getSelectionDAGFallbackAnalysisUsage(AU);
110 AU.addRequired<GISelKnownBitsAnalysis>();
111 AU.addPreserved<GISelKnownBitsAnalysis>();
112 if (!IsOptNone) {
113 AU.addRequired<MachineDominatorTreeWrapperPass>();
114 AU.addPreserved<MachineDominatorTreeWrapperPass>();
116 MachineFunctionPass::getAnalysisUsage(AU);
119 MipsPostLegalizerCombiner::MipsPostLegalizerCombiner(bool IsOptNone)
120 : MachineFunctionPass(ID), IsOptNone(IsOptNone) {
121 initializeMipsPostLegalizerCombinerPass(*PassRegistry::getPassRegistry());
123 if (!RuleConfig.parseCommandLineOption())
124 report_fatal_error("Invalid rule identifier");
127 bool MipsPostLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
128 if (MF.getProperties().hasProperty(
129 MachineFunctionProperties::Property::FailedISel))
130 return false;
131 auto *TPC = &getAnalysis<TargetPassConfig>();
132 const Function &F = MF.getFunction();
133 bool EnableOpt =
134 MF.getTarget().getOptLevel() != CodeGenOptLevel::None && !skipFunction(F);
136 const MipsSubtarget &ST = MF.getSubtarget<MipsSubtarget>();
137 const MipsLegalizerInfo *LI =
138 static_cast<const MipsLegalizerInfo *>(ST.getLegalizerInfo());
140 GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF);
141 MachineDominatorTree *MDT =
142 IsOptNone ? nullptr
143 : &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
144 CombinerInfo CInfo(/*AllowIllegalOps*/ false, /*ShouldLegalizeIllegal*/ true,
145 LI, EnableOpt, F.hasOptSize(), F.hasMinSize());
146 MipsPostLegalizerCombinerImpl Impl(MF, CInfo, TPC, *KB, /*CSEInfo*/ nullptr,
147 RuleConfig, ST, MDT, LI);
148 return Impl.combineMachineInstrs();
151 char MipsPostLegalizerCombiner::ID = 0;
152 INITIALIZE_PASS_BEGIN(MipsPostLegalizerCombiner, DEBUG_TYPE,
153 "Combine Mips machine instrs after legalization", false,
154 false)
155 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
156 INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis)
157 INITIALIZE_PASS_END(MipsPostLegalizerCombiner, DEBUG_TYPE,
158 "Combine Mips machine instrs after legalization", false,
159 false)
161 namespace llvm {
162 FunctionPass *createMipsPostLegalizeCombiner(bool IsOptNone) {
163 return new MipsPostLegalizerCombiner(IsOptNone);
165 } // end namespace llvm