[Clang/AMDGPU] Zero sized arrays not allowed in HIP device code. (#113470)
[llvm-project.git] / llvm / lib / Target / NVPTX / NVPTXRegisterInfo.h
blobd2f6d257d6b07e8b79fac3d51acd7453c2dcd9d9
1 //===- NVPTXRegisterInfo.h - NVPTX Register Information Impl ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the NVPTX implementation of the TargetRegisterInfo class.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXREGISTERINFO_H
14 #define LLVM_LIB_TARGET_NVPTX_NVPTXREGISTERINFO_H
16 #include "llvm/CodeGen/TargetRegisterInfo.h"
17 #include "llvm/Support/StringSaver.h"
18 #include <sstream>
20 #define GET_REGINFO_HEADER
21 #include "NVPTXGenRegisterInfo.inc"
23 namespace llvm {
24 class NVPTXRegisterInfo : public NVPTXGenRegisterInfo {
25 private:
26 // Hold Strings that can be free'd all together with NVPTXRegisterInfo
27 BumpPtrAllocator StrAlloc;
28 UniqueStringSaver StrPool;
29 // State for debug register mapping that can be mutated even through a const
30 // pointer so that we can get the proper dwarf register encoding during ASM
31 // emission.
32 mutable DenseMap<uint64_t, uint64_t> debugRegisterMap;
34 public:
35 NVPTXRegisterInfo();
37 //------------------------------------------------------
38 // Pure virtual functions from TargetRegisterInfo
39 //------------------------------------------------------
41 // NVPTX callee saved registers
42 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
44 BitVector getReservedRegs(const MachineFunction &MF) const override;
46 bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
47 unsigned FIOperandNum,
48 RegScavenger *RS = nullptr) const override;
50 Register getFrameRegister(const MachineFunction &MF) const override;
51 Register getFrameLocalRegister(const MachineFunction &MF) const;
53 UniqueStringSaver &getStrPool() const {
54 return const_cast<UniqueStringSaver &>(StrPool);
57 const char *getName(unsigned RegNo) const {
58 std::stringstream O;
59 O << "reg" << RegNo;
60 return getStrPool().save(O.str()).data();
63 // Manage the debugRegisterMap. PTX virtual registers for DebugInfo are
64 // encoded using the names used in the emitted text of the PTX assembly. This
65 // mapping must be managed during assembly emission.
67 // These are marked const because the interfaces used to access this
68 // RegisterInfo object are all const, but we need to communicate some state
69 // here, because the proper encoding for debug registers is available only
70 // temporarily during ASM emission.
71 void addToDebugRegisterMap(uint64_t preEncodedVirtualRegister,
72 std::string registerName) const;
73 void clearDebugRegisterMap() const;
74 int64_t getDwarfRegNum(MCRegister RegNum, bool isEH) const override;
77 std::string getNVPTXRegClassName(const TargetRegisterClass *RC);
78 std::string getNVPTXRegClassStr(const TargetRegisterClass *RC);
80 } // end namespace llvm
82 #endif