llvm/lib/Target/PowerPC/GISel/PPCLegalizerInfo.cpp

   1 //===- PPCLegalizerInfo.h ----------------------------------------*- C++ -*-==//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 /// This file implements the targeting of the Machinelegalizer class for PowerPC
  10 //===----------------------------------------------------------------------===//
  11
  12 #include "PPCLegalizerInfo.h"
  13
  14 #define DEBUG_TYPE "ppc-legalinfo"
  15
  16 using namespace llvm;
  17 using namespace LegalizeActions;
  18 using namespace LegalizeMutations;
  19 using namespace LegalityPredicates;
  20
  21 static LegalityPredicate isRegisterType(unsigned TypeIdx) {
  22   return [=](const LegalityQuery &Query) {
  23     const LLT QueryTy = Query.Types[TypeIdx];
  24     unsigned TypeSize = QueryTy.getSizeInBits();
  25
  26     if (TypeSize % 32 == 1 || TypeSize > 128)
  27       return false;
  28
  29     // Check if this is a legal PowerPC vector type.
  30     if (QueryTy.isVector()) {
  31       const int EltSize = QueryTy.getElementType().getSizeInBits();
  32       return (EltSize == 8 || EltSize == 16 || EltSize == 32 || EltSize == 64);
  33     }
  34
  35     return true;
  36   };
  37 }
  38
  39 PPCLegalizerInfo::PPCLegalizerInfo(const PPCSubtarget &ST) {
  40   using namespace TargetOpcode;
  41   const LLT P0 = LLT::pointer(0, 64);
  42   const LLT S1 = LLT::scalar(1);
  43   const LLT S8 = LLT::scalar(8);
  44   const LLT S16 = LLT::scalar(16);
  45   const LLT S32 = LLT::scalar(32);
  46   const LLT S64 = LLT::scalar(64);
  47   const LLT V16S8 = LLT::fixed_vector(16, 8);
  48   const LLT V8S16 = LLT::fixed_vector(8, 16);
  49   const LLT V4S32 = LLT::fixed_vector(4, 32);
  50   const LLT V2S64 = LLT::fixed_vector(2, 64);
  51   getActionDefinitionsBuilder(G_IMPLICIT_DEF).legalFor({S64});
  52   getActionDefinitionsBuilder(G_CONSTANT)
  53       .legalFor({S32, S64})
  54       .clampScalar(0, S64, S64);
  55   getActionDefinitionsBuilder({G_ZEXT, G_SEXT, G_ANYEXT})
  56       .legalForCartesianProduct({S64}, {S1, S8, S16, S32})
  57       .clampScalar(0, S64, S64);
  58   getActionDefinitionsBuilder({G_AND, G_OR, G_XOR})
  59       .legalFor({S64, V4S32})
  60       .clampScalar(0, S64, S64)
  61       .bitcastIf(typeIsNot(0, V4S32), changeTo(0, V4S32));
  62   getActionDefinitionsBuilder({G_ADD, G_SUB})
  63       .legalFor({S64, V16S8, V8S16, V4S32, V2S64})
  64       .clampScalar(0, S64, S64);
  65   getActionDefinitionsBuilder(G_BITCAST)
  66       .legalIf(all(isRegisterType(0), isRegisterType(1)))
  67       .lower();
  68
  69   getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
  70       .legalFor({S32, S64, V4S32, V2S64});
  71
  72   getActionDefinitionsBuilder(G_FCMP).legalForCartesianProduct({S1},
  73                                                                {S32, S64});
  74
  75   getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI})
  76       .legalForCartesianProduct({S64}, {S32, S64});
  77
  78   getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
  79       .legalForCartesianProduct({S32, S64}, {S64});
  80
  81   getActionDefinitionsBuilder({G_LOAD, G_STORE})
  82       .legalForTypesWithMemDesc({{S64, P0, S64, 8}, {S32, P0, S32, 4}});
  83
  84   getActionDefinitionsBuilder(G_FCONSTANT).lowerFor({S32, S64});
  85   getActionDefinitionsBuilder(G_CONSTANT_POOL).legalFor({P0});
  86
  87   getLegacyLegalizerInfo().computeTables();
  88 }