llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h

   1 //===-- RISCVMCTargetDesc.h - RISC-V Target Descriptions --------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file provides RISC-V specific target descriptions.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H
  14 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H
  15
  16 #include "llvm/MC/MCTargetOptions.h"
  17 #include "llvm/Support/DataTypes.h"
  18 #include <memory>
  19
  20 namespace llvm {
  21 class MCAsmBackend;
  22 class MCCodeEmitter;
  23 class MCContext;
  24 class MCInstrInfo;
  25 class MCObjectTargetWriter;
  26 class MCRegisterInfo;
  27 class MCSubtargetInfo;
  28 class Target;
  29
  30 MCCodeEmitter *createRISCVMCCodeEmitter(const MCInstrInfo &MCII,
  31                                         MCContext &Ctx);
  32
  33 MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI,
  34                                     const MCRegisterInfo &MRI,
  35                                     const MCTargetOptions &Options);
  36
  37 std::unique_ptr<MCObjectTargetWriter> createRISCVELFObjectWriter(uint8_t OSABI,
  38                                                                  bool Is64Bit);
  39
  40 namespace RISCVVInversePseudosTable {
  41
  42 struct PseudoInfo {
  43   uint16_t Pseudo;
  44   uint16_t BaseInstr;
  45   uint8_t VLMul;
  46   uint8_t SEW;
  47 };
  48
  49 #define GET_RISCVVInversePseudosTable_DECL
  50 #include "RISCVGenSearchableTables.inc"
  51
  52 } // namespace RISCVVInversePseudosTable
  53 } // namespace llvm
  54
  55 // Defines symbolic names for RISC-V registers.
  56 #define GET_REGINFO_ENUM
  57 #include "RISCVGenRegisterInfo.inc"
  58
  59 // Defines symbolic names for RISC-V instructions.
  60 #define GET_INSTRINFO_ENUM
  61 #define GET_INSTRINFO_MC_HELPER_DECLS
  62 #include "RISCVGenInstrInfo.inc"
  63
  64 #define GET_SUBTARGETINFO_ENUM
  65 #include "RISCVGenSubtargetInfo.inc"
  66
  67 #endif