1 //===-- RISCVTargetMachine.h - Define TargetMachine for RISC-V --*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares the RISC-V specific subclass of TargetMachine.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H
16 #include "MCTargetDesc/RISCVMCTargetDesc.h"
17 #include "RISCVSubtarget.h"
18 #include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
19 #include "llvm/IR/DataLayout.h"
23 class RISCVTargetMachine
: public CodeGenTargetMachineImpl
{
24 std::unique_ptr
<TargetLoweringObjectFile
> TLOF
;
25 mutable StringMap
<std::unique_ptr
<RISCVSubtarget
>> SubtargetMap
;
28 RISCVTargetMachine(const Target
&T
, const Triple
&TT
, StringRef CPU
,
29 StringRef FS
, const TargetOptions
&Options
,
30 std::optional
<Reloc::Model
> RM
,
31 std::optional
<CodeModel::Model
> CM
, CodeGenOptLevel OL
,
34 const RISCVSubtarget
*getSubtargetImpl(const Function
&F
) const override
;
35 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
36 // subtargets are per-function entities based on the target-specific
37 // attributes of each function.
38 const RISCVSubtarget
*getSubtargetImpl() const = delete;
40 TargetPassConfig
*createPassConfig(PassManagerBase
&PM
) override
;
42 TargetLoweringObjectFile
*getObjFileLowering() const override
{
47 createMachineFunctionInfo(BumpPtrAllocator
&Allocator
, const Function
&F
,
48 const TargetSubtargetInfo
*STI
) const override
;
50 TargetTransformInfo
getTargetTransformInfo(const Function
&F
) const override
;
52 bool isNoopAddrSpaceCast(unsigned SrcAS
, unsigned DstAS
) const override
;
54 yaml::MachineFunctionInfo
*createDefaultFuncInfoYAML() const override
;
55 yaml::MachineFunctionInfo
*
56 convertFuncInfoToYAML(const MachineFunction
&MF
) const override
;
57 bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo
&,
58 PerFunctionMIParsingState
&PFS
,
60 SMRange
&SourceRange
) const override
;
61 void registerPassBuilderCallbacks(PassBuilder
&PB
) override
;
64 std::unique_ptr
<ScheduleDAGMutation
>
65 createRISCVVectorMaskDAGMutation(const TargetRegisterInfo
*TRI
);