1 add_llvm_component_group(SPIRV)
3 set(LLVM_TARGET_DEFINITIONS SPIRV.td)
5 tablegen(LLVM SPIRVGenAsmWriter.inc -gen-asm-writer)
6 tablegen(LLVM SPIRVGenGlobalISel.inc -gen-global-isel)
7 tablegen(LLVM SPIRVGenInstrInfo.inc -gen-instr-info)
8 tablegen(LLVM SPIRVGenMCCodeEmitter.inc -gen-emitter)
9 tablegen(LLVM SPIRVGenRegisterBank.inc -gen-register-bank)
10 tablegen(LLVM SPIRVGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM SPIRVGenSubtargetInfo.inc -gen-subtarget)
12 tablegen(LLVM SPIRVGenTables.inc -gen-searchable-tables)
13 tablegen(LLVM SPIRVGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
14 -combiners="SPIRVPreLegalizerCombiner")
16 add_public_tablegen_target(SPIRVCommonTableGen)
18 add_llvm_target(SPIRVCodeGen
23 SPIRVInlineAsmLowering.cpp
25 SPIRVEmitIntrinsics.cpp
26 SPIRVGlobalRegistry.cpp
28 SPIRVInstructionSelector.cpp
29 SPIRVStripConvergentIntrinsics.cpp
30 SPIRVMergeRegionExitTargets.cpp
32 SPIRVLegalizerInfo.cpp
35 SPIRVModuleAnalysis.cpp
38 SPIRVPreLegalizerCombiner.cpp
39 SPIRVPostLegalizer.cpp
40 SPIRVPrepareFunctions.cpp
41 SPIRVRegisterBankInfo.cpp
45 SPIRVTargetMachine.cpp
47 SPIRVEmitNonSemanticDI.cpp
72 add_subdirectory(MCTargetDesc)
73 add_subdirectory(TargetInfo)
74 add_subdirectory(Analysis)