1 //===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains the entry points for global functions defined in the LLVM
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_SPARC_SPARC_H
15 #define LLVM_LIB_TARGET_SPARC_SPARC_H
17 #include "MCTargetDesc/SparcMCTargetDesc.h"
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Target/TargetMachine.h"
27 class SparcTargetMachine
;
29 FunctionPass
*createSparcISelDag(SparcTargetMachine
&TM
);
30 FunctionPass
*createSparcDelaySlotFillerPass();
32 void LowerSparcMachineInstrToMCInst(const MachineInstr
*MI
, MCInst
&OutMI
,
34 void initializeSparcDAGToDAGISelLegacyPass(PassRegistry
&);
35 void initializeErrataWorkaroundPass(PassRegistry
&);
39 // Enums corresponding to Sparc condition codes, both icc's and fcc's. These
40 // values must be kept in sync with the ones in the .td file.
45 ICC_NE
= 9, // Not Equal
47 ICC_G
= 10, // Greater
48 ICC_LE
= 2, // Less or Equal
49 ICC_GE
= 11, // Greater or Equal
51 ICC_GU
= 12, // Greater Unsigned
52 ICC_LEU
= 4, // Less or Equal Unsigned
53 ICC_CC
= 13, // Carry Clear/Great or Equal Unsigned
54 ICC_CS
= 5, // Carry Set/Less Unsigned
55 ICC_POS
= 14, // Positive
56 ICC_NEG
= 6, // Negative
57 ICC_VC
= 15, // Overflow Clear
58 ICC_VS
= 7, // Overflow Set
61 FCC_A
= 8 + FCC_BEGIN
, // Always
62 FCC_N
= 0 + FCC_BEGIN
, // Never
63 FCC_U
= 7 + FCC_BEGIN
, // Unordered
64 FCC_G
= 6 + FCC_BEGIN
, // Greater
65 FCC_UG
= 5 + FCC_BEGIN
, // Unordered or Greater
66 FCC_L
= 4 + FCC_BEGIN
, // Less
67 FCC_UL
= 3 + FCC_BEGIN
, // Unordered or Less
68 FCC_LG
= 2 + FCC_BEGIN
, // Less or Greater
69 FCC_NE
= 1 + FCC_BEGIN
, // Not Equal
70 FCC_E
= 9 + FCC_BEGIN
, // Equal
71 FCC_UE
= 10 + FCC_BEGIN
, // Unordered or Equal
72 FCC_GE
= 11 + FCC_BEGIN
, // Greater or Equal
73 FCC_UGE
= 12 + FCC_BEGIN
, // Unordered or Greater or Equal
74 FCC_LE
= 13 + FCC_BEGIN
, // Less or Equal
75 FCC_ULE
= 14 + FCC_BEGIN
, // Unordered or Less or Equal
76 FCC_O
= 15 + FCC_BEGIN
, // Ordered
79 CPCC_A
= 8 + CPCC_BEGIN
, // Always
80 CPCC_N
= 0 + CPCC_BEGIN
, // Never
81 CPCC_3
= 7 + CPCC_BEGIN
,
82 CPCC_2
= 6 + CPCC_BEGIN
,
83 CPCC_23
= 5 + CPCC_BEGIN
,
84 CPCC_1
= 4 + CPCC_BEGIN
,
85 CPCC_13
= 3 + CPCC_BEGIN
,
86 CPCC_12
= 2 + CPCC_BEGIN
,
87 CPCC_123
= 1 + CPCC_BEGIN
,
88 CPCC_0
= 9 + CPCC_BEGIN
,
89 CPCC_03
= 10 + CPCC_BEGIN
,
90 CPCC_02
= 11 + CPCC_BEGIN
,
91 CPCC_023
= 12 + CPCC_BEGIN
,
92 CPCC_01
= 13 + CPCC_BEGIN
,
93 CPCC_013
= 14 + CPCC_BEGIN
,
94 CPCC_012
= 15 + CPCC_BEGIN
,
97 REG_Z
= 1 + REG_BEGIN
, // Is zero
98 REG_LEZ
= 2 + REG_BEGIN
, // Less or equal to zero
99 REG_LZ
= 3 + REG_BEGIN
, // Less than zero
100 REG_NZ
= 5 + REG_BEGIN
, // Is not zero
101 REG_GZ
= 6 + REG_BEGIN
, // Greater than zero
102 REG_GEZ
= 7 + REG_BEGIN
// Greater than or equal to zero
106 inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC
) {
108 case SPCC::ICC_A
: return "a";
109 case SPCC::ICC_N
: return "n";
110 case SPCC::ICC_NE
: return "ne";
111 case SPCC::ICC_E
: return "e";
112 case SPCC::ICC_G
: return "g";
113 case SPCC::ICC_LE
: return "le";
114 case SPCC::ICC_GE
: return "ge";
115 case SPCC::ICC_L
: return "l";
116 case SPCC::ICC_GU
: return "gu";
117 case SPCC::ICC_LEU
: return "leu";
118 case SPCC::ICC_CC
: return "cc";
119 case SPCC::ICC_CS
: return "cs";
120 case SPCC::ICC_POS
: return "pos";
121 case SPCC::ICC_NEG
: return "neg";
122 case SPCC::ICC_VC
: return "vc";
123 case SPCC::ICC_VS
: return "vs";
124 case SPCC::FCC_A
: return "a";
125 case SPCC::FCC_N
: return "n";
126 case SPCC::FCC_U
: return "u";
127 case SPCC::FCC_G
: return "g";
128 case SPCC::FCC_UG
: return "ug";
129 case SPCC::FCC_L
: return "l";
130 case SPCC::FCC_UL
: return "ul";
131 case SPCC::FCC_LG
: return "lg";
132 case SPCC::FCC_NE
: return "ne";
133 case SPCC::FCC_E
: return "e";
134 case SPCC::FCC_UE
: return "ue";
135 case SPCC::FCC_GE
: return "ge";
136 case SPCC::FCC_UGE
: return "uge";
137 case SPCC::FCC_LE
: return "le";
138 case SPCC::FCC_ULE
: return "ule";
139 case SPCC::FCC_O
: return "o";
140 case SPCC::CPCC_A
: return "a";
141 case SPCC::CPCC_N
: return "n";
142 case SPCC::CPCC_3
: return "3";
143 case SPCC::CPCC_2
: return "2";
144 case SPCC::CPCC_23
: return "23";
145 case SPCC::CPCC_1
: return "1";
146 case SPCC::CPCC_13
: return "13";
147 case SPCC::CPCC_12
: return "12";
148 case SPCC::CPCC_123
: return "123";
149 case SPCC::CPCC_0
: return "0";
150 case SPCC::CPCC_03
: return "03";
151 case SPCC::CPCC_02
: return "02";
152 case SPCC::CPCC_023
: return "023";
153 case SPCC::CPCC_01
: return "01";
154 case SPCC::CPCC_013
: return "013";
155 case SPCC::CPCC_012
: return "012";
156 case SPCC::REG_BEGIN
:
157 llvm_unreachable("Use of reserved cond code");
171 llvm_unreachable("Invalid cond code");
174 inline static unsigned HI22(int64_t imm
) {
175 return (unsigned)((imm
>> 10) & ((1 << 22)-1));
178 inline static unsigned LO10(int64_t imm
) {
179 return (unsigned)(imm
& 0x3FF);
182 inline static unsigned HIX22(int64_t imm
) {
186 inline static unsigned LOX10(int64_t imm
) {
190 } // end namespace llvm