llvm/lib/Target/Sparc/SparcSubtarget.cpp

   1 //===-- SparcSubtarget.cpp - SPARC Subtarget Information ------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements the SPARC specific subclass of TargetSubtargetInfo.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "SparcSubtarget.h"
  14 #include "llvm/ADT/StringRef.h"
  15 #include "llvm/MC/TargetRegistry.h"
  16 #include "llvm/Support/MathExtras.h"
  17
  18 using namespace llvm;
  19
  20 #define DEBUG_TYPE "sparc-subtarget"
  21
  22 #define GET_SUBTARGETINFO_TARGET_DESC
  23 #define GET_SUBTARGETINFO_CTOR
  24 #include "SparcGenSubtargetInfo.inc"
  25
  26 void SparcSubtarget::anchor() { }
  27
  28 SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies(
  29     StringRef CPU, StringRef TuneCPU, StringRef FS) {
  30   // Determine default and user specified characteristics
  31   std::string CPUName = std::string(CPU);
  32   if (CPUName.empty())
  33     CPUName = (Is64Bit) ? "v9" : "v8";
  34
  35   if (TuneCPU.empty())
  36     TuneCPU = CPUName;
  37
  38   // Parse features string.
  39   ParseSubtargetFeatures(CPUName, TuneCPU, FS);
  40
  41   // Popc is a v9-only instruction.
  42   if (!IsV9)
  43     UsePopc = false;
  44
  45   return *this;
  46 }
  47
  48 SparcSubtarget::SparcSubtarget(const StringRef &CPU, const StringRef &TuneCPU,
  49                                const StringRef &FS, const TargetMachine &TM,
  50                                bool is64Bit)
  51     : SparcGenSubtargetInfo(TM.getTargetTriple(), CPU, TuneCPU, FS),
  52       ReserveRegister(TM.getMCRegisterInfo()->getNumRegs()),
  53       TargetTriple(TM.getTargetTriple()), Is64Bit(is64Bit),
  54       InstrInfo(initializeSubtargetDependencies(CPU, TuneCPU, FS)),
  55       TLInfo(TM, *this), FrameLowering(*this) {}
  56
  57 int SparcSubtarget::getAdjustedFrameSize(int frameSize) const {
  58
  59   if (is64Bit()) {
  60     // All 64-bit stack frames must be 16-byte aligned, and must reserve space
  61     // for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128.
  62     frameSize += 128;
  63     // Frames with calls must also reserve space for 6 outgoing arguments
  64     // whether they are used or not. LowerCall_64 takes care of that.
  65     frameSize = alignTo(frameSize, 16);
  66   } else {
  67     // Emit the correct save instruction based on the number of bytes in
  68     // the frame. Minimum stack frame size according to V8 ABI is:
  69     //   16 words for register window spill
  70     //    1 word for address of returned aggregate-value
  71     // +  6 words for passing parameters on the stack
  72     // ----------
  73     //   23 words * 4 bytes per word = 92 bytes
  74     frameSize += 92;
  75
  76     // Round up to next doubleword boundary -- a double-word boundary
  77     // is required by the ABI.
  78     frameSize = alignTo(frameSize, 8);
  79   }
  80   return frameSize;
  81 }
  82
  83 bool SparcSubtarget::enableMachineScheduler() const {
  84   return true;
  85 }