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[llvm-project.git] / llvm / lib / Target / VE / MCTargetDesc / VEMCTargetDesc.cpp
blob019748413d32e64f01bff3fd38f9427794b93c5a
1 //===-- VEMCTargetDesc.cpp - VE Target Descriptions -----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides VE specific target descriptions.
11 //===----------------------------------------------------------------------===//
13 #include "VEMCTargetDesc.h"
14 #include "TargetInfo/VETargetInfo.h"
15 #include "VEInstPrinter.h"
16 #include "VEMCAsmInfo.h"
17 #include "VETargetStreamer.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/MC/TargetRegistry.h"
22 #include "llvm/Support/ErrorHandling.h"
24 using namespace llvm;
26 #define GET_INSTRINFO_MC_DESC
27 #define ENABLE_INSTR_PREDICATE_VERIFIER
28 #include "VEGenInstrInfo.inc"
30 #define GET_SUBTARGETINFO_MC_DESC
31 #include "VEGenSubtargetInfo.inc"
33 #define GET_REGINFO_MC_DESC
34 #include "VEGenRegisterInfo.inc"
36 static MCAsmInfo *createVEMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT,
37 const MCTargetOptions &Options) {
38 MCAsmInfo *MAI = new VEELFMCAsmInfo(TT);
39 unsigned Reg = MRI.getDwarfRegNum(VE::SX11, true);
40 MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, Reg, 0);
41 MAI->addInitialFrameState(Inst);
42 return MAI;
45 static MCInstrInfo *createVEMCInstrInfo() {
46 MCInstrInfo *X = new MCInstrInfo();
47 InitVEMCInstrInfo(X);
48 return X;
51 static MCRegisterInfo *createVEMCRegisterInfo(const Triple &TT) {
52 MCRegisterInfo *X = new MCRegisterInfo();
53 InitVEMCRegisterInfo(X, VE::SX10);
54 return X;
57 static MCSubtargetInfo *createVEMCSubtargetInfo(const Triple &TT, StringRef CPU,
58 StringRef FS) {
59 if (CPU.empty())
60 CPU = "generic";
61 return createVEMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS);
64 static MCTargetStreamer *
65 createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
66 return new VETargetELFStreamer(S);
69 static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
70 formatted_raw_ostream &OS,
71 MCInstPrinter *InstPrint) {
72 return new VETargetAsmStreamer(S, OS);
75 static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) {
76 return new VETargetStreamer(S);
79 static MCInstPrinter *createVEMCInstPrinter(const Triple &T,
80 unsigned SyntaxVariant,
81 const MCAsmInfo &MAI,
82 const MCInstrInfo &MII,
83 const MCRegisterInfo &MRI) {
84 return new VEInstPrinter(MAI, MII, MRI);
87 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeVETargetMC() {
88 // Register the MC asm info.
89 RegisterMCAsmInfoFn X(getTheVETarget(), createVEMCAsmInfo);
91 for (Target *T : {&getTheVETarget()}) {
92 // Register the MC instruction info.
93 TargetRegistry::RegisterMCInstrInfo(*T, createVEMCInstrInfo);
95 // Register the MC register info.
96 TargetRegistry::RegisterMCRegInfo(*T, createVEMCRegisterInfo);
98 // Register the MC subtarget info.
99 TargetRegistry::RegisterMCSubtargetInfo(*T, createVEMCSubtargetInfo);
101 // Register the MC Code Emitter.
102 TargetRegistry::RegisterMCCodeEmitter(*T, createVEMCCodeEmitter);
104 // Register the asm backend.
105 TargetRegistry::RegisterMCAsmBackend(*T, createVEAsmBackend);
107 // Register the object target streamer.
108 TargetRegistry::RegisterObjectTargetStreamer(*T,
109 createObjectTargetStreamer);
111 // Register the asm streamer.
112 TargetRegistry::RegisterAsmTargetStreamer(*T, createTargetAsmStreamer);
114 // Register the null streamer.
115 TargetRegistry::RegisterNullTargetStreamer(*T, createNullTargetStreamer);
117 // Register the MCInstPrinter
118 TargetRegistry::RegisterMCInstPrinter(*T, createVEMCInstPrinter);