[flang][cuda] Adding atomicadd as a cudadevice intrinsic and converting it LLVM diale...
[llvm-project.git] / llvm / lib / Target / VE / MCTargetDesc / VEMCTargetDesc.h
blob935a0bfc0c4cdb82a3c19de97bba3bb53b72d9d7
1 //===-- VEMCTargetDesc.h - VE Target Descriptions ---------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides VE specific target descriptions.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
14 #define LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
16 #include "llvm/Support/DataTypes.h"
18 #include <memory>
20 namespace llvm {
21 class MCAsmBackend;
22 class MCCodeEmitter;
23 class MCContext;
24 class MCInstrInfo;
25 class MCObjectTargetWriter;
26 class MCRegisterInfo;
27 class MCSubtargetInfo;
28 class MCTargetOptions;
29 class Target;
31 MCCodeEmitter *createVEMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx);
32 MCAsmBackend *createVEAsmBackend(const Target &T, const MCSubtargetInfo &STI,
33 const MCRegisterInfo &MRI,
34 const MCTargetOptions &Options);
35 std::unique_ptr<MCObjectTargetWriter> createVEELFObjectWriter(uint8_t OSABI);
36 } // namespace llvm
38 // Defines symbolic names for VE registers. This defines a mapping from
39 // register name to register number.
41 #define GET_REGINFO_ENUM
42 #include "VEGenRegisterInfo.inc"
44 // Defines symbolic names for the VE instructions.
46 #define GET_INSTRINFO_ENUM
47 #define GET_INSTRINFO_MC_HELPER_DECLS
48 #include "VEGenInstrInfo.inc"
50 #define GET_SUBTARGETINFO_ENUM
51 #include "VEGenSubtargetInfo.inc"
53 #endif