AMDGPU: Mark test as XFAIL in expensive_checks builds
[llvm-project.git] / llvm / lib / Target / VE / VEMCInstLower.cpp
blob57195f238cf6eed83b5a8353c390aa272bf1f356
1 //===-- VEMCInstLower.cpp - Convert VE MachineInstr to MCInst -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains code to lower VE MachineInstrs to their corresponding
10 // MCInst records.
12 //===----------------------------------------------------------------------===//
14 #include "MCTargetDesc/VEMCExpr.h"
15 #include "VE.h"
16 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineOperand.h"
20 #include "llvm/IR/Mangler.h"
21 #include "llvm/MC/MCAsmInfo.h"
22 #include "llvm/MC/MCContext.h"
23 #include "llvm/MC/MCExpr.h"
24 #include "llvm/MC/MCInst.h"
26 using namespace llvm;
28 static MCOperand LowerSymbolOperand(const MachineInstr *MI,
29 const MachineOperand &MO,
30 const MCSymbol *Symbol, AsmPrinter &AP) {
31 VEMCExpr::VariantKind Kind = (VEMCExpr::VariantKind)MO.getTargetFlags();
33 const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, AP.OutContext);
34 // Add offset iff MO is not jump table info or machine basic block.
35 if (!MO.isJTI() && !MO.isMBB() && MO.getOffset())
36 Expr = MCBinaryExpr::createAdd(
37 Expr, MCConstantExpr::create(MO.getOffset(), AP.OutContext),
38 AP.OutContext);
39 Expr = VEMCExpr::create(Kind, Expr, AP.OutContext);
40 return MCOperand::createExpr(Expr);
43 static MCOperand LowerOperand(const MachineInstr *MI, const MachineOperand &MO,
44 AsmPrinter &AP) {
45 switch (MO.getType()) {
46 default:
47 report_fatal_error("unsupported operand type");
49 case MachineOperand::MO_Register:
50 if (MO.isImplicit())
51 break;
52 return MCOperand::createReg(MO.getReg());
54 case MachineOperand::MO_BlockAddress:
55 return LowerSymbolOperand(
56 MI, MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()), AP);
57 case MachineOperand::MO_ConstantPoolIndex:
58 return LowerSymbolOperand(MI, MO, AP.GetCPISymbol(MO.getIndex()), AP);
59 case MachineOperand::MO_ExternalSymbol:
60 return LowerSymbolOperand(
61 MI, MO, AP.GetExternalSymbolSymbol(MO.getSymbolName()), AP);
62 case MachineOperand::MO_GlobalAddress:
63 return LowerSymbolOperand(MI, MO, AP.getSymbol(MO.getGlobal()), AP);
64 case MachineOperand::MO_Immediate:
65 return MCOperand::createImm(MO.getImm());
66 case MachineOperand::MO_JumpTableIndex:
67 return LowerSymbolOperand(MI, MO, AP.GetJTISymbol(MO.getIndex()), AP);
68 case MachineOperand::MO_MachineBasicBlock:
69 return LowerSymbolOperand(MI, MO, MO.getMBB()->getSymbol(), AP);
71 case MachineOperand::MO_RegisterMask:
72 break;
74 return MCOperand();
77 void llvm::LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
78 AsmPrinter &AP) {
79 OutMI.setOpcode(MI->getOpcode());
81 for (const MachineOperand &MO : MI->operands()) {
82 MCOperand MCOp = LowerOperand(MI, MO, AP);
84 if (MCOp.isValid())
85 OutMI.addOperand(MCOp);