AMDGPU: Mark test as XFAIL in expensive_checks builds
[llvm-project.git] / llvm / lib / Target / VE / VERegisterInfo.h
blob3f6feedf42534b649cde4d0e0edde83c0c58ab04
1 //===-- VERegisterInfo.h - VE Register Information Impl ---------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the VE implementation of the TargetRegisterInfo class.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_VE_VEREGISTERINFO_H
14 #define LLVM_LIB_TARGET_VE_VEREGISTERINFO_H
16 #include "llvm/CodeGen/TargetRegisterInfo.h"
18 #define GET_REGINFO_HEADER
19 #include "VEGenRegisterInfo.inc"
21 namespace llvm {
22 struct VERegisterInfo : public VEGenRegisterInfo {
23 public:
24 VERegisterInfo();
26 /// Code Generation virtual methods...
27 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
28 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
29 CallingConv::ID CC) const override;
30 const uint32_t *getNoPreservedMask() const override;
32 BitVector getReservedRegs(const MachineFunction &MF) const override;
34 const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
35 unsigned Kind) const override;
37 bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
38 unsigned FIOperandNum,
39 RegScavenger *RS = nullptr) const override;
41 Register getFrameRegister(const MachineFunction &MF) const override;
44 } // namespace llvm
46 #endif