1 //===------------------- X86CustomBehaviour.cpp -----------------*-C++ -* -===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// This file implements methods from the X86CustomBehaviour class.
12 //===----------------------------------------------------------------------===//
14 #include "X86CustomBehaviour.h"
15 #include "MCTargetDesc/X86BaseInfo.h"
16 #include "TargetInfo/X86TargetInfo.h"
17 #include "llvm/MC/TargetRegistry.h"
22 void X86InstrPostProcess::setMemBarriers(std::unique_ptr
<Instruction
> &Inst
,
24 switch (MCI
.getOpcode()) {
26 Inst
->setLoadBarrier(true);
27 Inst
->setStoreBarrier(true);
30 Inst
->setLoadBarrier(true);
33 Inst
->setStoreBarrier(true);
38 void X86InstrPostProcess::postProcessInstruction(
39 std::unique_ptr
<Instruction
> &Inst
, const MCInst
&MCI
) {
40 // Currently, we only modify certain instructions' IsALoadBarrier and
41 // IsAStoreBarrier flags.
42 setMemBarriers(Inst
, MCI
);
51 static InstrPostProcess
*createX86InstrPostProcess(const MCSubtargetInfo
&STI
,
52 const MCInstrInfo
&MCII
) {
53 return new X86InstrPostProcess(STI
, MCII
);
56 /// Extern function to initialize the targets for the X86 backend
58 extern "C" LLVM_C_ABI
void LLVMInitializeX86TargetMCA() {
59 TargetRegistry::RegisterInstrPostProcess(getTheX86_32Target(),
60 createX86InstrPostProcess
);
61 TargetRegistry::RegisterInstrPostProcess(getTheX86_64Target(),
62 createX86InstrPostProcess
);