llvm/lib/Target/Xtensa/Xtensa.td

   1 //===- Xtensa.td - Describe the Xtensa Target Machine ------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   6 // See https://llvm.org/LICENSE.txt for license information.
   7 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   8 //
   9 //===----------------------------------------------------------------------===//
  10
  11 //===----------------------------------------------------------------------===//
  12 // Target-independent interfaces
  13 //===----------------------------------------------------------------------===//
  14
  15 include "llvm/Target/Target.td"
  16
  17 //===----------------------------------------------------------------------===//
  18 // Subtarget Features.
  19 //===----------------------------------------------------------------------===//
  20
  21 include "XtensaFeatures.td"
  22
  23 //===----------------------------------------------------------------------===//
  24 // Xtensa supported processors.
  25 //===----------------------------------------------------------------------===//
  26 class Proc<string Name, list<SubtargetFeature> Features>
  27     : Processor<Name, NoItineraries, Features>;
  28
  29 def : Proc<"generic", []>;
  30
  31 //===----------------------------------------------------------------------===//
  32 // Register File Description
  33 //===----------------------------------------------------------------------===//
  34
  35 include "XtensaRegisterInfo.td"
  36
  37 //===----------------------------------------------------------------------===//
  38 // Calling Convention Description
  39 //===----------------------------------------------------------------------===//
  40
  41 include "XtensaCallingConv.td"
  42
  43 //===----------------------------------------------------------------------===//
  44 // Instruction Descriptions
  45 //===----------------------------------------------------------------------===//
  46
  47 include "XtensaInstrInfo.td"
  48
  49 def XtensaInstrInfo : InstrInfo;
  50
  51 //===----------------------------------------------------------------------===//
  52 // Target Declaration
  53 //===----------------------------------------------------------------------===//
  54
  55 def XtensaAsmParser : AsmParser {
  56   let ShouldEmitMatchRegisterAltName = 1;
  57 }
  58
  59 def XtensaInstPrinter : AsmWriter {
  60   string AsmWriterClassName  = "InstPrinter";
  61 }
  62
  63 def Xtensa : Target {
  64   let InstructionSet = XtensaInstrInfo;
  65   let AssemblyWriters = [XtensaInstPrinter];
  66   let AssemblyParsers = [XtensaAsmParser];
  67 }
  68