| blob | 6ab8ac64d64e4ae315a88dab0da424e3cee98b2b |
1 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2 ; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-fixed-length-vector-lmul-max=1 < %s | FileCheck %s
3 ; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64 -mattr=+v,+f,+d,+zfh,+zvfh -riscv-v-fixed-length-vector-lmul-max=1 --type-based-intrinsic-cost=true < %s | FileCheck %s
4 ; Check that we don't crash querying costs when vectors are not enabled.
5 ; RUN: opt -passes="print<cost-model>" 2>&1 -disable-output -mtriple=riscv64
7 define void @select() {
8 ; CHECK-LABEL: 'select'
9 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %1 = select i1 undef, i1 undef, i1 undef
10 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %2 = select i1 undef, <1 x i1> undef, <1 x i1> undef
11 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %3 = select i1 undef, <2 x i1> undef, <2 x i1> undef
12 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %4 = select i1 undef, <4 x i1> undef, <4 x i1> undef
13 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %5 = select i1 undef, <8 x i1> undef, <8 x i1> undef
14 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %6 = select i1 undef, <16 x i1> undef, <16 x i1> undef
15 ; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %7 = select i1 undef, <32 x i1> undef, <32 x i1> undef
16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %8 = select <1 x i1> undef, <1 x i1> undef, <1 x i1> undef
17 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %9 = select <2 x i1> undef, <2 x i1> undef, <2 x i1> undef
18 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %10 = select <4 x i1> undef, <4 x i1> undef, <4 x i1> undef
19 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %11 = select <8 x i1> undef, <8 x i1> undef, <8 x i1> undef
20 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %12 = select <16 x i1> undef, <16 x i1> undef, <16 x i1> undef
21 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %13 = select <32 x i1> undef, <32 x i1> undef, <32 x i1> undef
22 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %14 = select i1 undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef
23 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %15 = select i1 undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef
24 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %16 = select i1 undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef
25 ; CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %17 = select i1 undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef
26 ; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %18 = select i1 undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef
27 ; CHECK-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %19 = select i1 undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef
28 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %20 = select <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef
29 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %21 = select <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef
30 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %22 = select <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef
31 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %23 = select <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef
32 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %24 = select <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef
33 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %25 = select <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef
34 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %26 = call <1 x i1> @llvm.vp.select.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef)
35 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %27 = call <2 x i1> @llvm.vp.select.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef)
36 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %28 = call <4 x i1> @llvm.vp.select.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef)
37 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %29 = call <8 x i1> @llvm.vp.select.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef)
38 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %30 = call <16 x i1> @llvm.vp.select.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef)
39 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %31 = call <32 x i1> @llvm.vp.select.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef)
40 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %32 = call <vscale x 1 x i1> @llvm.vp.select.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef)
41 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %33 = call <vscale x 2 x i1> @llvm.vp.select.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef)
42 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %34 = call <vscale x 4 x i1> @llvm.vp.select.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef)
43 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %35 = call <vscale x 8 x i1> @llvm.vp.select.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef)
44 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %36 = call <vscale x 16 x i1> @llvm.vp.select.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef)
45 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %37 = call <vscale x 32 x i1> @llvm.vp.select.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef)
46 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %38 = select i1 undef, i8 undef, i8 undef
47 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %39 = select i1 undef, <1 x i8> undef, <1 x i8> undef
48 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %40 = select i1 undef, <2 x i8> undef, <2 x i8> undef
49 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %41 = select i1 undef, <4 x i8> undef, <4 x i8> undef
50 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %42 = select i1 undef, <8 x i8> undef, <8 x i8> undef
51 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %43 = select i1 undef, <16 x i8> undef, <16 x i8> undef
52 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %44 = select i1 undef, <32 x i8> undef, <32 x i8> undef
53 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %45 = select <1 x i1> undef, <1 x i8> undef, <1 x i8> undef
54 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %46 = select <2 x i1> undef, <2 x i8> undef, <2 x i8> undef
55 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %47 = select <4 x i1> undef, <4 x i8> undef, <4 x i8> undef
56 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %48 = select <8 x i1> undef, <8 x i8> undef, <8 x i8> undef
57 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %49 = select <16 x i1> undef, <16 x i8> undef, <16 x i8> undef
58 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %50 = select <32 x i1> undef, <32 x i8> undef, <32 x i8> undef
59 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %51 = select i1 undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef
60 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %52 = select i1 undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef
61 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %53 = select i1 undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef
62 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %54 = select i1 undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef
63 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %55 = select i1 undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef
64 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %56 = select i1 undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef
65 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %57 = select <vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef
66 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %58 = select <vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef
67 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %59 = select <vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef
68 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %60 = select <vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef
69 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %61 = select <vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef
70 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %62 = select <vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef
71 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %63 = call <1 x i8> @llvm.vp.select.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef)
72 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %64 = call <2 x i8> @llvm.vp.select.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef)
73 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %65 = call <4 x i8> @llvm.vp.select.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef)
74 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %66 = call <8 x i8> @llvm.vp.select.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef)
75 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %67 = call <16 x i8> @llvm.vp.select.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef)
76 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %68 = call <32 x i8> @llvm.vp.select.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef)
77 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %69 = call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef)
78 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %70 = call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef)
79 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %71 = call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef)
80 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %72 = call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef)
81 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %73 = call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef)
82 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %74 = call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef)
83 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %75 = select i1 undef, i16 undef, i16 undef
84 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %76 = select i1 undef, <1 x i16> undef, <1 x i16> undef
85 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %77 = select i1 undef, <2 x i16> undef, <2 x i16> undef
86 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %78 = select i1 undef, <4 x i16> undef, <4 x i16> undef
87 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %79 = select i1 undef, <8 x i16> undef, <8 x i16> undef
88 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %80 = select i1 undef, <16 x i16> undef, <16 x i16> undef
89 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %81 = select i1 undef, <32 x i16> undef, <32 x i16> undef
90 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %82 = select <1 x i1> undef, <1 x i16> undef, <1 x i16> undef
91 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %83 = select <2 x i1> undef, <2 x i16> undef, <2 x i16> undef
92 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %84 = select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef
93 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %85 = select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef
94 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %86 = select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef
95 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %87 = select <32 x i1> undef, <32 x i16> undef, <32 x i16> undef
96 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %88 = select i1 undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef
97 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %89 = select i1 undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef
98 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %90 = select i1 undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef
99 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %91 = select i1 undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef
100 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %92 = select i1 undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef
101 ; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %93 = select i1 undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef
102 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %94 = select <vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef
103 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %95 = select <vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef
104 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %96 = select <vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef
105 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %97 = select <vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef
106 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %98 = select <vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef
107 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %99 = select <vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef
108 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %100 = call <1 x i16> @llvm.vp.select.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef)
109 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %101 = call <2 x i16> @llvm.vp.select.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef)
110 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %102 = call <4 x i16> @llvm.vp.select.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef)
111 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %103 = call <8 x i16> @llvm.vp.select.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef)
112 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %104 = call <16 x i16> @llvm.vp.select.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef)
113 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %105 = call <32 x i16> @llvm.vp.select.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef)
114 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %106 = call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef)
115 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %107 = call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef)
116 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %108 = call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef)
117 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %109 = call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef)
118 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %110 = call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef)
119 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %111 = call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef)
120 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %112 = select i1 undef, i32 undef, i32 undef
121 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %113 = select i1 undef, <1 x i32> undef, <1 x i32> undef
122 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %114 = select i1 undef, <2 x i32> undef, <2 x i32> undef
123 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %115 = select i1 undef, <4 x i32> undef, <4 x i32> undef
124 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %116 = select i1 undef, <8 x i32> undef, <8 x i32> undef
125 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %117 = select i1 undef, <16 x i32> undef, <16 x i32> undef
126 ; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %118 = select i1 undef, <32 x i32> undef, <32 x i32> undef
127 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %119 = select <1 x i1> undef, <1 x i32> undef, <1 x i32> undef
128 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %120 = select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef
129 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %121 = select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef
130 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %122 = select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef
131 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %123 = select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef
132 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %124 = select <32 x i1> undef, <32 x i32> undef, <32 x i32> undef
133 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %125 = select i1 undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef
134 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %126 = select i1 undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef
135 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %127 = select i1 undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef
136 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %128 = select i1 undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef
137 ; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %129 = select i1 undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef
138 ; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %130 = select i1 undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef
139 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %131 = select <vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef
140 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %132 = select <vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef
141 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %133 = select <vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef
142 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %134 = select <vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef
143 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %135 = select <vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef
144 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %136 = select <vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef
145 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %137 = call <1 x i32> @llvm.vp.select.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef)
146 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %138 = call <2 x i32> @llvm.vp.select.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef)
147 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %139 = call <4 x i32> @llvm.vp.select.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef)
148 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %140 = call <8 x i32> @llvm.vp.select.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef)
149 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %141 = call <16 x i32> @llvm.vp.select.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef)
150 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %142 = call <32 x i32> @llvm.vp.select.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef)
151 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %143 = call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef)
152 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %144 = call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef)
153 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %145 = call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef)
154 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %146 = call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef)
155 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %147 = call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef)
156 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %148 = call <vscale x 32 x i32> @llvm.vp.select.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef)
157 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %149 = select i1 undef, i64 undef, i64 undef
158 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %150 = select i1 undef, <1 x i64> undef, <1 x i64> undef
159 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %151 = select i1 undef, <2 x i64> undef, <2 x i64> undef
160 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %152 = select i1 undef, <4 x i64> undef, <4 x i64> undef
161 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %153 = select i1 undef, <8 x i64> undef, <8 x i64> undef
162 ; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %154 = select i1 undef, <16 x i64> undef, <16 x i64> undef
163 ; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %155 = select i1 undef, <32 x i64> undef, <32 x i64> undef
164 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %156 = select <1 x i1> undef, <1 x i64> undef, <1 x i64> undef
165 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %157 = select <2 x i1> undef, <2 x i64> undef, <2 x i64> undef
166 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %158 = select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef
167 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %159 = select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef
168 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %160 = select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef
169 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %161 = select <32 x i1> undef, <32 x i64> undef, <32 x i64> undef
170 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %162 = select i1 undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef
171 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %163 = select i1 undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef
172 ; CHECK-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %164 = select i1 undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef
173 ; CHECK-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %165 = select i1 undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef
174 ; CHECK-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %166 = select i1 undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef
175 ; CHECK-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %167 = select i1 undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef
176 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %168 = select <vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef
177 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %169 = select <vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef
178 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %170 = select <vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef
179 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %171 = select <vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef
180 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %172 = select <vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef
181 ; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %173 = select <vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef
182 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %174 = call <1 x i64> @llvm.vp.select.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef)
183 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %175 = call <2 x i64> @llvm.vp.select.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef)
184 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %176 = call <4 x i64> @llvm.vp.select.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef)
185 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %177 = call <8 x i64> @llvm.vp.select.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef)
186 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %178 = call <16 x i64> @llvm.vp.select.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef)
187 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %179 = call <32 x i64> @llvm.vp.select.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef)
188 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %180 = call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef)
189 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %181 = call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef)
190 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %182 = call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef)
191 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %183 = call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef)
192 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %184 = call <vscale x 16 x i64> @llvm.vp.select.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef)
193 ; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %185 = call <vscale x 32 x i64> @llvm.vp.select.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef)
194 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
195 ;
196 select i1 undef, i1 undef, i1 undef
197 select i1 undef, <1 x i1> undef, <1 x i1> undef
198 select i1 undef, <2 x i1> undef, <2 x i1> undef
199 select i1 undef, <4 x i1> undef, <4 x i1> undef
200 select i1 undef, <8 x i1> undef, <8 x i1> undef
201 select i1 undef, <16 x i1> undef, <16 x i1> undef
202 select i1 undef, <32 x i1> undef, <32 x i1> undef
203 select <1 x i1> undef, <1 x i1> undef, <1 x i1> undef
204 select <2 x i1> undef, <2 x i1> undef, <2 x i1> undef
205 select <4 x i1> undef, <4 x i1> undef, <4 x i1> undef
206 select <8 x i1> undef, <8 x i1> undef, <8 x i1> undef
207 select <16 x i1> undef, <16 x i1> undef, <16 x i1> undef
208 select <32 x i1> undef, <32 x i1> undef, <32 x i1> undef
209 select i1 undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef
210 select i1 undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef
211 select i1 undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef
212 select i1 undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef
213 select i1 undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef
214 select i1 undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef
215 select <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef
216 select <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef
217 select <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef
218 select <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef
219 select <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef
220 select <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef
222 call <1 x i1> @llvm.vp.select.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef)
223 call <2 x i1> @llvm.vp.select.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef)
224 call <4 x i1> @llvm.vp.select.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef)
225 call <8 x i1> @llvm.vp.select.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef)
226 call <16 x i1> @llvm.vp.select.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef)
227 call <32 x i1> @llvm.vp.select.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef)
228 call <vscale x 1 x i1> @llvm.vp.select.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef)
229 call <vscale x 2 x i1> @llvm.vp.select.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef)
230 call <vscale x 4 x i1> @llvm.vp.select.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef)
231 call <vscale x 8 x i1> @llvm.vp.select.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef)
232 call <vscale x 16 x i1> @llvm.vp.select.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef)
233 call <vscale x 32 x i1> @llvm.vp.select.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef)
235 select i1 undef, i8 undef, i8 undef
236 select i1 undef, <1 x i8> undef, <1 x i8> undef
237 select i1 undef, <2 x i8> undef, <2 x i8> undef
238 select i1 undef, <4 x i8> undef, <4 x i8> undef
239 select i1 undef, <8 x i8> undef, <8 x i8> undef
240 select i1 undef, <16 x i8> undef, <16 x i8> undef
241 select i1 undef, <32 x i8> undef, <32 x i8> undef
242 select <1 x i1> undef, <1 x i8> undef, <1 x i8> undef
243 select <2 x i1> undef, <2 x i8> undef, <2 x i8> undef
244 select <4 x i1> undef, <4 x i8> undef, <4 x i8> undef
245 select <8 x i1> undef, <8 x i8> undef, <8 x i8> undef
246 select <16 x i1> undef, <16 x i8> undef, <16 x i8> undef
247 select <32 x i1> undef, <32 x i8> undef, <32 x i8> undef
248 select i1 undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef
249 select i1 undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef
250 select i1 undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef
251 select i1 undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef
252 select i1 undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef
253 select i1 undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef
254 select <vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef
255 select <vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef
256 select <vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef
257 select <vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef
258 select <vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef
259 select <vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef
261 call <1 x i8> @llvm.vp.select.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef)
262 call <2 x i8> @llvm.vp.select.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef)
263 call <4 x i8> @llvm.vp.select.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef)
264 call <8 x i8> @llvm.vp.select.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef)
265 call <16 x i8> @llvm.vp.select.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef)
266 call <32 x i8> @llvm.vp.select.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef)
267 call <vscale x 1 x i8> @llvm.vp.select.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef)
268 call <vscale x 2 x i8> @llvm.vp.select.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef)
269 call <vscale x 4 x i8> @llvm.vp.select.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef)
270 call <vscale x 8 x i8> @llvm.vp.select.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef)
271 call <vscale x 16 x i8> @llvm.vp.select.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef)
272 call <vscale x 32 x i8> @llvm.vp.select.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef)
274 select i1 undef, i16 undef, i16 undef
275 select i1 undef, <1 x i16> undef, <1 x i16> undef
276 select i1 undef, <2 x i16> undef, <2 x i16> undef
277 select i1 undef, <4 x i16> undef, <4 x i16> undef
278 select i1 undef, <8 x i16> undef, <8 x i16> undef
279 select i1 undef, <16 x i16> undef, <16 x i16> undef
280 select i1 undef, <32 x i16> undef, <32 x i16> undef
281 select <1 x i1> undef, <1 x i16> undef, <1 x i16> undef
282 select <2 x i1> undef, <2 x i16> undef, <2 x i16> undef
283 select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef
284 select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef
285 select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef
286 select <32 x i1> undef, <32 x i16> undef, <32 x i16> undef
287 select i1 undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef
288 select i1 undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef
289 select i1 undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef
290 select i1 undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef
291 select i1 undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef
292 select i1 undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef
293 select <vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef
294 select <vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef
295 select <vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef
296 select <vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef
297 select <vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef
298 select <vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef
300 call <1 x i16> @llvm.vp.select.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef)
301 call <2 x i16> @llvm.vp.select.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef)
302 call <4 x i16> @llvm.vp.select.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef)
303 call <8 x i16> @llvm.vp.select.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef)
304 call <16 x i16> @llvm.vp.select.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef)
305 call <32 x i16> @llvm.vp.select.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef)
306 call <vscale x 1 x i16> @llvm.vp.select.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef)
307 call <vscale x 2 x i16> @llvm.vp.select.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef)
308 call <vscale x 4 x i16> @llvm.vp.select.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef)
309 call <vscale x 8 x i16> @llvm.vp.select.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef)
310 call <vscale x 16 x i16> @llvm.vp.select.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef)
311 call <vscale x 32 x i16> @llvm.vp.select.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef)
313 select i1 undef, i32 undef, i32 undef
314 select i1 undef, <1 x i32> undef, <1 x i32> undef
315 select i1 undef, <2 x i32> undef, <2 x i32> undef
316 select i1 undef, <4 x i32> undef, <4 x i32> undef
317 select i1 undef, <8 x i32> undef, <8 x i32> undef
318 select i1 undef, <16 x i32> undef, <16 x i32> undef
319 select i1 undef, <32 x i32> undef, <32 x i32> undef
320 select <1 x i1> undef, <1 x i32> undef, <1 x i32> undef
321 select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef
322 select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef
323 select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef
324 select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef
325 select <32 x i1> undef, <32 x i32> undef, <32 x i32> undef
326 select i1 undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef
327 select i1 undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef
328 select i1 undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef
329 select i1 undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef
330 select i1 undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef
331 select i1 undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef
332 select <vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef
333 select <vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef
334 select <vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef
335 select <vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef
336 select <vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef
337 select <vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef
339 call <1 x i32> @llvm.vp.select.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef)
340 call <2 x i32> @llvm.vp.select.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef)
341 call <4 x i32> @llvm.vp.select.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef)
342 call <8 x i32> @llvm.vp.select.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef)
343 call <16 x i32> @llvm.vp.select.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef)
344 call <32 x i32> @llvm.vp.select.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef)
345 call <vscale x 1 x i32> @llvm.vp.select.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef)
346 call <vscale x 2 x i32> @llvm.vp.select.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef)
347 call <vscale x 4 x i32> @llvm.vp.select.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef)
348 call <vscale x 8 x i32> @llvm.vp.select.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef)
349 call <vscale x 16 x i32> @llvm.vp.select.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef)
350 call <vscale x 32 x i32> @llvm.vp.select.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef)
352 select i1 undef, i64 undef, i64 undef
353 select i1 undef, <1 x i64> undef, <1 x i64> undef
354 select i1 undef, <2 x i64> undef, <2 x i64> undef
355 select i1 undef, <4 x i64> undef, <4 x i64> undef
356 select i1 undef, <8 x i64> undef, <8 x i64> undef
357 select i1 undef, <16 x i64> undef, <16 x i64> undef
358 select i1 undef, <32 x i64> undef, <32 x i64> undef
359 select <1 x i1> undef, <1 x i64> undef, <1 x i64> undef
360 select <2 x i1> undef, <2 x i64> undef, <2 x i64> undef
361 select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef
362 select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef
363 select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef
364 select <32 x i1> undef, <32 x i64> undef, <32 x i64> undef
365 select i1 undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef
366 select i1 undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef
367 select i1 undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef
368 select i1 undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef
369 select i1 undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef
370 select i1 undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef
371 select <vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef
372 select <vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef
373 select <vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef
374 select <vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef
375 select <vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef
376 select <vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef
378 call <1 x i64> @llvm.vp.select.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef)
379 call <2 x i64> @llvm.vp.select.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef)
380 call <4 x i64> @llvm.vp.select.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef)
381 call <8 x i64> @llvm.vp.select.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef)
382 call <16 x i64> @llvm.vp.select.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef)
383 call <32 x i64> @llvm.vp.select.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef)
384 call <vscale x 1 x i64> @llvm.vp.select.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef)
385 call <vscale x 2 x i64> @llvm.vp.select.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef)
386 call <vscale x 4 x i64> @llvm.vp.select.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef)
387 call <vscale x 8 x i64> @llvm.vp.select.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef)
388 call <vscale x 16 x i64> @llvm.vp.select.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef)
389 call <vscale x 32 x i64> @llvm.vp.select.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef)
391 ret void
392 }
394 define void @select_of_constants() {
395 ; CHECK-LABEL: 'select_of_constants'
396 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = select i1 undef, <2 x i64> splat (i64 128), <2 x i64> zeroinitializer
397 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %2 = select i1 undef, <2 x i64> <i64 128, i64 127>, <2 x i64> zeroinitializer
398 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %3 = select i1 undef, <2 x i64> <i64 0, i64 1>, <2 x i64> zeroinitializer
399 ; CHECK-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %4 = select i1 undef, <2 x i64> <i64 128, i64 533>, <2 x i64> <i64 0, i64 573>
400 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %5 = select <4 x i1> undef, <4 x i32> <i32 524288, i32 262144, i32 131072, i32 65536>, <4 x i32> zeroinitializer
401 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
402 ;
403 ; Splat constants
404 select i1 undef, <2 x i64> <i64 128, i64 128>, <2 x i64> zeroinitializer
405 ; LHS is a VID patern
406 select i1 undef, <2 x i64> <i64 128, i64 127>, <2 x i64> zeroinitializer
407 select i1 undef, <2 x i64> <i64 0, i64 1>, <2 x i64> zeroinitializer
408 ; 2x general (expensive) constants
409 select i1 undef, <2 x i64> <i64 128, i64 533>, <2 x i64> <i64 0, i64 573>
411 ; powers of two (still expensive)
412 select <4 x i1> undef, <4 x i32> <i32 524288, i32 262144, i32 131072, i32 65536>, <4 x i32> zeroinitializer
414 ret void
415 }
417 define void @vp_merge() {
418 ; CHECK-LABEL: 'vp_merge'
419 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %1 = call <1 x i1> @llvm.vp.merge.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef)
420 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %2 = call <2 x i1> @llvm.vp.merge.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef)
421 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %3 = call <4 x i1> @llvm.vp.merge.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef)
422 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %4 = call <8 x i1> @llvm.vp.merge.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef)
423 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %5 = call <16 x i1> @llvm.vp.merge.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef)
424 ; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %6 = call <32 x i1> @llvm.vp.merge.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef)
425 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %7 = call <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef)
426 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %8 = call <vscale x 2 x i1> @llvm.vp.merge.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef)
427 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %9 = call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef)
428 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %10 = call <vscale x 8 x i1> @llvm.vp.merge.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef)
429 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %11 = call <vscale x 16 x i1> @llvm.vp.merge.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef)
430 ; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %12 = call <vscale x 32 x i1> @llvm.vp.merge.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef)
431 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %13 = call <1 x i8> @llvm.vp.merge.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef)
432 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %14 = call <2 x i8> @llvm.vp.merge.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef)
433 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %15 = call <4 x i8> @llvm.vp.merge.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef)
434 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %16 = call <8 x i8> @llvm.vp.merge.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef)
435 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %17 = call <16 x i8> @llvm.vp.merge.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef)
436 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %18 = call <32 x i8> @llvm.vp.merge.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef)
437 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %19 = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef)
438 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %20 = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef)
439 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %21 = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef)
440 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %22 = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef)
441 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %23 = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef)
442 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %24 = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef)
443 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %25 = call <1 x i16> @llvm.vp.merge.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef)
444 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %26 = call <2 x i16> @llvm.vp.merge.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef)
445 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %27 = call <4 x i16> @llvm.vp.merge.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef)
446 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %28 = call <8 x i16> @llvm.vp.merge.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef)
447 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %29 = call <16 x i16> @llvm.vp.merge.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef)
448 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %30 = call <32 x i16> @llvm.vp.merge.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef)
449 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %31 = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef)
450 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %32 = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef)
451 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %33 = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef)
452 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %34 = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef)
453 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %35 = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef)
454 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %36 = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef)
455 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %37 = call <1 x i32> @llvm.vp.merge.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef)
456 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %38 = call <2 x i32> @llvm.vp.merge.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef)
457 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %39 = call <4 x i32> @llvm.vp.merge.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef)
458 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %40 = call <8 x i32> @llvm.vp.merge.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef)
459 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %41 = call <16 x i32> @llvm.vp.merge.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef)
460 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %42 = call <32 x i32> @llvm.vp.merge.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef)
461 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %43 = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef)
462 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %44 = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef)
463 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %45 = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef)
464 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %46 = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef)
465 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %47 = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef)
466 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %48 = call <vscale x 32 x i32> @llvm.vp.merge.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef)
467 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %49 = call <1 x i64> @llvm.vp.merge.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef)
468 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %50 = call <2 x i64> @llvm.vp.merge.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef)
469 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %51 = call <4 x i64> @llvm.vp.merge.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef)
470 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %52 = call <8 x i64> @llvm.vp.merge.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef)
471 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %53 = call <16 x i64> @llvm.vp.merge.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef)
472 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %54 = call <32 x i64> @llvm.vp.merge.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef)
473 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %55 = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef)
474 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %56 = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef)
475 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %57 = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef)
476 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %58 = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef)
477 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %59 = call <vscale x 16 x i64> @llvm.vp.merge.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef)
478 ; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %60 = call <vscale x 32 x i64> @llvm.vp.merge.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef)
479 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %61 = call <1 x float> @llvm.vp.merge.v1f32(<1 x i1> undef, <1 x float> undef, <1 x float> undef, i32 undef)
480 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %62 = call <2 x float> @llvm.vp.merge.v2f32(<2 x i1> undef, <2 x float> undef, <2 x float> undef, i32 undef)
481 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %63 = call <4 x float> @llvm.vp.merge.v4f32(<4 x i1> undef, <4 x float> undef, <4 x float> undef, i32 undef)
482 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %64 = call <8 x float> @llvm.vp.merge.v8f32(<8 x i1> undef, <8 x float> undef, <8 x float> undef, i32 undef)
483 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %65 = call <16 x float> @llvm.vp.merge.v16f32(<16 x i1> undef, <16 x float> undef, <16 x float> undef, i32 undef)
484 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %66 = call <32 x float> @llvm.vp.merge.v32f32(<32 x i1> undef, <32 x float> undef, <32 x float> undef, i32 undef)
485 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %67 = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> undef, <vscale x 1 x float> undef, <vscale x 1 x float> undef, i32 undef)
486 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %68 = call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> undef, <vscale x 2 x float> undef, <vscale x 2 x float> undef, i32 undef)
487 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %69 = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> undef, <vscale x 4 x float> undef, <vscale x 4 x float> undef, i32 undef)
488 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %70 = call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> undef, <vscale x 8 x float> undef, <vscale x 8 x float> undef, i32 undef)
489 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %71 = call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> undef, <vscale x 16 x float> undef, <vscale x 16 x float> undef, i32 undef)
490 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %72 = call <vscale x 32 x float> @llvm.vp.merge.nxv32f32(<vscale x 32 x i1> undef, <vscale x 32 x float> undef, <vscale x 32 x float> undef, i32 undef)
491 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %73 = call <1 x double> @llvm.vp.merge.v1f64(<1 x i1> undef, <1 x double> undef, <1 x double> undef, i32 undef)
492 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %74 = call <2 x double> @llvm.vp.merge.v2f64(<2 x i1> undef, <2 x double> undef, <2 x double> undef, i32 undef)
493 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %75 = call <4 x double> @llvm.vp.merge.v4f64(<4 x i1> undef, <4 x double> undef, <4 x double> undef, i32 undef)
494 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %76 = call <8 x double> @llvm.vp.merge.v8f64(<8 x i1> undef, <8 x double> undef, <8 x double> undef, i32 undef)
495 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %77 = call <16 x double> @llvm.vp.merge.v16f64(<16 x i1> undef, <16 x double> undef, <16 x double> undef, i32 undef)
496 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %78 = call <32 x double> @llvm.vp.merge.v32f64(<32 x i1> undef, <32 x double> undef, <32 x double> undef, i32 undef)
497 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %79 = call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> undef, <vscale x 1 x double> undef, <vscale x 1 x double> undef, i32 undef)
498 ; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %80 = call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> undef, <vscale x 2 x double> undef, <vscale x 2 x double> undef, i32 undef)
499 ; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %81 = call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> undef, <vscale x 4 x double> undef, <vscale x 4 x double> undef, i32 undef)
500 ; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %82 = call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> undef, <vscale x 8 x double> undef, <vscale x 8 x double> undef, i32 undef)
501 ; CHECK-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %83 = call <vscale x 16 x double> @llvm.vp.merge.nxv16f64(<vscale x 16 x i1> undef, <vscale x 16 x double> undef, <vscale x 16 x double> undef, i32 undef)
502 ; CHECK-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %84 = call <vscale x 32 x double> @llvm.vp.merge.nxv32f64(<vscale x 32 x i1> undef, <vscale x 32 x double> undef, <vscale x 32 x double> undef, i32 undef)
503 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
504 ;
505 call <1 x i1> @llvm.vp.merge.v1i1(<1 x i1> undef, <1 x i1> undef, <1 x i1> undef, i32 undef)
506 call <2 x i1> @llvm.vp.merge.v2i1(<2 x i1> undef, <2 x i1> undef, <2 x i1> undef, i32 undef)
507 call <4 x i1> @llvm.vp.merge.v4i1(<4 x i1> undef, <4 x i1> undef, <4 x i1> undef, i32 undef)
508 call <8 x i1> @llvm.vp.merge.v8i1(<8 x i1> undef, <8 x i1> undef, <8 x i1> undef, i32 undef)
509 call <16 x i1> @llvm.vp.merge.v16i1(<16 x i1> undef, <16 x i1> undef, <16 x i1> undef, i32 undef)
510 call <32 x i1> @llvm.vp.merge.v32i1(<32 x i1> undef, <32 x i1> undef, <32 x i1> undef, i32 undef)
511 call <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1> undef, <vscale x 1 x i1> undef, <vscale x 1 x i1> undef, i32 undef)
512 call <vscale x 2 x i1> @llvm.vp.merge.nxv2i1(<vscale x 2 x i1> undef, <vscale x 2 x i1> undef, <vscale x 2 x i1> undef, i32 undef)
513 call <vscale x 4 x i1> @llvm.vp.merge.nxv4i1(<vscale x 4 x i1> undef, <vscale x 4 x i1> undef, <vscale x 4 x i1> undef, i32 undef)
514 call <vscale x 8 x i1> @llvm.vp.merge.nxv8i1(<vscale x 8 x i1> undef, <vscale x 8 x i1> undef, <vscale x 8 x i1> undef, i32 undef)
515 call <vscale x 16 x i1> @llvm.vp.merge.nxv16i1(<vscale x 16 x i1> undef, <vscale x 16 x i1> undef, <vscale x 16 x i1> undef, i32 undef)
516 call <vscale x 32 x i1> @llvm.vp.merge.nxv32i1(<vscale x 32 x i1> undef, <vscale x 32 x i1> undef, <vscale x 32 x i1> undef, i32 undef)
518 call <1 x i8> @llvm.vp.merge.v1i8(<1 x i1> undef, <1 x i8> undef, <1 x i8> undef, i32 undef)
519 call <2 x i8> @llvm.vp.merge.v2i8(<2 x i1> undef, <2 x i8> undef, <2 x i8> undef, i32 undef)
520 call <4 x i8> @llvm.vp.merge.v4i8(<4 x i1> undef, <4 x i8> undef, <4 x i8> undef, i32 undef)
521 call <8 x i8> @llvm.vp.merge.v8i8(<8 x i1> undef, <8 x i8> undef, <8 x i8> undef, i32 undef)
522 call <16 x i8> @llvm.vp.merge.v16i8(<16 x i1> undef, <16 x i8> undef, <16 x i8> undef, i32 undef)
523 call <32 x i8> @llvm.vp.merge.v32i8(<32 x i1> undef, <32 x i8> undef, <32 x i8> undef, i32 undef)
524 call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> undef, <vscale x 1 x i8> undef, <vscale x 1 x i8> undef, i32 undef)
525 call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> undef, <vscale x 2 x i8> undef, <vscale x 2 x i8> undef, i32 undef)
526 call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> undef, <vscale x 4 x i8> undef, <vscale x 4 x i8> undef, i32 undef)
527 call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> undef, <vscale x 8 x i8> undef, <vscale x 8 x i8> undef, i32 undef)
528 call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> undef, <vscale x 16 x i8> undef, <vscale x 16 x i8> undef, i32 undef)
529 call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> undef, <vscale x 32 x i8> undef, <vscale x 32 x i8> undef, i32 undef)
531 call <1 x i16> @llvm.vp.merge.v1i16(<1 x i1> undef, <1 x i16> undef, <1 x i16> undef, i32 undef)
532 call <2 x i16> @llvm.vp.merge.v2i16(<2 x i1> undef, <2 x i16> undef, <2 x i16> undef, i32 undef)
533 call <4 x i16> @llvm.vp.merge.v4i16(<4 x i1> undef, <4 x i16> undef, <4 x i16> undef, i32 undef)
534 call <8 x i16> @llvm.vp.merge.v8i16(<8 x i1> undef, <8 x i16> undef, <8 x i16> undef, i32 undef)
535 call <16 x i16> @llvm.vp.merge.v16i16(<16 x i1> undef, <16 x i16> undef, <16 x i16> undef, i32 undef)
536 call <32 x i16> @llvm.vp.merge.v32i16(<32 x i1> undef, <32 x i16> undef, <32 x i16> undef, i32 undef)
537 call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> undef, <vscale x 1 x i16> undef, <vscale x 1 x i16> undef, i32 undef)
538 call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> undef, <vscale x 2 x i16> undef, <vscale x 2 x i16> undef, i32 undef)
539 call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> undef, <vscale x 4 x i16> undef, <vscale x 4 x i16> undef, i32 undef)
540 call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> undef, <vscale x 8 x i16> undef, <vscale x 8 x i16> undef, i32 undef)
541 call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> undef, <vscale x 16 x i16> undef, <vscale x 16 x i16> undef, i32 undef)
542 call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> undef, <vscale x 32 x i16> undef, <vscale x 32 x i16> undef, i32 undef)
544 call <1 x i32> @llvm.vp.merge.v1i32(<1 x i1> undef, <1 x i32> undef, <1 x i32> undef, i32 undef)
545 call <2 x i32> @llvm.vp.merge.v2i32(<2 x i1> undef, <2 x i32> undef, <2 x i32> undef, i32 undef)
546 call <4 x i32> @llvm.vp.merge.v4i32(<4 x i1> undef, <4 x i32> undef, <4 x i32> undef, i32 undef)
547 call <8 x i32> @llvm.vp.merge.v8i32(<8 x i1> undef, <8 x i32> undef, <8 x i32> undef, i32 undef)
548 call <16 x i32> @llvm.vp.merge.v16i32(<16 x i1> undef, <16 x i32> undef, <16 x i32> undef, i32 undef)
549 call <32 x i32> @llvm.vp.merge.v32i32(<32 x i1> undef, <32 x i32> undef, <32 x i32> undef, i32 undef)
550 call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> undef, <vscale x 1 x i32> undef, <vscale x 1 x i32> undef, i32 undef)
551 call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> undef, <vscale x 2 x i32> undef, <vscale x 2 x i32> undef, i32 undef)
552 call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> undef, <vscale x 4 x i32> undef, <vscale x 4 x i32> undef, i32 undef)
553 call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> undef, <vscale x 8 x i32> undef, <vscale x 8 x i32> undef, i32 undef)
554 call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> undef, <vscale x 16 x i32> undef, <vscale x 16 x i32> undef, i32 undef)
555 call <vscale x 32 x i32> @llvm.vp.merge.nxv32i32(<vscale x 32 x i1> undef, <vscale x 32 x i32> undef, <vscale x 32 x i32> undef, i32 undef)
557 call <1 x i64> @llvm.vp.merge.v1i64(<1 x i1> undef, <1 x i64> undef, <1 x i64> undef, i32 undef)
558 call <2 x i64> @llvm.vp.merge.v2i64(<2 x i1> undef, <2 x i64> undef, <2 x i64> undef, i32 undef)
559 call <4 x i64> @llvm.vp.merge.v4i64(<4 x i1> undef, <4 x i64> undef, <4 x i64> undef, i32 undef)
560 call <8 x i64> @llvm.vp.merge.v8i64(<8 x i1> undef, <8 x i64> undef, <8 x i64> undef, i32 undef)
561 call <16 x i64> @llvm.vp.merge.v16i64(<16 x i1> undef, <16 x i64> undef, <16 x i64> undef, i32 undef)
562 call <32 x i64> @llvm.vp.merge.v32i64(<32 x i1> undef, <32 x i64> undef, <32 x i64> undef, i32 undef)
563 call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> undef, <vscale x 1 x i64> undef, <vscale x 1 x i64> undef, i32 undef)
564 call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> undef, <vscale x 2 x i64> undef, <vscale x 2 x i64> undef, i32 undef)
565 call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> undef, <vscale x 4 x i64> undef, <vscale x 4 x i64> undef, i32 undef)
566 call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> undef, <vscale x 8 x i64> undef, <vscale x 8 x i64> undef, i32 undef)
567 call <vscale x 16 x i64> @llvm.vp.merge.nxv16i64(<vscale x 16 x i1> undef, <vscale x 16 x i64> undef, <vscale x 16 x i64> undef, i32 undef)
568 call <vscale x 32 x i64> @llvm.vp.merge.nxv32i64(<vscale x 32 x i1> undef, <vscale x 32 x i64> undef, <vscale x 32 x i64> undef, i32 undef)
570 call <1 x float> @llvm.vp.merge.v1f32(<1 x i1> undef, <1 x float> undef, <1 x float> undef, i32 undef)
571 call <2 x float> @llvm.vp.merge.v2f32(<2 x i1> undef, <2 x float> undef, <2 x float> undef, i32 undef)
572 call <4 x float> @llvm.vp.merge.v4f32(<4 x i1> undef, <4 x float> undef, <4 x float> undef, i32 undef)
573 call <8 x float> @llvm.vp.merge.v8f32(<8 x i1> undef, <8 x float> undef, <8 x float> undef, i32 undef)
574 call <16 x float> @llvm.vp.merge.v16f32(<16 x i1> undef, <16 x float> undef, <16 x float> undef, i32 undef)
575 call <32 x float> @llvm.vp.merge.v32f32(<32 x i1> undef, <32 x float> undef, <32 x float> undef, i32 undef)
576 call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> undef, <vscale x 1 x float> undef, <vscale x 1 x float> undef, i32 undef)
577 call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> undef, <vscale x 2 x float> undef, <vscale x 2 x float> undef, i32 undef)
578 call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> undef, <vscale x 4 x float> undef, <vscale x 4 x float> undef, i32 undef)
579 call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> undef, <vscale x 8 x float> undef, <vscale x 8 x float> undef, i32 undef)
580 call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> undef, <vscale x 16 x float> undef, <vscale x 16 x float> undef, i32 undef)
581 call <vscale x 32 x float> @llvm.vp.merge.nxv32f32(<vscale x 32 x i1> undef, <vscale x 32 x float> undef, <vscale x 32 x float> undef, i32 undef)
583 call <1 x double> @llvm.vp.merge.v1f64(<1 x i1> undef, <1 x double> undef, <1 x double> undef, i32 undef)
584 call <2 x double> @llvm.vp.merge.v2f64(<2 x i1> undef, <2 x double> undef, <2 x double> undef, i32 undef)
585 call <4 x double> @llvm.vp.merge.v4f64(<4 x i1> undef, <4 x double> undef, <4 x double> undef, i32 undef)
586 call <8 x double> @llvm.vp.merge.v8f64(<8 x i1> undef, <8 x double> undef, <8 x double> undef, i32 undef)
587 call <16 x double> @llvm.vp.merge.v16f64(<16 x i1> undef, <16 x double> undef, <16 x double> undef, i32 undef)
588 call <32 x double> @llvm.vp.merge.v32f64(<32 x i1> undef, <32 x double> undef, <32 x double> undef, i32 undef)
589 call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> undef, <vscale x 1 x double> undef, <vscale x 1 x double> undef, i32 undef)
590 call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> undef, <vscale x 2 x double> undef, <vscale x 2 x double> undef, i32 undef)
591 call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> undef, <vscale x 4 x double> undef, <vscale x 4 x double> undef, i32 undef)
592 call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> undef, <vscale x 8 x double> undef, <vscale x 8 x double> undef, i32 undef)
593 call <vscale x 16 x double> @llvm.vp.merge.nxv16f64(<vscale x 16 x i1> undef, <vscale x 16 x double> undef, <vscale x 16 x double> undef, i32 undef)
594 call <vscale x 32 x double> @llvm.vp.merge.nxv32f64(<vscale x 32 x i1> undef, <vscale x 32 x double> undef, <vscale x 32 x double> undef, i32 undef)
596 ret void
597 }