1 ; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
3 ; This test ensures we don't end up with multiple reaching defs for a single
4 ; use/phi edge If we were to optimize defs, we would end up with 2=
5 ; MemoryDef(liveOnEntry) and 4 = MemoryDef(liveOnEntry) Both would mean both
6 ; 1,2, and 3,4 would reach the phi node. Because the phi node can only have one
7 ; entry on each edge, it would choose 2, 4 and disconnect 1 and 3 completely
8 ; from the SSA graph, even though they are not dead
10 define void @sink_store(i32 %index, ptr %foo, ptr %bar) {
12 %cmp = trunc i32 %index to i1
13 br i1 %cmp, label %if.then, label %if.else
15 if.then: ; preds = %entry
16 ; CHECK: 1 = MemoryDef(liveOnEntry)
17 ; CHECK-NEXT: store i32 %index, ptr %foo, align 4
18 store i32 %index, ptr %foo, align 4
19 ; CHECK: 2 = MemoryDef(1)
20 ; CHECK-NEXT: store i32 %index, ptr %bar, align 4
21 store i32 %index, ptr %bar, align 4
24 if.else: ; preds = %entry
25 ; CHECK: 3 = MemoryDef(liveOnEntry)
26 ; CHECK-NEXT: store i32 %index, ptr %foo, align 4
27 store i32 %index, ptr %foo, align 4
28 ; CHECK: 4 = MemoryDef(3)
29 ; CHECK-NEXT: store i32 %index, ptr %bar, align 4
30 store i32 %index, ptr %bar, align 4
33 if.end: ; preds = %if.else, %if.then
34 ; CHECK: 5 = MemoryPhi({if.then,2},{if.else,4})
36 ; CHECK-NEXT: %c = load i32, ptr %foo
37 %c = load i32, ptr %foo
39 ; CHECK-NEXT: %d = load i32, ptr %bar
40 %d = load i32, ptr %bar