llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/always-uniform.mir

   1 # RUN: llc -mtriple=amdgcn-- -mcpu=gfx900 -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s
   2
   3 # readlane, readfirstlane is always uniform
   4
   5 ---
   6 name:            readlane
   7 machineFunctionInfo:
   8   isEntryFunction: true
   9 body:             |
  10   bb.0:
  11     ; CHECK-LABEL: MachineUniformityInfo for function: readlane
  12     ; CHECK-NEXT: ALL VALUES UNIFORM
  13     %0:vgpr_32 = IMPLICIT_DEF
  14     %1:vgpr_32 = IMPLICIT_DEF
  15     %2:sgpr_32 = V_READFIRSTLANE_B32 %0, implicit $exec
  16     %3:sgpr_32 = V_READLANE_B32 %1, 0, implicit $exec
  17     $sgpr0 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
  18     $sgpr1 = V_READLANE_B32 $vgpr1, $sgpr0, implicit $exec
  19     S_ENDPGM 0
  20 ...
  21
  22 # Readlane with physical register as operand
  23 ---
  24 name:            readlane2
  25 machineFunctionInfo:
  26   isEntryFunction: true
  27 body:             |
  28   bb.0:
  29     ; CHECK-LABEL: MachineUniformityInfo for function: readlane2
  30     ; CHECK-NEXT: ALL VALUES UNIFORM
  31     %0:vgpr_32 = IMPLICIT_DEF
  32     %1:vgpr_32 = IMPLICIT_DEF
  33     %4:sgpr_32 = V_READLANE_B32 $vgpr0, 0, implicit $exec
  34     $sgpr0 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
  35     $sgpr1 = V_READLANE_B32 $vgpr1, $sgpr0, implicit $exec
  36     %5:sgpr_32 = V_READFIRSTLANE_B32 $vgpr1, implicit $exec
  37     S_ENDPGM 0
  38 ...
  39
  40
  41
  42 # for copy operand src = sgpr -> uniform
  43 ---
  44 name:            sgprcopy
  45 tracksRegLiveness: true
  46 machineFunctionInfo:
  47   isEntryFunction: true
  48 body:             |
  49   bb.0:
  50     ; CHECK-LABEL: MachineUniformityInfo for function: sgprcopy
  51     ; CHECK-NEXT: ALL VALUES UNIFORM
  52     liveins: $sgpr0,$sgpr1,$vgpr0
  53     %0:sgpr_32 = COPY $sgpr0
  54     %1:vgpr_32 = COPY $sgpr1
  55     S_ENDPGM 0
  56 ...