1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s
4 ; PR48683 'Quadratic Reciprocity' - and(mul(x,x),2) -> 0
6 define i1 @PR48683(i32 %x) {
7 ; CHECK-LABEL: PR48683:
9 ; CHECK-NEXT: mov w0, wzr
13 %c = icmp ne i32 %b, 0
17 define <4 x i1> @PR48683_vec(<4 x i32> %x) {
18 ; CHECK-LABEL: PR48683_vec:
20 ; CHECK-NEXT: movi v0.2d, #0000000000000000
22 %a = mul <4 x i32> %x, %x
23 %b = and <4 x i32> %a, <i32 2, i32 2, i32 2, i32 2>
24 %c = icmp ne <4 x i32> %b, zeroinitializer
28 define <4 x i1> @PR48683_vec_undef(<4 x i32> %x) {
29 ; CHECK-LABEL: PR48683_vec_undef:
31 ; CHECK-NEXT: movi v1.4s, #2
32 ; CHECK-NEXT: mul v0.4s, v0.4s, v0.4s
33 ; CHECK-NEXT: cmtst v0.4s, v0.4s, v1.4s
34 ; CHECK-NEXT: xtn v0.4h, v0.4s
36 %a = mul <4 x i32> %x, %x
37 %b = and <4 x i32> %a, <i32 2, i32 2, i32 2, i32 undef>
38 %c = icmp ne <4 x i32> %b, zeroinitializer
42 ; mul(x,x) - bit[1] is 0, but if demanding the other bits the source must not be undef
44 define i64 @combine_mul_self_demandedbits(i64 %x) {
45 ; CHECK-LABEL: combine_mul_self_demandedbits:
47 ; CHECK-NEXT: mul x0, x0, x0
54 define <4 x i32> @combine_mul_self_demandedbits_vector(<4 x i32> %x) {
55 ; CHECK-LABEL: combine_mul_self_demandedbits_vector:
57 ; CHECK-NEXT: mul v0.4s, v0.4s, v0.4s
59 %1 = freeze <4 x i32> %x
60 %2 = mul <4 x i32> %1, %1
61 %3 = and <4 x i32> %2, <i32 -3, i32 -3, i32 -3, i32 -3>
65 define i8 @one_demanded_bit(i8 %x) {
66 ; CHECK-LABEL: one_demanded_bit:
68 ; CHECK-NEXT: lsl w8, w0, #6
69 ; CHECK-NEXT: orr w0, w8, #0xffffffbf
71 %m = mul i8 %x, 192 ; 0b1100_0000
72 %r = or i8 %m, 191 ; 0b1011_1111
76 define <2 x i64> @one_demanded_bit_splat(<2 x i64> %x) {
77 ; CHECK-LABEL: one_demanded_bit_splat:
79 ; CHECK-NEXT: mov w8, #32 // =0x20
80 ; CHECK-NEXT: shl v0.2d, v0.2d, #5
81 ; CHECK-NEXT: dup v1.2d, x8
82 ; CHECK-NEXT: and v0.16b, v0.16b, v1.16b
84 %m = mul <2 x i64> %x, <i64 160, i64 160> ; 0b1010_0000
85 %r = and <2 x i64> %m, <i64 32, i64 32> ; 0b0010_0000
89 define i32 @one_demanded_low_bit(i32 %x) {
90 ; CHECK-LABEL: one_demanded_low_bit:
92 ; CHECK-NEXT: and w0, w0, #0x1
94 %m = mul i32 %x, -63 ; any odd number will do
99 define i16 @squared_one_demanded_low_bit(i16 %x) {
100 ; CHECK-LABEL: squared_one_demanded_low_bit:
102 ; CHECK-NEXT: and w0, w0, #0x1
104 %mul = mul i16 %x, %x
105 %and = and i16 %mul, 1
109 define <4 x i32> @squared_one_demanded_low_bit_splat(<4 x i32> %x) {
110 ; CHECK-LABEL: squared_one_demanded_low_bit_splat:
112 ; CHECK-NEXT: mvni v1.4s, #1
113 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
115 %mul = mul <4 x i32> %x, %x
116 %and = or <4 x i32> %mul, <i32 -2, i32 -2, i32 -2, i32 -2>
120 define i32 @squared_demanded_2_low_bits(i32 %x) {
121 ; CHECK-LABEL: squared_demanded_2_low_bits:
123 ; CHECK-NEXT: and w0, w0, #0x1
125 %mul = mul i32 %x, %x
126 %and = and i32 %mul, 3
130 define <2 x i64> @squared_demanded_2_low_bits_splat(<2 x i64> %x) {
131 ; CHECK-LABEL: squared_demanded_2_low_bits_splat:
133 ; CHECK-NEXT: mov x8, #-2 // =0xfffffffffffffffe
134 ; CHECK-NEXT: dup v1.2d, x8
135 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
137 %mul = mul <2 x i64> %x, %x
138 %and = or <2 x i64> %mul, <i64 -2, i64 -2>