1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple aarch64 -run-pass=machine-sink -sink-insts-to-avoid-spills -aarch64-enable-sink-fold=true %s -o - 2>&1 | FileCheck %s
4 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
5 target triple = "aarch64"
7 %struct.A = type { i32, i32, i32, i32, i32, i32 }
9 @A = external dso_local global [100 x i32], align 4
11 define void @cant_sink_adds_call_in_block(ptr nocapture readonly %input, ptr %a) {
13 %i = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 1
14 %i1 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 2
15 %i2 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 3
16 %i3 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 4
17 %i4 = getelementptr inbounds %struct.A, ptr %a, i64 0, i32 5
18 %scevgep = getelementptr i8, ptr %input, i64 1
21 .backedge: ; preds = %.backedge.backedge, %bb
22 %lsr.iv = phi ptr [ %scevgep1, %.backedge.backedge ], [ %scevgep, %bb ]
23 %i5 = load i8, ptr %lsr.iv, align 1
24 %i6 = zext i8 %i5 to i32
25 switch i32 %i6, label %.backedge.backedge [
34 bb7: ; preds = %.backedge
35 tail call void @_Z6assignPj(ptr %a)
36 br label %.backedge.backedge
38 bb9: ; preds = %.backedge
39 tail call void @_Z6assignPj(ptr %i)
40 br label %.backedge.backedge
42 bb10: ; preds = %.backedge
43 tail call void @_Z6assignPj(ptr %i1)
44 br label %.backedge.backedge
46 bb11: ; preds = %.backedge
47 tail call void @_Z6assignPj(ptr %i2)
48 br label %.backedge.backedge
50 bb12: ; preds = %.backedge
51 tail call void @_Z6assignPj(ptr %i3)
52 br label %.backedge.backedge
54 bb13: ; preds = %.backedge
55 tail call void @_Z6assignPj(ptr %i4)
56 br label %.backedge.backedge
58 .backedge.backedge: ; preds = %bb13, %bb12, %bb11, %bb10, %bb9, %bb7, %.backedge
59 %scevgep1 = getelementptr i8, ptr %lsr.iv, i64 1
63 define i32 @load_not_safe_to_move_consecutive_call(i32 %n) {
65 %cmp63 = icmp sgt i32 %n, 0
66 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
68 for.body.preheader: ; preds = %entry
69 %i = load i32, ptr @A, align 4
70 %call0 = tail call i32 @use(i32 %n)
73 for.cond.cleanup: ; preds = %for.body, %entry
74 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
77 for.body: ; preds = %for.body, %for.body.preheader
78 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
79 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
80 %div = sdiv i32 %sum.065, %i
81 %lsr.iv.next = add i32 %lsr.iv, -1
82 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
83 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
86 define i32 @load_not_safe_to_move_consecutive_call_use(i32 %n) {
88 %cmp63 = icmp sgt i32 %n, 0
89 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
91 for.body.preheader: ; preds = %entry
92 %i = load i32, ptr @A, align 4
93 %call0 = tail call i32 @use(i32 %i)
96 for.cond.cleanup: ; preds = %for.body, %entry
97 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
100 for.body: ; preds = %for.body, %for.body.preheader
101 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
102 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
103 %div = sdiv i32 %sum.065, %i
104 %lsr.iv.next = add i32 %lsr.iv, -1
105 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
106 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
109 define i32 @cant_sink_use_outside_loop(i32 %n) {
111 %cmp63 = icmp sgt i32 %n, 0
112 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
114 for.body.preheader: ; preds = %entry
115 %i = load i32, ptr @A, align 4
118 for.cond.cleanup: ; preds = %for.body, %entry
119 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
120 %use.outside.loop = phi i32 [ 0, %entry ], [ %i, %for.body ]
121 %call = tail call i32 @use(i32 %use.outside.loop)
124 for.body: ; preds = %for.body, %for.body.preheader
125 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
126 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
127 %div = sdiv i32 %sum.065, %sum.065
128 %lsr.iv.next = add i32 %lsr.iv, -1
129 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
130 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
133 define i32 @use_is_not_a_copy(i32 %n) {
135 %cmp63 = icmp sgt i32 %n, 0
136 br i1 %cmp63, label %for.body.preheader, label %for.cond.cleanup
138 for.body.preheader: ; preds = %entry
139 %i = load i32, ptr @A, align 4
142 for.cond.cleanup: ; preds = %for.body, %entry
143 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
146 for.body: ; preds = %for.body, %for.body.preheader
147 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
148 %sum.065 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
149 %div = sdiv i32 %sum.065, %i
150 %lsr.iv.next = add i32 %lsr.iv, -1
151 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
152 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
155 define dso_local void @sink_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, i32 %n) local_unnamed_addr {
157 %i = load i32, ptr %read, align 4, !tbaa !0
158 %cmp10 = icmp sgt i32 %n, 0
159 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
161 for.body.preheader: ; preds = %entry
165 for.cond.cleanup: ; preds = %for.body, %entry
166 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
167 store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0
170 for.body: ; preds = %for.body, %for.body.preheader
171 %lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]
172 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
173 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
174 %div = sdiv i32 %sum.011, %lsr.iv1
175 %lsr.iv.next = add i32 %lsr.iv, -1
176 %lsr.iv.next2 = add i32 %lsr.iv1, 1
177 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
178 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
181 define dso_local void @store_after_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, ptr nocapture %store, i32 %n) local_unnamed_addr {
183 %i = load i32, ptr %read, align 4, !tbaa !0
184 %cmp10 = icmp sgt i32 %n, 0
185 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
187 for.body.preheader: ; preds = %entry
189 store i32 43, ptr %store, align 4, !tbaa !0
192 for.cond.cleanup: ; preds = %for.body, %entry
193 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
194 store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0
197 for.body: ; preds = %for.body, %for.body.preheader
198 %lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]
199 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
200 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
201 %div = sdiv i32 %sum.011, %lsr.iv1
202 %lsr.iv.next = add i32 %lsr.iv, -1
203 %lsr.iv.next2 = add i32 %lsr.iv1, 1
204 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
205 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !4
208 define dso_local void @aliased_store_after_add(ptr noalias nocapture readonly %read, ptr noalias nocapture %write, ptr nocapture %store, i32 %n) local_unnamed_addr {
210 %i = load i32, ptr %read, align 4, !tbaa !0
211 %cmp10 = icmp sgt i32 %n, 0
212 br i1 %cmp10, label %for.body.preheader, label %for.cond.cleanup
214 for.body.preheader: ; preds = %entry
216 store i32 43, ptr %read, align 4, !tbaa !0
219 for.cond.cleanup: ; preds = %for.body, %entry
220 %sum.0.lcssa = phi i32 [ %n, %entry ], [ %div, %for.body ]
221 store i32 %sum.0.lcssa, ptr %write, align 4, !tbaa !0
224 for.body: ; preds = %for.body, %for.body.preheader
225 %lsr.iv1 = phi i32 [ %i1, %for.body.preheader ], [ %lsr.iv.next2, %for.body ]
226 %lsr.iv = phi i32 [ %n, %for.body.preheader ], [ %lsr.iv.next, %for.body ]
227 %sum.011 = phi i32 [ %div, %for.body ], [ %n, %for.body.preheader ]
228 %div = sdiv i32 %sum.011, %lsr.iv1
229 %lsr.iv.next = add i32 %lsr.iv, -1
230 %lsr.iv.next2 = add i32 %lsr.iv1, 1
231 %exitcond.not = icmp eq i32 %lsr.iv.next, 0
232 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body, !llvm.loop !4
235 declare i32 @use(i32)
237 declare void @_Z6assignPj(ptr)
239 !0 = !{!1, !1, i64 0}
240 !1 = !{!"int", !2, i64 0}
241 !2 = !{!"omnipotent char", !3, i64 0}
242 !3 = !{!"Simple C/C++ TBAA"}
243 !4 = distinct !{!4, !5}
244 !5 = !{!"llvm.loop.mustprogress"}
248 name: cant_sink_adds_call_in_block
250 exposesReturnsTwice: false
252 regBankSelected: false
255 tracksRegLiveness: true
258 - { id: 0, class: gpr64all, preferred-register: '' }
259 - { id: 1, class: gpr64all, preferred-register: '' }
260 - { id: 2, class: gpr64all, preferred-register: '' }
261 - { id: 3, class: gpr64all, preferred-register: '' }
262 - { id: 4, class: gpr64all, preferred-register: '' }
263 - { id: 5, class: gpr64all, preferred-register: '' }
264 - { id: 6, class: gpr64sp, preferred-register: '' }
265 - { id: 7, class: gpr64all, preferred-register: '' }
266 - { id: 8, class: gpr64common, preferred-register: '' }
267 - { id: 9, class: gpr64common, preferred-register: '' }
268 - { id: 10, class: gpr64sp, preferred-register: '' }
269 - { id: 11, class: gpr64sp, preferred-register: '' }
270 - { id: 12, class: gpr64sp, preferred-register: '' }
271 - { id: 13, class: gpr64sp, preferred-register: '' }
272 - { id: 14, class: gpr64sp, preferred-register: '' }
273 - { id: 15, class: gpr64sp, preferred-register: '' }
274 - { id: 16, class: gpr64, preferred-register: '' }
275 - { id: 17, class: gpr32, preferred-register: '' }
276 - { id: 18, class: gpr32sp, preferred-register: '' }
277 - { id: 19, class: gpr32, preferred-register: '' }
278 - { id: 20, class: gpr64common, preferred-register: '' }
279 - { id: 21, class: gpr64, preferred-register: '' }
280 - { id: 22, class: gpr64sp, preferred-register: '' }
281 - { id: 23, class: gpr64sp, preferred-register: '' }
283 - { reg: '$x0', virtual-reg: '%8' }
284 - { reg: '$x1', virtual-reg: '%9' }
286 isFrameAddressTaken: false
287 isReturnAddressTaken: false
297 cvBytesOfCalleeSavedRegisters: 0
298 hasOpaqueSPAdjustment: false
300 hasMustTailInVarArgFunc: false
307 debugValueSubstitutions: []
309 machineFunctionInfo: {}
314 blocks: [ '%bb.2', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
315 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.3', '%bb.8',
316 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
317 '%bb.8', '%bb.8', '%bb.4', '%bb.8', '%bb.8', '%bb.8',
318 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
319 '%bb.5', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
320 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.6', '%bb.8',
321 '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8', '%bb.8',
322 '%bb.8', '%bb.8', '%bb.7' ]
324 ; CHECK-LABEL: name: cant_sink_adds_call_in_block
326 ; CHECK-NEXT: successors: %bb.1(0x80000000)
327 ; CHECK-NEXT: liveins: $x0, $x1
329 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x1
330 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x0
331 ; CHECK-NEXT: [[ADDXri:%[0-9]+]]:gpr64sp = ADDXri [[COPY1]], 1, 0
332 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64all = COPY [[ADDXri]]
333 ; CHECK-NEXT: [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
335 ; CHECK-NEXT: bb.1..backedge:
336 ; CHECK-NEXT: successors: %bb.9(0x09249249), %bb.2(0x76db6db7)
338 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr64sp = PHI [[COPY2]], %bb.0, %7, %bb.9
339 ; CHECK-NEXT: [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[PHI]], 0 :: (load (s8) from %ir.lsr.iv)
340 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64 = SUBREG_TO_REG 0, killed [[LDRBBui]], %subreg.sub_32
341 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32sp = COPY [[SUBREG_TO_REG]].sub_32
342 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri killed [[COPY3]], 50, 0, implicit-def $nzcv
343 ; CHECK-NEXT: Bcc 8, %bb.9, implicit $nzcv
345 ; CHECK-NEXT: bb.2..backedge:
346 ; CHECK-NEXT: successors: %bb.3(0x13b13b14), %bb.9(0x09d89d8a), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14), %bb.8(0x13b13b14)
348 ; CHECK-NEXT: early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
349 ; CHECK-NEXT: BR killed %21
351 ; CHECK-NEXT: bb.3.bb7:
352 ; CHECK-NEXT: successors: %bb.9(0x80000000)
354 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
355 ; CHECK-NEXT: $x0 = COPY [[COPY]]
356 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
357 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
358 ; CHECK-NEXT: B %bb.9
360 ; CHECK-NEXT: bb.4.bb9:
361 ; CHECK-NEXT: successors: %bb.9(0x80000000)
363 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
364 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 4, 0
365 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
366 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
367 ; CHECK-NEXT: B %bb.9
369 ; CHECK-NEXT: bb.5.bb10:
370 ; CHECK-NEXT: successors: %bb.9(0x80000000)
372 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
373 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 8, 0
374 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
375 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
376 ; CHECK-NEXT: B %bb.9
378 ; CHECK-NEXT: bb.6.bb11:
379 ; CHECK-NEXT: successors: %bb.9(0x80000000)
381 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
382 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 12, 0
383 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
384 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
385 ; CHECK-NEXT: B %bb.9
387 ; CHECK-NEXT: bb.7.bb12:
388 ; CHECK-NEXT: successors: %bb.9(0x80000000)
390 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
391 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 16, 0
392 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
393 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
394 ; CHECK-NEXT: B %bb.9
396 ; CHECK-NEXT: bb.8.bb13:
397 ; CHECK-NEXT: successors: %bb.9(0x80000000)
399 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
400 ; CHECK-NEXT: $x0 = nuw ADDXri [[COPY]], 20, 0
401 ; CHECK-NEXT: BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
402 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
404 ; CHECK-NEXT: bb.9..backedge.backedge:
405 ; CHECK-NEXT: successors: %bb.1(0x80000000)
407 ; CHECK-NEXT: [[ADDXri1:%[0-9]+]]:gpr64sp = ADDXri [[PHI]], 1, 0
408 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64all = COPY [[ADDXri1]]
409 ; CHECK-NEXT: B %bb.1
411 successors: %bb.1(0x80000000)
414 %9:gpr64common = COPY $x1
415 %8:gpr64common = COPY $x0
416 %10:gpr64sp = nuw ADDXri %9, 4, 0
417 %0:gpr64all = COPY %10
418 %11:gpr64sp = nuw ADDXri %9, 8, 0
419 %1:gpr64all = COPY %11
420 %12:gpr64sp = nuw ADDXri %9, 12, 0
421 %2:gpr64all = COPY %12
422 %13:gpr64sp = nuw ADDXri %9, 16, 0
423 %3:gpr64all = COPY %13
424 %14:gpr64sp = nuw ADDXri %9, 20, 0
425 %4:gpr64all = COPY %14
426 %15:gpr64sp = ADDXri %8, 1, 0
427 %5:gpr64all = COPY %15
428 %20:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
431 successors: %bb.8(0x09249249), %bb.9(0x76db6db7)
433 %6:gpr64sp = PHI %5, %bb.0, %7, %bb.8
434 %17:gpr32 = LDRBBui %6, 0 :: (load (s8) from %ir.lsr.iv)
435 %16:gpr64 = SUBREG_TO_REG 0, killed %17, %subreg.sub_32
436 %18:gpr32sp = COPY %16.sub_32
437 %19:gpr32 = SUBSWri killed %18, 50, 0, implicit-def $nzcv
438 Bcc 8, %bb.8, implicit $nzcv
441 successors: %bb.2(0x13b13b14), %bb.8(0x09d89d8a), %bb.3(0x13b13b14), %bb.4(0x13b13b14), %bb.5(0x13b13b14), %bb.6(0x13b13b14), %bb.7(0x13b13b14)
443 early-clobber %21:gpr64, early-clobber %22:gpr64sp = JumpTableDest32 %20, %16, %jump-table.0
446 bb.2 (%ir-block.bb7):
447 successors: %bb.8(0x80000000)
449 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
451 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
452 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
455 bb.3 (%ir-block.bb9):
456 successors: %bb.8(0x80000000)
458 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
460 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
461 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
464 bb.4 (%ir-block.bb10):
465 successors: %bb.8(0x80000000)
467 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
469 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
470 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
473 bb.5 (%ir-block.bb11):
474 successors: %bb.8(0x80000000)
476 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
478 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
479 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
482 bb.6 (%ir-block.bb12):
483 successors: %bb.8(0x80000000)
485 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
487 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
488 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
491 bb.7 (%ir-block.bb13):
492 successors: %bb.8(0x80000000)
494 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
496 BL @_Z6assignPj, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
497 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
499 bb.8..backedge.backedge:
500 successors: %bb.1(0x80000000)
502 %23:gpr64sp = ADDXri %6, 1, 0
503 %7:gpr64all = COPY %23
508 name: load_not_safe_to_move_consecutive_call
510 exposesReturnsTwice: false
512 regBankSelected: false
515 tracksRegLiveness: true
518 - { id: 0, class: gpr32, preferred-register: '' }
519 - { id: 1, class: gpr32all, preferred-register: '' }
520 - { id: 2, class: gpr32sp, preferred-register: '' }
521 - { id: 3, class: gpr32, preferred-register: '' }
522 - { id: 4, class: gpr32all, preferred-register: '' }
523 - { id: 5, class: gpr32all, preferred-register: '' }
524 - { id: 6, class: gpr32common, preferred-register: '' }
525 - { id: 7, class: gpr32, preferred-register: '' }
526 - { id: 8, class: gpr64common, preferred-register: '' }
527 - { id: 9, class: gpr32, preferred-register: '' }
528 - { id: 10, class: gpr32all, preferred-register: '' }
529 - { id: 11, class: gpr32, preferred-register: '' }
530 - { id: 12, class: gpr32, preferred-register: '' }
532 - { reg: '$w0', virtual-reg: '%6' }
534 isFrameAddressTaken: false
535 isReturnAddressTaken: false
545 cvBytesOfCalleeSavedRegisters: 0
546 hasOpaqueSPAdjustment: false
548 hasMustTailInVarArgFunc: false
555 debugValueSubstitutions: []
557 machineFunctionInfo: {}
559 ; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call
561 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
562 ; CHECK-NEXT: liveins: $w0
564 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
565 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
566 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
567 ; CHECK-NEXT: B %bb.1
569 ; CHECK-NEXT: bb.1.for.body.preheader:
570 ; CHECK-NEXT: successors: %bb.3(0x80000000)
572 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
573 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
574 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
575 ; CHECK-NEXT: $w0 = COPY [[COPY]]
576 ; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
577 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
578 ; CHECK-NEXT: B %bb.3
580 ; CHECK-NEXT: bb.2.for.cond.cleanup:
581 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
582 ; CHECK-NEXT: $w0 = COPY [[PHI]]
583 ; CHECK-NEXT: RET_ReallyLR implicit $w0
585 ; CHECK-NEXT: bb.3.for.body:
586 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
588 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
589 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
590 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
591 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
592 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
593 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
594 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
595 ; CHECK-NEXT: B %bb.3
597 successors: %bb.1(0x50000000), %bb.2(0x30000000)
600 %6:gpr32common = COPY $w0
601 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv
602 Bcc 11, %bb.2, implicit $nzcv
605 bb.1.for.body.preheader:
606 successors: %bb.3(0x80000000)
608 %8:gpr64common = ADRP target-flags(aarch64-page) @A
609 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
610 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
612 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
613 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
616 bb.2.for.cond.cleanup:
617 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3
619 RET_ReallyLR implicit $w0
622 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
624 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3
625 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3
626 %11:gpr32 = SDIVWr %3, %9
627 %4:gpr32all = COPY %11
628 %12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv
629 %5:gpr32all = COPY %12
630 Bcc 0, %bb.2, implicit $nzcv
635 name: load_not_safe_to_move_consecutive_call_use
637 exposesReturnsTwice: false
639 regBankSelected: false
642 tracksRegLiveness: true
645 - { id: 0, class: gpr32, preferred-register: '' }
646 - { id: 1, class: gpr32all, preferred-register: '' }
647 - { id: 2, class: gpr32sp, preferred-register: '' }
648 - { id: 3, class: gpr32, preferred-register: '' }
649 - { id: 4, class: gpr32all, preferred-register: '' }
650 - { id: 5, class: gpr32all, preferred-register: '' }
651 - { id: 6, class: gpr32common, preferred-register: '' }
652 - { id: 7, class: gpr32, preferred-register: '' }
653 - { id: 8, class: gpr64common, preferred-register: '' }
654 - { id: 9, class: gpr32, preferred-register: '' }
655 - { id: 10, class: gpr32all, preferred-register: '' }
656 - { id: 11, class: gpr32, preferred-register: '' }
657 - { id: 12, class: gpr32, preferred-register: '' }
659 - { reg: '$w0', virtual-reg: '%6' }
661 isFrameAddressTaken: false
662 isReturnAddressTaken: false
672 cvBytesOfCalleeSavedRegisters: 0
673 hasOpaqueSPAdjustment: false
675 hasMustTailInVarArgFunc: false
682 debugValueSubstitutions: []
684 machineFunctionInfo: {}
686 ; CHECK-LABEL: name: load_not_safe_to_move_consecutive_call_use
688 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
689 ; CHECK-NEXT: liveins: $w0
691 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
692 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
693 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
694 ; CHECK-NEXT: B %bb.1
696 ; CHECK-NEXT: bb.1.for.body.preheader:
697 ; CHECK-NEXT: successors: %bb.3(0x80000000)
699 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
700 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
701 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
702 ; CHECK-NEXT: $w0 = COPY [[LDRWui]]
703 ; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
704 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
705 ; CHECK-NEXT: B %bb.3
707 ; CHECK-NEXT: bb.2.for.cond.cleanup:
708 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
709 ; CHECK-NEXT: $w0 = COPY [[PHI]]
710 ; CHECK-NEXT: RET_ReallyLR implicit $w0
712 ; CHECK-NEXT: bb.3.for.body:
713 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
715 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
716 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
717 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
718 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
719 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
720 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
721 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
722 ; CHECK-NEXT: B %bb.3
724 successors: %bb.1(0x50000000), %bb.2(0x30000000)
727 %6:gpr32common = COPY $w0
728 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv
729 Bcc 11, %bb.2, implicit $nzcv
732 bb.1.for.body.preheader:
733 successors: %bb.3(0x80000000)
735 %8:gpr64common = ADRP target-flags(aarch64-page) @A
736 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
737 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
739 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
740 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
743 bb.2.for.cond.cleanup:
744 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3
746 RET_ReallyLR implicit $w0
749 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
751 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3
752 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3
753 %11:gpr32 = SDIVWr %3, %9
754 %4:gpr32all = COPY %11
755 %12:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv
756 %5:gpr32all = COPY %12
757 Bcc 0, %bb.2, implicit $nzcv
762 name: cant_sink_use_outside_loop
764 exposesReturnsTwice: false
766 regBankSelected: false
769 tracksRegLiveness: true
772 - { id: 0, class: gpr32all, preferred-register: '' }
773 - { id: 1, class: gpr32all, preferred-register: '' }
774 - { id: 2, class: gpr32all, preferred-register: '' }
775 - { id: 3, class: gpr32sp, preferred-register: '' }
776 - { id: 4, class: gpr32all, preferred-register: '' }
777 - { id: 5, class: gpr32all, preferred-register: '' }
778 - { id: 6, class: gpr32all, preferred-register: '' }
779 - { id: 7, class: gpr32common, preferred-register: '' }
780 - { id: 8, class: gpr32all, preferred-register: '' }
781 - { id: 9, class: gpr32all, preferred-register: '' }
782 - { id: 10, class: gpr32, preferred-register: '' }
783 - { id: 11, class: gpr64common, preferred-register: '' }
784 - { id: 12, class: gpr32, preferred-register: '' }
785 - { id: 13, class: gpr32, preferred-register: '' }
786 - { id: 14, class: gpr32, preferred-register: '' }
787 - { id: 15, class: gpr32all, preferred-register: '' }
789 - { reg: '$w0', virtual-reg: '%7' }
791 isFrameAddressTaken: false
792 isReturnAddressTaken: false
802 cvBytesOfCalleeSavedRegisters: 0
803 hasOpaqueSPAdjustment: false
805 hasMustTailInVarArgFunc: false
812 debugValueSubstitutions: []
814 machineFunctionInfo: {}
816 ; CHECK-LABEL: name: cant_sink_use_outside_loop
818 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.4(0x30000000)
819 ; CHECK-NEXT: liveins: $w0
821 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
822 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
823 ; CHECK-NEXT: Bcc 10, %bb.1, implicit $nzcv
826 ; CHECK-NEXT: successors: %bb.2(0x80000000)
828 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY $wzr
829 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
830 ; CHECK-NEXT: B %bb.2
832 ; CHECK-NEXT: bb.1.for.body.preheader:
833 ; CHECK-NEXT: successors: %bb.3(0x80000000)
835 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
836 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
837 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[LDRWui]]
838 ; CHECK-NEXT: B %bb.3
840 ; CHECK-NEXT: bb.2.for.cond.cleanup:
841 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.4, %5, %bb.5
842 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32all = PHI [[COPY2]], %bb.4, [[COPY3]], %bb.5
843 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
844 ; CHECK-NEXT: $w0 = COPY [[PHI1]]
845 ; CHECK-NEXT: BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
846 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
847 ; CHECK-NEXT: $w0 = COPY [[PHI]]
848 ; CHECK-NEXT: RET_ReallyLR implicit $w0
850 ; CHECK-NEXT: bb.3.for.body:
851 ; CHECK-NEXT: successors: %bb.5(0x04000000), %bb.3(0x7c000000)
853 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %6, %bb.3
854 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
855 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
856 ; CHECK-NEXT: Bcc 1, %bb.3, implicit $nzcv
859 ; CHECK-NEXT: successors: %bb.2(0x80000000)
861 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1
862 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[MOVi32imm]]
863 ; CHECK-NEXT: B %bb.2
865 successors: %bb.1(0x50000000), %bb.2(0x30000000)
868 %7:gpr32common = COPY $w0
869 %9:gpr32all = COPY $wzr
870 %8:gpr32all = COPY %9
871 %10:gpr32 = SUBSWri %7, 1, 0, implicit-def $nzcv
872 Bcc 11, %bb.2, implicit $nzcv
875 bb.1.for.body.preheader:
876 successors: %bb.3(0x80000000)
878 %11:gpr64common = ADRP target-flags(aarch64-page) @A
879 %12:gpr32 = LDRWui killed %11, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
880 %0:gpr32all = COPY %12
883 bb.2.for.cond.cleanup:
884 %1:gpr32all = PHI %7, %bb.0, %5, %bb.3
885 %2:gpr32all = PHI %8, %bb.0, %0, %bb.3
886 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
888 BL @use, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
889 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
891 RET_ReallyLR implicit $w0
894 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
896 %3:gpr32sp = PHI %7, %bb.1, %6, %bb.3
897 %13:gpr32 = MOVi32imm 1
898 %5:gpr32all = COPY %13
899 %14:gpr32 = SUBSWri %3, 1, 0, implicit-def $nzcv
900 %6:gpr32all = COPY %14
901 Bcc 0, %bb.2, implicit $nzcv
906 name: use_is_not_a_copy
908 exposesReturnsTwice: false
910 regBankSelected: false
913 tracksRegLiveness: true
916 - { id: 0, class: gpr32, preferred-register: '' }
917 - { id: 1, class: gpr32all, preferred-register: '' }
918 - { id: 2, class: gpr32sp, preferred-register: '' }
919 - { id: 3, class: gpr32, preferred-register: '' }
920 - { id: 4, class: gpr32all, preferred-register: '' }
921 - { id: 5, class: gpr32all, preferred-register: '' }
922 - { id: 6, class: gpr32common, preferred-register: '' }
923 - { id: 7, class: gpr32, preferred-register: '' }
924 - { id: 8, class: gpr64common, preferred-register: '' }
925 - { id: 9, class: gpr32, preferred-register: '' }
926 - { id: 10, class: gpr32, preferred-register: '' }
927 - { id: 11, class: gpr32, preferred-register: '' }
929 - { reg: '$w0', virtual-reg: '%6' }
931 isFrameAddressTaken: false
932 isReturnAddressTaken: false
942 cvBytesOfCalleeSavedRegisters: 0
943 hasOpaqueSPAdjustment: false
945 hasMustTailInVarArgFunc: false
952 debugValueSubstitutions: []
954 machineFunctionInfo: {}
956 ; CHECK-LABEL: name: use_is_not_a_copy
958 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
959 ; CHECK-NEXT: liveins: $w0
961 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w0
962 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
963 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
964 ; CHECK-NEXT: B %bb.1
966 ; CHECK-NEXT: bb.1.for.body.preheader:
967 ; CHECK-NEXT: successors: %bb.3(0x80000000)
969 ; CHECK-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @A
970 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
971 ; CHECK-NEXT: B %bb.3
973 ; CHECK-NEXT: bb.2.for.cond.cleanup:
974 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %4, %bb.3
975 ; CHECK-NEXT: $w0 = COPY [[PHI]]
976 ; CHECK-NEXT: RET_ReallyLR implicit $w0
978 ; CHECK-NEXT: bb.3.for.body:
979 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
981 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %5, %bb.3
982 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %4, %bb.3
983 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI2]], [[LDRWui]]
984 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
985 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI1]], 1, 0, implicit-def $nzcv
986 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
987 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
988 ; CHECK-NEXT: B %bb.3
990 successors: %bb.1(0x50000000), %bb.2(0x30000000)
993 %6:gpr32common = COPY $w0
994 %7:gpr32 = SUBSWri %6, 1, 0, implicit-def $nzcv
995 Bcc 11, %bb.2, implicit $nzcv
998 bb.1.for.body.preheader:
999 successors: %bb.3(0x80000000)
1001 %8:gpr64common = ADRP target-flags(aarch64-page) @A
1002 %9:gpr32 = LDRWui killed %8, target-flags(aarch64-pageoff, aarch64-nc) @A :: (dereferenceable load (s32) from @A)
1005 bb.2.for.cond.cleanup:
1006 %1:gpr32all = PHI %6, %bb.0, %4, %bb.3
1008 RET_ReallyLR implicit $w0
1011 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
1013 %2:gpr32sp = PHI %6, %bb.1, %5, %bb.3
1014 %3:gpr32 = PHI %6, %bb.1, %4, %bb.3
1015 %10:gpr32 = SDIVWr %3, %9
1016 %4:gpr32all = COPY %10
1017 %11:gpr32 = SUBSWri %2, 1, 0, implicit-def $nzcv
1018 %5:gpr32all = COPY %11
1019 Bcc 0, %bb.2, implicit $nzcv
1026 exposesReturnsTwice: false
1028 regBankSelected: false
1031 tracksRegLiveness: true
1034 - { id: 0, class: gpr32sp, preferred-register: '' }
1035 - { id: 1, class: gpr32all, preferred-register: '' }
1036 - { id: 2, class: gpr32, preferred-register: '' }
1037 - { id: 3, class: gpr32common, preferred-register: '' }
1038 - { id: 4, class: gpr32sp, preferred-register: '' }
1039 - { id: 5, class: gpr32, preferred-register: '' }
1040 - { id: 6, class: gpr32all, preferred-register: '' }
1041 - { id: 7, class: gpr32all, preferred-register: '' }
1042 - { id: 8, class: gpr32all, preferred-register: '' }
1043 - { id: 9, class: gpr64common, preferred-register: '' }
1044 - { id: 10, class: gpr64common, preferred-register: '' }
1045 - { id: 11, class: gpr32common, preferred-register: '' }
1046 - { id: 12, class: gpr32common, preferred-register: '' }
1047 - { id: 13, class: gpr32, preferred-register: '' }
1048 - { id: 14, class: gpr32sp, preferred-register: '' }
1049 - { id: 15, class: gpr32, preferred-register: '' }
1050 - { id: 16, class: gpr32, preferred-register: '' }
1051 - { id: 17, class: gpr32sp, preferred-register: '' }
1053 - { reg: '$x0', virtual-reg: '%9' }
1054 - { reg: '$x1', virtual-reg: '%10' }
1055 - { reg: '$w2', virtual-reg: '%11' }
1057 isFrameAddressTaken: false
1058 isReturnAddressTaken: false
1060 hasPatchPoint: false
1068 cvBytesOfCalleeSavedRegisters: 0
1069 hasOpaqueSPAdjustment: false
1071 hasMustTailInVarArgFunc: false
1078 debugValueSubstitutions: []
1080 machineFunctionInfo: {}
1082 ; CHECK-LABEL: name: sink_add
1083 ; CHECK: bb.0.entry:
1084 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
1085 ; CHECK-NEXT: liveins: $x0, $x1, $w2
1086 ; CHECK-NEXT: {{ $}}
1087 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w2
1088 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x1
1089 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x0
1090 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
1091 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
1092 ; CHECK-NEXT: B %bb.1
1093 ; CHECK-NEXT: {{ $}}
1094 ; CHECK-NEXT: bb.1.for.body.preheader:
1095 ; CHECK-NEXT: successors: %bb.3(0x80000000)
1096 ; CHECK-NEXT: {{ $}}
1097 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY2]], 0 :: (load (s32) from %ir.read, !tbaa !0)
1098 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0
1099 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[ADDWri]]
1100 ; CHECK-NEXT: B %bb.3
1101 ; CHECK-NEXT: {{ $}}
1102 ; CHECK-NEXT: bb.2.for.cond.cleanup:
1103 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3
1104 ; CHECK-NEXT: STRWui [[PHI]], [[COPY1]], 0 :: (store (s32) into %ir.write, !tbaa !0)
1105 ; CHECK-NEXT: RET_ReallyLR
1106 ; CHECK-NEXT: {{ $}}
1107 ; CHECK-NEXT: bb.3.for.body:
1108 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
1109 ; CHECK-NEXT: {{ $}}
1110 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY3]], %bb.1, %8, %bb.3
1111 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3
1112 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3
1113 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]
1114 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
1115 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
1116 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
1117 ; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0
1118 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]
1119 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
1120 ; CHECK-NEXT: B %bb.3
1122 successors: %bb.1(0x50000000), %bb.2(0x30000000)
1123 liveins: $x0, $x1, $w2
1125 %11:gpr32common = COPY $w2
1126 %10:gpr64common = COPY $x1
1127 %9:gpr64common = COPY $x0
1128 %12:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)
1129 %13:gpr32 = SUBSWri %11, 1, 0, implicit-def $nzcv
1130 Bcc 11, %bb.2, implicit $nzcv
1133 bb.1.for.body.preheader:
1134 successors: %bb.3(0x80000000)
1136 %14:gpr32sp = ADDWri %12, 42, 0
1137 %1:gpr32all = COPY %14
1140 bb.2.for.cond.cleanup:
1141 %2:gpr32 = PHI %11, %bb.0, %6, %bb.3
1142 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)
1146 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
1148 %3:gpr32common = PHI %1, %bb.1, %8, %bb.3
1149 %4:gpr32sp = PHI %11, %bb.1, %7, %bb.3
1150 %5:gpr32 = PHI %11, %bb.1, %6, %bb.3
1151 %15:gpr32 = SDIVWr %5, %3
1152 %6:gpr32all = COPY %15
1153 %16:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv
1154 %7:gpr32all = COPY %16
1155 %17:gpr32sp = ADDWri %3, 1, 0
1156 %8:gpr32all = COPY %17
1157 Bcc 0, %bb.2, implicit $nzcv
1162 name: store_after_add
1164 exposesReturnsTwice: false
1166 regBankSelected: false
1169 tracksRegLiveness: true
1172 - { id: 0, class: gpr32sp, preferred-register: '' }
1173 - { id: 1, class: gpr32all, preferred-register: '' }
1174 - { id: 2, class: gpr32, preferred-register: '' }
1175 - { id: 3, class: gpr32common, preferred-register: '' }
1176 - { id: 4, class: gpr32sp, preferred-register: '' }
1177 - { id: 5, class: gpr32, preferred-register: '' }
1178 - { id: 6, class: gpr32all, preferred-register: '' }
1179 - { id: 7, class: gpr32all, preferred-register: '' }
1180 - { id: 8, class: gpr32all, preferred-register: '' }
1181 - { id: 9, class: gpr64common, preferred-register: '' }
1182 - { id: 10, class: gpr64common, preferred-register: '' }
1183 - { id: 11, class: gpr64common, preferred-register: '' }
1184 - { id: 12, class: gpr32common, preferred-register: '' }
1185 - { id: 13, class: gpr32common, preferred-register: '' }
1186 - { id: 14, class: gpr32, preferred-register: '' }
1187 - { id: 15, class: gpr32, preferred-register: '' }
1188 - { id: 16, class: gpr32sp, preferred-register: '' }
1189 - { id: 17, class: gpr32, preferred-register: '' }
1190 - { id: 18, class: gpr32, preferred-register: '' }
1191 - { id: 19, class: gpr32sp, preferred-register: '' }
1193 - { reg: '$x0', virtual-reg: '%9' }
1194 - { reg: '$x1', virtual-reg: '%10' }
1195 - { reg: '$x2', virtual-reg: '%11' }
1196 - { reg: '$w3', virtual-reg: '%12' }
1198 isFrameAddressTaken: false
1199 isReturnAddressTaken: false
1201 hasPatchPoint: false
1209 cvBytesOfCalleeSavedRegisters: 0
1210 hasOpaqueSPAdjustment: false
1212 hasMustTailInVarArgFunc: false
1219 debugValueSubstitutions: []
1221 machineFunctionInfo: {}
1223 ; CHECK-LABEL: name: store_after_add
1224 ; CHECK: bb.0.entry:
1225 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
1226 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $w3
1227 ; CHECK-NEXT: {{ $}}
1228 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w3
1229 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x2
1230 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x1
1231 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x0
1232 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
1233 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
1234 ; CHECK-NEXT: B %bb.1
1235 ; CHECK-NEXT: {{ $}}
1236 ; CHECK-NEXT: bb.1.for.body.preheader:
1237 ; CHECK-NEXT: successors: %bb.3(0x80000000)
1238 ; CHECK-NEXT: {{ $}}
1239 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0)
1240 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0
1241 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]]
1242 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 43
1243 ; CHECK-NEXT: STRWui killed [[MOVi32imm]], [[COPY1]], 0 :: (store (s32) into %ir.store, !tbaa !0)
1244 ; CHECK-NEXT: B %bb.3
1245 ; CHECK-NEXT: {{ $}}
1246 ; CHECK-NEXT: bb.2.for.cond.cleanup:
1247 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3
1248 ; CHECK-NEXT: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0)
1249 ; CHECK-NEXT: RET_ReallyLR
1250 ; CHECK-NEXT: {{ $}}
1251 ; CHECK-NEXT: bb.3.for.body:
1252 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
1253 ; CHECK-NEXT: {{ $}}
1254 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.3
1255 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3
1256 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3
1257 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]
1258 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
1259 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
1260 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
1261 ; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0
1262 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]
1263 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
1264 ; CHECK-NEXT: B %bb.3
1266 successors: %bb.1(0x50000000), %bb.2(0x30000000)
1267 liveins: $x0, $x1, $x2, $w3
1269 %12:gpr32common = COPY $w3
1270 %11:gpr64common = COPY $x2
1271 %10:gpr64common = COPY $x1
1272 %9:gpr64common = COPY $x0
1273 %13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)
1274 %15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv
1275 Bcc 11, %bb.2, implicit $nzcv
1278 bb.1.for.body.preheader:
1279 successors: %bb.3(0x80000000)
1281 %16:gpr32sp = ADDWri %13, 42, 0
1282 %1:gpr32all = COPY %16
1283 %14:gpr32 = MOVi32imm 43
1284 STRWui killed %14, %11, 0 :: (store (s32) into %ir.store, !tbaa !0)
1287 bb.2.for.cond.cleanup:
1288 %2:gpr32 = PHI %12, %bb.0, %6, %bb.3
1289 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)
1293 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
1295 %3:gpr32common = PHI %1, %bb.1, %8, %bb.3
1296 %4:gpr32sp = PHI %12, %bb.1, %7, %bb.3
1297 %5:gpr32 = PHI %12, %bb.1, %6, %bb.3
1298 %17:gpr32 = SDIVWr %5, %3
1299 %6:gpr32all = COPY %17
1300 %18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv
1301 %7:gpr32all = COPY %18
1302 %19:gpr32sp = ADDWri %3, 1, 0
1303 %8:gpr32all = COPY %19
1304 Bcc 0, %bb.2, implicit $nzcv
1309 name: aliased_store_after_add
1311 exposesReturnsTwice: false
1313 regBankSelected: false
1316 tracksRegLiveness: true
1319 - { id: 0, class: gpr32sp, preferred-register: '' }
1320 - { id: 1, class: gpr32all, preferred-register: '' }
1321 - { id: 2, class: gpr32, preferred-register: '' }
1322 - { id: 3, class: gpr32common, preferred-register: '' }
1323 - { id: 4, class: gpr32sp, preferred-register: '' }
1324 - { id: 5, class: gpr32, preferred-register: '' }
1325 - { id: 6, class: gpr32all, preferred-register: '' }
1326 - { id: 7, class: gpr32all, preferred-register: '' }
1327 - { id: 8, class: gpr32all, preferred-register: '' }
1328 - { id: 9, class: gpr64common, preferred-register: '' }
1329 - { id: 10, class: gpr64common, preferred-register: '' }
1330 - { id: 11, class: gpr64common, preferred-register: '' }
1331 - { id: 12, class: gpr32common, preferred-register: '' }
1332 - { id: 13, class: gpr32common, preferred-register: '' }
1333 - { id: 14, class: gpr32, preferred-register: '' }
1334 - { id: 15, class: gpr32, preferred-register: '' }
1335 - { id: 16, class: gpr32sp, preferred-register: '' }
1336 - { id: 17, class: gpr32, preferred-register: '' }
1337 - { id: 18, class: gpr32, preferred-register: '' }
1338 - { id: 19, class: gpr32sp, preferred-register: '' }
1340 - { reg: '$x0', virtual-reg: '%9' }
1341 - { reg: '$x1', virtual-reg: '%10' }
1342 - { reg: '$x2', virtual-reg: '%11' }
1343 - { reg: '$w3', virtual-reg: '%12' }
1345 isFrameAddressTaken: false
1346 isReturnAddressTaken: false
1348 hasPatchPoint: false
1356 cvBytesOfCalleeSavedRegisters: 0
1357 hasOpaqueSPAdjustment: false
1359 hasMustTailInVarArgFunc: false
1366 debugValueSubstitutions: []
1368 machineFunctionInfo: {}
1370 ; CHECK-LABEL: name: aliased_store_after_add
1371 ; CHECK: bb.0.entry:
1372 ; CHECK-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)
1373 ; CHECK-NEXT: liveins: $x0, $x1, $x2, $w3
1374 ; CHECK-NEXT: {{ $}}
1375 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w3
1376 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x2
1377 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY $x1
1378 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY $x0
1379 ; CHECK-NEXT: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri [[COPY]], 1, 0, implicit-def $nzcv
1380 ; CHECK-NEXT: Bcc 11, %bb.2, implicit $nzcv
1381 ; CHECK-NEXT: B %bb.1
1382 ; CHECK-NEXT: {{ $}}
1383 ; CHECK-NEXT: bb.1.for.body.preheader:
1384 ; CHECK-NEXT: successors: %bb.3(0x80000000)
1385 ; CHECK-NEXT: {{ $}}
1386 ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32common = LDRWui [[COPY3]], 0 :: (load (s32) from %ir.read, !tbaa !0)
1387 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[LDRWui]], 42, 0
1388 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32all = COPY [[ADDWri]]
1389 ; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 43
1390 ; CHECK-NEXT: STRWui killed [[MOVi32imm]], [[COPY3]], 0 :: (store (s32) into %ir.read, !tbaa !0)
1391 ; CHECK-NEXT: B %bb.3
1392 ; CHECK-NEXT: {{ $}}
1393 ; CHECK-NEXT: bb.2.for.cond.cleanup:
1394 ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.0, %6, %bb.3
1395 ; CHECK-NEXT: STRWui [[PHI]], [[COPY2]], 0 :: (store (s32) into %ir.write, !tbaa !0)
1396 ; CHECK-NEXT: RET_ReallyLR
1397 ; CHECK-NEXT: {{ $}}
1398 ; CHECK-NEXT: bb.3.for.body:
1399 ; CHECK-NEXT: successors: %bb.2(0x04000000), %bb.3(0x7c000000)
1400 ; CHECK-NEXT: {{ $}}
1401 ; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32common = PHI [[COPY4]], %bb.1, %8, %bb.3
1402 ; CHECK-NEXT: [[PHI2:%[0-9]+]]:gpr32sp = PHI [[COPY]], %bb.1, %7, %bb.3
1403 ; CHECK-NEXT: [[PHI3:%[0-9]+]]:gpr32 = PHI [[COPY]], %bb.1, %6, %bb.3
1404 ; CHECK-NEXT: [[SDIVWr:%[0-9]+]]:gpr32 = SDIVWr [[PHI3]], [[PHI1]]
1405 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[SDIVWr]]
1406 ; CHECK-NEXT: [[SUBSWri1:%[0-9]+]]:gpr32 = SUBSWri [[PHI2]], 1, 0, implicit-def $nzcv
1407 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gpr32all = COPY [[SUBSWri1]]
1408 ; CHECK-NEXT: [[ADDWri1:%[0-9]+]]:gpr32sp = ADDWri [[PHI1]], 1, 0
1409 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[ADDWri1]]
1410 ; CHECK-NEXT: Bcc 0, %bb.2, implicit $nzcv
1411 ; CHECK-NEXT: B %bb.3
1413 successors: %bb.1(0x50000000), %bb.2(0x30000000)
1414 liveins: $x0, $x1, $x2, $w3
1416 %12:gpr32common = COPY $w3
1417 %11:gpr64common = COPY $x2
1418 %10:gpr64common = COPY $x1
1419 %9:gpr64common = COPY $x0
1420 %13:gpr32common = LDRWui %9, 0 :: (load (s32) from %ir.read, !tbaa !0)
1421 %15:gpr32 = SUBSWri %12, 1, 0, implicit-def $nzcv
1422 Bcc 11, %bb.2, implicit $nzcv
1425 bb.1.for.body.preheader:
1426 successors: %bb.3(0x80000000)
1428 %16:gpr32sp = ADDWri %13, 42, 0
1429 %1:gpr32all = COPY %16
1430 %14:gpr32 = MOVi32imm 43
1431 STRWui killed %14, %9, 0 :: (store (s32) into %ir.read, !tbaa !0)
1434 bb.2.for.cond.cleanup:
1435 %2:gpr32 = PHI %12, %bb.0, %6, %bb.3
1436 STRWui %2, %10, 0 :: (store (s32) into %ir.write, !tbaa !0)
1440 successors: %bb.2(0x04000000), %bb.3(0x7c000000)
1442 %3:gpr32common = PHI %1, %bb.1, %8, %bb.3
1443 %4:gpr32sp = PHI %12, %bb.1, %7, %bb.3
1444 %5:gpr32 = PHI %12, %bb.1, %6, %bb.3
1445 %17:gpr32 = SDIVWr %5, %3
1446 %6:gpr32all = COPY %17
1447 %18:gpr32 = SUBSWri %4, 1, 0, implicit-def $nzcv
1448 %7:gpr32all = COPY %18
1449 %19:gpr32sp = ADDWri %3, 1, 0
1450 %8:gpr32all = COPY %19
1451 Bcc 0, %bb.2, implicit $nzcv