1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
7 ; CHECK-NEXT: mov x0, xzr
9 ; Not produced by move wide instructions, but good to make sure we can return 0 anyway:
16 ; CHECK-NEXT: mov w0, #1 ; =0x1
24 ; CHECK-NEXT: mov w0, #65535 ; =0xffff
32 ; CHECK-NEXT: mov w0, #65536 ; =0x10000
40 ; CHECK-NEXT: mov w0, #-65536 ; =0xffff0000
48 ; CHECK-NEXT: mov x0, #4294967296 ; =0x100000000
56 ; CHECK-NEXT: mov x0, #281470681743360 ; =0xffff00000000
58 ret i64 281470681743360
64 ; CHECK-NEXT: mov x0, #281474976710656 ; =0x1000000000000
66 ret i64 281474976710656
69 ; A 32-bit MOVN can generate some 64-bit patterns that a 64-bit one
70 ; couldn't. Useful even for i64
74 ; CHECK-NEXT: mov w0, #-60876 ; =0xffff1234
82 ; CHECK-NEXT: mov x0, #-1 ; =0xffffffffffffffff
87 define i64 @test10() {
88 ; CHECK-LABEL: test10:
90 ; CHECK-NEXT: mov x0, #-3989504001 ; =0xffffffff1234ffff
92 ret i64 18446744069720047615
95 ; For reasonably legitimate reasons returning an i32 results in the
96 ; selection of an i64 constant, so we need a different idiom to test that selection
99 define void @test11() {
100 ; CHECK-LABEL: test11:
102 ; CHECK-NEXT: adrp x8, _var32@PAGE
103 ; CHECK-NEXT: str wzr, [x8, _var32@PAGEOFF]
105 store i32 0, ptr @var32
109 define void @test12() {
110 ; CHECK-LABEL: test12:
112 ; CHECK-NEXT: adrp x8, _var32@PAGE
113 ; CHECK-NEXT: mov w9, #1 ; =0x1
114 ; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF]
116 store i32 1, ptr @var32
120 define void @test13() {
121 ; CHECK-LABEL: test13:
123 ; CHECK-NEXT: adrp x8, _var32@PAGE
124 ; CHECK-NEXT: mov w9, #65535 ; =0xffff
125 ; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF]
127 store i32 65535, ptr @var32
131 define void @test14() {
132 ; CHECK-LABEL: test14:
134 ; CHECK-NEXT: adrp x8, _var32@PAGE
135 ; CHECK-NEXT: mov w9, #65536 ; =0x10000
136 ; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF]
138 store i32 65536, ptr @var32
142 define void @test15() {
143 ; CHECK-LABEL: test15:
145 ; CHECK-NEXT: adrp x8, _var32@PAGE
146 ; CHECK-NEXT: mov w9, #-65536 ; =0xffff0000
147 ; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF]
149 store i32 4294901760, ptr @var32
153 define void @test16() {
154 ; CHECK-LABEL: test16:
156 ; CHECK-NEXT: adrp x8, _var32@PAGE
157 ; CHECK-NEXT: mov w9, #-1 ; =0xffffffff
158 ; CHECK-NEXT: str w9, [x8, _var32@PAGEOFF]
160 store i32 -1, ptr @var32
164 define i64 @test17() {
165 ; CHECK-LABEL: test17:
167 ; CHECK-NEXT: mov x0, #-3 ; =0xfffffffffffffffd
170 ; Mustn't MOVN w0 here.