1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
5 %struct.int8x8x2_t = type { [2 x <8 x i8>] }
6 %struct.int16x4x2_t = type { [2 x <4 x i16>] }
7 %struct.int32x2x2_t = type { [2 x <2 x i32>] }
8 %struct.uint8x8x2_t = type { [2 x <8 x i8>] }
9 %struct.uint16x4x2_t = type { [2 x <4 x i16>] }
10 %struct.uint32x2x2_t = type { [2 x <2 x i32>] }
11 %struct.float32x2x2_t = type { [2 x <2 x float>] }
12 %struct.poly8x8x2_t = type { [2 x <8 x i8>] }
13 %struct.poly16x4x2_t = type { [2 x <4 x i16>] }
14 %struct.int8x16x2_t = type { [2 x <16 x i8>] }
15 %struct.int16x8x2_t = type { [2 x <8 x i16>] }
16 %struct.int32x4x2_t = type { [2 x <4 x i32>] }
17 %struct.uint8x16x2_t = type { [2 x <16 x i8>] }
18 %struct.uint16x8x2_t = type { [2 x <8 x i16>] }
19 %struct.uint32x4x2_t = type { [2 x <4 x i32>] }
20 %struct.float32x4x2_t = type { [2 x <4 x float>] }
21 %struct.poly8x16x2_t = type { [2 x <16 x i8>] }
22 %struct.poly16x8x2_t = type { [2 x <8 x i16>] }
24 define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) {
25 ; CHECK-LABEL: test_vuzp1_s8:
26 ; CHECK: // %bb.0: // %entry
27 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b
30 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
31 ret <8 x i8> %shuffle.i
34 define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) {
35 ; CHECK-LABEL: test_vuzp1q_s8:
36 ; CHECK: // %bb.0: // %entry
37 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b
40 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
41 ret <16 x i8> %shuffle.i
44 define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) {
45 ; CHECK-LABEL: test_vuzp1_s16:
46 ; CHECK: // %bb.0: // %entry
47 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
50 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
51 ret <4 x i16> %shuffle.i
54 define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) {
55 ; CHECK-LABEL: test_vuzp1q_s16:
56 ; CHECK: // %bb.0: // %entry
57 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
60 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
61 ret <8 x i16> %shuffle.i
64 define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) {
65 ; CHECK-LABEL: test_vuzp1_s32:
66 ; CHECK: // %bb.0: // %entry
67 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
70 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
71 ret <2 x i32> %shuffle.i
74 define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) {
75 ; CHECK-LABEL: test_vuzp1q_s32:
76 ; CHECK: // %bb.0: // %entry
77 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
80 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
81 ret <4 x i32> %shuffle.i
84 define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) {
85 ; CHECK-LABEL: test_vuzp1q_s64:
86 ; CHECK: // %bb.0: // %entry
87 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
90 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
91 ret <2 x i64> %shuffle.i
94 define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) {
95 ; CHECK-LABEL: test_vuzp1_u8:
96 ; CHECK: // %bb.0: // %entry
97 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b
100 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
101 ret <8 x i8> %shuffle.i
104 define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) {
105 ; CHECK-LABEL: test_vuzp1q_u8:
106 ; CHECK: // %bb.0: // %entry
107 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b
110 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
111 ret <16 x i8> %shuffle.i
114 define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) {
115 ; CHECK-LABEL: test_vuzp1_u16:
116 ; CHECK: // %bb.0: // %entry
117 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
120 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
121 ret <4 x i16> %shuffle.i
124 define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) {
125 ; CHECK-LABEL: test_vuzp1q_u16:
126 ; CHECK: // %bb.0: // %entry
127 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
130 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
131 ret <8 x i16> %shuffle.i
134 define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) {
135 ; CHECK-LABEL: test_vuzp1_u32:
136 ; CHECK: // %bb.0: // %entry
137 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
140 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
141 ret <2 x i32> %shuffle.i
144 define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) {
145 ; CHECK-LABEL: test_vuzp1q_u32:
146 ; CHECK: // %bb.0: // %entry
147 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
150 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
151 ret <4 x i32> %shuffle.i
154 define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) {
155 ; CHECK-LABEL: test_vuzp1q_u64:
156 ; CHECK: // %bb.0: // %entry
157 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
160 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
161 ret <2 x i64> %shuffle.i
164 define <2 x ptr> @test_vuzp1q_p0(<2 x ptr> %a, <2 x ptr> %b) {
165 ; CHECK-LABEL: test_vuzp1q_p0:
166 ; CHECK: // %bb.0: // %entry
167 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
170 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 0, i32 2>
171 ret <2 x ptr> %shuffle.i
174 define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) {
175 ; CHECK-LABEL: test_vuzp1_f32:
176 ; CHECK: // %bb.0: // %entry
177 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
180 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
181 ret <2 x float> %shuffle.i
184 define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) {
185 ; CHECK-LABEL: test_vuzp1q_f32:
186 ; CHECK: // %bb.0: // %entry
187 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v1.4s
190 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
191 ret <4 x float> %shuffle.i
194 define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) {
195 ; CHECK-LABEL: test_vuzp1q_f64:
196 ; CHECK: // %bb.0: // %entry
197 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
200 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
201 ret <2 x double> %shuffle.i
204 define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) {
205 ; CHECK-LABEL: test_vuzp1_p8:
206 ; CHECK: // %bb.0: // %entry
207 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v1.8b
210 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
211 ret <8 x i8> %shuffle.i
214 define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) {
215 ; CHECK-LABEL: test_vuzp1q_p8:
216 ; CHECK: // %bb.0: // %entry
217 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v1.16b
220 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
221 ret <16 x i8> %shuffle.i
224 define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) {
225 ; CHECK-LABEL: test_vuzp1_p16:
226 ; CHECK: // %bb.0: // %entry
227 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v1.4h
230 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
231 ret <4 x i16> %shuffle.i
234 define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) {
235 ; CHECK-LABEL: test_vuzp1q_p16:
236 ; CHECK: // %bb.0: // %entry
237 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v1.8h
240 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
241 ret <8 x i16> %shuffle.i
244 define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) {
245 ; CHECK-LABEL: test_vuzp2_s8:
246 ; CHECK: // %bb.0: // %entry
247 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b
250 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
251 ret <8 x i8> %shuffle.i
254 define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) {
255 ; CHECK-LABEL: test_vuzp2q_s8:
256 ; CHECK: // %bb.0: // %entry
257 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b
260 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
261 ret <16 x i8> %shuffle.i
264 define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) {
265 ; CHECK-LABEL: test_vuzp2_s16:
266 ; CHECK: // %bb.0: // %entry
267 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h
270 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
271 ret <4 x i16> %shuffle.i
274 define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) {
275 ; CHECK-LABEL: test_vuzp2q_s16:
276 ; CHECK: // %bb.0: // %entry
277 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h
280 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
281 ret <8 x i16> %shuffle.i
284 define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) {
285 ; CHECK-LABEL: test_vuzp2_s32:
286 ; CHECK: // %bb.0: // %entry
287 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
290 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
291 ret <2 x i32> %shuffle.i
294 define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) {
295 ; CHECK-LABEL: test_vuzp2q_s32:
296 ; CHECK: // %bb.0: // %entry
297 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s
300 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
301 ret <4 x i32> %shuffle.i
304 define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) {
305 ; CHECK-LABEL: test_vuzp2q_s64:
306 ; CHECK: // %bb.0: // %entry
307 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
310 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
311 ret <2 x i64> %shuffle.i
314 define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) {
315 ; CHECK-LABEL: test_vuzp2_u8:
316 ; CHECK: // %bb.0: // %entry
317 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b
320 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
321 ret <8 x i8> %shuffle.i
324 define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) {
325 ; CHECK-LABEL: test_vuzp2q_u8:
326 ; CHECK: // %bb.0: // %entry
327 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b
330 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
331 ret <16 x i8> %shuffle.i
334 define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) {
335 ; CHECK-LABEL: test_vuzp2_u16:
336 ; CHECK: // %bb.0: // %entry
337 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h
340 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
341 ret <4 x i16> %shuffle.i
344 define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) {
345 ; CHECK-LABEL: test_vuzp2q_u16:
346 ; CHECK: // %bb.0: // %entry
347 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h
350 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
351 ret <8 x i16> %shuffle.i
354 define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) {
355 ; CHECK-LABEL: test_vuzp2_u32:
356 ; CHECK: // %bb.0: // %entry
357 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
360 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
361 ret <2 x i32> %shuffle.i
364 define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) {
365 ; CHECK-LABEL: test_vuzp2q_u32:
366 ; CHECK: // %bb.0: // %entry
367 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s
370 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
371 ret <4 x i32> %shuffle.i
374 define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) {
375 ; CHECK-LABEL: test_vuzp2q_u64:
376 ; CHECK: // %bb.0: // %entry
377 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
380 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
381 ret <2 x i64> %shuffle.i
384 define <2 x ptr> @test_vuzp2q_p0(<2 x ptr> %a, <2 x ptr> %b) {
385 ; CHECK-LABEL: test_vuzp2q_p0:
386 ; CHECK: // %bb.0: // %entry
387 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
390 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 1, i32 3>
391 ret <2 x ptr> %shuffle.i
394 define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) {
395 ; CHECK-LABEL: test_vuzp2_f32:
396 ; CHECK: // %bb.0: // %entry
397 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
400 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
401 ret <2 x float> %shuffle.i
404 define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) {
405 ; CHECK-LABEL: test_vuzp2q_f32:
406 ; CHECK: // %bb.0: // %entry
407 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v1.4s
410 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
411 ret <4 x float> %shuffle.i
414 define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) {
415 ; CHECK-LABEL: test_vuzp2q_f64:
416 ; CHECK: // %bb.0: // %entry
417 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
420 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
421 ret <2 x double> %shuffle.i
424 define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) {
425 ; CHECK-LABEL: test_vuzp2_p8:
426 ; CHECK: // %bb.0: // %entry
427 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v1.8b
430 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
431 ret <8 x i8> %shuffle.i
434 define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) {
435 ; CHECK-LABEL: test_vuzp2q_p8:
436 ; CHECK: // %bb.0: // %entry
437 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v1.16b
440 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
441 ret <16 x i8> %shuffle.i
444 define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) {
445 ; CHECK-LABEL: test_vuzp2_p16:
446 ; CHECK: // %bb.0: // %entry
447 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v1.4h
450 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
451 ret <4 x i16> %shuffle.i
454 define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) {
455 ; CHECK-LABEL: test_vuzp2q_p16:
456 ; CHECK: // %bb.0: // %entry
457 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v1.8h
460 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
461 ret <8 x i16> %shuffle.i
464 define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) {
465 ; CHECK-LABEL: test_vzip1_s8:
466 ; CHECK: // %bb.0: // %entry
467 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b
470 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
471 ret <8 x i8> %shuffle.i
474 define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) {
475 ; CHECK-LABEL: test_vzip1q_s8:
476 ; CHECK: // %bb.0: // %entry
477 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b
480 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
481 ret <16 x i8> %shuffle.i
484 define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) {
485 ; CHECK-LABEL: test_vzip1_s16:
486 ; CHECK: // %bb.0: // %entry
487 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h
490 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
491 ret <4 x i16> %shuffle.i
494 define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) {
495 ; CHECK-LABEL: test_vzip1q_s16:
496 ; CHECK: // %bb.0: // %entry
497 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h
500 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
501 ret <8 x i16> %shuffle.i
504 define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) {
505 ; CHECK-LABEL: test_vzip1_s32:
506 ; CHECK: // %bb.0: // %entry
507 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
510 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
511 ret <2 x i32> %shuffle.i
514 define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) {
515 ; CHECK-LABEL: test_vzip1q_s32:
516 ; CHECK: // %bb.0: // %entry
517 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s
520 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
521 ret <4 x i32> %shuffle.i
524 define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) {
525 ; CHECK-LABEL: test_vzip1q_s64:
526 ; CHECK: // %bb.0: // %entry
527 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
530 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
531 ret <2 x i64> %shuffle.i
534 define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) {
535 ; CHECK-LABEL: test_vzip1_u8:
536 ; CHECK: // %bb.0: // %entry
537 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b
540 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
541 ret <8 x i8> %shuffle.i
544 define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) {
545 ; CHECK-LABEL: test_vzip1q_u8:
546 ; CHECK: // %bb.0: // %entry
547 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b
550 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
551 ret <16 x i8> %shuffle.i
554 define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) {
555 ; CHECK-LABEL: test_vzip1_u16:
556 ; CHECK: // %bb.0: // %entry
557 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h
560 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
561 ret <4 x i16> %shuffle.i
564 define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) {
565 ; CHECK-LABEL: test_vzip1q_u16:
566 ; CHECK: // %bb.0: // %entry
567 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h
570 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
571 ret <8 x i16> %shuffle.i
574 define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) {
575 ; CHECK-LABEL: test_vzip1_u32:
576 ; CHECK: // %bb.0: // %entry
577 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
580 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
581 ret <2 x i32> %shuffle.i
584 define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) {
585 ; CHECK-LABEL: test_vzip1q_u32:
586 ; CHECK: // %bb.0: // %entry
587 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s
590 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
591 ret <4 x i32> %shuffle.i
594 define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) {
595 ; CHECK-LABEL: test_vzip1q_u64:
596 ; CHECK: // %bb.0: // %entry
597 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
600 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
601 ret <2 x i64> %shuffle.i
604 define <2 x ptr> @test_vzip1q_p0(<2 x ptr> %a, <2 x ptr> %b) {
605 ; CHECK-LABEL: test_vzip1q_p0:
606 ; CHECK: // %bb.0: // %entry
607 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
610 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 0, i32 2>
611 ret <2 x ptr> %shuffle.i
614 define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) {
615 ; CHECK-LABEL: test_vzip1_f32:
616 ; CHECK: // %bb.0: // %entry
617 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
620 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
621 ret <2 x float> %shuffle.i
624 define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) {
625 ; CHECK-LABEL: test_vzip1q_f32:
626 ; CHECK: // %bb.0: // %entry
627 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s
630 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
631 ret <4 x float> %shuffle.i
634 define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) {
635 ; CHECK-LABEL: test_vzip1q_f64:
636 ; CHECK: // %bb.0: // %entry
637 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
640 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
641 ret <2 x double> %shuffle.i
644 define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) {
645 ; CHECK-LABEL: test_vzip1_p8:
646 ; CHECK: // %bb.0: // %entry
647 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v1.8b
650 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
651 ret <8 x i8> %shuffle.i
654 define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) {
655 ; CHECK-LABEL: test_vzip1q_p8:
656 ; CHECK: // %bb.0: // %entry
657 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v1.16b
660 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
661 ret <16 x i8> %shuffle.i
664 define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) {
665 ; CHECK-LABEL: test_vzip1_p16:
666 ; CHECK: // %bb.0: // %entry
667 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v1.4h
670 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
671 ret <4 x i16> %shuffle.i
674 define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) {
675 ; CHECK-LABEL: test_vzip1q_p16:
676 ; CHECK: // %bb.0: // %entry
677 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v1.8h
680 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
681 ret <8 x i16> %shuffle.i
684 define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) {
685 ; CHECK-LABEL: test_vzip2_s8:
686 ; CHECK: // %bb.0: // %entry
687 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b
690 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
691 ret <8 x i8> %shuffle.i
694 define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) {
695 ; CHECK-LABEL: test_vzip2q_s8:
696 ; CHECK: // %bb.0: // %entry
697 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b
700 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
701 ret <16 x i8> %shuffle.i
704 define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) {
705 ; CHECK-LABEL: test_vzip2_s16:
706 ; CHECK: // %bb.0: // %entry
707 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h
710 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
711 ret <4 x i16> %shuffle.i
714 define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) {
715 ; CHECK-LABEL: test_vzip2q_s16:
716 ; CHECK: // %bb.0: // %entry
717 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h
720 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
721 ret <8 x i16> %shuffle.i
724 define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) {
725 ; CHECK-LABEL: test_vzip2_s32:
726 ; CHECK: // %bb.0: // %entry
727 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
730 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
731 ret <2 x i32> %shuffle.i
734 define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) {
735 ; CHECK-LABEL: test_vzip2q_s32:
736 ; CHECK: // %bb.0: // %entry
737 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s
740 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
741 ret <4 x i32> %shuffle.i
744 define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) {
745 ; CHECK-LABEL: test_vzip2q_s64:
746 ; CHECK: // %bb.0: // %entry
747 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
750 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
751 ret <2 x i64> %shuffle.i
754 define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) {
755 ; CHECK-LABEL: test_vzip2_u8:
756 ; CHECK: // %bb.0: // %entry
757 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b
760 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
761 ret <8 x i8> %shuffle.i
764 define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) {
765 ; CHECK-LABEL: test_vzip2q_u8:
766 ; CHECK: // %bb.0: // %entry
767 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b
770 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
771 ret <16 x i8> %shuffle.i
774 define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) {
775 ; CHECK-LABEL: test_vzip2_u16:
776 ; CHECK: // %bb.0: // %entry
777 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h
780 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
781 ret <4 x i16> %shuffle.i
784 define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) {
785 ; CHECK-LABEL: test_vzip2q_u16:
786 ; CHECK: // %bb.0: // %entry
787 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h
790 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
791 ret <8 x i16> %shuffle.i
794 define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) {
795 ; CHECK-LABEL: test_vzip2_u32:
796 ; CHECK: // %bb.0: // %entry
797 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
800 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
801 ret <2 x i32> %shuffle.i
804 define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) {
805 ; CHECK-LABEL: test_vzip2q_u32:
806 ; CHECK: // %bb.0: // %entry
807 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s
810 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
811 ret <4 x i32> %shuffle.i
814 define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) {
815 ; CHECK-LABEL: test_vzip2q_u64:
816 ; CHECK: // %bb.0: // %entry
817 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
820 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
821 ret <2 x i64> %shuffle.i
824 define <2 x ptr> @test_vzip2q_p0(<2 x ptr> %a, <2 x ptr> %b) {
825 ; CHECK-LABEL: test_vzip2q_p0:
826 ; CHECK: // %bb.0: // %entry
827 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
830 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 1, i32 3>
831 ret <2 x ptr> %shuffle.i
834 define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) {
835 ; CHECK-LABEL: test_vzip2_f32:
836 ; CHECK: // %bb.0: // %entry
837 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
840 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
841 ret <2 x float> %shuffle.i
844 define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) {
845 ; CHECK-LABEL: test_vzip2q_f32:
846 ; CHECK: // %bb.0: // %entry
847 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v1.4s
850 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
851 ret <4 x float> %shuffle.i
854 define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) {
855 ; CHECK-LABEL: test_vzip2q_f64:
856 ; CHECK: // %bb.0: // %entry
857 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
860 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
861 ret <2 x double> %shuffle.i
864 define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) {
865 ; CHECK-LABEL: test_vzip2_p8:
866 ; CHECK: // %bb.0: // %entry
867 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v1.8b
870 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
871 ret <8 x i8> %shuffle.i
874 define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) {
875 ; CHECK-LABEL: test_vzip2q_p8:
876 ; CHECK: // %bb.0: // %entry
877 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v1.16b
880 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
881 ret <16 x i8> %shuffle.i
884 define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) {
885 ; CHECK-LABEL: test_vzip2_p16:
886 ; CHECK: // %bb.0: // %entry
887 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v1.4h
890 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
891 ret <4 x i16> %shuffle.i
894 define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) {
895 ; CHECK-LABEL: test_vzip2q_p16:
896 ; CHECK: // %bb.0: // %entry
897 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v1.8h
900 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
901 ret <8 x i16> %shuffle.i
904 define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) {
905 ; CHECK-LABEL: test_vtrn1_s8:
906 ; CHECK: // %bb.0: // %entry
907 ; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b
910 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
911 ret <8 x i8> %shuffle.i
914 define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) {
915 ; CHECK-LABEL: test_vtrn1q_s8:
916 ; CHECK: // %bb.0: // %entry
917 ; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b
920 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
921 ret <16 x i8> %shuffle.i
924 define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) {
925 ; CHECK-LABEL: test_vtrn1_s16:
926 ; CHECK: // %bb.0: // %entry
927 ; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h
930 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
931 ret <4 x i16> %shuffle.i
934 define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) {
935 ; CHECK-LABEL: test_vtrn1q_s16:
936 ; CHECK: // %bb.0: // %entry
937 ; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h
940 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
941 ret <8 x i16> %shuffle.i
944 define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) {
945 ; CHECK-LABEL: test_vtrn1_s32:
946 ; CHECK: // %bb.0: // %entry
947 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
950 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
951 ret <2 x i32> %shuffle.i
954 define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) {
955 ; CHECK-LABEL: test_vtrn1q_s32:
956 ; CHECK: // %bb.0: // %entry
957 ; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s
960 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
961 ret <4 x i32> %shuffle.i
964 define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) {
965 ; CHECK-LABEL: test_vtrn1q_s64:
966 ; CHECK: // %bb.0: // %entry
967 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
970 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
971 ret <2 x i64> %shuffle.i
974 define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) {
975 ; CHECK-LABEL: test_vtrn1_u8:
976 ; CHECK: // %bb.0: // %entry
977 ; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b
980 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
981 ret <8 x i8> %shuffle.i
984 define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) {
985 ; CHECK-LABEL: test_vtrn1q_u8:
986 ; CHECK: // %bb.0: // %entry
987 ; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b
990 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
991 ret <16 x i8> %shuffle.i
994 define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) {
995 ; CHECK-LABEL: test_vtrn1_u16:
996 ; CHECK: // %bb.0: // %entry
997 ; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h
1000 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1001 ret <4 x i16> %shuffle.i
1004 define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) {
1005 ; CHECK-LABEL: test_vtrn1q_u16:
1006 ; CHECK: // %bb.0: // %entry
1007 ; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h
1010 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1011 ret <8 x i16> %shuffle.i
1014 define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) {
1015 ; CHECK-LABEL: test_vtrn1_u32:
1016 ; CHECK: // %bb.0: // %entry
1017 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
1020 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
1021 ret <2 x i32> %shuffle.i
1024 define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) {
1025 ; CHECK-LABEL: test_vtrn1q_u32:
1026 ; CHECK: // %bb.0: // %entry
1027 ; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s
1030 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1031 ret <4 x i32> %shuffle.i
1034 define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) {
1035 ; CHECK-LABEL: test_vtrn1q_u64:
1036 ; CHECK: // %bb.0: // %entry
1037 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
1040 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
1041 ret <2 x i64> %shuffle.i
1044 define <2 x ptr> @test_vtrn1q_p0(<2 x ptr> %a, <2 x ptr> %b) {
1045 ; CHECK-LABEL: test_vtrn1q_p0:
1046 ; CHECK: // %bb.0: // %entry
1047 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
1050 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 0, i32 2>
1051 ret <2 x ptr> %shuffle.i
1054 define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) {
1055 ; CHECK-LABEL: test_vtrn1_f32:
1056 ; CHECK: // %bb.0: // %entry
1057 ; CHECK-NEXT: zip1 v0.2s, v0.2s, v1.2s
1060 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
1061 ret <2 x float> %shuffle.i
1064 define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) {
1065 ; CHECK-LABEL: test_vtrn1q_f32:
1066 ; CHECK: // %bb.0: // %entry
1067 ; CHECK-NEXT: trn1 v0.4s, v0.4s, v1.4s
1070 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1071 ret <4 x float> %shuffle.i
1074 define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) {
1075 ; CHECK-LABEL: test_vtrn1q_f64:
1076 ; CHECK: // %bb.0: // %entry
1077 ; CHECK-NEXT: zip1 v0.2d, v0.2d, v1.2d
1080 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
1081 ret <2 x double> %shuffle.i
1084 define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) {
1085 ; CHECK-LABEL: test_vtrn1_p8:
1086 ; CHECK: // %bb.0: // %entry
1087 ; CHECK-NEXT: trn1 v0.8b, v0.8b, v1.8b
1090 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1091 ret <8 x i8> %shuffle.i
1094 define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) {
1095 ; CHECK-LABEL: test_vtrn1q_p8:
1096 ; CHECK: // %bb.0: // %entry
1097 ; CHECK-NEXT: trn1 v0.16b, v0.16b, v1.16b
1100 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1101 ret <16 x i8> %shuffle.i
1104 define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) {
1105 ; CHECK-LABEL: test_vtrn1_p16:
1106 ; CHECK: // %bb.0: // %entry
1107 ; CHECK-NEXT: trn1 v0.4h, v0.4h, v1.4h
1110 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1111 ret <4 x i16> %shuffle.i
1114 define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) {
1115 ; CHECK-LABEL: test_vtrn1q_p16:
1116 ; CHECK: // %bb.0: // %entry
1117 ; CHECK-NEXT: trn1 v0.8h, v0.8h, v1.8h
1120 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1121 ret <8 x i16> %shuffle.i
1124 define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) {
1125 ; CHECK-LABEL: test_vtrn2_s8:
1126 ; CHECK: // %bb.0: // %entry
1127 ; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b
1130 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1131 ret <8 x i8> %shuffle.i
1134 define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) {
1135 ; CHECK-LABEL: test_vtrn2q_s8:
1136 ; CHECK: // %bb.0: // %entry
1137 ; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b
1140 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1141 ret <16 x i8> %shuffle.i
1144 define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) {
1145 ; CHECK-LABEL: test_vtrn2_s16:
1146 ; CHECK: // %bb.0: // %entry
1147 ; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h
1150 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1151 ret <4 x i16> %shuffle.i
1154 define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) {
1155 ; CHECK-LABEL: test_vtrn2q_s16:
1156 ; CHECK: // %bb.0: // %entry
1157 ; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h
1160 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1161 ret <8 x i16> %shuffle.i
1164 define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) {
1165 ; CHECK-LABEL: test_vtrn2_s32:
1166 ; CHECK: // %bb.0: // %entry
1167 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
1170 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
1171 ret <2 x i32> %shuffle.i
1174 define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) {
1175 ; CHECK-LABEL: test_vtrn2q_s32:
1176 ; CHECK: // %bb.0: // %entry
1177 ; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s
1180 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1181 ret <4 x i32> %shuffle.i
1184 define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) {
1185 ; CHECK-LABEL: test_vtrn2q_s64:
1186 ; CHECK: // %bb.0: // %entry
1187 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
1190 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
1191 ret <2 x i64> %shuffle.i
1194 define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) {
1195 ; CHECK-LABEL: test_vtrn2_u8:
1196 ; CHECK: // %bb.0: // %entry
1197 ; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b
1200 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1201 ret <8 x i8> %shuffle.i
1204 define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) {
1205 ; CHECK-LABEL: test_vtrn2q_u8:
1206 ; CHECK: // %bb.0: // %entry
1207 ; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b
1210 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1211 ret <16 x i8> %shuffle.i
1214 define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) {
1215 ; CHECK-LABEL: test_vtrn2_u16:
1216 ; CHECK: // %bb.0: // %entry
1217 ; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h
1220 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1221 ret <4 x i16> %shuffle.i
1224 define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) {
1225 ; CHECK-LABEL: test_vtrn2q_u16:
1226 ; CHECK: // %bb.0: // %entry
1227 ; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h
1230 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1231 ret <8 x i16> %shuffle.i
1234 define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) {
1235 ; CHECK-LABEL: test_vtrn2_u32:
1236 ; CHECK: // %bb.0: // %entry
1237 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
1240 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
1241 ret <2 x i32> %shuffle.i
1244 define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) {
1245 ; CHECK-LABEL: test_vtrn2q_u32:
1246 ; CHECK: // %bb.0: // %entry
1247 ; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s
1250 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1251 ret <4 x i32> %shuffle.i
1254 define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) {
1255 ; CHECK-LABEL: test_vtrn2q_u64:
1256 ; CHECK: // %bb.0: // %entry
1257 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
1260 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
1261 ret <2 x i64> %shuffle.i
1264 define <2 x ptr> @test_vtrn2q_p0(<2 x ptr> %a, <2 x ptr> %b) {
1265 ; CHECK-LABEL: test_vtrn2q_p0:
1266 ; CHECK: // %bb.0: // %entry
1267 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
1270 %shuffle.i = shufflevector <2 x ptr> %a, <2 x ptr> %b, <2 x i32> <i32 1, i32 3>
1271 ret <2 x ptr> %shuffle.i
1274 define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) {
1275 ; CHECK-LABEL: test_vtrn2_f32:
1276 ; CHECK: // %bb.0: // %entry
1277 ; CHECK-NEXT: zip2 v0.2s, v0.2s, v1.2s
1280 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
1281 ret <2 x float> %shuffle.i
1284 define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) {
1285 ; CHECK-LABEL: test_vtrn2q_f32:
1286 ; CHECK: // %bb.0: // %entry
1287 ; CHECK-NEXT: trn2 v0.4s, v0.4s, v1.4s
1290 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1291 ret <4 x float> %shuffle.i
1294 define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) {
1295 ; CHECK-LABEL: test_vtrn2q_f64:
1296 ; CHECK: // %bb.0: // %entry
1297 ; CHECK-NEXT: zip2 v0.2d, v0.2d, v1.2d
1300 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
1301 ret <2 x double> %shuffle.i
1304 define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) {
1305 ; CHECK-LABEL: test_vtrn2_p8:
1306 ; CHECK: // %bb.0: // %entry
1307 ; CHECK-NEXT: trn2 v0.8b, v0.8b, v1.8b
1310 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1311 ret <8 x i8> %shuffle.i
1314 define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) {
1315 ; CHECK-LABEL: test_vtrn2q_p8:
1316 ; CHECK: // %bb.0: // %entry
1317 ; CHECK-NEXT: trn2 v0.16b, v0.16b, v1.16b
1320 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
1321 ret <16 x i8> %shuffle.i
1324 define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) {
1325 ; CHECK-LABEL: test_vtrn2_p16:
1326 ; CHECK: // %bb.0: // %entry
1327 ; CHECK-NEXT: trn2 v0.4h, v0.4h, v1.4h
1330 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
1331 ret <4 x i16> %shuffle.i
1334 define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) {
1335 ; CHECK-LABEL: test_vtrn2q_p16:
1336 ; CHECK: // %bb.0: // %entry
1337 ; CHECK-NEXT: trn2 v0.8h, v0.8h, v1.8h
1340 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
1341 ret <8 x i16> %shuffle.i
1344 define <8 x i8> @test_same_vuzp1_s8(<8 x i8> %a) {
1345 ; CHECK-LABEL: test_same_vuzp1_s8:
1346 ; CHECK: // %bb.0: // %entry
1347 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b
1350 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1351 ret <8 x i8> %shuffle.i
1354 define <16 x i8> @test_same_vuzp1q_s8(<16 x i8> %a) {
1355 ; CHECK-LABEL: test_same_vuzp1q_s8:
1356 ; CHECK: // %bb.0: // %entry
1357 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b
1360 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1361 ret <16 x i8> %shuffle.i
1364 define <4 x i16> @test_same_vuzp1_s16(<4 x i16> %a) {
1365 ; CHECK-LABEL: test_same_vuzp1_s16:
1366 ; CHECK: // %bb.0: // %entry
1367 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h
1370 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1371 ret <4 x i16> %shuffle.i
1374 define <8 x i16> @test_same_vuzp1q_s16(<8 x i16> %a) {
1375 ; CHECK-LABEL: test_same_vuzp1q_s16:
1376 ; CHECK: // %bb.0: // %entry
1377 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h
1380 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1381 ret <8 x i16> %shuffle.i
1384 define <4 x i32> @test_same_vuzp1q_s32(<4 x i32> %a) {
1385 ; CHECK-LABEL: test_same_vuzp1q_s32:
1386 ; CHECK: // %bb.0: // %entry
1387 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
1390 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1391 ret <4 x i32> %shuffle.i
1394 define <8 x i8> @test_same_vuzp1_u8(<8 x i8> %a) {
1395 ; CHECK-LABEL: test_same_vuzp1_u8:
1396 ; CHECK: // %bb.0: // %entry
1397 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b
1400 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1401 ret <8 x i8> %shuffle.i
1404 define <16 x i8> @test_same_vuzp1q_u8(<16 x i8> %a) {
1405 ; CHECK-LABEL: test_same_vuzp1q_u8:
1406 ; CHECK: // %bb.0: // %entry
1407 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b
1410 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1411 ret <16 x i8> %shuffle.i
1414 define <4 x i16> @test_same_vuzp1_u16(<4 x i16> %a) {
1415 ; CHECK-LABEL: test_same_vuzp1_u16:
1416 ; CHECK: // %bb.0: // %entry
1417 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h
1420 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1421 ret <4 x i16> %shuffle.i
1424 define <8 x i16> @test_same_vuzp1q_u16(<8 x i16> %a) {
1425 ; CHECK-LABEL: test_same_vuzp1q_u16:
1426 ; CHECK: // %bb.0: // %entry
1427 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h
1430 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1431 ret <8 x i16> %shuffle.i
1434 define <4 x i32> @test_same_vuzp1q_u32(<4 x i32> %a) {
1435 ; CHECK-LABEL: test_same_vuzp1q_u32:
1436 ; CHECK: // %bb.0: // %entry
1437 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
1440 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1441 ret <4 x i32> %shuffle.i
1444 define <4 x float> @test_same_vuzp1q_f32(<4 x float> %a) {
1445 ; CHECK-LABEL: test_same_vuzp1q_f32:
1446 ; CHECK: // %bb.0: // %entry
1447 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
1450 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1451 ret <4 x float> %shuffle.i
1454 define <8 x i8> @test_same_vuzp1_p8(<8 x i8> %a) {
1455 ; CHECK-LABEL: test_same_vuzp1_p8:
1456 ; CHECK: // %bb.0: // %entry
1457 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b
1460 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1461 ret <8 x i8> %shuffle.i
1464 define <16 x i8> @test_same_vuzp1q_p8(<16 x i8> %a) {
1465 ; CHECK-LABEL: test_same_vuzp1q_p8:
1466 ; CHECK: // %bb.0: // %entry
1467 ; CHECK-NEXT: uzp1 v0.16b, v0.16b, v0.16b
1470 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1471 ret <16 x i8> %shuffle.i
1474 define <4 x i16> @test_same_vuzp1_p16(<4 x i16> %a) {
1475 ; CHECK-LABEL: test_same_vuzp1_p16:
1476 ; CHECK: // %bb.0: // %entry
1477 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h
1480 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
1481 ret <4 x i16> %shuffle.i
1484 define <8 x i16> @test_same_vuzp1q_p16(<8 x i16> %a) {
1485 ; CHECK-LABEL: test_same_vuzp1q_p16:
1486 ; CHECK: // %bb.0: // %entry
1487 ; CHECK-NEXT: uzp1 v0.8h, v0.8h, v0.8h
1490 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
1491 ret <8 x i16> %shuffle.i
1494 define <8 x i8> @test_same_vuzp2_s8(<8 x i8> %a) {
1495 ; CHECK-LABEL: test_same_vuzp2_s8:
1496 ; CHECK: // %bb.0: // %entry
1497 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b
1500 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1501 ret <8 x i8> %shuffle.i
1504 define <16 x i8> @test_same_vuzp2q_s8(<16 x i8> %a) {
1505 ; CHECK-LABEL: test_same_vuzp2q_s8:
1506 ; CHECK: // %bb.0: // %entry
1507 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b
1510 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1511 ret <16 x i8> %shuffle.i
1514 define <4 x i16> @test_same_vuzp2_s16(<4 x i16> %a) {
1515 ; CHECK-LABEL: test_same_vuzp2_s16:
1516 ; CHECK: // %bb.0: // %entry
1517 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h
1520 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1521 ret <4 x i16> %shuffle.i
1524 define <8 x i16> @test_same_vuzp2q_s16(<8 x i16> %a) {
1525 ; CHECK-LABEL: test_same_vuzp2q_s16:
1526 ; CHECK: // %bb.0: // %entry
1527 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h
1530 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1531 ret <8 x i16> %shuffle.i
1534 define <4 x i32> @test_same_vuzp2q_s32(<4 x i32> %a) {
1535 ; CHECK-LABEL: test_same_vuzp2q_s32:
1536 ; CHECK: // %bb.0: // %entry
1537 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
1540 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1541 ret <4 x i32> %shuffle.i
1544 define <8 x i8> @test_same_vuzp2_u8(<8 x i8> %a) {
1545 ; CHECK-LABEL: test_same_vuzp2_u8:
1546 ; CHECK: // %bb.0: // %entry
1547 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b
1550 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1551 ret <8 x i8> %shuffle.i
1554 define <16 x i8> @test_same_vuzp2q_u8(<16 x i8> %a) {
1555 ; CHECK-LABEL: test_same_vuzp2q_u8:
1556 ; CHECK: // %bb.0: // %entry
1557 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b
1560 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1561 ret <16 x i8> %shuffle.i
1564 define <4 x i16> @test_same_vuzp2_u16(<4 x i16> %a) {
1565 ; CHECK-LABEL: test_same_vuzp2_u16:
1566 ; CHECK: // %bb.0: // %entry
1567 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h
1570 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1571 ret <4 x i16> %shuffle.i
1574 define <8 x i16> @test_same_vuzp2q_u16(<8 x i16> %a) {
1575 ; CHECK-LABEL: test_same_vuzp2q_u16:
1576 ; CHECK: // %bb.0: // %entry
1577 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h
1580 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1581 ret <8 x i16> %shuffle.i
1584 define <4 x i32> @test_same_vuzp2q_u32(<4 x i32> %a) {
1585 ; CHECK-LABEL: test_same_vuzp2q_u32:
1586 ; CHECK: // %bb.0: // %entry
1587 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
1590 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1591 ret <4 x i32> %shuffle.i
1594 define <4 x float> @test_same_vuzp2q_f32(<4 x float> %a) {
1595 ; CHECK-LABEL: test_same_vuzp2q_f32:
1596 ; CHECK: // %bb.0: // %entry
1597 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
1600 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1601 ret <4 x float> %shuffle.i
1604 define <8 x i8> @test_same_vuzp2_p8(<8 x i8> %a) {
1605 ; CHECK-LABEL: test_same_vuzp2_p8:
1606 ; CHECK: // %bb.0: // %entry
1607 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b
1610 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1611 ret <8 x i8> %shuffle.i
1614 define <16 x i8> @test_same_vuzp2q_p8(<16 x i8> %a) {
1615 ; CHECK-LABEL: test_same_vuzp2q_p8:
1616 ; CHECK: // %bb.0: // %entry
1617 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b
1620 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1621 ret <16 x i8> %shuffle.i
1624 define <4 x i16> @test_same_vuzp2_p16(<4 x i16> %a) {
1625 ; CHECK-LABEL: test_same_vuzp2_p16:
1626 ; CHECK: // %bb.0: // %entry
1627 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h
1630 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
1631 ret <4 x i16> %shuffle.i
1634 define <8 x i16> @test_same_vuzp2q_p16(<8 x i16> %a) {
1635 ; CHECK-LABEL: test_same_vuzp2q_p16:
1636 ; CHECK: // %bb.0: // %entry
1637 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h
1640 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
1641 ret <8 x i16> %shuffle.i
1644 define <8 x i8> @test_same_vzip1_s8(<8 x i8> %a) {
1645 ; CHECK-LABEL: test_same_vzip1_s8:
1646 ; CHECK: // %bb.0: // %entry
1647 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b
1650 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1651 ret <8 x i8> %shuffle.i
1654 define <16 x i8> @test_same_vzip1q_s8(<16 x i8> %a) {
1655 ; CHECK-LABEL: test_same_vzip1q_s8:
1656 ; CHECK: // %bb.0: // %entry
1657 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b
1660 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1661 ret <16 x i8> %shuffle.i
1664 define <4 x i16> @test_same_vzip1_s16(<4 x i16> %a) {
1665 ; CHECK-LABEL: test_same_vzip1_s16:
1666 ; CHECK: // %bb.0: // %entry
1667 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h
1670 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1671 ret <4 x i16> %shuffle.i
1674 define <8 x i16> @test_same_vzip1q_s16(<8 x i16> %a) {
1675 ; CHECK-LABEL: test_same_vzip1q_s16:
1676 ; CHECK: // %bb.0: // %entry
1677 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h
1680 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1681 ret <8 x i16> %shuffle.i
1684 define <4 x i32> @test_same_vzip1q_s32(<4 x i32> %a) {
1685 ; CHECK-LABEL: test_same_vzip1q_s32:
1686 ; CHECK: // %bb.0: // %entry
1687 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s
1690 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1691 ret <4 x i32> %shuffle.i
1694 define <8 x i8> @test_same_vzip1_u8(<8 x i8> %a) {
1695 ; CHECK-LABEL: test_same_vzip1_u8:
1696 ; CHECK: // %bb.0: // %entry
1697 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b
1700 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1701 ret <8 x i8> %shuffle.i
1704 define <16 x i8> @test_same_vzip1q_u8(<16 x i8> %a) {
1705 ; CHECK-LABEL: test_same_vzip1q_u8:
1706 ; CHECK: // %bb.0: // %entry
1707 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b
1710 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1711 ret <16 x i8> %shuffle.i
1714 define <4 x i16> @test_same_vzip1_u16(<4 x i16> %a) {
1715 ; CHECK-LABEL: test_same_vzip1_u16:
1716 ; CHECK: // %bb.0: // %entry
1717 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h
1720 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1721 ret <4 x i16> %shuffle.i
1724 define <8 x i16> @test_same_vzip1q_u16(<8 x i16> %a) {
1725 ; CHECK-LABEL: test_same_vzip1q_u16:
1726 ; CHECK: // %bb.0: // %entry
1727 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h
1730 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1731 ret <8 x i16> %shuffle.i
1734 define <4 x i32> @test_same_vzip1q_u32(<4 x i32> %a) {
1735 ; CHECK-LABEL: test_same_vzip1q_u32:
1736 ; CHECK: // %bb.0: // %entry
1737 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s
1740 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1741 ret <4 x i32> %shuffle.i
1744 define <4 x float> @test_same_vzip1q_f32(<4 x float> %a) {
1745 ; CHECK-LABEL: test_same_vzip1q_f32:
1746 ; CHECK: // %bb.0: // %entry
1747 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s
1750 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1751 ret <4 x float> %shuffle.i
1754 define <8 x i8> @test_same_vzip1_p8(<8 x i8> %a) {
1755 ; CHECK-LABEL: test_same_vzip1_p8:
1756 ; CHECK: // %bb.0: // %entry
1757 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b
1760 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1761 ret <8 x i8> %shuffle.i
1764 define <16 x i8> @test_same_vzip1q_p8(<16 x i8> %a) {
1765 ; CHECK-LABEL: test_same_vzip1q_p8:
1766 ; CHECK: // %bb.0: // %entry
1767 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b
1770 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
1771 ret <16 x i8> %shuffle.i
1774 define <4 x i16> @test_same_vzip1_p16(<4 x i16> %a) {
1775 ; CHECK-LABEL: test_same_vzip1_p16:
1776 ; CHECK: // %bb.0: // %entry
1777 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h
1780 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1781 ret <4 x i16> %shuffle.i
1784 define <8 x i16> @test_same_vzip1q_p16(<8 x i16> %a) {
1785 ; CHECK-LABEL: test_same_vzip1q_p16:
1786 ; CHECK: // %bb.0: // %entry
1787 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h
1790 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
1791 ret <8 x i16> %shuffle.i
1794 define <4 x i8> @test_vzip1_v4i8(<8 x i8> %p) {
1795 ; CHECK-SD-LABEL: test_vzip1_v4i8:
1796 ; CHECK-SD: // %bb.0:
1797 ; CHECK-SD-NEXT: zip1 v0.8b, v0.8b, v0.8b
1798 ; CHECK-SD-NEXT: ret
1800 ; CHECK-GI-LABEL: test_vzip1_v4i8:
1801 ; CHECK-GI: // %bb.0:
1802 ; CHECK-GI-NEXT: ushll v0.8h, v0.8b, #0
1803 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
1804 ; CHECK-GI-NEXT: ret
1805 %lo = shufflevector <8 x i8> %p, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
1809 define <8 x i8> @test_same_vzip2_s8(<8 x i8> %a) {
1810 ; CHECK-LABEL: test_same_vzip2_s8:
1811 ; CHECK: // %bb.0: // %entry
1812 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b
1815 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1816 ret <8 x i8> %shuffle.i
1819 define <16 x i8> @test_same_vzip2q_s8(<16 x i8> %a) {
1820 ; CHECK-LABEL: test_same_vzip2q_s8:
1821 ; CHECK: // %bb.0: // %entry
1822 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b
1825 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1826 ret <16 x i8> %shuffle.i
1829 define <4 x i16> @test_same_vzip2_s16(<4 x i16> %a) {
1830 ; CHECK-LABEL: test_same_vzip2_s16:
1831 ; CHECK: // %bb.0: // %entry
1832 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h
1835 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1836 ret <4 x i16> %shuffle.i
1839 define <8 x i16> @test_same_vzip2q_s16(<8 x i16> %a) {
1840 ; CHECK-LABEL: test_same_vzip2q_s16:
1841 ; CHECK: // %bb.0: // %entry
1842 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h
1845 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1846 ret <8 x i16> %shuffle.i
1849 define <4 x i32> @test_same_vzip2q_s32(<4 x i32> %a) {
1850 ; CHECK-LABEL: test_same_vzip2q_s32:
1851 ; CHECK: // %bb.0: // %entry
1852 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s
1855 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1856 ret <4 x i32> %shuffle.i
1859 define <8 x i8> @test_same_vzip2_u8(<8 x i8> %a) {
1860 ; CHECK-LABEL: test_same_vzip2_u8:
1861 ; CHECK: // %bb.0: // %entry
1862 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b
1865 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1866 ret <8 x i8> %shuffle.i
1869 define <16 x i8> @test_same_vzip2q_u8(<16 x i8> %a) {
1870 ; CHECK-LABEL: test_same_vzip2q_u8:
1871 ; CHECK: // %bb.0: // %entry
1872 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b
1875 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1876 ret <16 x i8> %shuffle.i
1879 define <4 x i16> @test_same_vzip2_u16(<4 x i16> %a) {
1880 ; CHECK-LABEL: test_same_vzip2_u16:
1881 ; CHECK: // %bb.0: // %entry
1882 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h
1885 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1886 ret <4 x i16> %shuffle.i
1889 define <8 x i16> @test_same_vzip2q_u16(<8 x i16> %a) {
1890 ; CHECK-LABEL: test_same_vzip2q_u16:
1891 ; CHECK: // %bb.0: // %entry
1892 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h
1895 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1896 ret <8 x i16> %shuffle.i
1899 define <4 x i32> @test_same_vzip2q_u32(<4 x i32> %a) {
1900 ; CHECK-LABEL: test_same_vzip2q_u32:
1901 ; CHECK: // %bb.0: // %entry
1902 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s
1905 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1906 ret <4 x i32> %shuffle.i
1909 define <4 x float> @test_same_vzip2q_f32(<4 x float> %a) {
1910 ; CHECK-LABEL: test_same_vzip2q_f32:
1911 ; CHECK: // %bb.0: // %entry
1912 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s
1915 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1916 ret <4 x float> %shuffle.i
1919 define <8 x i8> @test_same_vzip2_p8(<8 x i8> %a) {
1920 ; CHECK-LABEL: test_same_vzip2_p8:
1921 ; CHECK: // %bb.0: // %entry
1922 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b
1925 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1926 ret <8 x i8> %shuffle.i
1929 define <16 x i8> @test_same_vzip2q_p8(<16 x i8> %a) {
1930 ; CHECK-LABEL: test_same_vzip2q_p8:
1931 ; CHECK: // %bb.0: // %entry
1932 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b
1935 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
1936 ret <16 x i8> %shuffle.i
1939 define <4 x i16> @test_same_vzip2_p16(<4 x i16> %a) {
1940 ; CHECK-LABEL: test_same_vzip2_p16:
1941 ; CHECK: // %bb.0: // %entry
1942 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h
1945 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1946 ret <4 x i16> %shuffle.i
1949 define <8 x i16> @test_same_vzip2q_p16(<8 x i16> %a) {
1950 ; CHECK-LABEL: test_same_vzip2q_p16:
1951 ; CHECK: // %bb.0: // %entry
1952 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h
1955 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
1956 ret <8 x i16> %shuffle.i
1959 define <8 x i8> @test_same_vtrn1_s8(<8 x i8> %a) {
1960 ; CHECK-LABEL: test_same_vtrn1_s8:
1961 ; CHECK: // %bb.0: // %entry
1962 ; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b
1965 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1966 ret <8 x i8> %shuffle.i
1969 define <16 x i8> @test_same_vtrn1q_s8(<16 x i8> %a) {
1970 ; CHECK-LABEL: test_same_vtrn1q_s8:
1971 ; CHECK: // %bb.0: // %entry
1972 ; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b
1975 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
1976 ret <16 x i8> %shuffle.i
1979 define <4 x i16> @test_same_vtrn1_s16(<4 x i16> %a) {
1980 ; CHECK-LABEL: test_same_vtrn1_s16:
1981 ; CHECK: // %bb.0: // %entry
1982 ; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h
1985 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
1986 ret <4 x i16> %shuffle.i
1989 define <8 x i16> @test_same_vtrn1q_s16(<8 x i16> %a) {
1990 ; CHECK-LABEL: test_same_vtrn1q_s16:
1991 ; CHECK: // %bb.0: // %entry
1992 ; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h
1995 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
1996 ret <8 x i16> %shuffle.i
1999 define <4 x i32> @test_same_vtrn1q_s32(<4 x i32> %a) {
2000 ; CHECK-LABEL: test_same_vtrn1q_s32:
2001 ; CHECK: // %bb.0: // %entry
2002 ; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s
2005 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2006 ret <4 x i32> %shuffle.i
2009 define <8 x i8> @test_same_vtrn1_u8(<8 x i8> %a) {
2010 ; CHECK-LABEL: test_same_vtrn1_u8:
2011 ; CHECK: // %bb.0: // %entry
2012 ; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b
2015 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2016 ret <8 x i8> %shuffle.i
2019 define <16 x i8> @test_same_vtrn1q_u8(<16 x i8> %a) {
2020 ; CHECK-LABEL: test_same_vtrn1q_u8:
2021 ; CHECK: // %bb.0: // %entry
2022 ; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b
2025 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2026 ret <16 x i8> %shuffle.i
2029 define <4 x i16> @test_same_vtrn1_u16(<4 x i16> %a) {
2030 ; CHECK-LABEL: test_same_vtrn1_u16:
2031 ; CHECK: // %bb.0: // %entry
2032 ; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h
2035 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2036 ret <4 x i16> %shuffle.i
2039 define <8 x i16> @test_same_vtrn1q_u16(<8 x i16> %a) {
2040 ; CHECK-LABEL: test_same_vtrn1q_u16:
2041 ; CHECK: // %bb.0: // %entry
2042 ; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h
2045 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2046 ret <8 x i16> %shuffle.i
2049 define <4 x i32> @test_same_vtrn1q_u32(<4 x i32> %a) {
2050 ; CHECK-LABEL: test_same_vtrn1q_u32:
2051 ; CHECK: // %bb.0: // %entry
2052 ; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s
2055 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2056 ret <4 x i32> %shuffle.i
2059 define <4 x float> @test_same_vtrn1q_f32(<4 x float> %a) {
2060 ; CHECK-LABEL: test_same_vtrn1q_f32:
2061 ; CHECK: // %bb.0: // %entry
2062 ; CHECK-NEXT: trn1 v0.4s, v0.4s, v0.4s
2065 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2066 ret <4 x float> %shuffle.i
2069 define <8 x i8> @test_same_vtrn1_p8(<8 x i8> %a) {
2070 ; CHECK-LABEL: test_same_vtrn1_p8:
2071 ; CHECK: // %bb.0: // %entry
2072 ; CHECK-NEXT: trn1 v0.8b, v0.8b, v0.8b
2075 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2076 ret <8 x i8> %shuffle.i
2079 define <16 x i8> @test_same_vtrn1q_p8(<16 x i8> %a) {
2080 ; CHECK-LABEL: test_same_vtrn1q_p8:
2081 ; CHECK: // %bb.0: // %entry
2082 ; CHECK-NEXT: trn1 v0.16b, v0.16b, v0.16b
2085 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2086 ret <16 x i8> %shuffle.i
2089 define <4 x i16> @test_same_vtrn1_p16(<4 x i16> %a) {
2090 ; CHECK-LABEL: test_same_vtrn1_p16:
2091 ; CHECK: // %bb.0: // %entry
2092 ; CHECK-NEXT: trn1 v0.4h, v0.4h, v0.4h
2095 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2096 ret <4 x i16> %shuffle.i
2099 define <8 x i16> @test_same_vtrn1q_p16(<8 x i16> %a) {
2100 ; CHECK-LABEL: test_same_vtrn1q_p16:
2101 ; CHECK: // %bb.0: // %entry
2102 ; CHECK-NEXT: trn1 v0.8h, v0.8h, v0.8h
2105 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2106 ret <8 x i16> %shuffle.i
2109 define <8 x i8> @test_same_vtrn2_s8(<8 x i8> %a) {
2110 ; CHECK-LABEL: test_same_vtrn2_s8:
2111 ; CHECK: // %bb.0: // %entry
2112 ; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b
2115 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2116 ret <8 x i8> %shuffle.i
2119 define <16 x i8> @test_same_vtrn2q_s8(<16 x i8> %a) {
2120 ; CHECK-LABEL: test_same_vtrn2q_s8:
2121 ; CHECK: // %bb.0: // %entry
2122 ; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b
2125 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2126 ret <16 x i8> %shuffle.i
2129 define <4 x i16> @test_same_vtrn2_s16(<4 x i16> %a) {
2130 ; CHECK-LABEL: test_same_vtrn2_s16:
2131 ; CHECK: // %bb.0: // %entry
2132 ; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h
2135 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2136 ret <4 x i16> %shuffle.i
2139 define <8 x i16> @test_same_vtrn2q_s16(<8 x i16> %a) {
2140 ; CHECK-LABEL: test_same_vtrn2q_s16:
2141 ; CHECK: // %bb.0: // %entry
2142 ; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h
2145 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2146 ret <8 x i16> %shuffle.i
2149 define <4 x i32> @test_same_vtrn2q_s32(<4 x i32> %a) {
2150 ; CHECK-LABEL: test_same_vtrn2q_s32:
2151 ; CHECK: // %bb.0: // %entry
2152 ; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s
2155 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2156 ret <4 x i32> %shuffle.i
2159 define <8 x i8> @test_same_vtrn2_u8(<8 x i8> %a) {
2160 ; CHECK-LABEL: test_same_vtrn2_u8:
2161 ; CHECK: // %bb.0: // %entry
2162 ; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b
2165 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2166 ret <8 x i8> %shuffle.i
2169 define <16 x i8> @test_same_vtrn2q_u8(<16 x i8> %a) {
2170 ; CHECK-LABEL: test_same_vtrn2q_u8:
2171 ; CHECK: // %bb.0: // %entry
2172 ; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b
2175 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2176 ret <16 x i8> %shuffle.i
2179 define <4 x i16> @test_same_vtrn2_u16(<4 x i16> %a) {
2180 ; CHECK-LABEL: test_same_vtrn2_u16:
2181 ; CHECK: // %bb.0: // %entry
2182 ; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h
2185 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2186 ret <4 x i16> %shuffle.i
2189 define <8 x i16> @test_same_vtrn2q_u16(<8 x i16> %a) {
2190 ; CHECK-LABEL: test_same_vtrn2q_u16:
2191 ; CHECK: // %bb.0: // %entry
2192 ; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h
2195 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2196 ret <8 x i16> %shuffle.i
2199 define <4 x i32> @test_same_vtrn2q_u32(<4 x i32> %a) {
2200 ; CHECK-LABEL: test_same_vtrn2q_u32:
2201 ; CHECK: // %bb.0: // %entry
2202 ; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s
2205 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2206 ret <4 x i32> %shuffle.i
2209 define <4 x float> @test_same_vtrn2q_f32(<4 x float> %a) {
2210 ; CHECK-LABEL: test_same_vtrn2q_f32:
2211 ; CHECK: // %bb.0: // %entry
2212 ; CHECK-NEXT: trn2 v0.4s, v0.4s, v0.4s
2215 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2216 ret <4 x float> %shuffle.i
2219 define <8 x i8> @test_same_vtrn2_p8(<8 x i8> %a) {
2220 ; CHECK-LABEL: test_same_vtrn2_p8:
2221 ; CHECK: // %bb.0: // %entry
2222 ; CHECK-NEXT: trn2 v0.8b, v0.8b, v0.8b
2225 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2226 ret <8 x i8> %shuffle.i
2229 define <16 x i8> @test_same_vtrn2q_p8(<16 x i8> %a) {
2230 ; CHECK-LABEL: test_same_vtrn2q_p8:
2231 ; CHECK: // %bb.0: // %entry
2232 ; CHECK-NEXT: trn2 v0.16b, v0.16b, v0.16b
2235 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
2236 ret <16 x i8> %shuffle.i
2239 define <4 x i16> @test_same_vtrn2_p16(<4 x i16> %a) {
2240 ; CHECK-LABEL: test_same_vtrn2_p16:
2241 ; CHECK: // %bb.0: // %entry
2242 ; CHECK-NEXT: trn2 v0.4h, v0.4h, v0.4h
2245 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
2246 ret <4 x i16> %shuffle.i
2249 define <8 x i16> @test_same_vtrn2q_p16(<8 x i16> %a) {
2250 ; CHECK-LABEL: test_same_vtrn2q_p16:
2251 ; CHECK: // %bb.0: // %entry
2252 ; CHECK-NEXT: trn2 v0.8h, v0.8h, v0.8h
2255 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
2256 ret <8 x i16> %shuffle.i
2260 define <8 x i8> @test_undef_vuzp1_s8(<8 x i8> %a) {
2261 ; CHECK-LABEL: test_undef_vuzp1_s8:
2262 ; CHECK: // %bb.0: // %entry
2263 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b
2266 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2267 ret <8 x i8> %shuffle.i
2270 define <16 x i8> @test_undef_vuzp1q_s8(<16 x i8> %a) {
2271 ; CHECK-SD-LABEL: test_undef_vuzp1q_s8:
2272 ; CHECK-SD: // %bb.0: // %entry
2273 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
2274 ; CHECK-SD-NEXT: ret
2276 ; CHECK-GI-LABEL: test_undef_vuzp1q_s8:
2277 ; CHECK-GI: // %bb.0: // %entry
2278 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v0.16b
2279 ; CHECK-GI-NEXT: ret
2281 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2282 ret <16 x i8> %shuffle.i
2285 define <4 x i16> @test_undef_vuzp1_s16(<4 x i16> %a) {
2286 ; CHECK-LABEL: test_undef_vuzp1_s16:
2287 ; CHECK: // %bb.0: // %entry
2288 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h
2291 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2292 ret <4 x i16> %shuffle.i
2295 define <8 x i16> @test_undef_vuzp1q_s16(<8 x i16> %a) {
2296 ; CHECK-SD-LABEL: test_undef_vuzp1q_s16:
2297 ; CHECK-SD: // %bb.0: // %entry
2298 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
2299 ; CHECK-SD-NEXT: ret
2301 ; CHECK-GI-LABEL: test_undef_vuzp1q_s16:
2302 ; CHECK-GI: // %bb.0: // %entry
2303 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v0.8h
2304 ; CHECK-GI-NEXT: ret
2306 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2307 ret <8 x i16> %shuffle.i
2310 define <4 x i32> @test_undef_vuzp1q_s32(<4 x i32> %a) {
2311 ; CHECK-SD-LABEL: test_undef_vuzp1q_s32:
2312 ; CHECK-SD: // %bb.0: // %entry
2313 ; CHECK-SD-NEXT: xtn v0.2s, v0.2d
2314 ; CHECK-SD-NEXT: ret
2316 ; CHECK-GI-LABEL: test_undef_vuzp1q_s32:
2317 ; CHECK-GI: // %bb.0: // %entry
2318 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v0.4s
2319 ; CHECK-GI-NEXT: ret
2321 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2322 ret <4 x i32> %shuffle.i
2325 define <8 x i8> @test_undef_vuzp1_u8(<8 x i8> %a) {
2326 ; CHECK-LABEL: test_undef_vuzp1_u8:
2327 ; CHECK: // %bb.0: // %entry
2328 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b
2331 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2332 ret <8 x i8> %shuffle.i
2335 define <16 x i8> @test_undef_vuzp1q_u8(<16 x i8> %a) {
2336 ; CHECK-SD-LABEL: test_undef_vuzp1q_u8:
2337 ; CHECK-SD: // %bb.0: // %entry
2338 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
2339 ; CHECK-SD-NEXT: ret
2341 ; CHECK-GI-LABEL: test_undef_vuzp1q_u8:
2342 ; CHECK-GI: // %bb.0: // %entry
2343 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v0.16b
2344 ; CHECK-GI-NEXT: ret
2346 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2347 ret <16 x i8> %shuffle.i
2350 define <4 x i16> @test_undef_vuzp1_u16(<4 x i16> %a) {
2351 ; CHECK-LABEL: test_undef_vuzp1_u16:
2352 ; CHECK: // %bb.0: // %entry
2353 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h
2356 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2357 ret <4 x i16> %shuffle.i
2360 define <8 x i16> @test_undef_vuzp1q_u16(<8 x i16> %a) {
2361 ; CHECK-SD-LABEL: test_undef_vuzp1q_u16:
2362 ; CHECK-SD: // %bb.0: // %entry
2363 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
2364 ; CHECK-SD-NEXT: ret
2366 ; CHECK-GI-LABEL: test_undef_vuzp1q_u16:
2367 ; CHECK-GI: // %bb.0: // %entry
2368 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v0.8h
2369 ; CHECK-GI-NEXT: ret
2371 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2372 ret <8 x i16> %shuffle.i
2375 define <4 x i32> @test_undef_vuzp1q_u32(<4 x i32> %a) {
2376 ; CHECK-SD-LABEL: test_undef_vuzp1q_u32:
2377 ; CHECK-SD: // %bb.0: // %entry
2378 ; CHECK-SD-NEXT: xtn v0.2s, v0.2d
2379 ; CHECK-SD-NEXT: ret
2381 ; CHECK-GI-LABEL: test_undef_vuzp1q_u32:
2382 ; CHECK-GI: // %bb.0: // %entry
2383 ; CHECK-GI-NEXT: uzp1 v0.4s, v0.4s, v0.4s
2384 ; CHECK-GI-NEXT: ret
2386 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2387 ret <4 x i32> %shuffle.i
2390 define <4 x float> @test_undef_vuzp1q_f32(<4 x float> %a) {
2391 ; CHECK-LABEL: test_undef_vuzp1q_f32:
2392 ; CHECK: // %bb.0: // %entry
2393 ; CHECK-NEXT: uzp1 v0.4s, v0.4s, v0.4s
2396 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2397 ret <4 x float> %shuffle.i
2400 define <8 x i8> @test_undef_vuzp1_p8(<8 x i8> %a) {
2401 ; CHECK-LABEL: test_undef_vuzp1_p8:
2402 ; CHECK: // %bb.0: // %entry
2403 ; CHECK-NEXT: uzp1 v0.8b, v0.8b, v0.8b
2406 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2407 ret <8 x i8> %shuffle.i
2410 define <16 x i8> @test_undef_vuzp1q_p8(<16 x i8> %a) {
2411 ; CHECK-SD-LABEL: test_undef_vuzp1q_p8:
2412 ; CHECK-SD: // %bb.0: // %entry
2413 ; CHECK-SD-NEXT: xtn v0.8b, v0.8h
2414 ; CHECK-SD-NEXT: ret
2416 ; CHECK-GI-LABEL: test_undef_vuzp1q_p8:
2417 ; CHECK-GI: // %bb.0: // %entry
2418 ; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v0.16b
2419 ; CHECK-GI-NEXT: ret
2421 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
2422 ret <16 x i8> %shuffle.i
2425 define <4 x i16> @test_undef_vuzp1_p16(<4 x i16> %a) {
2426 ; CHECK-LABEL: test_undef_vuzp1_p16:
2427 ; CHECK: // %bb.0: // %entry
2428 ; CHECK-NEXT: uzp1 v0.4h, v0.4h, v0.4h
2431 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
2432 ret <4 x i16> %shuffle.i
2435 define <8 x i16> @test_undef_vuzp1q_p16(<8 x i16> %a) {
2436 ; CHECK-SD-LABEL: test_undef_vuzp1q_p16:
2437 ; CHECK-SD: // %bb.0: // %entry
2438 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
2439 ; CHECK-SD-NEXT: ret
2441 ; CHECK-GI-LABEL: test_undef_vuzp1q_p16:
2442 ; CHECK-GI: // %bb.0: // %entry
2443 ; CHECK-GI-NEXT: uzp1 v0.8h, v0.8h, v0.8h
2444 ; CHECK-GI-NEXT: ret
2446 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
2447 ret <8 x i16> %shuffle.i
2450 define <8 x i8> @test_undef_vuzp2_s8(<8 x i8> %a) {
2451 ; CHECK-LABEL: test_undef_vuzp2_s8:
2452 ; CHECK: // %bb.0: // %entry
2453 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b
2456 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2457 ret <8 x i8> %shuffle.i
2460 define <16 x i8> @test_undef_vuzp2q_s8(<16 x i8> %a) {
2461 ; CHECK-LABEL: test_undef_vuzp2q_s8:
2462 ; CHECK: // %bb.0: // %entry
2463 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b
2466 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2467 ret <16 x i8> %shuffle.i
2470 define <4 x i16> @test_undef_vuzp2_s16(<4 x i16> %a) {
2471 ; CHECK-LABEL: test_undef_vuzp2_s16:
2472 ; CHECK: // %bb.0: // %entry
2473 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h
2476 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2477 ret <4 x i16> %shuffle.i
2480 define <8 x i16> @test_undef_vuzp2q_s16(<8 x i16> %a) {
2481 ; CHECK-LABEL: test_undef_vuzp2q_s16:
2482 ; CHECK: // %bb.0: // %entry
2483 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h
2486 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2487 ret <8 x i16> %shuffle.i
2490 define <4 x i32> @test_undef_vuzp2q_s32(<4 x i32> %a) {
2491 ; CHECK-LABEL: test_undef_vuzp2q_s32:
2492 ; CHECK: // %bb.0: // %entry
2493 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
2496 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2497 ret <4 x i32> %shuffle.i
2500 define <8 x i8> @test_undef_vuzp2_u8(<8 x i8> %a) {
2501 ; CHECK-LABEL: test_undef_vuzp2_u8:
2502 ; CHECK: // %bb.0: // %entry
2503 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b
2506 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2507 ret <8 x i8> %shuffle.i
2510 define <16 x i8> @test_undef_vuzp2q_u8(<16 x i8> %a) {
2511 ; CHECK-LABEL: test_undef_vuzp2q_u8:
2512 ; CHECK: // %bb.0: // %entry
2513 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b
2516 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2517 ret <16 x i8> %shuffle.i
2520 define <4 x i16> @test_undef_vuzp2_u16(<4 x i16> %a) {
2521 ; CHECK-LABEL: test_undef_vuzp2_u16:
2522 ; CHECK: // %bb.0: // %entry
2523 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h
2526 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2527 ret <4 x i16> %shuffle.i
2530 define <8 x i16> @test_undef_vuzp2q_u16(<8 x i16> %a) {
2531 ; CHECK-LABEL: test_undef_vuzp2q_u16:
2532 ; CHECK: // %bb.0: // %entry
2533 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h
2536 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2537 ret <8 x i16> %shuffle.i
2540 define <4 x i32> @test_undef_vuzp2q_u32(<4 x i32> %a) {
2541 ; CHECK-LABEL: test_undef_vuzp2q_u32:
2542 ; CHECK: // %bb.0: // %entry
2543 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
2546 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2547 ret <4 x i32> %shuffle.i
2550 define <4 x float> @test_undef_vuzp2q_f32(<4 x float> %a) {
2551 ; CHECK-LABEL: test_undef_vuzp2q_f32:
2552 ; CHECK: // %bb.0: // %entry
2553 ; CHECK-NEXT: uzp2 v0.4s, v0.4s, v0.4s
2556 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2557 ret <4 x float> %shuffle.i
2560 define <8 x i8> @test_undef_vuzp2_p8(<8 x i8> %a) {
2561 ; CHECK-LABEL: test_undef_vuzp2_p8:
2562 ; CHECK: // %bb.0: // %entry
2563 ; CHECK-NEXT: uzp2 v0.8b, v0.8b, v0.8b
2566 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2567 ret <8 x i8> %shuffle.i
2570 define <16 x i8> @test_undef_vuzp2q_p8(<16 x i8> %a) {
2571 ; CHECK-LABEL: test_undef_vuzp2q_p8:
2572 ; CHECK: // %bb.0: // %entry
2573 ; CHECK-NEXT: uzp2 v0.16b, v0.16b, v0.16b
2576 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
2577 ret <16 x i8> %shuffle.i
2580 define <4 x i16> @test_undef_vuzp2_p16(<4 x i16> %a) {
2581 ; CHECK-LABEL: test_undef_vuzp2_p16:
2582 ; CHECK: // %bb.0: // %entry
2583 ; CHECK-NEXT: uzp2 v0.4h, v0.4h, v0.4h
2586 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
2587 ret <4 x i16> %shuffle.i
2590 define <8 x i16> @test_undef_vuzp2q_p16(<8 x i16> %a) {
2591 ; CHECK-LABEL: test_undef_vuzp2q_p16:
2592 ; CHECK: // %bb.0: // %entry
2593 ; CHECK-NEXT: uzp2 v0.8h, v0.8h, v0.8h
2596 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
2597 ret <8 x i16> %shuffle.i
2600 define <8 x i8> @test_undef_vzip1_s8(<8 x i8> %a) {
2601 ; CHECK-LABEL: test_undef_vzip1_s8:
2602 ; CHECK: // %bb.0: // %entry
2603 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b
2606 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2607 ret <8 x i8> %shuffle.i
2610 define <16 x i8> @test_undef_vzip1q_s8(<16 x i8> %a) {
2611 ; CHECK-LABEL: test_undef_vzip1q_s8:
2612 ; CHECK: // %bb.0: // %entry
2613 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b
2616 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2617 ret <16 x i8> %shuffle.i
2620 define <4 x i16> @test_undef_vzip1_s16(<4 x i16> %a) {
2621 ; CHECK-LABEL: test_undef_vzip1_s16:
2622 ; CHECK: // %bb.0: // %entry
2623 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h
2626 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2627 ret <4 x i16> %shuffle.i
2630 define <8 x i16> @test_undef_vzip1q_s16(<8 x i16> %a) {
2631 ; CHECK-LABEL: test_undef_vzip1q_s16:
2632 ; CHECK: // %bb.0: // %entry
2633 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h
2636 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2637 ret <8 x i16> %shuffle.i
2640 define <4 x i32> @test_undef_vzip1q_s32(<4 x i32> %a) {
2641 ; CHECK-LABEL: test_undef_vzip1q_s32:
2642 ; CHECK: // %bb.0: // %entry
2643 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s
2646 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2647 ret <4 x i32> %shuffle.i
2650 define <8 x i8> @test_undef_vzip1_u8(<8 x i8> %a) {
2651 ; CHECK-LABEL: test_undef_vzip1_u8:
2652 ; CHECK: // %bb.0: // %entry
2653 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b
2656 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2657 ret <8 x i8> %shuffle.i
2660 define <16 x i8> @test_undef_vzip1q_u8(<16 x i8> %a) {
2661 ; CHECK-LABEL: test_undef_vzip1q_u8:
2662 ; CHECK: // %bb.0: // %entry
2663 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b
2666 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2667 ret <16 x i8> %shuffle.i
2670 define <4 x i16> @test_undef_vzip1_u16(<4 x i16> %a) {
2671 ; CHECK-LABEL: test_undef_vzip1_u16:
2672 ; CHECK: // %bb.0: // %entry
2673 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h
2676 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2677 ret <4 x i16> %shuffle.i
2680 define <8 x i16> @test_undef_vzip1q_u16(<8 x i16> %a) {
2681 ; CHECK-LABEL: test_undef_vzip1q_u16:
2682 ; CHECK: // %bb.0: // %entry
2683 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h
2686 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2687 ret <8 x i16> %shuffle.i
2690 define <4 x i32> @test_undef_vzip1q_u32(<4 x i32> %a) {
2691 ; CHECK-LABEL: test_undef_vzip1q_u32:
2692 ; CHECK: // %bb.0: // %entry
2693 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s
2696 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2697 ret <4 x i32> %shuffle.i
2700 define <4 x float> @test_undef_vzip1q_f32(<4 x float> %a) {
2701 ; CHECK-LABEL: test_undef_vzip1q_f32:
2702 ; CHECK: // %bb.0: // %entry
2703 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v0.4s
2706 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2707 ret <4 x float> %shuffle.i
2710 define <8 x i8> @test_undef_vzip1_p8(<8 x i8> %a) {
2711 ; CHECK-LABEL: test_undef_vzip1_p8:
2712 ; CHECK: // %bb.0: // %entry
2713 ; CHECK-NEXT: zip1 v0.8b, v0.8b, v0.8b
2716 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2717 ret <8 x i8> %shuffle.i
2720 define <16 x i8> @test_undef_vzip1q_p8(<16 x i8> %a) {
2721 ; CHECK-LABEL: test_undef_vzip1q_p8:
2722 ; CHECK: // %bb.0: // %entry
2723 ; CHECK-NEXT: zip1 v0.16b, v0.16b, v0.16b
2726 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
2727 ret <16 x i8> %shuffle.i
2730 define <4 x i16> @test_undef_vzip1_p16(<4 x i16> %a) {
2731 ; CHECK-LABEL: test_undef_vzip1_p16:
2732 ; CHECK: // %bb.0: // %entry
2733 ; CHECK-NEXT: zip1 v0.4h, v0.4h, v0.4h
2736 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
2737 ret <4 x i16> %shuffle.i
2740 define <8 x i16> @test_undef_vzip1q_p16(<8 x i16> %a) {
2741 ; CHECK-LABEL: test_undef_vzip1q_p16:
2742 ; CHECK: // %bb.0: // %entry
2743 ; CHECK-NEXT: zip1 v0.8h, v0.8h, v0.8h
2746 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
2747 ret <8 x i16> %shuffle.i
2750 define <8 x i8> @test_undef_vzip2_s8(<8 x i8> %a) {
2751 ; CHECK-LABEL: test_undef_vzip2_s8:
2752 ; CHECK: // %bb.0: // %entry
2753 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b
2756 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2757 ret <8 x i8> %shuffle.i
2760 define <16 x i8> @test_undef_vzip2q_s8(<16 x i8> %a) {
2761 ; CHECK-LABEL: test_undef_vzip2q_s8:
2762 ; CHECK: // %bb.0: // %entry
2763 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b
2766 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2767 ret <16 x i8> %shuffle.i
2770 define <4 x i16> @test_undef_vzip2_s16(<4 x i16> %a) {
2771 ; CHECK-LABEL: test_undef_vzip2_s16:
2772 ; CHECK: // %bb.0: // %entry
2773 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h
2776 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2777 ret <4 x i16> %shuffle.i
2780 define <8 x i16> @test_undef_vzip2q_s16(<8 x i16> %a) {
2781 ; CHECK-LABEL: test_undef_vzip2q_s16:
2782 ; CHECK: // %bb.0: // %entry
2783 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h
2786 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2787 ret <8 x i16> %shuffle.i
2790 define <4 x i32> @test_undef_vzip2q_s32(<4 x i32> %a) {
2791 ; CHECK-LABEL: test_undef_vzip2q_s32:
2792 ; CHECK: // %bb.0: // %entry
2793 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s
2796 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2797 ret <4 x i32> %shuffle.i
2800 define <8 x i8> @test_undef_vzip2_u8(<8 x i8> %a) {
2801 ; CHECK-LABEL: test_undef_vzip2_u8:
2802 ; CHECK: // %bb.0: // %entry
2803 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b
2806 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2807 ret <8 x i8> %shuffle.i
2810 define <16 x i8> @test_undef_vzip2q_u8(<16 x i8> %a) {
2811 ; CHECK-LABEL: test_undef_vzip2q_u8:
2812 ; CHECK: // %bb.0: // %entry
2813 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b
2816 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2817 ret <16 x i8> %shuffle.i
2820 define <4 x i16> @test_undef_vzip2_u16(<4 x i16> %a) {
2821 ; CHECK-LABEL: test_undef_vzip2_u16:
2822 ; CHECK: // %bb.0: // %entry
2823 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h
2826 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2827 ret <4 x i16> %shuffle.i
2830 define <8 x i16> @test_undef_vzip2q_u16(<8 x i16> %a) {
2831 ; CHECK-LABEL: test_undef_vzip2q_u16:
2832 ; CHECK: // %bb.0: // %entry
2833 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h
2836 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2837 ret <8 x i16> %shuffle.i
2840 define <4 x i32> @test_undef_vzip2q_u32(<4 x i32> %a) {
2841 ; CHECK-LABEL: test_undef_vzip2q_u32:
2842 ; CHECK: // %bb.0: // %entry
2843 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s
2846 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2847 ret <4 x i32> %shuffle.i
2850 define <4 x float> @test_undef_vzip2q_f32(<4 x float> %a) {
2851 ; CHECK-LABEL: test_undef_vzip2q_f32:
2852 ; CHECK: // %bb.0: // %entry
2853 ; CHECK-NEXT: zip2 v0.4s, v0.4s, v0.4s
2856 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2857 ret <4 x float> %shuffle.i
2860 define <8 x i8> @test_undef_vzip2_p8(<8 x i8> %a) {
2861 ; CHECK-LABEL: test_undef_vzip2_p8:
2862 ; CHECK: // %bb.0: // %entry
2863 ; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b
2866 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2867 ret <8 x i8> %shuffle.i
2870 define <16 x i8> @test_undef_vzip2q_p8(<16 x i8> %a) {
2871 ; CHECK-LABEL: test_undef_vzip2q_p8:
2872 ; CHECK: // %bb.0: // %entry
2873 ; CHECK-NEXT: zip2 v0.16b, v0.16b, v0.16b
2876 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
2877 ret <16 x i8> %shuffle.i
2880 define <4 x i16> @test_undef_vzip2_p16(<4 x i16> %a) {
2881 ; CHECK-LABEL: test_undef_vzip2_p16:
2882 ; CHECK: // %bb.0: // %entry
2883 ; CHECK-NEXT: zip2 v0.4h, v0.4h, v0.4h
2886 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2887 ret <4 x i16> %shuffle.i
2890 define <8 x i16> @test_undef_vzip2q_p16(<8 x i16> %a) {
2891 ; CHECK-LABEL: test_undef_vzip2q_p16:
2892 ; CHECK: // %bb.0: // %entry
2893 ; CHECK-NEXT: zip2 v0.8h, v0.8h, v0.8h
2896 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
2897 ret <8 x i16> %shuffle.i
2900 define <8 x i8> @test_undef_vtrn1_s8(<8 x i8> %a) {
2901 ; CHECK-LABEL: test_undef_vtrn1_s8:
2902 ; CHECK: // %bb.0: // %entry
2905 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2906 ret <8 x i8> %shuffle.i
2909 define <16 x i8> @test_undef_vtrn1q_s8(<16 x i8> %a) {
2910 ; CHECK-LABEL: test_undef_vtrn1q_s8:
2911 ; CHECK: // %bb.0: // %entry
2914 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2915 ret <16 x i8> %shuffle.i
2918 define <4 x i16> @test_undef_vtrn1_s16(<4 x i16> %a) {
2919 ; CHECK-LABEL: test_undef_vtrn1_s16:
2920 ; CHECK: // %bb.0: // %entry
2923 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2924 ret <4 x i16> %shuffle.i
2927 define <8 x i16> @test_undef_vtrn1q_s16(<8 x i16> %a) {
2928 ; CHECK-LABEL: test_undef_vtrn1q_s16:
2929 ; CHECK: // %bb.0: // %entry
2932 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2933 ret <8 x i16> %shuffle.i
2936 define <4 x i32> @test_undef_vtrn1q_s32(<4 x i32> %a) {
2937 ; CHECK-LABEL: test_undef_vtrn1q_s32:
2938 ; CHECK: // %bb.0: // %entry
2941 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2942 ret <4 x i32> %shuffle.i
2945 define <8 x i8> @test_undef_vtrn1_u8(<8 x i8> %a) {
2946 ; CHECK-LABEL: test_undef_vtrn1_u8:
2947 ; CHECK: // %bb.0: // %entry
2950 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2951 ret <8 x i8> %shuffle.i
2954 define <16 x i8> @test_undef_vtrn1q_u8(<16 x i8> %a) {
2955 ; CHECK-LABEL: test_undef_vtrn1q_u8:
2956 ; CHECK: // %bb.0: // %entry
2959 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
2960 ret <16 x i8> %shuffle.i
2963 define <4 x i16> @test_undef_vtrn1_u16(<4 x i16> %a) {
2964 ; CHECK-LABEL: test_undef_vtrn1_u16:
2965 ; CHECK: // %bb.0: // %entry
2968 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2969 ret <4 x i16> %shuffle.i
2972 define <8 x i16> @test_undef_vtrn1q_u16(<8 x i16> %a) {
2973 ; CHECK-LABEL: test_undef_vtrn1q_u16:
2974 ; CHECK: // %bb.0: // %entry
2977 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
2978 ret <8 x i16> %shuffle.i
2981 define <4 x i32> @test_undef_vtrn1q_u32(<4 x i32> %a) {
2982 ; CHECK-LABEL: test_undef_vtrn1q_u32:
2983 ; CHECK: // %bb.0: // %entry
2986 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2987 ret <4 x i32> %shuffle.i
2990 define <4 x float> @test_undef_vtrn1q_f32(<4 x float> %a) {
2991 ; CHECK-LABEL: test_undef_vtrn1q_f32:
2992 ; CHECK: // %bb.0: // %entry
2995 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
2996 ret <4 x float> %shuffle.i
2999 define <8 x i8> @test_undef_vtrn1_p8(<8 x i8> %a) {
3000 ; CHECK-LABEL: test_undef_vtrn1_p8:
3001 ; CHECK: // %bb.0: // %entry
3004 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3005 ret <8 x i8> %shuffle.i
3008 define <16 x i8> @test_undef_vtrn1q_p8(<16 x i8> %a) {
3009 ; CHECK-LABEL: test_undef_vtrn1q_p8:
3010 ; CHECK: // %bb.0: // %entry
3013 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3014 ret <16 x i8> %shuffle.i
3017 define <4 x i16> @test_undef_vtrn1_p16(<4 x i16> %a) {
3018 ; CHECK-LABEL: test_undef_vtrn1_p16:
3019 ; CHECK: // %bb.0: // %entry
3022 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3023 ret <4 x i16> %shuffle.i
3026 define <8 x i16> @test_undef_vtrn1q_p16(<8 x i16> %a) {
3027 ; CHECK-LABEL: test_undef_vtrn1q_p16:
3028 ; CHECK: // %bb.0: // %entry
3031 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3032 ret <8 x i16> %shuffle.i
3035 define <8 x i8> @test_undef_vtrn2_s8(<8 x i8> %a) {
3036 ; CHECK-LABEL: test_undef_vtrn2_s8:
3037 ; CHECK: // %bb.0: // %entry
3038 ; CHECK-NEXT: rev16 v0.8b, v0.8b
3041 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3042 ret <8 x i8> %shuffle.i
3045 define <16 x i8> @test_undef_vtrn2q_s8(<16 x i8> %a) {
3046 ; CHECK-LABEL: test_undef_vtrn2q_s8:
3047 ; CHECK: // %bb.0: // %entry
3048 ; CHECK-NEXT: rev16 v0.16b, v0.16b
3051 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3052 ret <16 x i8> %shuffle.i
3055 define <4 x i16> @test_undef_vtrn2_s16(<4 x i16> %a) {
3056 ; CHECK-LABEL: test_undef_vtrn2_s16:
3057 ; CHECK: // %bb.0: // %entry
3058 ; CHECK-NEXT: rev32 v0.4h, v0.4h
3061 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3062 ret <4 x i16> %shuffle.i
3065 define <8 x i16> @test_undef_vtrn2q_s16(<8 x i16> %a) {
3066 ; CHECK-LABEL: test_undef_vtrn2q_s16:
3067 ; CHECK: // %bb.0: // %entry
3068 ; CHECK-NEXT: rev32 v0.8h, v0.8h
3071 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3072 ret <8 x i16> %shuffle.i
3075 define <4 x i32> @test_undef_vtrn2q_s32(<4 x i32> %a) {
3076 ; CHECK-LABEL: test_undef_vtrn2q_s32:
3077 ; CHECK: // %bb.0: // %entry
3078 ; CHECK-NEXT: rev64 v0.4s, v0.4s
3081 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3082 ret <4 x i32> %shuffle.i
3085 define <8 x i8> @test_undef_vtrn2_u8(<8 x i8> %a) {
3086 ; CHECK-LABEL: test_undef_vtrn2_u8:
3087 ; CHECK: // %bb.0: // %entry
3088 ; CHECK-NEXT: rev16 v0.8b, v0.8b
3091 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3092 ret <8 x i8> %shuffle.i
3095 define <16 x i8> @test_undef_vtrn2q_u8(<16 x i8> %a) {
3096 ; CHECK-LABEL: test_undef_vtrn2q_u8:
3097 ; CHECK: // %bb.0: // %entry
3098 ; CHECK-NEXT: rev16 v0.16b, v0.16b
3101 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3102 ret <16 x i8> %shuffle.i
3105 define <4 x i16> @test_undef_vtrn2_u16(<4 x i16> %a) {
3106 ; CHECK-LABEL: test_undef_vtrn2_u16:
3107 ; CHECK: // %bb.0: // %entry
3108 ; CHECK-NEXT: rev32 v0.4h, v0.4h
3111 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3112 ret <4 x i16> %shuffle.i
3115 define <8 x i16> @test_undef_vtrn2q_u16(<8 x i16> %a) {
3116 ; CHECK-LABEL: test_undef_vtrn2q_u16:
3117 ; CHECK: // %bb.0: // %entry
3118 ; CHECK-NEXT: rev32 v0.8h, v0.8h
3121 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3122 ret <8 x i16> %shuffle.i
3125 define <4 x i32> @test_undef_vtrn2q_u32(<4 x i32> %a) {
3126 ; CHECK-LABEL: test_undef_vtrn2q_u32:
3127 ; CHECK: // %bb.0: // %entry
3128 ; CHECK-NEXT: rev64 v0.4s, v0.4s
3131 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3132 ret <4 x i32> %shuffle.i
3135 define <4 x float> @test_undef_vtrn2q_f32(<4 x float> %a) {
3136 ; CHECK-LABEL: test_undef_vtrn2q_f32:
3137 ; CHECK: // %bb.0: // %entry
3138 ; CHECK-NEXT: rev64 v0.4s, v0.4s
3141 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3142 ret <4 x float> %shuffle.i
3145 define <8 x i8> @test_undef_vtrn2_p8(<8 x i8> %a) {
3146 ; CHECK-LABEL: test_undef_vtrn2_p8:
3147 ; CHECK: // %bb.0: // %entry
3148 ; CHECK-NEXT: rev16 v0.8b, v0.8b
3151 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3152 ret <8 x i8> %shuffle.i
3155 define <16 x i8> @test_undef_vtrn2q_p8(<16 x i8> %a) {
3156 ; CHECK-LABEL: test_undef_vtrn2q_p8:
3157 ; CHECK: // %bb.0: // %entry
3158 ; CHECK-NEXT: rev16 v0.16b, v0.16b
3161 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3162 ret <16 x i8> %shuffle.i
3165 define <4 x i16> @test_undef_vtrn2_p16(<4 x i16> %a) {
3166 ; CHECK-LABEL: test_undef_vtrn2_p16:
3167 ; CHECK: // %bb.0: // %entry
3168 ; CHECK-NEXT: rev32 v0.4h, v0.4h
3171 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3172 ret <4 x i16> %shuffle.i
3175 define <8 x i16> @test_undef_vtrn2q_p16(<8 x i16> %a) {
3176 ; CHECK-LABEL: test_undef_vtrn2q_p16:
3177 ; CHECK: // %bb.0: // %entry
3178 ; CHECK-NEXT: rev32 v0.8h, v0.8h
3181 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3182 ret <8 x i16> %shuffle.i
3185 define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) {
3186 ; CHECK-LABEL: test_vuzp_s8:
3187 ; CHECK: // %bb.0: // %entry
3188 ; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b
3189 ; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b
3190 ; CHECK-NEXT: fmov d0, d2
3193 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3194 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3195 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
3196 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
3197 ret %struct.int8x8x2_t %.fca.0.1.insert
3200 define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) {
3201 ; CHECK-LABEL: test_vuzp_s16:
3202 ; CHECK: // %bb.0: // %entry
3203 ; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h
3204 ; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h
3205 ; CHECK-NEXT: fmov d0, d2
3208 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
3209 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
3210 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
3211 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
3212 ret %struct.int16x4x2_t %.fca.0.1.insert
3215 define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) {
3216 ; CHECK-LABEL: test_vuzp_s32:
3217 ; CHECK: // %bb.0: // %entry
3218 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3219 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3220 ; CHECK-NEXT: fmov d0, d2
3223 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
3224 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
3225 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
3226 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
3227 ret %struct.int32x2x2_t %.fca.0.1.insert
3230 define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) {
3231 ; CHECK-LABEL: test_vuzp_u8:
3232 ; CHECK: // %bb.0: // %entry
3233 ; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b
3234 ; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b
3235 ; CHECK-NEXT: fmov d0, d2
3238 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3239 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3240 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
3241 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
3242 ret %struct.uint8x8x2_t %.fca.0.1.insert
3245 define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) {
3246 ; CHECK-LABEL: test_vuzp_u16:
3247 ; CHECK: // %bb.0: // %entry
3248 ; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h
3249 ; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h
3250 ; CHECK-NEXT: fmov d0, d2
3253 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
3254 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
3255 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
3256 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
3257 ret %struct.uint16x4x2_t %.fca.0.1.insert
3260 define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) {
3261 ; CHECK-LABEL: test_vuzp_u32:
3262 ; CHECK: // %bb.0: // %entry
3263 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3264 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3265 ; CHECK-NEXT: fmov d0, d2
3268 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
3269 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
3270 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
3271 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
3272 ret %struct.uint32x2x2_t %.fca.0.1.insert
3275 define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) {
3276 ; CHECK-LABEL: test_vuzp_f32:
3277 ; CHECK: // %bb.0: // %entry
3278 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3279 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3280 ; CHECK-NEXT: fmov d0, d2
3283 %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
3284 %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
3285 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vuzp.i, 0, 0
3286 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vuzp1.i, 0, 1
3287 ret %struct.float32x2x2_t %.fca.0.1.insert
3290 define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) {
3291 ; CHECK-LABEL: test_vuzp_p8:
3292 ; CHECK: // %bb.0: // %entry
3293 ; CHECK-NEXT: uzp1 v2.8b, v0.8b, v1.8b
3294 ; CHECK-NEXT: uzp2 v1.8b, v0.8b, v1.8b
3295 ; CHECK-NEXT: fmov d0, d2
3298 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3299 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3300 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
3301 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
3302 ret %struct.poly8x8x2_t %.fca.0.1.insert
3305 define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) {
3306 ; CHECK-LABEL: test_vuzp_p16:
3307 ; CHECK: // %bb.0: // %entry
3308 ; CHECK-NEXT: uzp1 v2.4h, v0.4h, v1.4h
3309 ; CHECK-NEXT: uzp2 v1.4h, v0.4h, v1.4h
3310 ; CHECK-NEXT: fmov d0, d2
3313 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
3314 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
3315 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
3316 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
3317 ret %struct.poly16x4x2_t %.fca.0.1.insert
3320 define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) {
3321 ; CHECK-LABEL: test_vuzpq_s8:
3322 ; CHECK: // %bb.0: // %entry
3323 ; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b
3324 ; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b
3325 ; CHECK-NEXT: mov v0.16b, v2.16b
3328 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
3329 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
3330 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
3331 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
3332 ret %struct.int8x16x2_t %.fca.0.1.insert
3335 define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) {
3336 ; CHECK-LABEL: test_vuzpq_s16:
3337 ; CHECK: // %bb.0: // %entry
3338 ; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h
3339 ; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h
3340 ; CHECK-NEXT: mov v0.16b, v2.16b
3343 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3344 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3345 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
3346 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
3347 ret %struct.int16x8x2_t %.fca.0.1.insert
3350 define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) {
3351 ; CHECK-LABEL: test_vuzpq_s32:
3352 ; CHECK: // %bb.0: // %entry
3353 ; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s
3354 ; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s
3355 ; CHECK-NEXT: mov v0.16b, v2.16b
3358 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
3359 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
3360 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
3361 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
3362 ret %struct.int32x4x2_t %.fca.0.1.insert
3365 define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) {
3366 ; CHECK-LABEL: test_vuzpq_u8:
3367 ; CHECK: // %bb.0: // %entry
3368 ; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b
3369 ; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b
3370 ; CHECK-NEXT: mov v0.16b, v2.16b
3373 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
3374 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
3375 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
3376 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
3377 ret %struct.uint8x16x2_t %.fca.0.1.insert
3380 define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) {
3381 ; CHECK-LABEL: test_vuzpq_u16:
3382 ; CHECK: // %bb.0: // %entry
3383 ; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h
3384 ; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h
3385 ; CHECK-NEXT: mov v0.16b, v2.16b
3388 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3389 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3390 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
3391 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
3392 ret %struct.uint16x8x2_t %.fca.0.1.insert
3395 define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) {
3396 ; CHECK-LABEL: test_vuzpq_u32:
3397 ; CHECK: // %bb.0: // %entry
3398 ; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s
3399 ; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s
3400 ; CHECK-NEXT: mov v0.16b, v2.16b
3403 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
3404 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
3405 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
3406 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
3407 ret %struct.uint32x4x2_t %.fca.0.1.insert
3410 define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) {
3411 ; CHECK-LABEL: test_vuzpq_f32:
3412 ; CHECK: // %bb.0: // %entry
3413 ; CHECK-NEXT: uzp1 v2.4s, v0.4s, v1.4s
3414 ; CHECK-NEXT: uzp2 v1.4s, v0.4s, v1.4s
3415 ; CHECK-NEXT: mov v0.16b, v2.16b
3418 %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
3419 %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
3420 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vuzp.i, 0, 0
3421 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vuzp1.i, 0, 1
3422 ret %struct.float32x4x2_t %.fca.0.1.insert
3425 define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) {
3426 ; CHECK-LABEL: test_vuzpq_p8:
3427 ; CHECK: // %bb.0: // %entry
3428 ; CHECK-NEXT: uzp1 v2.16b, v0.16b, v1.16b
3429 ; CHECK-NEXT: uzp2 v1.16b, v0.16b, v1.16b
3430 ; CHECK-NEXT: mov v0.16b, v2.16b
3433 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
3434 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
3435 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
3436 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
3437 ret %struct.poly8x16x2_t %.fca.0.1.insert
3440 define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) {
3441 ; CHECK-LABEL: test_vuzpq_p16:
3442 ; CHECK: // %bb.0: // %entry
3443 ; CHECK-NEXT: uzp1 v2.8h, v0.8h, v1.8h
3444 ; CHECK-NEXT: uzp2 v1.8h, v0.8h, v1.8h
3445 ; CHECK-NEXT: mov v0.16b, v2.16b
3448 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
3449 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
3450 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
3451 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
3452 ret %struct.poly16x8x2_t %.fca.0.1.insert
3455 define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) {
3456 ; CHECK-LABEL: test_vzip_s8:
3457 ; CHECK: // %bb.0: // %entry
3458 ; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b
3459 ; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b
3460 ; CHECK-NEXT: fmov d0, d2
3463 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
3464 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
3465 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
3466 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
3467 ret %struct.int8x8x2_t %.fca.0.1.insert
3470 define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) {
3471 ; CHECK-LABEL: test_vzip_s16:
3472 ; CHECK: // %bb.0: // %entry
3473 ; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h
3474 ; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h
3475 ; CHECK-NEXT: fmov d0, d2
3478 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
3479 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
3480 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
3481 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
3482 ret %struct.int16x4x2_t %.fca.0.1.insert
3485 define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) {
3486 ; CHECK-LABEL: test_vzip_s32:
3487 ; CHECK: // %bb.0: // %entry
3488 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3489 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3490 ; CHECK-NEXT: fmov d0, d2
3493 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
3494 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
3495 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
3496 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
3497 ret %struct.int32x2x2_t %.fca.0.1.insert
3500 define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) {
3501 ; CHECK-LABEL: test_vzip_u8:
3502 ; CHECK: // %bb.0: // %entry
3503 ; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b
3504 ; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b
3505 ; CHECK-NEXT: fmov d0, d2
3508 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
3509 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
3510 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
3511 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
3512 ret %struct.uint8x8x2_t %.fca.0.1.insert
3515 define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) {
3516 ; CHECK-LABEL: test_vzip_u16:
3517 ; CHECK: // %bb.0: // %entry
3518 ; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h
3519 ; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h
3520 ; CHECK-NEXT: fmov d0, d2
3523 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
3524 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
3525 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
3526 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
3527 ret %struct.uint16x4x2_t %.fca.0.1.insert
3530 define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) {
3531 ; CHECK-LABEL: test_vzip_u32:
3532 ; CHECK: // %bb.0: // %entry
3533 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3534 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3535 ; CHECK-NEXT: fmov d0, d2
3538 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
3539 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
3540 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
3541 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
3542 ret %struct.uint32x2x2_t %.fca.0.1.insert
3545 define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) {
3546 ; CHECK-LABEL: test_vzip_f32:
3547 ; CHECK: // %bb.0: // %entry
3548 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3549 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3550 ; CHECK-NEXT: fmov d0, d2
3553 %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
3554 %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
3555 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vzip.i, 0, 0
3556 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vzip1.i, 0, 1
3557 ret %struct.float32x2x2_t %.fca.0.1.insert
3560 define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) {
3561 ; CHECK-LABEL: test_vzip_p8:
3562 ; CHECK: // %bb.0: // %entry
3563 ; CHECK-NEXT: zip1 v2.8b, v0.8b, v1.8b
3564 ; CHECK-NEXT: zip2 v1.8b, v0.8b, v1.8b
3565 ; CHECK-NEXT: fmov d0, d2
3568 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
3569 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
3570 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
3571 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
3572 ret %struct.poly8x8x2_t %.fca.0.1.insert
3575 define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) {
3576 ; CHECK-LABEL: test_vzip_p16:
3577 ; CHECK: // %bb.0: // %entry
3578 ; CHECK-NEXT: zip1 v2.4h, v0.4h, v1.4h
3579 ; CHECK-NEXT: zip2 v1.4h, v0.4h, v1.4h
3580 ; CHECK-NEXT: fmov d0, d2
3583 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
3584 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
3585 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
3586 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
3587 ret %struct.poly16x4x2_t %.fca.0.1.insert
3590 define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) {
3591 ; CHECK-LABEL: test_vzipq_s8:
3592 ; CHECK: // %bb.0: // %entry
3593 ; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b
3594 ; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b
3595 ; CHECK-NEXT: mov v0.16b, v2.16b
3598 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
3599 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
3600 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
3601 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
3602 ret %struct.int8x16x2_t %.fca.0.1.insert
3605 define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) {
3606 ; CHECK-LABEL: test_vzipq_s16:
3607 ; CHECK: // %bb.0: // %entry
3608 ; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h
3609 ; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h
3610 ; CHECK-NEXT: mov v0.16b, v2.16b
3613 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
3614 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
3615 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
3616 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
3617 ret %struct.int16x8x2_t %.fca.0.1.insert
3620 define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) {
3621 ; CHECK-LABEL: test_vzipq_s32:
3622 ; CHECK: // %bb.0: // %entry
3623 ; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s
3624 ; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s
3625 ; CHECK-NEXT: mov v0.16b, v2.16b
3628 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
3629 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
3630 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
3631 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
3632 ret %struct.int32x4x2_t %.fca.0.1.insert
3635 define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) {
3636 ; CHECK-LABEL: test_vzipq_u8:
3637 ; CHECK: // %bb.0: // %entry
3638 ; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b
3639 ; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b
3640 ; CHECK-NEXT: mov v0.16b, v2.16b
3643 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
3644 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
3645 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
3646 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
3647 ret %struct.uint8x16x2_t %.fca.0.1.insert
3650 define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) {
3651 ; CHECK-LABEL: test_vzipq_u16:
3652 ; CHECK: // %bb.0: // %entry
3653 ; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h
3654 ; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h
3655 ; CHECK-NEXT: mov v0.16b, v2.16b
3658 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
3659 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
3660 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
3661 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
3662 ret %struct.uint16x8x2_t %.fca.0.1.insert
3665 define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) {
3666 ; CHECK-LABEL: test_vzipq_u32:
3667 ; CHECK: // %bb.0: // %entry
3668 ; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s
3669 ; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s
3670 ; CHECK-NEXT: mov v0.16b, v2.16b
3673 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
3674 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
3675 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
3676 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
3677 ret %struct.uint32x4x2_t %.fca.0.1.insert
3680 define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) {
3681 ; CHECK-LABEL: test_vzipq_f32:
3682 ; CHECK: // %bb.0: // %entry
3683 ; CHECK-NEXT: zip1 v2.4s, v0.4s, v1.4s
3684 ; CHECK-NEXT: zip2 v1.4s, v0.4s, v1.4s
3685 ; CHECK-NEXT: mov v0.16b, v2.16b
3688 %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
3689 %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
3690 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vzip.i, 0, 0
3691 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vzip1.i, 0, 1
3692 ret %struct.float32x4x2_t %.fca.0.1.insert
3695 define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) {
3696 ; CHECK-LABEL: test_vzipq_p8:
3697 ; CHECK: // %bb.0: // %entry
3698 ; CHECK-NEXT: zip1 v2.16b, v0.16b, v1.16b
3699 ; CHECK-NEXT: zip2 v1.16b, v0.16b, v1.16b
3700 ; CHECK-NEXT: mov v0.16b, v2.16b
3703 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
3704 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
3705 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
3706 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
3707 ret %struct.poly8x16x2_t %.fca.0.1.insert
3710 define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) {
3711 ; CHECK-LABEL: test_vzipq_p16:
3712 ; CHECK: // %bb.0: // %entry
3713 ; CHECK-NEXT: zip1 v2.8h, v0.8h, v1.8h
3714 ; CHECK-NEXT: zip2 v1.8h, v0.8h, v1.8h
3715 ; CHECK-NEXT: mov v0.16b, v2.16b
3718 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
3719 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
3720 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
3721 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
3722 ret %struct.poly16x8x2_t %.fca.0.1.insert
3725 define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) {
3726 ; CHECK-LABEL: test_vtrn_s8:
3727 ; CHECK: // %bb.0: // %entry
3728 ; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b
3729 ; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b
3730 ; CHECK-NEXT: fmov d0, d2
3733 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3734 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3735 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
3736 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
3737 ret %struct.int8x8x2_t %.fca.0.1.insert
3740 define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) {
3741 ; CHECK-LABEL: test_vtrn_s16:
3742 ; CHECK: // %bb.0: // %entry
3743 ; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h
3744 ; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h
3745 ; CHECK-NEXT: fmov d0, d2
3748 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3749 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3750 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
3751 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
3752 ret %struct.int16x4x2_t %.fca.0.1.insert
3755 define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) {
3756 ; CHECK-LABEL: test_vtrn_s32:
3757 ; CHECK: // %bb.0: // %entry
3758 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3759 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3760 ; CHECK-NEXT: fmov d0, d2
3763 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
3764 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
3765 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
3766 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
3767 ret %struct.int32x2x2_t %.fca.0.1.insert
3770 define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) {
3771 ; CHECK-LABEL: test_vtrn_u8:
3772 ; CHECK: // %bb.0: // %entry
3773 ; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b
3774 ; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b
3775 ; CHECK-NEXT: fmov d0, d2
3778 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3779 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3780 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
3781 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
3782 ret %struct.uint8x8x2_t %.fca.0.1.insert
3785 define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) {
3786 ; CHECK-LABEL: test_vtrn_u16:
3787 ; CHECK: // %bb.0: // %entry
3788 ; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h
3789 ; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h
3790 ; CHECK-NEXT: fmov d0, d2
3793 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3794 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3795 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
3796 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
3797 ret %struct.uint16x4x2_t %.fca.0.1.insert
3800 define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) {
3801 ; CHECK-LABEL: test_vtrn_u32:
3802 ; CHECK: // %bb.0: // %entry
3803 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3804 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3805 ; CHECK-NEXT: fmov d0, d2
3808 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
3809 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
3810 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
3811 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
3812 ret %struct.uint32x2x2_t %.fca.0.1.insert
3815 define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) {
3816 ; CHECK-LABEL: test_vtrn_f32:
3817 ; CHECK: // %bb.0: // %entry
3818 ; CHECK-NEXT: zip1 v2.2s, v0.2s, v1.2s
3819 ; CHECK-NEXT: zip2 v1.2s, v0.2s, v1.2s
3820 ; CHECK-NEXT: fmov d0, d2
3823 %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
3824 %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
3825 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vtrn.i, 0, 0
3826 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vtrn1.i, 0, 1
3827 ret %struct.float32x2x2_t %.fca.0.1.insert
3830 define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) {
3831 ; CHECK-LABEL: test_vtrn_p8:
3832 ; CHECK: // %bb.0: // %entry
3833 ; CHECK-NEXT: trn1 v2.8b, v0.8b, v1.8b
3834 ; CHECK-NEXT: trn2 v1.8b, v0.8b, v1.8b
3835 ; CHECK-NEXT: fmov d0, d2
3838 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3839 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3840 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
3841 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
3842 ret %struct.poly8x8x2_t %.fca.0.1.insert
3845 define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) {
3846 ; CHECK-LABEL: test_vtrn_p16:
3847 ; CHECK: // %bb.0: // %entry
3848 ; CHECK-NEXT: trn1 v2.4h, v0.4h, v1.4h
3849 ; CHECK-NEXT: trn2 v1.4h, v0.4h, v1.4h
3850 ; CHECK-NEXT: fmov d0, d2
3853 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3854 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3855 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
3856 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
3857 ret %struct.poly16x4x2_t %.fca.0.1.insert
3860 define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) {
3861 ; CHECK-LABEL: test_vtrnq_s8:
3862 ; CHECK: // %bb.0: // %entry
3863 ; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b
3864 ; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b
3865 ; CHECK-NEXT: mov v0.16b, v2.16b
3868 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3869 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3870 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3871 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3872 ret %struct.int8x16x2_t %.fca.0.1.insert
3875 define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) {
3876 ; CHECK-LABEL: test_vtrnq_s16:
3877 ; CHECK: // %bb.0: // %entry
3878 ; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h
3879 ; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h
3880 ; CHECK-NEXT: mov v0.16b, v2.16b
3883 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3884 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3885 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3886 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3887 ret %struct.int16x8x2_t %.fca.0.1.insert
3890 define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) {
3891 ; CHECK-LABEL: test_vtrnq_s32:
3892 ; CHECK: // %bb.0: // %entry
3893 ; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s
3894 ; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s
3895 ; CHECK-NEXT: mov v0.16b, v2.16b
3898 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3899 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3900 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
3901 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
3902 ret %struct.int32x4x2_t %.fca.0.1.insert
3905 define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) {
3906 ; CHECK-LABEL: test_vtrnq_u8:
3907 ; CHECK: // %bb.0: // %entry
3908 ; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b
3909 ; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b
3910 ; CHECK-NEXT: mov v0.16b, v2.16b
3913 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3914 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3915 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3916 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3917 ret %struct.uint8x16x2_t %.fca.0.1.insert
3920 define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) {
3921 ; CHECK-LABEL: test_vtrnq_u16:
3922 ; CHECK: // %bb.0: // %entry
3923 ; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h
3924 ; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h
3925 ; CHECK-NEXT: mov v0.16b, v2.16b
3928 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3929 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3930 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3931 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3932 ret %struct.uint16x8x2_t %.fca.0.1.insert
3935 define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) {
3936 ; CHECK-LABEL: test_vtrnq_u32:
3937 ; CHECK: // %bb.0: // %entry
3938 ; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s
3939 ; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s
3940 ; CHECK-NEXT: mov v0.16b, v2.16b
3943 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3944 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3945 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
3946 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
3947 ret %struct.uint32x4x2_t %.fca.0.1.insert
3950 define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) {
3951 ; CHECK-LABEL: test_vtrnq_f32:
3952 ; CHECK: // %bb.0: // %entry
3953 ; CHECK-NEXT: trn1 v2.4s, v0.4s, v1.4s
3954 ; CHECK-NEXT: trn2 v1.4s, v0.4s, v1.4s
3955 ; CHECK-NEXT: mov v0.16b, v2.16b
3958 %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
3959 %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
3960 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vtrn.i, 0, 0
3961 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vtrn1.i, 0, 1
3962 ret %struct.float32x4x2_t %.fca.0.1.insert
3965 define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) {
3966 ; CHECK-LABEL: test_vtrnq_p8:
3967 ; CHECK: // %bb.0: // %entry
3968 ; CHECK-NEXT: trn1 v2.16b, v0.16b, v1.16b
3969 ; CHECK-NEXT: trn2 v1.16b, v0.16b, v1.16b
3970 ; CHECK-NEXT: mov v0.16b, v2.16b
3973 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
3974 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
3975 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
3976 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
3977 ret %struct.poly8x16x2_t %.fca.0.1.insert
3980 define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) {
3981 ; CHECK-LABEL: test_vtrnq_p16:
3982 ; CHECK: // %bb.0: // %entry
3983 ; CHECK-NEXT: trn1 v2.8h, v0.8h, v1.8h
3984 ; CHECK-NEXT: trn2 v1.8h, v0.8h, v1.8h
3985 ; CHECK-NEXT: mov v0.16b, v2.16b
3988 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
3989 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
3990 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
3991 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
3992 ret %struct.poly16x8x2_t %.fca.0.1.insert
3995 define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) {
3996 ; CHECK-SD-LABEL: test_uzp:
3997 ; CHECK-SD: // %bb.0:
3998 ; CHECK-SD-NEXT: xtn v2.8b, v0.8h
3999 ; CHECK-SD-NEXT: uzp2 v1.16b, v0.16b, v0.16b
4000 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
4001 ; CHECK-SD-NEXT: fmov d0, d2
4002 ; CHECK-SD-NEXT: ret
4004 ; CHECK-GI-LABEL: test_uzp:
4005 ; CHECK-GI: // %bb.0:
4006 ; CHECK-GI-NEXT: uzp1 v2.16b, v0.16b, v0.16b
4007 ; CHECK-GI-NEXT: uzp2 v1.16b, v0.16b, v0.16b
4008 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 killed $q1
4009 ; CHECK-GI-NEXT: fmov d0, d2
4010 ; CHECK-GI-NEXT: ret
4013 %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
4014 %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
4015 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
4016 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
4017 ret %struct.uint8x8x2_t %.fca.0.1.insert