| blob | 325ab444205bf92b6a541e3a010f5966033bb8e4 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=aarch64--linux-gnu | FileCheck %s
4 define i32 @v1(ptr nocapture noundef readonly %p1, i32 noundef %i1, ptr nocapture noundef readonly %p2, i32 noundef %i2) {
5 ; CHECK-LABEL: v1:
6 ; CHECK: // %bb.0: // %entry
7 ; CHECK-NEXT: // kill: def $w3 killed $w3 def $x3
8 ; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
9 ; CHECK-NEXT: sxtw x8, w1
10 ; CHECK-NEXT: sxtw x9, w3
11 ; CHECK-NEXT: ldr d0, [x0]
12 ; CHECK-NEXT: ldr d1, [x2]
13 ; CHECK-NEXT: add x10, x0, x8
14 ; CHECK-NEXT: add x11, x2, x9
15 ; CHECK-NEXT: ldr d2, [x10]
16 ; CHECK-NEXT: add x10, x10, x8
17 ; CHECK-NEXT: ldr d3, [x11]
18 ; CHECK-NEXT: add x11, x11, x9
19 ; CHECK-NEXT: ldr d4, [x10]
20 ; CHECK-NEXT: ldr d6, [x10, x8]
21 ; CHECK-NEXT: ldr d5, [x11]
22 ; CHECK-NEXT: ldr d7, [x11, x9]
23 ; CHECK-NEXT: usubl v0.8h, v0.8b, v1.8b
24 ; CHECK-NEXT: usubl v1.8h, v2.8b, v3.8b
25 ; CHECK-NEXT: usubl v2.8h, v4.8b, v5.8b
26 ; CHECK-NEXT: usubl v3.8h, v6.8b, v7.8b
27 ; CHECK-NEXT: shll2 v4.4s, v0.8h, #16
28 ; CHECK-NEXT: shll2 v5.4s, v1.8h, #16
29 ; CHECK-NEXT: shll2 v6.4s, v3.8h, #16
30 ; CHECK-NEXT: shll2 v7.4s, v2.8h, #16
31 ; CHECK-NEXT: saddw v0.4s, v4.4s, v0.4h
32 ; CHECK-NEXT: saddw v1.4s, v5.4s, v1.4h
33 ; CHECK-NEXT: saddw v3.4s, v6.4s, v3.4h
34 ; CHECK-NEXT: saddw v2.4s, v7.4s, v2.4h
35 ; CHECK-NEXT: zip1 v4.4s, v1.4s, v0.4s
36 ; CHECK-NEXT: zip2 v6.4s, v1.4s, v0.4s
37 ; CHECK-NEXT: uzp2 v5.4s, v3.4s, v2.4s
38 ; CHECK-NEXT: mov v7.16b, v2.16b
39 ; CHECK-NEXT: ext v17.16b, v3.16b, v3.16b, #12
40 ; CHECK-NEXT: zip2 v18.4s, v3.4s, v2.4s
41 ; CHECK-NEXT: ext v16.16b, v1.16b, v4.16b, #8
42 ; CHECK-NEXT: mov v1.s[3], v0.s[2]
43 ; CHECK-NEXT: mov v7.s[1], v3.s[0]
44 ; CHECK-NEXT: uzp2 v0.4s, v5.4s, v3.4s
45 ; CHECK-NEXT: zip2 v5.4s, v2.4s, v3.4s
46 ; CHECK-NEXT: mov v3.s[0], v2.s[1]
47 ; CHECK-NEXT: ext v2.16b, v2.16b, v17.16b, #12
48 ; CHECK-NEXT: mov v18.d[1], v1.d[1]
49 ; CHECK-NEXT: mov v7.d[1], v16.d[1]
50 ; CHECK-NEXT: mov v0.d[1], v6.d[1]
51 ; CHECK-NEXT: mov v3.d[1], v4.d[1]
52 ; CHECK-NEXT: mov v5.d[1], v1.d[1]
53 ; CHECK-NEXT: mov v2.d[1], v6.d[1]
54 ; CHECK-NEXT: add v0.4s, v0.4s, v18.4s
55 ; CHECK-NEXT: add v1.4s, v3.4s, v7.4s
56 ; CHECK-NEXT: sub v3.4s, v7.4s, v3.4s
57 ; CHECK-NEXT: sub v2.4s, v5.4s, v2.4s
58 ; CHECK-NEXT: rev64 v4.4s, v0.4s
59 ; CHECK-NEXT: rev64 v6.4s, v1.4s
60 ; CHECK-NEXT: sub v5.4s, v3.4s, v2.4s
61 ; CHECK-NEXT: add v2.4s, v2.4s, v3.4s
62 ; CHECK-NEXT: mov v4.d[1], v0.d[1]
63 ; CHECK-NEXT: mov v6.d[1], v1.d[1]
64 ; CHECK-NEXT: rev64 v3.4s, v5.4s
65 ; CHECK-NEXT: rev64 v7.4s, v2.4s
66 ; CHECK-NEXT: sub v1.4s, v1.4s, v4.4s
67 ; CHECK-NEXT: add v0.4s, v0.4s, v6.4s
68 ; CHECK-NEXT: sub v3.4s, v5.4s, v3.4s
69 ; CHECK-NEXT: addp v4.4s, v1.4s, v5.4s
70 ; CHECK-NEXT: sub v5.4s, v2.4s, v7.4s
71 ; CHECK-NEXT: addp v2.4s, v0.4s, v2.4s
72 ; CHECK-NEXT: rev64 v6.4s, v0.4s
73 ; CHECK-NEXT: rev64 v7.4s, v1.4s
74 ; CHECK-NEXT: ext v16.16b, v4.16b, v3.16b, #4
75 ; CHECK-NEXT: ext v17.16b, v2.16b, v5.16b, #4
76 ; CHECK-NEXT: sub v0.4s, v0.4s, v6.4s
77 ; CHECK-NEXT: sub v1.4s, v1.4s, v7.4s
78 ; CHECK-NEXT: mov v7.16b, v3.16b
79 ; CHECK-NEXT: zip2 v6.4s, v16.4s, v4.4s
80 ; CHECK-NEXT: mov v16.16b, v5.16b
81 ; CHECK-NEXT: zip2 v17.4s, v17.4s, v2.4s
82 ; CHECK-NEXT: ext v18.16b, v0.16b, v2.16b, #4
83 ; CHECK-NEXT: mov v7.s[2], v4.s[3]
84 ; CHECK-NEXT: mov v21.16b, v1.16b
85 ; CHECK-NEXT: mov v16.s[2], v2.s[3]
86 ; CHECK-NEXT: ext v5.16b, v5.16b, v17.16b, #12
87 ; CHECK-NEXT: zip1 v17.4s, v2.4s, v2.4s
88 ; CHECK-NEXT: ext v3.16b, v3.16b, v6.16b, #12
89 ; CHECK-NEXT: ext v18.16b, v18.16b, v18.16b, #4
90 ; CHECK-NEXT: mov v19.16b, v7.16b
91 ; CHECK-NEXT: ext v6.16b, v1.16b, v4.16b, #8
92 ; CHECK-NEXT: mov v21.s[2], v4.s[1]
93 ; CHECK-NEXT: mov v20.16b, v16.16b
94 ; CHECK-NEXT: mov v19.s[1], v4.s[2]
95 ; CHECK-NEXT: trn2 v0.4s, v17.4s, v0.4s
96 ; CHECK-NEXT: sub v16.4s, v16.4s, v5.4s
97 ; CHECK-NEXT: mov v17.16b, v18.16b
98 ; CHECK-NEXT: ext v1.16b, v6.16b, v1.16b, #4
99 ; CHECK-NEXT: sub v7.4s, v7.4s, v3.4s
100 ; CHECK-NEXT: mov v20.s[1], v2.s[2]
101 ; CHECK-NEXT: mov v17.s[0], v2.s[1]
102 ; CHECK-NEXT: mov v2.16b, v21.16b
103 ; CHECK-NEXT: add v3.4s, v19.4s, v3.4s
104 ; CHECK-NEXT: uzp2 v1.4s, v6.4s, v1.4s
105 ; CHECK-NEXT: add v5.4s, v20.4s, v5.4s
106 ; CHECK-NEXT: mov v2.s[1], v4.s[0]
107 ; CHECK-NEXT: sub v4.4s, v0.4s, v18.4s
108 ; CHECK-NEXT: mov v3.d[1], v7.d[1]
109 ; CHECK-NEXT: add v0.4s, v0.4s, v17.4s
110 ; CHECK-NEXT: mov v5.d[1], v16.d[1]
111 ; CHECK-NEXT: sub v6.4s, v21.4s, v1.4s
112 ; CHECK-NEXT: add v1.4s, v2.4s, v1.4s
113 ; CHECK-NEXT: mov v0.d[1], v4.d[1]
114 ; CHECK-NEXT: cmlt v4.8h, v3.8h, #0
115 ; CHECK-NEXT: cmlt v2.8h, v5.8h, #0
116 ; CHECK-NEXT: mov v1.d[1], v6.d[1]
117 ; CHECK-NEXT: add v3.4s, v4.4s, v3.4s
118 ; CHECK-NEXT: cmlt v6.8h, v0.8h, #0
119 ; CHECK-NEXT: add v5.4s, v2.4s, v5.4s
120 ; CHECK-NEXT: eor v3.16b, v3.16b, v4.16b
121 ; CHECK-NEXT: cmlt v7.8h, v1.8h, #0
122 ; CHECK-NEXT: add v0.4s, v6.4s, v0.4s
123 ; CHECK-NEXT: eor v2.16b, v5.16b, v2.16b
124 ; CHECK-NEXT: add v1.4s, v7.4s, v1.4s
125 ; CHECK-NEXT: eor v0.16b, v0.16b, v6.16b
126 ; CHECK-NEXT: add v2.4s, v2.4s, v3.4s
127 ; CHECK-NEXT: eor v1.16b, v1.16b, v7.16b
128 ; CHECK-NEXT: add v0.4s, v0.4s, v2.4s
129 ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
130 ; CHECK-NEXT: addv s0, v0.4s
131 ; CHECK-NEXT: fmov w8, s0
132 ; CHECK-NEXT: lsr w9, w8, #16
133 ; CHECK-NEXT: add w8, w9, w8, uxth
134 ; CHECK-NEXT: lsr w0, w8, #1
135 ; CHECK-NEXT: ret
136 entry:
137 %idx.ext = sext i32 %i1 to i64
138 %idx.ext63 = sext i32 %i2 to i64
139 %arrayidx3 = getelementptr inbounds i8, ptr %p1, i64 4
140 %arrayidx5 = getelementptr inbounds i8, ptr %p2, i64 4
141 %0 = load <4 x i8>, ptr %p1, align 1
142 %1 = load <4 x i8>, ptr %p2, align 1
143 %add.ptr = getelementptr inbounds i8, ptr %p1, i64 %idx.ext
144 %add.ptr64 = getelementptr inbounds i8, ptr %p2, i64 %idx.ext63
145 %arrayidx3.1 = getelementptr inbounds i8, ptr %add.ptr, i64 4
146 %arrayidx5.1 = getelementptr inbounds i8, ptr %add.ptr64, i64 4
147 %2 = load <4 x i8>, ptr %add.ptr, align 1
148 %3 = load <4 x i8>, ptr %add.ptr64, align 1
149 %add.ptr.1 = getelementptr inbounds i8, ptr %add.ptr, i64 %idx.ext
150 %add.ptr64.1 = getelementptr inbounds i8, ptr %add.ptr64, i64 %idx.ext63
151 %arrayidx3.2 = getelementptr inbounds i8, ptr %add.ptr.1, i64 4
152 %arrayidx5.2 = getelementptr inbounds i8, ptr %add.ptr64.1, i64 4
153 %4 = load <4 x i8>, ptr %add.ptr.1, align 1
154 %5 = load <4 x i8>, ptr %add.ptr64.1, align 1
155 %add.ptr.2 = getelementptr inbounds i8, ptr %add.ptr.1, i64 %idx.ext
156 %add.ptr64.2 = getelementptr inbounds i8, ptr %add.ptr64.1, i64 %idx.ext63
157 %arrayidx3.3 = getelementptr inbounds i8, ptr %add.ptr.2, i64 4
158 %arrayidx5.3 = getelementptr inbounds i8, ptr %add.ptr64.2, i64 4
159 %6 = load <4 x i8>, ptr %add.ptr.2, align 1
160 %7 = load <4 x i8>, ptr %add.ptr64.2, align 1
161 %8 = load <4 x i8>, ptr %arrayidx3, align 1
162 %9 = load <4 x i8>, ptr %arrayidx3.1, align 1
163 %10 = load <4 x i8>, ptr %arrayidx3.2, align 1
164 %11 = load <4 x i8>, ptr %arrayidx3.3, align 1
165 %12 = shufflevector <4 x i8> %11, <4 x i8> %10, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
166 %13 = shufflevector <4 x i8> %9, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
167 %14 = shufflevector <16 x i8> %12, <16 x i8> %13, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
168 %15 = shufflevector <4 x i8> %8, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
169 %16 = shufflevector <16 x i8> %14, <16 x i8> %15, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
170 %17 = zext <16 x i8> %16 to <16 x i32>
171 %18 = load <4 x i8>, ptr %arrayidx5, align 1
172 %19 = load <4 x i8>, ptr %arrayidx5.1, align 1
173 %20 = load <4 x i8>, ptr %arrayidx5.2, align 1
174 %21 = load <4 x i8>, ptr %arrayidx5.3, align 1
175 %22 = shufflevector <4 x i8> %21, <4 x i8> %20, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
176 %23 = shufflevector <4 x i8> %19, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
177 %24 = shufflevector <16 x i8> %22, <16 x i8> %23, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
178 %25 = shufflevector <4 x i8> %18, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
179 %26 = shufflevector <16 x i8> %24, <16 x i8> %25, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
180 %27 = zext <16 x i8> %26 to <16 x i32>
181 %28 = shufflevector <4 x i8> %6, <4 x i8> %4, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
182 %29 = shufflevector <4 x i8> %2, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
183 %30 = shufflevector <16 x i8> %28, <16 x i8> %29, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
184 %31 = shufflevector <4 x i8> %0, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
185 %32 = shufflevector <16 x i8> %30, <16 x i8> %31, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
186 %33 = zext <16 x i8> %32 to <16 x i32>
187 %34 = shufflevector <4 x i8> %7, <4 x i8> %5, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
188 %35 = shufflevector <4 x i8> %3, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
189 %36 = shufflevector <16 x i8> %34, <16 x i8> %35, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
190 %37 = shufflevector <4 x i8> %1, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
191 %38 = shufflevector <16 x i8> %36, <16 x i8> %37, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
192 %39 = zext <16 x i8> %38 to <16 x i32>
193 %40 = sub nsw <16 x i32> %33, %39
194 %41 = sub nsw <16 x i32> %17, %27
195 %42 = shl nsw <16 x i32> %41, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
196 %43 = add nsw <16 x i32> %42, %40
197 %44 = shufflevector <16 x i32> %43, <16 x i32> poison, <16 x i32> <i32 3, i32 7, i32 11, i32 15, i32 6, i32 2, i32 10, i32 14, i32 5, i32 1, i32 9, i32 13, i32 4, i32 0, i32 8, i32 12>
198 %45 = shufflevector <16 x i32> %43, <16 x i32> undef, <16 x i32> <i32 2, i32 6, i32 10, i32 14, i32 7, i32 3, i32 11, i32 15, i32 4, i32 0, i32 8, i32 12, i32 5, i32 1, i32 9, i32 13>
199 %46 = add nsw <16 x i32> %44, %45
200 %47 = sub nsw <16 x i32> %44, %45
201 %48 = shufflevector <16 x i32> %46, <16 x i32> %47, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
202 %49 = shufflevector <16 x i32> %46, <16 x i32> %47, <16 x i32> <i32 9, i32 8, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31, i32 1, i32 0, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23>
203 %50 = add nsw <16 x i32> %48, %49
204 %51 = sub nsw <16 x i32> %48, %49
205 %52 = shufflevector <16 x i32> %50, <16 x i32> %51, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
206 %53 = shufflevector <16 x i32> %50, <16 x i32> %51, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 25, i32 24, i32 27, i32 26, i32 29, i32 28, i32 31, i32 30>
207 %54 = add nsw <16 x i32> %52, %53
208 %55 = sub nsw <16 x i32> %52, %53
209 %56 = shufflevector <16 x i32> %54, <16 x i32> %55, <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 20, i32 5, i32 6, i32 23, i32 24, i32 9, i32 10, i32 27, i32 28, i32 13, i32 14, i32 31>
210 %57 = shufflevector <16 x i32> %54, <16 x i32> %55, <16 x i32> <i32 2, i32 19, i32 0, i32 17, i32 23, i32 6, i32 5, i32 20, i32 27, i32 10, i32 9, i32 24, i32 31, i32 14, i32 13, i32 28>
211 %58 = add nsw <16 x i32> %56, %57
212 %59 = sub nsw <16 x i32> %56, %57
213 %60 = shufflevector <16 x i32> %58, <16 x i32> %59, <16 x i32> <i32 0, i32 1, i32 18, i32 19, i32 4, i32 5, i32 22, i32 23, i32 8, i32 9, i32 26, i32 27, i32 12, i32 13, i32 30, i32 31>
214 %61 = lshr <16 x i32> %60, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
215 %62 = and <16 x i32> %61, <i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537>
216 %63 = mul nuw <16 x i32> %62, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>
217 %64 = add <16 x i32> %63, %60
218 %65 = xor <16 x i32> %64, %63
219 %66 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %65)
220 %conv118 = and i32 %66, 65535
221 %shr = lshr i32 %66, 16
222 %add119 = add nuw nsw i32 %conv118, %shr
223 %shr120 = lshr i32 %add119, 1
224 ret i32 %shr120
225 }
227 define i32 @v2(ptr nocapture noundef readonly %p1, i32 noundef %i1, ptr nocapture noundef readonly %p2, i32 noundef %i2) {
228 ; CHECK-LABEL: v2:
229 ; CHECK: // %bb.0: // %entry
230 ; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
231 ; CHECK-NEXT: sxtw x8, w1
232 ; CHECK-NEXT: // kill: def $w3 killed $w3 def $x3
233 ; CHECK-NEXT: sxtw x9, w3
234 ; CHECK-NEXT: ldr d4, [x0]
235 ; CHECK-NEXT: ldr d5, [x2]
236 ; CHECK-NEXT: add x10, x0, x8
237 ; CHECK-NEXT: add x11, x2, x9
238 ; CHECK-NEXT: add x12, x10, x8
239 ; CHECK-NEXT: ldr d6, [x10]
240 ; CHECK-NEXT: ldr d7, [x11]
241 ; CHECK-NEXT: ldr d0, [x12, x8]
242 ; CHECK-NEXT: add x8, x11, x9
243 ; CHECK-NEXT: ldr d1, [x12]
244 ; CHECK-NEXT: ldr d2, [x8, x9]
245 ; CHECK-NEXT: ldr d3, [x8]
246 ; CHECK-NEXT: usubl v1.8h, v1.8b, v3.8b
247 ; CHECK-NEXT: usubl v0.8h, v0.8b, v2.8b
248 ; CHECK-NEXT: usubl v3.8h, v6.8b, v7.8b
249 ; CHECK-NEXT: usubl v2.8h, v4.8b, v5.8b
250 ; CHECK-NEXT: shll2 v4.4s, v0.8h, #16
251 ; CHECK-NEXT: shll2 v5.4s, v1.8h, #16
252 ; CHECK-NEXT: shll2 v7.4s, v3.8h, #16
253 ; CHECK-NEXT: shll2 v6.4s, v2.8h, #16
254 ; CHECK-NEXT: saddw v0.4s, v4.4s, v0.4h
255 ; CHECK-NEXT: saddw v1.4s, v5.4s, v1.4h
256 ; CHECK-NEXT: saddw v3.4s, v7.4s, v3.4h
257 ; CHECK-NEXT: saddw v2.4s, v6.4s, v2.4h
258 ; CHECK-NEXT: uzp2 v4.4s, v0.4s, v1.4s
259 ; CHECK-NEXT: mov v7.16b, v3.16b
260 ; CHECK-NEXT: mov v17.16b, v1.16b
261 ; CHECK-NEXT: zip1 v5.4s, v3.4s, v2.4s
262 ; CHECK-NEXT: zip2 v6.4s, v3.4s, v2.4s
263 ; CHECK-NEXT: zip2 v16.4s, v0.4s, v1.4s
264 ; CHECK-NEXT: ext v18.16b, v0.16b, v0.16b, #12
265 ; CHECK-NEXT: mov v7.s[3], v2.s[2]
266 ; CHECK-NEXT: mov v17.s[1], v0.s[0]
267 ; CHECK-NEXT: uzp2 v2.4s, v4.4s, v0.4s
268 ; CHECK-NEXT: mov v4.16b, v0.16b
269 ; CHECK-NEXT: zip2 v0.4s, v1.4s, v0.4s
270 ; CHECK-NEXT: ext v3.16b, v3.16b, v5.16b, #8
271 ; CHECK-NEXT: mov v4.s[0], v1.s[1]
272 ; CHECK-NEXT: mov v16.d[1], v7.d[1]
273 ; CHECK-NEXT: ext v1.16b, v1.16b, v18.16b, #12
274 ; CHECK-NEXT: mov v2.d[1], v6.d[1]
275 ; CHECK-NEXT: mov v0.d[1], v7.d[1]
276 ; CHECK-NEXT: mov v17.d[1], v3.d[1]
277 ; CHECK-NEXT: mov v4.d[1], v5.d[1]
278 ; CHECK-NEXT: mov v1.d[1], v6.d[1]
279 ; CHECK-NEXT: add v2.4s, v2.4s, v16.4s
280 ; CHECK-NEXT: add v3.4s, v4.4s, v17.4s
281 ; CHECK-NEXT: rev64 v5.4s, v2.4s
282 ; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
283 ; CHECK-NEXT: sub v1.4s, v17.4s, v4.4s
284 ; CHECK-NEXT: rev64 v6.4s, v3.4s
285 ; CHECK-NEXT: mov v5.d[1], v2.d[1]
286 ; CHECK-NEXT: sub v4.4s, v1.4s, v0.4s
287 ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
288 ; CHECK-NEXT: mov v6.d[1], v3.d[1]
289 ; CHECK-NEXT: sub v3.4s, v3.4s, v5.4s
290 ; CHECK-NEXT: add v1.4s, v2.4s, v6.4s
291 ; CHECK-NEXT: zip1 v2.4s, v3.4s, v4.4s
292 ; CHECK-NEXT: zip2 v7.4s, v3.4s, v4.4s
293 ; CHECK-NEXT: zip1 v5.4s, v1.4s, v0.4s
294 ; CHECK-NEXT: uzp2 v6.4s, v1.4s, v0.4s
295 ; CHECK-NEXT: mov v18.16b, v1.16b
296 ; CHECK-NEXT: ext v16.16b, v3.16b, v2.16b, #8
297 ; CHECK-NEXT: zip2 v17.4s, v1.4s, v0.4s
298 ; CHECK-NEXT: mov v3.s[3], v4.s[2]
299 ; CHECK-NEXT: mov v18.s[1], v0.s[1]
300 ; CHECK-NEXT: trn2 v4.4s, v1.4s, v5.4s
301 ; CHECK-NEXT: uzp2 v1.4s, v6.4s, v1.4s
302 ; CHECK-NEXT: mov v17.d[1], v3.d[1]
303 ; CHECK-NEXT: mov v18.d[1], v2.d[1]
304 ; CHECK-NEXT: mov v4.d[1], v16.d[1]
305 ; CHECK-NEXT: mov v1.d[1], v7.d[1]
306 ; CHECK-NEXT: add v0.4s, v17.4s, v1.4s
307 ; CHECK-NEXT: add v2.4s, v18.4s, v4.4s
308 ; CHECK-NEXT: sub v1.4s, v1.4s, v17.4s
309 ; CHECK-NEXT: sub v3.4s, v4.4s, v18.4s
310 ; CHECK-NEXT: ext v4.16b, v0.16b, v0.16b, #4
311 ; CHECK-NEXT: ext v5.16b, v2.16b, v2.16b, #4
312 ; CHECK-NEXT: zip2 v6.4s, v0.4s, v1.4s
313 ; CHECK-NEXT: zip2 v7.4s, v1.4s, v0.4s
314 ; CHECK-NEXT: zip2 v16.4s, v3.4s, v2.4s
315 ; CHECK-NEXT: zip2 v17.4s, v2.4s, v3.4s
316 ; CHECK-NEXT: zip1 v0.4s, v0.4s, v1.4s
317 ; CHECK-NEXT: ext v18.16b, v4.16b, v1.16b, #8
318 ; CHECK-NEXT: ext v19.16b, v5.16b, v3.16b, #8
319 ; CHECK-NEXT: zip1 v1.4s, v2.4s, v3.4s
320 ; CHECK-NEXT: add v2.4s, v16.4s, v7.4s
321 ; CHECK-NEXT: sub v3.4s, v6.4s, v17.4s
322 ; CHECK-NEXT: ext v4.16b, v18.16b, v4.16b, #4
323 ; CHECK-NEXT: ext v5.16b, v19.16b, v5.16b, #4
324 ; CHECK-NEXT: sub v0.4s, v0.4s, v1.4s
325 ; CHECK-NEXT: cmlt v1.8h, v3.8h, #0
326 ; CHECK-NEXT: cmlt v6.8h, v2.8h, #0
327 ; CHECK-NEXT: add v4.4s, v5.4s, v4.4s
328 ; CHECK-NEXT: cmlt v5.8h, v0.8h, #0
329 ; CHECK-NEXT: add v2.4s, v6.4s, v2.4s
330 ; CHECK-NEXT: add v3.4s, v1.4s, v3.4s
331 ; CHECK-NEXT: cmlt v7.8h, v4.8h, #0
332 ; CHECK-NEXT: add v0.4s, v5.4s, v0.4s
333 ; CHECK-NEXT: eor v2.16b, v2.16b, v6.16b
334 ; CHECK-NEXT: eor v1.16b, v3.16b, v1.16b
335 ; CHECK-NEXT: add v3.4s, v7.4s, v4.4s
336 ; CHECK-NEXT: eor v0.16b, v0.16b, v5.16b
337 ; CHECK-NEXT: add v1.4s, v2.4s, v1.4s
338 ; CHECK-NEXT: eor v2.16b, v3.16b, v7.16b
339 ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
340 ; CHECK-NEXT: add v0.4s, v2.4s, v0.4s
341 ; CHECK-NEXT: addv s0, v0.4s
342 ; CHECK-NEXT: fmov w8, s0
343 ; CHECK-NEXT: lsr w9, w8, #16
344 ; CHECK-NEXT: add w8, w9, w8, uxth
345 ; CHECK-NEXT: lsr w0, w8, #1
346 ; CHECK-NEXT: ret
347 entry:
348 %idx.ext = sext i32 %i1 to i64
349 %idx.ext63 = sext i32 %i2 to i64
350 %arrayidx3 = getelementptr inbounds i8, ptr %p1, i64 4
351 %arrayidx5 = getelementptr inbounds i8, ptr %p2, i64 4
352 %0 = load <4 x i8>, ptr %p1, align 1
353 %1 = load <4 x i8>, ptr %p2, align 1
354 %add.ptr = getelementptr inbounds i8, ptr %p1, i64 %idx.ext
355 %add.ptr64 = getelementptr inbounds i8, ptr %p2, i64 %idx.ext63
356 %arrayidx3.1 = getelementptr inbounds i8, ptr %add.ptr, i64 4
357 %arrayidx5.1 = getelementptr inbounds i8, ptr %add.ptr64, i64 4
358 %2 = load <4 x i8>, ptr %add.ptr, align 1
359 %3 = load <4 x i8>, ptr %add.ptr64, align 1
360 %add.ptr.1 = getelementptr inbounds i8, ptr %add.ptr, i64 %idx.ext
361 %add.ptr64.1 = getelementptr inbounds i8, ptr %add.ptr64, i64 %idx.ext63
362 %arrayidx3.2 = getelementptr inbounds i8, ptr %add.ptr.1, i64 4
363 %arrayidx5.2 = getelementptr inbounds i8, ptr %add.ptr64.1, i64 4
364 %4 = load <4 x i8>, ptr %add.ptr.1, align 1
365 %5 = load <4 x i8>, ptr %add.ptr64.1, align 1
366 %add.ptr.2 = getelementptr inbounds i8, ptr %add.ptr.1, i64 %idx.ext
367 %add.ptr64.2 = getelementptr inbounds i8, ptr %add.ptr64.1, i64 %idx.ext63
368 %arrayidx3.3 = getelementptr inbounds i8, ptr %add.ptr.2, i64 4
369 %arrayidx5.3 = getelementptr inbounds i8, ptr %add.ptr64.2, i64 4
370 %6 = load <4 x i8>, ptr %add.ptr.2, align 1
371 %7 = load <4 x i8>, ptr %add.ptr64.2, align 1
372 %8 = load <4 x i8>, ptr %arrayidx3, align 1
373 %9 = load <4 x i8>, ptr %arrayidx3.1, align 1
374 %10 = load <4 x i8>, ptr %arrayidx3.2, align 1
375 %11 = load <4 x i8>, ptr %arrayidx3.3, align 1
376 %12 = shufflevector <4 x i8> %11, <4 x i8> %10, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
377 %13 = shufflevector <4 x i8> %9, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
378 %14 = shufflevector <16 x i8> %12, <16 x i8> %13, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
379 %15 = shufflevector <4 x i8> %8, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
380 %16 = shufflevector <16 x i8> %14, <16 x i8> %15, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
381 %17 = zext <16 x i8> %16 to <16 x i32>
382 %18 = load <4 x i8>, ptr %arrayidx5, align 1
383 %19 = load <4 x i8>, ptr %arrayidx5.1, align 1
384 %20 = load <4 x i8>, ptr %arrayidx5.2, align 1
385 %21 = load <4 x i8>, ptr %arrayidx5.3, align 1
386 %22 = shufflevector <4 x i8> %21, <4 x i8> %20, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
387 %23 = shufflevector <4 x i8> %19, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
388 %24 = shufflevector <16 x i8> %22, <16 x i8> %23, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
389 %25 = shufflevector <4 x i8> %18, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
390 %26 = shufflevector <16 x i8> %24, <16 x i8> %25, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
391 %27 = zext <16 x i8> %26 to <16 x i32>
392 %28 = shufflevector <4 x i8> %6, <4 x i8> %4, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
393 %29 = shufflevector <4 x i8> %2, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
394 %30 = shufflevector <16 x i8> %28, <16 x i8> %29, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
395 %31 = shufflevector <4 x i8> %0, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
396 %32 = shufflevector <16 x i8> %30, <16 x i8> %31, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
397 %33 = zext <16 x i8> %32 to <16 x i32>
398 %34 = shufflevector <4 x i8> %7, <4 x i8> %5, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
399 %35 = shufflevector <4 x i8> %3, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
400 %36 = shufflevector <16 x i8> %34, <16 x i8> %35, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
401 %37 = shufflevector <4 x i8> %1, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
402 %38 = shufflevector <16 x i8> %36, <16 x i8> %37, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
403 %39 = zext <16 x i8> %38 to <16 x i32>
404 %40 = sub nsw <16 x i32> %33, %39
405 %41 = sub nsw <16 x i32> %17, %27
406 %42 = shl nsw <16 x i32> %41, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
407 %43 = add nsw <16 x i32> %42, %40
408 %44 = shufflevector <16 x i32> %43, <16 x i32> poison, <16 x i32> <i32 3, i32 7, i32 11, i32 15, i32 6, i32 2, i32 10, i32 14, i32 5, i32 1, i32 9, i32 13, i32 4, i32 0, i32 8, i32 12>
409 %reorder = shufflevector <16 x i32> %44, <16 x i32> poison, <16 x i32> <i32 5, i32 4, i32 6, i32 7, i32 1, i32 0, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11>
410 %45 = add nsw <16 x i32> %44, %reorder
411 %46 = sub nsw <16 x i32> %44, %reorder
412 %47 = shufflevector <16 x i32> %45, <16 x i32> %46, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31>
413 %reorder191 = shufflevector <16 x i32> %45, <16 x i32> %46, <16 x i32> <i32 9, i32 8, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31, i32 1, i32 0, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23>
414 %48 = add nsw <16 x i32> %47, %reorder191
415 %49 = sub nsw <16 x i32> %47, %reorder191
416 %50 = shufflevector <16 x i32> %48, <16 x i32> %49, <16 x i32> <i32 0, i32 5, i32 25, i32 29, i32 2, i32 6, i32 26, i32 30, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
417 %51 = shufflevector <16 x i32> %48, <16 x i32> %49, <16 x i32> <i32 1, i32 4, i32 24, i32 28, i32 3, i32 7, i32 27, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
418 %52 = shufflevector <16 x i32> %48, <16 x i32> %49, <16 x i32> <i32 1, i32 4, i32 24, i32 28, i32 3, i32 7, i32 27, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
419 %53 = shufflevector <16 x i32> %48, <16 x i32> %49, <16 x i32> <i32 0, i32 5, i32 25, i32 29, i32 2, i32 6, i32 26, i32 30, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
420 %54 = add nsw <16 x i32> %50, %52
421 %55 = sub nsw <16 x i32> %51, %53
422 %56 = shufflevector <16 x i32> %54, <16 x i32> %55, <16 x i32> <i32 0, i32 16, i32 17, i32 1, i32 18, i32 2, i32 19, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
423 %57 = shufflevector <16 x i32> %54, <16 x i32> %55, <16 x i32> <i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
424 %58 = shufflevector <16 x i32> %54, <16 x i32> %55, <16 x i32> <i32 4, i32 20, i32 21, i32 5, i32 22, i32 6, i32 23, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
425 %59 = shufflevector <16 x i32> %54, <16 x i32> %55, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
426 %60 = add nsw <16 x i32> %56, %58
427 %61 = sub nsw <16 x i32> %57, %59
428 %62 = shufflevector <16 x i32> %60, <16 x i32> %61, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
429 %63 = lshr <16 x i32> %62, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
430 %64 = and <16 x i32> %63, <i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537>
431 %65 = mul nuw <16 x i32> %64, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>
432 %66 = add <16 x i32> %65, %62
433 %67 = xor <16 x i32> %66, %65
434 %68 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %67)
435 %conv118 = and i32 %68, 65535
436 %shr = lshr i32 %68, 16
437 %add119 = add nuw nsw i32 %conv118, %shr
438 %shr120 = lshr i32 %add119, 1
439 ret i32 %shr120
440 }
443 define i32 @v3(ptr nocapture noundef readonly %p1, i32 noundef %i1, ptr nocapture noundef readonly %p2, i32 noundef %i2) {
444 ; CHECK-LABEL: v3:
445 ; CHECK: // %bb.0: // %entry
446 ; CHECK-NEXT: // kill: def $w3 killed $w3 def $x3
447 ; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
448 ; CHECK-NEXT: sxtw x8, w1
449 ; CHECK-NEXT: sxtw x9, w3
450 ; CHECK-NEXT: ldr d0, [x0]
451 ; CHECK-NEXT: ldr d1, [x2]
452 ; CHECK-NEXT: add x10, x0, x8
453 ; CHECK-NEXT: add x11, x2, x9
454 ; CHECK-NEXT: ldr d2, [x10]
455 ; CHECK-NEXT: ldr d3, [x11]
456 ; CHECK-NEXT: usubl v0.8h, v0.8b, v1.8b
457 ; CHECK-NEXT: add x10, x10, x8
458 ; CHECK-NEXT: add x11, x11, x9
459 ; CHECK-NEXT: usubl v1.8h, v2.8b, v3.8b
460 ; CHECK-NEXT: ldr d2, [x10, x8]
461 ; CHECK-NEXT: ldr d3, [x11, x9]
462 ; CHECK-NEXT: ldr d4, [x10]
463 ; CHECK-NEXT: ldr d5, [x11]
464 ; CHECK-NEXT: shll2 v6.4s, v0.8h, #16
465 ; CHECK-NEXT: usubl v2.8h, v2.8b, v3.8b
466 ; CHECK-NEXT: shll2 v3.4s, v1.8h, #16
467 ; CHECK-NEXT: usubl v4.8h, v4.8b, v5.8b
468 ; CHECK-NEXT: saddw v0.4s, v6.4s, v0.4h
469 ; CHECK-NEXT: shll2 v5.4s, v2.8h, #16
470 ; CHECK-NEXT: saddw v1.4s, v3.4s, v1.4h
471 ; CHECK-NEXT: shll2 v3.4s, v4.8h, #16
472 ; CHECK-NEXT: rev64 v6.4s, v0.4s
473 ; CHECK-NEXT: saddw v2.4s, v5.4s, v2.4h
474 ; CHECK-NEXT: rev64 v5.4s, v1.4s
475 ; CHECK-NEXT: saddw v3.4s, v3.4s, v4.4h
476 ; CHECK-NEXT: rev64 v4.4s, v2.4s
477 ; CHECK-NEXT: sub v6.4s, v0.4s, v6.4s
478 ; CHECK-NEXT: addp v0.4s, v1.4s, v0.4s
479 ; CHECK-NEXT: rev64 v7.4s, v3.4s
480 ; CHECK-NEXT: sub v5.4s, v1.4s, v5.4s
481 ; CHECK-NEXT: sub v4.4s, v2.4s, v4.4s
482 ; CHECK-NEXT: addp v2.4s, v2.4s, v3.4s
483 ; CHECK-NEXT: ext v1.16b, v5.16b, v6.16b, #4
484 ; CHECK-NEXT: sub v7.4s, v3.4s, v7.4s
485 ; CHECK-NEXT: ext v3.16b, v0.16b, v0.16b, #8
486 ; CHECK-NEXT: mov v6.s[3], v5.s[2]
487 ; CHECK-NEXT: zip2 v16.4s, v4.4s, v7.4s
488 ; CHECK-NEXT: zip1 v4.4s, v4.4s, v7.4s
489 ; CHECK-NEXT: ext v1.16b, v1.16b, v5.16b, #4
490 ; CHECK-NEXT: uzp2 v5.4s, v2.4s, v0.4s
491 ; CHECK-NEXT: uzp1 v0.4s, v2.4s, v0.4s
492 ; CHECK-NEXT: uzp1 v7.4s, v2.4s, v3.4s
493 ; CHECK-NEXT: uzp2 v2.4s, v2.4s, v3.4s
494 ; CHECK-NEXT: mov v16.d[1], v6.d[1]
495 ; CHECK-NEXT: mov v4.d[1], v1.d[1]
496 ; CHECK-NEXT: rev64 v1.4s, v5.4s
497 ; CHECK-NEXT: rev64 v0.4s, v0.4s
498 ; CHECK-NEXT: sub v2.4s, v7.4s, v2.4s
499 ; CHECK-NEXT: sub v3.4s, v4.4s, v16.4s
500 ; CHECK-NEXT: add v0.4s, v1.4s, v0.4s
501 ; CHECK-NEXT: add v1.4s, v16.4s, v4.4s
502 ; CHECK-NEXT: zip1 v4.4s, v2.4s, v3.4s
503 ; CHECK-NEXT: zip1 v5.4s, v0.4s, v1.4s
504 ; CHECK-NEXT: uzp2 v6.4s, v0.4s, v1.4s
505 ; CHECK-NEXT: zip2 v7.4s, v0.4s, v1.4s
506 ; CHECK-NEXT: zip2 v17.4s, v2.4s, v3.4s
507 ; CHECK-NEXT: ext v16.16b, v2.16b, v4.16b, #8
508 ; CHECK-NEXT: trn2 v5.4s, v0.4s, v5.4s
509 ; CHECK-NEXT: uzp2 v6.4s, v6.4s, v0.4s
510 ; CHECK-NEXT: mov v2.s[3], v3.s[2]
511 ; CHECK-NEXT: mov v0.s[1], v1.s[1]
512 ; CHECK-NEXT: mov v5.d[1], v16.d[1]
513 ; CHECK-NEXT: mov v6.d[1], v17.d[1]
514 ; CHECK-NEXT: mov v7.d[1], v2.d[1]
515 ; CHECK-NEXT: mov v0.d[1], v4.d[1]
516 ; CHECK-NEXT: add v1.4s, v6.4s, v7.4s
517 ; CHECK-NEXT: add v2.4s, v5.4s, v0.4s
518 ; CHECK-NEXT: sub v3.4s, v7.4s, v6.4s
519 ; CHECK-NEXT: sub v0.4s, v0.4s, v5.4s
520 ; CHECK-NEXT: ext v4.16b, v1.16b, v1.16b, #4
521 ; CHECK-NEXT: ext v5.16b, v2.16b, v2.16b, #4
522 ; CHECK-NEXT: zip2 v6.4s, v1.4s, v3.4s
523 ; CHECK-NEXT: zip2 v7.4s, v3.4s, v1.4s
524 ; CHECK-NEXT: zip2 v16.4s, v0.4s, v2.4s
525 ; CHECK-NEXT: zip2 v17.4s, v2.4s, v0.4s
526 ; CHECK-NEXT: zip1 v1.4s, v1.4s, v3.4s
527 ; CHECK-NEXT: ext v18.16b, v4.16b, v3.16b, #8
528 ; CHECK-NEXT: ext v19.16b, v5.16b, v0.16b, #8
529 ; CHECK-NEXT: zip1 v0.4s, v2.4s, v0.4s
530 ; CHECK-NEXT: add v2.4s, v16.4s, v7.4s
531 ; CHECK-NEXT: sub v3.4s, v6.4s, v17.4s
532 ; CHECK-NEXT: ext v4.16b, v18.16b, v4.16b, #4
533 ; CHECK-NEXT: ext v5.16b, v19.16b, v5.16b, #4
534 ; CHECK-NEXT: sub v0.4s, v1.4s, v0.4s
535 ; CHECK-NEXT: cmlt v1.8h, v3.8h, #0
536 ; CHECK-NEXT: cmlt v6.8h, v2.8h, #0
537 ; CHECK-NEXT: add v4.4s, v5.4s, v4.4s
538 ; CHECK-NEXT: cmlt v5.8h, v0.8h, #0
539 ; CHECK-NEXT: add v2.4s, v6.4s, v2.4s
540 ; CHECK-NEXT: add v3.4s, v1.4s, v3.4s
541 ; CHECK-NEXT: cmlt v7.8h, v4.8h, #0
542 ; CHECK-NEXT: add v0.4s, v5.4s, v0.4s
543 ; CHECK-NEXT: eor v2.16b, v2.16b, v6.16b
544 ; CHECK-NEXT: eor v1.16b, v3.16b, v1.16b
545 ; CHECK-NEXT: add v3.4s, v7.4s, v4.4s
546 ; CHECK-NEXT: eor v0.16b, v0.16b, v5.16b
547 ; CHECK-NEXT: add v1.4s, v2.4s, v1.4s
548 ; CHECK-NEXT: eor v2.16b, v3.16b, v7.16b
549 ; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
550 ; CHECK-NEXT: add v0.4s, v2.4s, v0.4s
551 ; CHECK-NEXT: addv s0, v0.4s
552 ; CHECK-NEXT: fmov w8, s0
553 ; CHECK-NEXT: lsr w9, w8, #16
554 ; CHECK-NEXT: add w8, w9, w8, uxth
555 ; CHECK-NEXT: lsr w0, w8, #1
556 ; CHECK-NEXT: ret
557 entry:
558 %idx.ext = sext i32 %i1 to i64
559 %idx.ext63 = sext i32 %i2 to i64
560 %arrayidx3 = getelementptr inbounds i8, ptr %p1, i64 4
561 %arrayidx5 = getelementptr inbounds i8, ptr %p2, i64 4
562 %add.ptr = getelementptr inbounds i8, ptr %p1, i64 %idx.ext
563 %add.ptr64 = getelementptr inbounds i8, ptr %p2, i64 %idx.ext63
564 %arrayidx3.1 = getelementptr inbounds i8, ptr %add.ptr, i64 4
565 %arrayidx5.1 = getelementptr inbounds i8, ptr %add.ptr64, i64 4
566 %add.ptr.1 = getelementptr inbounds i8, ptr %add.ptr, i64 %idx.ext
567 %add.ptr64.1 = getelementptr inbounds i8, ptr %add.ptr64, i64 %idx.ext63
568 %arrayidx3.2 = getelementptr inbounds i8, ptr %add.ptr.1, i64 4
569 %arrayidx5.2 = getelementptr inbounds i8, ptr %add.ptr64.1, i64 4
570 %add.ptr.2 = getelementptr inbounds i8, ptr %add.ptr.1, i64 %idx.ext
571 %add.ptr64.2 = getelementptr inbounds i8, ptr %add.ptr64.1, i64 %idx.ext63
572 %arrayidx3.3 = getelementptr inbounds i8, ptr %add.ptr.2, i64 4
573 %arrayidx5.3 = getelementptr inbounds i8, ptr %add.ptr64.2, i64 4
574 %0 = load <4 x i8>, ptr %p1, align 1
575 %1 = load <4 x i8>, ptr %p2, align 1
576 %2 = load <4 x i8>, ptr %arrayidx3, align 1
577 %3 = load <4 x i8>, ptr %arrayidx5, align 1
578 %4 = load <4 x i8>, ptr %add.ptr, align 1
579 %5 = load <4 x i8>, ptr %add.ptr64, align 1
580 %6 = load <4 x i8>, ptr %arrayidx3.1, align 1
581 %7 = load <4 x i8>, ptr %arrayidx5.1, align 1
582 %8 = load <4 x i8>, ptr %add.ptr.1, align 1
583 %9 = load <4 x i8>, ptr %add.ptr64.1, align 1
584 %10 = load <4 x i8>, ptr %arrayidx3.2, align 1
585 %11 = load <4 x i8>, ptr %arrayidx5.2, align 1
586 %12 = load <4 x i8>, ptr %add.ptr.2, align 1
587 %13 = shufflevector <4 x i8> %12, <4 x i8> %8, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
588 %14 = shufflevector <4 x i8> %4, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
589 %15 = shufflevector <16 x i8> %13, <16 x i8> %14, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
590 %16 = shufflevector <4 x i8> %0, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
591 %17 = shufflevector <16 x i8> %15, <16 x i8> %16, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
592 %18 = zext <16 x i8> %17 to <16 x i32>
593 %19 = load <4 x i8>, ptr %add.ptr64.2, align 1
594 %20 = shufflevector <4 x i8> %19, <4 x i8> %9, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
595 %21 = shufflevector <4 x i8> %5, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
596 %22 = shufflevector <16 x i8> %20, <16 x i8> %21, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
597 %23 = shufflevector <4 x i8> %1, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
598 %24 = shufflevector <16 x i8> %22, <16 x i8> %23, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
599 %25 = zext <16 x i8> %24 to <16 x i32>
600 %26 = sub nsw <16 x i32> %18, %25
601 %27 = load <4 x i8>, ptr %arrayidx3.3, align 1
602 %28 = shufflevector <4 x i8> %27, <4 x i8> %10, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
603 %29 = shufflevector <4 x i8> %6, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
604 %30 = shufflevector <16 x i8> %28, <16 x i8> %29, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
605 %31 = shufflevector <4 x i8> %2, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
606 %32 = shufflevector <16 x i8> %30, <16 x i8> %31, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
607 %33 = zext <16 x i8> %32 to <16 x i32>
608 %34 = load <4 x i8>, ptr %arrayidx5.3, align 1
609 %35 = shufflevector <4 x i8> %34, <4 x i8> %11, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
610 %36 = shufflevector <4 x i8> %7, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
611 %37 = shufflevector <16 x i8> %35, <16 x i8> %36, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 undef, i32 undef, i32 undef, i32 undef>
612 %38 = shufflevector <4 x i8> %3, <4 x i8> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
613 %39 = shufflevector <16 x i8> %37, <16 x i8> %38, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
614 %40 = zext <16 x i8> %39 to <16 x i32>
615 %41 = sub nsw <16 x i32> %33, %40
616 %42 = shl nsw <16 x i32> %41, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
617 %43 = add nsw <16 x i32> %42, %26
618 %reorder = shufflevector <16 x i32> %43, <16 x i32> poison, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14>
619 %44 = add nsw <16 x i32> %43, %reorder
620 %45 = sub nsw <16 x i32> %43, %reorder
621 %46 = shufflevector <16 x i32> %44, <16 x i32> %45, <16 x i32> <i32 7, i32 3, i32 15, i32 11, i32 18, i32 22, i32 30, i32 26, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
622 %47 = shufflevector <16 x i32> %44, <16 x i32> %45, <16 x i32> <i32 1, i32 5, i32 13, i32 9, i32 16, i32 20, i32 28, i32 24, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
623 %48 = shufflevector <16 x i32> %44, <16 x i32> %45, <16 x i32> <i32 5, i32 1, i32 13, i32 9, i32 16, i32 20, i32 28, i32 24, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
624 %49 = shufflevector <16 x i32> %44, <16 x i32> %45, <16 x i32> <i32 3, i32 7, i32 15, i32 11, i32 18, i32 22, i32 30, i32 26, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
625 %50 = add nsw <16 x i32> %46, %48
626 %51 = sub nsw <16 x i32> %47, %49
627 %52 = shufflevector <16 x i32> %50, <16 x i32> %51, <16 x i32> <i32 1, i32 4, i32 16, i32 20, i32 3, i32 7, i32 19, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
628 %53 = shufflevector <16 x i32> %50, <16 x i32> %51, <16 x i32> <i32 0, i32 5, i32 17, i32 21, i32 2, i32 6, i32 18, i32 22, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
629 %54 = shufflevector <16 x i32> %50, <16 x i32> %51, <16 x i32> <i32 0, i32 5, i32 17, i32 21, i32 2, i32 6, i32 18, i32 22, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
630 %55 = shufflevector <16 x i32> %50, <16 x i32> %51, <16 x i32> <i32 1, i32 4, i32 16, i32 20, i32 3, i32 7, i32 19, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
631 %56 = add nsw <16 x i32> %52, %54
632 %57 = sub nsw <16 x i32> %53, %55
633 %58 = shufflevector <16 x i32> %56, <16 x i32> %57, <16 x i32> <i32 0, i32 16, i32 17, i32 1, i32 18, i32 2, i32 19, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
634 %59 = shufflevector <16 x i32> %56, <16 x i32> %57, <16 x i32> <i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
635 %60 = shufflevector <16 x i32> %56, <16 x i32> %57, <16 x i32> <i32 4, i32 20, i32 21, i32 5, i32 22, i32 6, i32 23, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
636 %61 = shufflevector <16 x i32> %56, <16 x i32> %57, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
637 %62 = add nsw <16 x i32> %58, %60
638 %63 = sub nsw <16 x i32> %59, %61
639 %64 = shufflevector <16 x i32> %62, <16 x i32> %63, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
640 %65 = lshr <16 x i32> %64, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
641 %66 = and <16 x i32> %65, <i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537, i32 65537>
642 %67 = mul nuw <16 x i32> %66, <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>
643 %68 = add <16 x i32> %67, %64
644 %69 = xor <16 x i32> %68, %67
645 %70 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %69)
646 %conv118 = and i32 %70, 65535
647 %shr = lshr i32 %70, 16
648 %add119 = add nuw nsw i32 %conv118, %shr
649 %shr120 = lshr i32 %add119, 1
650 ret i32 %shr120
651 }
653 declare i32 @llvm.vector.reduce.add.v16i32(<16 x i32>)