| blob | 7c80f9320faec1a122b8f181f16768699e3a207a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
4 ; https://bugs.llvm.org/show_bug.cgi?id=38149
6 ; We are truncating from wider width, and then sign-extending
7 ; back to the original width. Then we equality-comparing orig and src.
8 ; If they don't match, then we had signed truncation during truncation.
10 ; This can be expressed in a several ways in IR:
11 ; trunc + sext + icmp eq <- not canonical
12 ; shl + ashr + icmp eq
13 ; add + icmp uge/ugt
14 ; add + icmp ult/ule
15 ; However only the simplest form (with two shifts) gets lowered best.
17 ; ---------------------------------------------------------------------------- ;
18 ; shl + ashr + icmp eq
19 ; ---------------------------------------------------------------------------- ;
21 define i1 @shifts_eqcmp_i16_i8(i16 %x) nounwind {
22 ; CHECK-LABEL: shifts_eqcmp_i16_i8:
23 ; CHECK: // %bb.0:
24 ; CHECK-NEXT: sxtb w8, w0
25 ; CHECK-NEXT: and w8, w8, #0xffff
26 ; CHECK-NEXT: cmp w8, w0, uxth
27 ; CHECK-NEXT: cset w0, eq
28 ; CHECK-NEXT: ret
29 %tmp0 = shl i16 %x, 8 ; 16-8
30 %tmp1 = ashr exact i16 %tmp0, 8 ; 16-8
31 %tmp2 = icmp eq i16 %tmp1, %x
32 ret i1 %tmp2
33 }
35 define i1 @shifts_eqcmp_i32_i16(i32 %x) nounwind {
36 ; CHECK-LABEL: shifts_eqcmp_i32_i16:
37 ; CHECK: // %bb.0:
38 ; CHECK-NEXT: cmp w0, w0, sxth
39 ; CHECK-NEXT: cset w0, eq
40 ; CHECK-NEXT: ret
41 %tmp0 = shl i32 %x, 16 ; 32-16
42 %tmp1 = ashr exact i32 %tmp0, 16 ; 32-16
43 %tmp2 = icmp eq i32 %tmp1, %x
44 ret i1 %tmp2
45 }
47 define i1 @shifts_eqcmp_i32_i8(i32 %x) nounwind {
48 ; CHECK-LABEL: shifts_eqcmp_i32_i8:
49 ; CHECK: // %bb.0:
50 ; CHECK-NEXT: cmp w0, w0, sxtb
51 ; CHECK-NEXT: cset w0, eq
52 ; CHECK-NEXT: ret
53 %tmp0 = shl i32 %x, 24 ; 32-8
54 %tmp1 = ashr exact i32 %tmp0, 24 ; 32-8
55 %tmp2 = icmp eq i32 %tmp1, %x
56 ret i1 %tmp2
57 }
59 define i1 @shifts_eqcmp_i64_i32(i64 %x) nounwind {
60 ; CHECK-LABEL: shifts_eqcmp_i64_i32:
61 ; CHECK: // %bb.0:
62 ; CHECK-NEXT: cmp x0, w0, sxtw
63 ; CHECK-NEXT: cset w0, eq
64 ; CHECK-NEXT: ret
65 %tmp0 = shl i64 %x, 32 ; 64-32
66 %tmp1 = ashr exact i64 %tmp0, 32 ; 64-32
67 %tmp2 = icmp eq i64 %tmp1, %x
68 ret i1 %tmp2
69 }
71 define i1 @shifts_eqcmp_i64_i16(i64 %x) nounwind {
72 ; CHECK-LABEL: shifts_eqcmp_i64_i16:
73 ; CHECK: // %bb.0:
74 ; CHECK-NEXT: cmp x0, w0, sxth
75 ; CHECK-NEXT: cset w0, eq
76 ; CHECK-NEXT: ret
77 %tmp0 = shl i64 %x, 48 ; 64-16
78 %tmp1 = ashr exact i64 %tmp0, 48 ; 64-16
79 %tmp2 = icmp eq i64 %tmp1, %x
80 ret i1 %tmp2
81 }
83 define i1 @shifts_eqcmp_i64_i8(i64 %x) nounwind {
84 ; CHECK-LABEL: shifts_eqcmp_i64_i8:
85 ; CHECK: // %bb.0:
86 ; CHECK-NEXT: cmp x0, w0, sxtb
87 ; CHECK-NEXT: cset w0, eq
88 ; CHECK-NEXT: ret
89 %tmp0 = shl i64 %x, 56 ; 64-8
90 %tmp1 = ashr exact i64 %tmp0, 56 ; 64-8
91 %tmp2 = icmp eq i64 %tmp1, %x
92 ret i1 %tmp2
93 }
95 ; ---------------------------------------------------------------------------- ;
96 ; add + icmp uge
97 ; ---------------------------------------------------------------------------- ;
99 define i1 @add_ugecmp_i16_i8(i16 %x) nounwind {
100 ; CHECK-LABEL: add_ugecmp_i16_i8:
101 ; CHECK: // %bb.0:
102 ; CHECK-NEXT: and w8, w0, #0xffff
103 ; CHECK-NEXT: sub w8, w8, #128
104 ; CHECK-NEXT: lsr w8, w8, #8
105 ; CHECK-NEXT: cmp w8, #254
106 ; CHECK-NEXT: cset w0, hi
107 ; CHECK-NEXT: ret
108 %tmp0 = add i16 %x, -128 ; ~0U << (8-1)
109 %tmp1 = icmp uge i16 %tmp0, -256 ; ~0U << 8
110 ret i1 %tmp1
111 }
113 define i1 @add_ugecmp_i32_i16_i8(i16 %xx) nounwind {
114 ; CHECK-LABEL: add_ugecmp_i32_i16_i8:
115 ; CHECK: // %bb.0:
116 ; CHECK-NEXT: and w8, w0, #0xffff
117 ; CHECK-NEXT: cmp w8, w8, sxtb
118 ; CHECK-NEXT: cset w0, eq
119 ; CHECK-NEXT: ret
120 %x = zext i16 %xx to i32
121 %tmp0 = add i32 %x, -128 ; ~0U << (8-1)
122 %tmp1 = icmp uge i32 %tmp0, -256 ; ~0U << 8
123 ret i1 %tmp1
124 }
126 define i1 @add_ugecmp_i32_i16(i32 %x) nounwind {
127 ; CHECK-LABEL: add_ugecmp_i32_i16:
128 ; CHECK: // %bb.0:
129 ; CHECK-NEXT: cmp w0, w0, sxth
130 ; CHECK-NEXT: cset w0, eq
131 ; CHECK-NEXT: ret
132 %tmp0 = add i32 %x, -32768 ; ~0U << (16-1)
133 %tmp1 = icmp uge i32 %tmp0, -65536 ; ~0U << 16
134 ret i1 %tmp1
135 }
137 define i1 @add_ugecmp_i32_i8(i32 %x) nounwind {
138 ; CHECK-LABEL: add_ugecmp_i32_i8:
139 ; CHECK: // %bb.0:
140 ; CHECK-NEXT: cmp w0, w0, sxtb
141 ; CHECK-NEXT: cset w0, eq
142 ; CHECK-NEXT: ret
143 %tmp0 = add i32 %x, -128 ; ~0U << (8-1)
144 %tmp1 = icmp uge i32 %tmp0, -256 ; ~0U << 8
145 ret i1 %tmp1
146 }
148 define i1 @add_ugecmp_i64_i32(i64 %x) nounwind {
149 ; CHECK-LABEL: add_ugecmp_i64_i32:
150 ; CHECK: // %bb.0:
151 ; CHECK-NEXT: cmp x0, w0, sxtw
152 ; CHECK-NEXT: cset w0, eq
153 ; CHECK-NEXT: ret
154 %tmp0 = add i64 %x, -2147483648 ; ~0U << (32-1)
155 %tmp1 = icmp uge i64 %tmp0, -4294967296 ; ~0U << 32
156 ret i1 %tmp1
157 }
159 define i1 @add_ugecmp_i64_i16(i64 %x) nounwind {
160 ; CHECK-LABEL: add_ugecmp_i64_i16:
161 ; CHECK: // %bb.0:
162 ; CHECK-NEXT: cmp x0, w0, sxth
163 ; CHECK-NEXT: cset w0, eq
164 ; CHECK-NEXT: ret
165 %tmp0 = add i64 %x, -32768 ; ~0U << (16-1)
166 %tmp1 = icmp uge i64 %tmp0, -65536 ; ~0U << 16
167 ret i1 %tmp1
168 }
170 define i1 @add_ugecmp_i64_i8(i64 %x) nounwind {
171 ; CHECK-LABEL: add_ugecmp_i64_i8:
172 ; CHECK: // %bb.0:
173 ; CHECK-NEXT: cmp x0, w0, sxtb
174 ; CHECK-NEXT: cset w0, eq
175 ; CHECK-NEXT: ret
176 %tmp0 = add i64 %x, -128 ; ~0U << (8-1)
177 %tmp1 = icmp uge i64 %tmp0, -256 ; ~0U << 8
178 ret i1 %tmp1
179 }
181 ; Slightly more canonical variant
182 define i1 @add_ugtcmp_i16_i8(i16 %x) nounwind {
183 ; CHECK-LABEL: add_ugtcmp_i16_i8:
184 ; CHECK: // %bb.0:
185 ; CHECK-NEXT: and w8, w0, #0xffff
186 ; CHECK-NEXT: sub w8, w8, #128
187 ; CHECK-NEXT: lsr w8, w8, #8
188 ; CHECK-NEXT: cmp w8, #254
189 ; CHECK-NEXT: cset w0, hi
190 ; CHECK-NEXT: ret
191 %tmp0 = add i16 %x, -128 ; ~0U << (8-1)
192 %tmp1 = icmp ugt i16 %tmp0, -257 ; ~0U << 8 - 1
193 ret i1 %tmp1
194 }
196 ; ---------------------------------------------------------------------------- ;
197 ; add + icmp ult
198 ; ---------------------------------------------------------------------------- ;
200 define i1 @add_ultcmp_i16_i8(i16 %x) nounwind {
201 ; CHECK-LABEL: add_ultcmp_i16_i8:
202 ; CHECK: // %bb.0:
203 ; CHECK-NEXT: sxtb w8, w0
204 ; CHECK-NEXT: and w8, w8, #0xffff
205 ; CHECK-NEXT: cmp w8, w0, uxth
206 ; CHECK-NEXT: cset w0, eq
207 ; CHECK-NEXT: ret
208 %tmp0 = add i16 %x, 128 ; 1U << (8-1)
209 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8
210 ret i1 %tmp1
211 }
213 define i1 @add_ultcmp_i32_i16(i32 %x) nounwind {
214 ; CHECK-LABEL: add_ultcmp_i32_i16:
215 ; CHECK: // %bb.0:
216 ; CHECK-NEXT: cmp w0, w0, sxth
217 ; CHECK-NEXT: cset w0, eq
218 ; CHECK-NEXT: ret
219 %tmp0 = add i32 %x, 32768 ; 1U << (16-1)
220 %tmp1 = icmp ult i32 %tmp0, 65536 ; 1U << 16
221 ret i1 %tmp1
222 }
224 define i1 @add_ultcmp_i32_i8(i32 %x) nounwind {
225 ; CHECK-LABEL: add_ultcmp_i32_i8:
226 ; CHECK: // %bb.0:
227 ; CHECK-NEXT: cmp w0, w0, sxtb
228 ; CHECK-NEXT: cset w0, eq
229 ; CHECK-NEXT: ret
230 %tmp0 = add i32 %x, 128 ; 1U << (8-1)
231 %tmp1 = icmp ult i32 %tmp0, 256 ; 1U << 8
232 ret i1 %tmp1
233 }
235 define i1 @add_ultcmp_i64_i32(i64 %x) nounwind {
236 ; CHECK-LABEL: add_ultcmp_i64_i32:
237 ; CHECK: // %bb.0:
238 ; CHECK-NEXT: cmp x0, w0, sxtw
239 ; CHECK-NEXT: cset w0, eq
240 ; CHECK-NEXT: ret
241 %tmp0 = add i64 %x, 2147483648 ; 1U << (32-1)
242 %tmp1 = icmp ult i64 %tmp0, 4294967296 ; 1U << 32
243 ret i1 %tmp1
244 }
246 define i1 @add_ultcmp_i64_i16(i64 %x) nounwind {
247 ; CHECK-LABEL: add_ultcmp_i64_i16:
248 ; CHECK: // %bb.0:
249 ; CHECK-NEXT: cmp x0, w0, sxth
250 ; CHECK-NEXT: cset w0, eq
251 ; CHECK-NEXT: ret
252 %tmp0 = add i64 %x, 32768 ; 1U << (16-1)
253 %tmp1 = icmp ult i64 %tmp0, 65536 ; 1U << 16
254 ret i1 %tmp1
255 }
257 define i1 @add_ultcmp_i64_i8(i64 %x) nounwind {
258 ; CHECK-LABEL: add_ultcmp_i64_i8:
259 ; CHECK: // %bb.0:
260 ; CHECK-NEXT: cmp x0, w0, sxtb
261 ; CHECK-NEXT: cset w0, eq
262 ; CHECK-NEXT: ret
263 %tmp0 = add i64 %x, 128 ; 1U << (8-1)
264 %tmp1 = icmp ult i64 %tmp0, 256 ; 1U << 8
265 ret i1 %tmp1
266 }
268 ; Slightly more canonical variant
269 define i1 @add_ulecmp_i16_i8(i16 %x) nounwind {
270 ; CHECK-LABEL: add_ulecmp_i16_i8:
271 ; CHECK: // %bb.0:
272 ; CHECK-NEXT: sxtb w8, w0
273 ; CHECK-NEXT: and w8, w8, #0xffff
274 ; CHECK-NEXT: cmp w8, w0, uxth
275 ; CHECK-NEXT: cset w0, eq
276 ; CHECK-NEXT: ret
277 %tmp0 = add i16 %x, 128 ; 1U << (8-1)
278 %tmp1 = icmp ule i16 %tmp0, 255 ; (1U << 8) - 1
279 ret i1 %tmp1
280 }
282 ; Negative tests
283 ; ---------------------------------------------------------------------------- ;
285 ; Adding not a constant
286 define i1 @add_ultcmp_bad_i16_i8_add(i16 %x, i16 %y) nounwind {
287 ; CHECK-LABEL: add_ultcmp_bad_i16_i8_add:
288 ; CHECK: // %bb.0:
289 ; CHECK-NEXT: add w8, w0, w1
290 ; CHECK-NEXT: tst w8, #0xff00
291 ; CHECK-NEXT: cset w0, eq
292 ; CHECK-NEXT: ret
293 %tmp0 = add i16 %x, %y
294 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8
295 ret i1 %tmp1
296 }
298 ; Comparing not with a constant
299 define i1 @add_ultcmp_bad_i16_i8_cmp(i16 %x, i16 %y) nounwind {
300 ; CHECK-LABEL: add_ultcmp_bad_i16_i8_cmp:
301 ; CHECK: // %bb.0:
302 ; CHECK-NEXT: add w8, w0, #128
303 ; CHECK-NEXT: and w8, w8, #0xffff
304 ; CHECK-NEXT: cmp w8, w1, uxth
305 ; CHECK-NEXT: cset w0, lo
306 ; CHECK-NEXT: ret
307 %tmp0 = add i16 %x, 128 ; 1U << (8-1)
308 %tmp1 = icmp ult i16 %tmp0, %y
309 ret i1 %tmp1
310 }
312 ; Second constant is not larger than the first one
313 define i1 @add_ultcmp_bad_i8_i16(i16 %x) nounwind {
314 ; CHECK-LABEL: add_ultcmp_bad_i8_i16:
315 ; CHECK: // %bb.0:
316 ; CHECK-NEXT: and w8, w0, #0xffff
317 ; CHECK-NEXT: add w8, w8, #128
318 ; CHECK-NEXT: lsr w0, w8, #16
319 ; CHECK-NEXT: ret
320 %tmp0 = add i16 %x, 128 ; 1U << (8-1)
321 %tmp1 = icmp ult i16 %tmp0, 128 ; 1U << (8-1)
322 ret i1 %tmp1
323 }
325 ; First constant is not power of two
326 define i1 @add_ultcmp_bad_i16_i8_c0notpoweroftwo(i16 %x) nounwind {
327 ; CHECK-LABEL: add_ultcmp_bad_i16_i8_c0notpoweroftwo:
328 ; CHECK: // %bb.0:
329 ; CHECK-NEXT: add w8, w0, #192
330 ; CHECK-NEXT: tst w8, #0xff00
331 ; CHECK-NEXT: cset w0, eq
332 ; CHECK-NEXT: ret
333 %tmp0 = add i16 %x, 192 ; (1U << (8-1)) + (1U << (8-1-1))
334 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8
335 ret i1 %tmp1
336 }
338 ; Second constant is not power of two
339 define i1 @add_ultcmp_bad_i16_i8_c1notpoweroftwo(i16 %x) nounwind {
340 ; CHECK-LABEL: add_ultcmp_bad_i16_i8_c1notpoweroftwo:
341 ; CHECK: // %bb.0:
342 ; CHECK-NEXT: add w8, w0, #128
343 ; CHECK-NEXT: and w8, w8, #0xffff
344 ; CHECK-NEXT: cmp w8, #768
345 ; CHECK-NEXT: cset w0, lo
346 ; CHECK-NEXT: ret
347 %tmp0 = add i16 %x, 128 ; 1U << (8-1)
348 %tmp1 = icmp ult i16 %tmp0, 768 ; (1U << 8)) + (1U << (8+1))
349 ret i1 %tmp1
350 }
352 ; Magic check fails, 64 << 1 != 256
353 define i1 @add_ultcmp_bad_i16_i8_magic(i16 %x) nounwind {
354 ; CHECK-LABEL: add_ultcmp_bad_i16_i8_magic:
355 ; CHECK: // %bb.0:
356 ; CHECK-NEXT: add w8, w0, #64
357 ; CHECK-NEXT: tst w8, #0xff00
358 ; CHECK-NEXT: cset w0, eq
359 ; CHECK-NEXT: ret
360 %tmp0 = add i16 %x, 64 ; 1U << (8-1-1)
361 %tmp1 = icmp ult i16 %tmp0, 256 ; 1U << 8
362 ret i1 %tmp1
363 }
365 ; Bad 'destination type'
366 define i1 @add_ultcmp_bad_i16_i4(i16 %x) nounwind {
367 ; CHECK-LABEL: add_ultcmp_bad_i16_i4:
368 ; CHECK: // %bb.0:
369 ; CHECK-NEXT: add w8, w0, #8
370 ; CHECK-NEXT: tst w8, #0xfff0
371 ; CHECK-NEXT: cset w0, eq
372 ; CHECK-NEXT: ret
373 %tmp0 = add i16 %x, 8 ; 1U << (4-1)
374 %tmp1 = icmp ult i16 %tmp0, 16 ; 1U << 4
375 ret i1 %tmp1
376 }
378 ; Bad storage type
379 define i1 @add_ultcmp_bad_i24_i8(i24 %x) nounwind {
380 ; CHECK-LABEL: add_ultcmp_bad_i24_i8:
381 ; CHECK: // %bb.0:
382 ; CHECK-NEXT: add w8, w0, #128
383 ; CHECK-NEXT: tst w8, #0xffff00
384 ; CHECK-NEXT: cset w0, eq
385 ; CHECK-NEXT: ret
386 %tmp0 = add i24 %x, 128 ; 1U << (8-1)
387 %tmp1 = icmp ult i24 %tmp0, 256 ; 1U << 8
388 ret i1 %tmp1
389 }
391 define i1 @add_ulecmp_bad_i16_i8(i16 %x) nounwind {
392 ; CHECK-LABEL: add_ulecmp_bad_i16_i8:
393 ; CHECK: // %bb.0:
394 ; CHECK-NEXT: mov w0, #1 // =0x1
395 ; CHECK-NEXT: ret
396 %tmp0 = add i16 %x, 128 ; 1U << (8-1)
397 %tmp1 = icmp ule i16 %tmp0, -1 ; when we +1 it, it will wrap to 0
398 ret i1 %tmp1
399 }