1 ; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
3 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
5 ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
6 ; CHECK-NEXT: __LLVM_StackMaps:
10 ; CHECK-NEXT: .short 0
18 ; Functions and stack size
19 ; CHECK-NEXT: .quad _stackmap_liveness
20 ; CHECK-NEXT: .quad 16
22 ; Test that the return register is recognized as an live-out.
23 define i64 @stackmap_liveness(i1 %c) {
24 ; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness
25 ; CHECK-NEXT: .short 0
26 ; CHECK-NEXT: .short 0
28 ; CHECK-NEXT: .p2align 3
29 ; CHECK-NEXT: .short 0
30 ; Num LiveOut Entries: 20
31 ; CHECK-NEXT: .short 20
33 ; CHECK-NEXT: .short 0
37 ; CHECK-NEXT: .short 19
41 ; CHECK-NEXT: .short 20
45 ; CHECK-NEXT: .short 21
49 ; CHECK-NEXT: .short 22
53 ; CHECK-NEXT: .short 23
57 ; CHECK-NEXT: .short 24
61 ; CHECK-NEXT: .short 25
65 ; CHECK-NEXT: .short 26
69 ; CHECK-NEXT: .short 27
73 ; CHECK-NEXT: .short 28
76 ; LiveOut Entry 12: SP
77 ; CHECK-NEXT: .short 31
81 ; CHECK-NEXT: .short 72
85 ; CHECK-NEXT: .short 73
89 ; CHECK-NEXT: .short 74
93 ; CHECK-NEXT: .short 75
97 ; CHECK-NEXT: .short 76
101 ; CHECK-NEXT: .short 77
102 ; CHECK-NEXT: .byte 0
103 ; CHECK-NEXT: .byte 8
105 ; CHECK-NEXT: .short 78
106 ; CHECK-NEXT: .byte 0
107 ; CHECK-NEXT: .byte 8
109 ; CHECK-NEXT: .short 79
110 ; CHECK-NEXT: .byte 0
111 ; CHECK-NEXT: .byte 8
113 ; CHECK-NEXT: .p2align 3
114 %1 = select i1 %c, i64 1, i64 2
115 call anyregcc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, ptr null, i32 0)
119 declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)