1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
8 define <vscale x 16 x i8> @ld1b_upper_bound(<vscale x 16 x i1> %pg, ptr %a) {
9 ; CHECK-LABEL: ld1b_upper_bound:
11 ; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, #7, mul vl]
13 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 7
14 %base_scalar = bitcast ptr %base to ptr
15 %load = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pg, ptr %base_scalar)
16 ret <vscale x 16 x i8> %load
19 define <vscale x 16 x i8> @ld1b_inbound(<vscale x 16 x i1> %pg, ptr %a) {
20 ; CHECK-LABEL: ld1b_inbound:
22 ; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, #1, mul vl]
24 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 1
25 %base_scalar = bitcast ptr %base to ptr
26 %load = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pg, ptr %base_scalar)
27 ret <vscale x 16 x i8> %load
30 define <vscale x 4 x i32> @ld1b_s_inbound(<vscale x 4 x i1> %pg, ptr %a) {
31 ; CHECK-LABEL: ld1b_s_inbound:
33 ; CHECK-NEXT: ld1b { z0.s }, p0/z, [x0, #7, mul vl]
35 %base = getelementptr <vscale x 4 x i8>, ptr %a, i64 7
36 %base_scalar = bitcast ptr %base to ptr
37 %load = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.nxv4i8(<vscale x 4 x i1> %pg, ptr %base_scalar)
38 %res = zext <vscale x 4 x i8> %load to <vscale x 4 x i32>
39 ret <vscale x 4 x i32> %res
42 define <vscale x 4 x i32> @ld1sb_s_inbound(<vscale x 4 x i1> %pg, ptr %a) {
43 ; CHECK-LABEL: ld1sb_s_inbound:
45 ; CHECK-NEXT: ld1sb { z0.s }, p0/z, [x0, #7, mul vl]
47 %base = getelementptr <vscale x 4 x i8>, ptr %a, i64 7
48 %base_scalar = bitcast ptr %base to ptr
49 %load = call <vscale x 4 x i8> @llvm.aarch64.sve.ld1.nxv4i8(<vscale x 4 x i1> %pg, ptr %base_scalar)
50 %res = sext <vscale x 4 x i8> %load to <vscale x 4 x i32>
51 ret <vscale x 4 x i32> %res
54 define <vscale x 16 x i8> @ld1b_lower_bound(<vscale x 16 x i1> %pg, ptr %a) {
55 ; CHECK-LABEL: ld1b_lower_bound:
57 ; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, #-8, mul vl]
59 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 -8
60 %base_scalar = bitcast ptr %base to ptr
61 %load = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pg, ptr %base_scalar)
62 ret <vscale x 16 x i8> %load
65 define <vscale x 16 x i8> @ld1b_out_of_upper_bound(<vscale x 16 x i1> %pg, ptr %a) {
66 ; CHECK-LABEL: ld1b_out_of_upper_bound:
68 ; CHECK-NEXT: rdvl x8, #8
69 ; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, x8]
71 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 8
72 %base_scalar = bitcast ptr %base to ptr
73 %load = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pg, ptr %base_scalar)
74 ret <vscale x 16 x i8> %load
77 define <vscale x 16 x i8> @ld1b_out_of_lower_bound(<vscale x 16 x i1> %pg, ptr %a) {
78 ; CHECK-LABEL: ld1b_out_of_lower_bound:
80 ; CHECK-NEXT: rdvl x8, #-9
81 ; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, x8]
83 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 -9
84 %base_scalar = bitcast ptr %base to ptr
85 %load = call <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1> %pg, ptr %base_scalar)
86 ret <vscale x 16 x i8> %load
93 define <vscale x 8 x i16> @ld1b_h_inbound(<vscale x 8 x i1> %pg, ptr %a) {
94 ; CHECK-LABEL: ld1b_h_inbound:
96 ; CHECK-NEXT: ld1b { z0.h }, p0/z, [x0, #7, mul vl]
98 %base = getelementptr <vscale x 8 x i8>, ptr %a, i64 7
99 %base_scalar = bitcast ptr %base to ptr
100 %load = call <vscale x 8 x i8> @llvm.aarch64.sve.ld1.nxv8i8(<vscale x 8 x i1> %pg, ptr %base_scalar)
101 %res = zext <vscale x 8 x i8> %load to <vscale x 8 x i16>
102 ret <vscale x 8 x i16> %res
105 define <vscale x 8 x i16> @ld1sb_h_inbound(<vscale x 8 x i1> %pg, ptr %a) {
106 ; CHECK-LABEL: ld1sb_h_inbound:
108 ; CHECK-NEXT: ld1sb { z0.h }, p0/z, [x0, #7, mul vl]
110 %base = getelementptr <vscale x 8 x i8>, ptr %a, i64 7
111 %base_scalar = bitcast ptr %base to ptr
112 %load = call <vscale x 8 x i8> @llvm.aarch64.sve.ld1.nxv8i8(<vscale x 8 x i1> %pg, ptr %base_scalar)
113 %res = sext <vscale x 8 x i8> %load to <vscale x 8 x i16>
114 ret <vscale x 8 x i16> %res
117 define <vscale x 8 x i16> @ld1h_inbound(<vscale x 8 x i1> %pg, ptr %a) {
118 ; CHECK-LABEL: ld1h_inbound:
120 ; CHECK-NEXT: ld1h { z0.h }, p0/z, [x0, #1, mul vl]
122 %base = getelementptr <vscale x 8 x i16>, ptr %a, i64 1
123 %base_scalar = bitcast ptr %base to ptr
124 %load = call <vscale x 8 x i16> @llvm.aarch64.sve.ld1.nxv8i16(<vscale x 8 x i1> %pg, ptr %base_scalar)
125 ret <vscale x 8 x i16> %load
128 define <vscale x 4 x i32> @ld1h_s_inbound(<vscale x 4 x i1> %pg, ptr %a) {
129 ; CHECK-LABEL: ld1h_s_inbound:
131 ; CHECK-NEXT: ld1h { z0.s }, p0/z, [x0, #7, mul vl]
133 %base = getelementptr <vscale x 4 x i16>, ptr %a, i64 7
134 %base_scalar = bitcast ptr %base to ptr
135 %load = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.nxv4i16(<vscale x 4 x i1> %pg, ptr %base_scalar)
136 %res = zext <vscale x 4 x i16> %load to <vscale x 4 x i32>
137 ret <vscale x 4 x i32> %res
140 define <vscale x 4 x i32> @ld1sh_s_inbound(<vscale x 4 x i1> %pg, ptr %a) {
141 ; CHECK-LABEL: ld1sh_s_inbound:
143 ; CHECK-NEXT: ld1sh { z0.s }, p0/z, [x0, #7, mul vl]
145 %base = getelementptr <vscale x 4 x i16>, ptr %a, i64 7
146 %base_scalar = bitcast ptr %base to ptr
147 %load = call <vscale x 4 x i16> @llvm.aarch64.sve.ld1.nxv4i16(<vscale x 4 x i1> %pg, ptr %base_scalar)
148 %res = sext <vscale x 4 x i16> %load to <vscale x 4 x i32>
149 ret <vscale x 4 x i32> %res
152 define <vscale x 2 x i64> @ld1b_d_inbound(<vscale x 2 x i1> %pg, ptr %a) {
153 ; CHECK-LABEL: ld1b_d_inbound:
155 ; CHECK-NEXT: ld1b { z0.d }, p0/z, [x0, #7, mul vl]
157 %base = getelementptr <vscale x 2 x i8>, ptr %a, i64 7
158 %base_scalar = bitcast ptr %base to ptr
159 %load = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.nxv2i8(<vscale x 2 x i1> %pg, ptr %base_scalar)
160 %res = zext <vscale x 2 x i8> %load to <vscale x 2 x i64>
161 ret <vscale x 2 x i64> %res
164 define <vscale x 2 x i64> @ld1sb_d_inbound(<vscale x 2 x i1> %pg, ptr %a) {
165 ; CHECK-LABEL: ld1sb_d_inbound:
167 ; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0, #7, mul vl]
169 %base = getelementptr <vscale x 2 x i8>, ptr %a, i64 7
170 %base_scalar = bitcast ptr %base to ptr
171 %load = call <vscale x 2 x i8> @llvm.aarch64.sve.ld1.nxv2i8(<vscale x 2 x i1> %pg, ptr %base_scalar)
172 %res = sext <vscale x 2 x i8> %load to <vscale x 2 x i64>
173 ret <vscale x 2 x i64> %res
176 define <vscale x 2 x i64> @ld1h_d_inbound(<vscale x 2 x i1> %pg, ptr %a) {
177 ; CHECK-LABEL: ld1h_d_inbound:
179 ; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, #7, mul vl]
181 %base = getelementptr <vscale x 2 x i16>, ptr %a, i64 7
182 %base_scalar = bitcast ptr %base to ptr
183 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.nxv2i16(<vscale x 2 x i1> %pg, ptr %base_scalar)
184 %res = zext <vscale x 2 x i16> %load to <vscale x 2 x i64>
185 ret <vscale x 2 x i64> %res
188 define <vscale x 2 x i64> @ld1sh_d_inbound(<vscale x 2 x i1> %pg, ptr %a) {
189 ; CHECK-LABEL: ld1sh_d_inbound:
191 ; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x0, #7, mul vl]
193 %base = getelementptr <vscale x 2 x i16>, ptr %a, i64 7
194 %base_scalar = bitcast ptr %base to ptr
195 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ld1.nxv2i16(<vscale x 2 x i1> %pg, ptr %base_scalar)
196 %res = sext <vscale x 2 x i16> %load to <vscale x 2 x i64>
197 ret <vscale x 2 x i64> %res
200 define <vscale x 8 x half> @ld1h_f16_inbound(<vscale x 8 x i1> %pg, ptr %a) {
201 ; CHECK-LABEL: ld1h_f16_inbound:
203 ; CHECK-NEXT: ld1h { z0.h }, p0/z, [x0, #1, mul vl]
205 %base = getelementptr <vscale x 8 x half>, ptr %a, i64 1
206 %base_scalar = bitcast ptr %base to ptr
207 %load = call <vscale x 8 x half> @llvm.aarch64.sve.ld1.nxv8f16(<vscale x 8 x i1> %pg, ptr %base_scalar)
208 ret <vscale x 8 x half> %load
211 define <vscale x 8 x bfloat> @ld1h_bf16_inbound(<vscale x 8 x i1> %pg, ptr %a) #0 {
212 ; CHECK-LABEL: ld1h_bf16_inbound:
214 ; CHECK-NEXT: ld1h { z0.h }, p0/z, [x0, #1, mul vl]
216 %base = getelementptr <vscale x 8 x bfloat>, ptr %a, i64 1
217 %base_scalar = bitcast ptr %base to ptr
218 %load = call <vscale x 8 x bfloat> @llvm.aarch64.sve.ld1.nxv8bf16(<vscale x 8 x i1> %pg, ptr %base_scalar)
219 ret <vscale x 8 x bfloat> %load
226 define <vscale x 4 x i32> @ld1w_inbound(<vscale x 4 x i1> %pg, ptr %a) {
227 ; CHECK-LABEL: ld1w_inbound:
229 ; CHECK-NEXT: ld1w { z0.s }, p0/z, [x0, #7, mul vl]
231 %base = getelementptr <vscale x 4 x i32>, ptr %a, i64 7
232 %base_scalar = bitcast ptr %base to ptr
233 %load = call <vscale x 4 x i32> @llvm.aarch64.sve.ld1.nxv4i32(<vscale x 4 x i1> %pg, ptr %base_scalar)
234 ret <vscale x 4 x i32> %load
237 define <vscale x 4 x float> @ld1w_f32_inbound(<vscale x 4 x i1> %pg, ptr %a) {
238 ; CHECK-LABEL: ld1w_f32_inbound:
240 ; CHECK-NEXT: ld1w { z0.s }, p0/z, [x0, #7, mul vl]
242 %base = getelementptr <vscale x 4 x float>, ptr %a, i64 7
243 %base_scalar = bitcast ptr %base to ptr
244 %load = call <vscale x 4 x float> @llvm.aarch64.sve.ld1.nxv4f32(<vscale x 4 x i1> %pg, ptr %base_scalar)
245 ret <vscale x 4 x float> %load
252 define <vscale x 2 x i64> @ld1d_inbound(<vscale x 2 x i1> %pg, ptr %a) {
253 ; CHECK-LABEL: ld1d_inbound:
255 ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, #1, mul vl]
257 %base = getelementptr <vscale x 2 x i64>, ptr %a, i64 1
258 %base_scalar = bitcast ptr %base to ptr
259 %load = call <vscale x 2 x i64> @llvm.aarch64.sve.ld1.nxv2i64(<vscale x 2 x i1> %pg, ptr %base_scalar)
260 ret <vscale x 2 x i64> %load
263 define <vscale x 2 x i64> @ld1w_d_inbound(<vscale x 2 x i1> %pg, ptr %a) {
264 ; CHECK-LABEL: ld1w_d_inbound:
266 ; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0, #7, mul vl]
268 %base = getelementptr <vscale x 2 x i32>, ptr %a, i64 7
269 %base_scalar = bitcast ptr %base to ptr
270 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.nxv2i32(<vscale x 2 x i1> %pg, ptr %base_scalar)
271 %res = zext <vscale x 2 x i32> %load to <vscale x 2 x i64>
272 ret <vscale x 2 x i64> %res
275 define <vscale x 2 x i64> @ld1sw_d_inbound(<vscale x 2 x i1> %pg, ptr %a) {
276 ; CHECK-LABEL: ld1sw_d_inbound:
278 ; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x0, #7, mul vl]
280 %base = getelementptr <vscale x 2 x i32>, ptr %a, i64 7
281 %base_scalar = bitcast ptr %base to ptr
282 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ld1.nxv2i32(<vscale x 2 x i1> %pg, ptr %base_scalar)
283 %res = sext <vscale x 2 x i32> %load to <vscale x 2 x i64>
284 ret <vscale x 2 x i64> %res
287 define <vscale x 2 x double> @ld1d_f64_inbound(<vscale x 2 x i1> %pg, ptr %a) {
288 ; CHECK-LABEL: ld1d_f64_inbound:
290 ; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, #1, mul vl]
292 %base = getelementptr <vscale x 2 x double>, ptr %a, i64 1
293 %base_scalar = bitcast ptr %base to ptr
294 %load = call <vscale x 2 x double> @llvm.aarch64.sve.ld1.nxv2f64(<vscale x 2 x i1> %pg, ptr %base_scalar)
295 ret <vscale x 2 x double> %load
298 declare <vscale x 16 x i8> @llvm.aarch64.sve.ld1.nxv16i8(<vscale x 16 x i1>, ptr)
300 declare <vscale x 8 x i8> @llvm.aarch64.sve.ld1.nxv8i8(<vscale x 8 x i1>, ptr)
301 declare <vscale x 8 x i16> @llvm.aarch64.sve.ld1.nxv8i16(<vscale x 8 x i1>, ptr)
302 declare <vscale x 8 x half> @llvm.aarch64.sve.ld1.nxv8f16(<vscale x 8 x i1>, ptr)
303 declare <vscale x 8 x bfloat> @llvm.aarch64.sve.ld1.nxv8bf16(<vscale x 8 x i1>, ptr)
305 declare <vscale x 4 x i8> @llvm.aarch64.sve.ld1.nxv4i8(<vscale x 4 x i1>, ptr)
306 declare <vscale x 4 x i16> @llvm.aarch64.sve.ld1.nxv4i16(<vscale x 4 x i1>, ptr)
307 declare <vscale x 4 x i32> @llvm.aarch64.sve.ld1.nxv4i32(<vscale x 4 x i1>, ptr)
308 declare <vscale x 4 x float> @llvm.aarch64.sve.ld1.nxv4f32(<vscale x 4 x i1>, ptr)
310 declare <vscale x 2 x i8> @llvm.aarch64.sve.ld1.nxv2i8(<vscale x 2 x i1>, ptr)
311 declare <vscale x 2 x i16> @llvm.aarch64.sve.ld1.nxv2i16(<vscale x 2 x i1>, ptr)
312 declare <vscale x 2 x i32> @llvm.aarch64.sve.ld1.nxv2i32(<vscale x 2 x i1>, ptr)
313 declare <vscale x 2 x i64> @llvm.aarch64.sve.ld1.nxv2i64(<vscale x 2 x i1>, ptr)
314 declare <vscale x 2 x double> @llvm.aarch64.sve.ld1.nxv2f64(<vscale x 2 x i1>, ptr)
316 ; +bf16 is required for the bfloat version.
317 attributes #0 = { "target-features"="+sve,+bf16" }