[llvm-project.git] / llvm / test / CodeGen / AArch64 / sve-streaming-mode-fixed-length-int-minmax.ll
| blob | 1bca7dd09d9b7a76ada45540672c7e2f8abda1fb |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s
3 ; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s
4 ; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE
6 target triple = "aarch64-unknown-linux-gnu"
8 ;
9 ; SMAX
10 ;
12 define <8 x i8> @smax_v8i8(<8 x i8> %op1, <8 x i8> %op2) {
13 ; CHECK-LABEL: smax_v8i8:
14 ; CHECK: // %bb.0:
15 ; CHECK-NEXT: ptrue p0.b, vl8
16 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
17 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
18 ; CHECK-NEXT: smax z0.b, p0/m, z0.b, z1.b
19 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
20 ; CHECK-NEXT: ret
21 ;
22 ; NONEON-NOSVE-LABEL: smax_v8i8:
23 ; NONEON-NOSVE: // %bb.0:
24 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
25 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
26 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
27 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #23]
28 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]
29 ; NONEON-NOSVE-NEXT: cmp w9, w8
30 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
31 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #14]
32 ; NONEON-NOSVE-NEXT: strb w8, [sp, #31]
33 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #22]
34 ; NONEON-NOSVE-NEXT: cmp w9, w8
35 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
36 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]
37 ; NONEON-NOSVE-NEXT: strb w8, [sp, #30]
38 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #21]
39 ; NONEON-NOSVE-NEXT: cmp w9, w8
40 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
41 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #12]
42 ; NONEON-NOSVE-NEXT: strb w8, [sp, #29]
43 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #20]
44 ; NONEON-NOSVE-NEXT: cmp w9, w8
45 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
46 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]
47 ; NONEON-NOSVE-NEXT: strb w8, [sp, #28]
48 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #19]
49 ; NONEON-NOSVE-NEXT: cmp w9, w8
50 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
51 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #10]
52 ; NONEON-NOSVE-NEXT: strb w8, [sp, #27]
53 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #18]
54 ; NONEON-NOSVE-NEXT: cmp w9, w8
55 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
56 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]
57 ; NONEON-NOSVE-NEXT: strb w8, [sp, #26]
58 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]
59 ; NONEON-NOSVE-NEXT: cmp w9, w8
60 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
61 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]
62 ; NONEON-NOSVE-NEXT: strb w8, [sp, #25]
63 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #16]
64 ; NONEON-NOSVE-NEXT: cmp w9, w8
65 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
66 ; NONEON-NOSVE-NEXT: strb w8, [sp, #24]
67 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
68 ; NONEON-NOSVE-NEXT: add sp, sp, #32
69 ; NONEON-NOSVE-NEXT: ret
70 %res = call <8 x i8> @llvm.smax.v8i8(<8 x i8> %op1, <8 x i8> %op2)
71 ret <8 x i8> %res
72 }
74 define <16 x i8> @smax_v16i8(<16 x i8> %op1, <16 x i8> %op2) {
75 ; CHECK-LABEL: smax_v16i8:
76 ; CHECK: // %bb.0:
77 ; CHECK-NEXT: ptrue p0.b, vl16
78 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
79 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
80 ; CHECK-NEXT: smax z0.b, p0/m, z0.b, z1.b
81 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
82 ; CHECK-NEXT: ret
83 ;
84 ; NONEON-NOSVE-LABEL: smax_v16i8:
85 ; NONEON-NOSVE: // %bb.0:
86 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
87 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
88 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #31]
89 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]
90 ; NONEON-NOSVE-NEXT: cmp w9, w8
91 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
92 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #14]
93 ; NONEON-NOSVE-NEXT: strb w8, [sp, #47]
94 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #30]
95 ; NONEON-NOSVE-NEXT: cmp w9, w8
96 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
97 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]
98 ; NONEON-NOSVE-NEXT: strb w8, [sp, #46]
99 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #29]
100 ; NONEON-NOSVE-NEXT: cmp w9, w8
101 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
102 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #12]
103 ; NONEON-NOSVE-NEXT: strb w8, [sp, #45]
104 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #28]
105 ; NONEON-NOSVE-NEXT: cmp w9, w8
106 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
107 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]
108 ; NONEON-NOSVE-NEXT: strb w8, [sp, #44]
109 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #27]
110 ; NONEON-NOSVE-NEXT: cmp w9, w8
111 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
112 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #10]
113 ; NONEON-NOSVE-NEXT: strb w8, [sp, #43]
114 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #26]
115 ; NONEON-NOSVE-NEXT: cmp w9, w8
116 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
117 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]
118 ; NONEON-NOSVE-NEXT: strb w8, [sp, #42]
119 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #25]
120 ; NONEON-NOSVE-NEXT: cmp w9, w8
121 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
122 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]
123 ; NONEON-NOSVE-NEXT: strb w8, [sp, #41]
124 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #24]
125 ; NONEON-NOSVE-NEXT: cmp w9, w8
126 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
127 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #7]
128 ; NONEON-NOSVE-NEXT: strb w8, [sp, #40]
129 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #23]
130 ; NONEON-NOSVE-NEXT: cmp w9, w8
131 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
132 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #6]
133 ; NONEON-NOSVE-NEXT: strb w8, [sp, #39]
134 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #22]
135 ; NONEON-NOSVE-NEXT: cmp w9, w8
136 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
137 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #5]
138 ; NONEON-NOSVE-NEXT: strb w8, [sp, #38]
139 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #21]
140 ; NONEON-NOSVE-NEXT: cmp w9, w8
141 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
142 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #4]
143 ; NONEON-NOSVE-NEXT: strb w8, [sp, #37]
144 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #20]
145 ; NONEON-NOSVE-NEXT: cmp w9, w8
146 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
147 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #3]
148 ; NONEON-NOSVE-NEXT: strb w8, [sp, #36]
149 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #19]
150 ; NONEON-NOSVE-NEXT: cmp w9, w8
151 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
152 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #2]
153 ; NONEON-NOSVE-NEXT: strb w8, [sp, #35]
154 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #18]
155 ; NONEON-NOSVE-NEXT: cmp w9, w8
156 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
157 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #1]
158 ; NONEON-NOSVE-NEXT: strb w8, [sp, #34]
159 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]
160 ; NONEON-NOSVE-NEXT: cmp w9, w8
161 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
162 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp]
163 ; NONEON-NOSVE-NEXT: strb w8, [sp, #33]
164 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #16]
165 ; NONEON-NOSVE-NEXT: cmp w9, w8
166 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
167 ; NONEON-NOSVE-NEXT: strb w8, [sp, #32]
168 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
169 ; NONEON-NOSVE-NEXT: add sp, sp, #48
170 ; NONEON-NOSVE-NEXT: ret
171 %res = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %op1, <16 x i8> %op2)
172 ret <16 x i8> %res
173 }
175 define void @smax_v32i8(ptr %a, ptr %b) {
176 ; CHECK-LABEL: smax_v32i8:
177 ; CHECK: // %bb.0:
178 ; CHECK-NEXT: ldp q0, q3, [x1]
179 ; CHECK-NEXT: ptrue p0.b, vl16
180 ; CHECK-NEXT: ldp q1, q2, [x0]
181 ; CHECK-NEXT: smax z0.b, p0/m, z0.b, z1.b
182 ; CHECK-NEXT: movprfx z1, z2
183 ; CHECK-NEXT: smax z1.b, p0/m, z1.b, z3.b
184 ; CHECK-NEXT: stp q0, q1, [x0]
185 ; CHECK-NEXT: ret
186 ;
187 ; NONEON-NOSVE-LABEL: smax_v32i8:
188 ; NONEON-NOSVE: // %bb.0:
189 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
190 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
191 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
192 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
193 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
194 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
195 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #63]
196 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #47]
197 ; NONEON-NOSVE-NEXT: cmp w9, w8
198 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
199 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #46]
200 ; NONEON-NOSVE-NEXT: strb w8, [sp, #95]
201 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #62]
202 ; NONEON-NOSVE-NEXT: cmp w9, w8
203 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
204 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #45]
205 ; NONEON-NOSVE-NEXT: strb w8, [sp, #94]
206 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #61]
207 ; NONEON-NOSVE-NEXT: cmp w9, w8
208 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
209 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #44]
210 ; NONEON-NOSVE-NEXT: strb w8, [sp, #93]
211 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #60]
212 ; NONEON-NOSVE-NEXT: cmp w9, w8
213 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
214 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #43]
215 ; NONEON-NOSVE-NEXT: strb w8, [sp, #92]
216 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #59]
217 ; NONEON-NOSVE-NEXT: cmp w9, w8
218 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
219 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #42]
220 ; NONEON-NOSVE-NEXT: strb w8, [sp, #91]
221 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #58]
222 ; NONEON-NOSVE-NEXT: cmp w9, w8
223 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
224 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #41]
225 ; NONEON-NOSVE-NEXT: strb w8, [sp, #90]
226 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #57]
227 ; NONEON-NOSVE-NEXT: cmp w9, w8
228 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
229 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #40]
230 ; NONEON-NOSVE-NEXT: strb w8, [sp, #89]
231 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #56]
232 ; NONEON-NOSVE-NEXT: cmp w9, w8
233 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
234 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #39]
235 ; NONEON-NOSVE-NEXT: strb w8, [sp, #88]
236 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #55]
237 ; NONEON-NOSVE-NEXT: cmp w9, w8
238 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
239 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #38]
240 ; NONEON-NOSVE-NEXT: strb w8, [sp, #87]
241 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #54]
242 ; NONEON-NOSVE-NEXT: cmp w9, w8
243 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
244 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #37]
245 ; NONEON-NOSVE-NEXT: strb w8, [sp, #86]
246 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #53]
247 ; NONEON-NOSVE-NEXT: cmp w9, w8
248 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
249 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #36]
250 ; NONEON-NOSVE-NEXT: strb w8, [sp, #85]
251 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #52]
252 ; NONEON-NOSVE-NEXT: cmp w9, w8
253 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
254 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #35]
255 ; NONEON-NOSVE-NEXT: strb w8, [sp, #84]
256 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #51]
257 ; NONEON-NOSVE-NEXT: cmp w9, w8
258 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
259 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #34]
260 ; NONEON-NOSVE-NEXT: strb w8, [sp, #83]
261 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #50]
262 ; NONEON-NOSVE-NEXT: cmp w9, w8
263 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
264 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #33]
265 ; NONEON-NOSVE-NEXT: strb w8, [sp, #82]
266 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #49]
267 ; NONEON-NOSVE-NEXT: cmp w9, w8
268 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
269 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #32]
270 ; NONEON-NOSVE-NEXT: strb w8, [sp, #81]
271 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #48]
272 ; NONEON-NOSVE-NEXT: cmp w9, w8
273 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
274 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]
275 ; NONEON-NOSVE-NEXT: strb w8, [sp, #80]
276 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #31]
277 ; NONEON-NOSVE-NEXT: cmp w9, w8
278 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
279 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #14]
280 ; NONEON-NOSVE-NEXT: strb w8, [sp, #79]
281 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #30]
282 ; NONEON-NOSVE-NEXT: cmp w9, w8
283 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
284 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]
285 ; NONEON-NOSVE-NEXT: strb w8, [sp, #78]
286 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #29]
287 ; NONEON-NOSVE-NEXT: cmp w9, w8
288 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
289 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #12]
290 ; NONEON-NOSVE-NEXT: strb w8, [sp, #77]
291 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #28]
292 ; NONEON-NOSVE-NEXT: cmp w9, w8
293 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
294 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]
295 ; NONEON-NOSVE-NEXT: strb w8, [sp, #76]
296 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #27]
297 ; NONEON-NOSVE-NEXT: cmp w9, w8
298 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
299 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #10]
300 ; NONEON-NOSVE-NEXT: strb w8, [sp, #75]
301 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #26]
302 ; NONEON-NOSVE-NEXT: cmp w9, w8
303 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
304 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]
305 ; NONEON-NOSVE-NEXT: strb w8, [sp, #74]
306 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #25]
307 ; NONEON-NOSVE-NEXT: cmp w9, w8
308 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
309 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]
310 ; NONEON-NOSVE-NEXT: strb w8, [sp, #73]
311 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #24]
312 ; NONEON-NOSVE-NEXT: cmp w9, w8
313 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
314 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #7]
315 ; NONEON-NOSVE-NEXT: strb w8, [sp, #72]
316 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #23]
317 ; NONEON-NOSVE-NEXT: cmp w9, w8
318 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
319 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #6]
320 ; NONEON-NOSVE-NEXT: strb w8, [sp, #71]
321 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #22]
322 ; NONEON-NOSVE-NEXT: cmp w9, w8
323 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
324 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #5]
325 ; NONEON-NOSVE-NEXT: strb w8, [sp, #70]
326 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #21]
327 ; NONEON-NOSVE-NEXT: cmp w9, w8
328 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
329 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #4]
330 ; NONEON-NOSVE-NEXT: strb w8, [sp, #69]
331 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #20]
332 ; NONEON-NOSVE-NEXT: cmp w9, w8
333 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
334 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #3]
335 ; NONEON-NOSVE-NEXT: strb w8, [sp, #68]
336 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #19]
337 ; NONEON-NOSVE-NEXT: cmp w9, w8
338 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
339 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #2]
340 ; NONEON-NOSVE-NEXT: strb w8, [sp, #67]
341 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #18]
342 ; NONEON-NOSVE-NEXT: cmp w9, w8
343 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
344 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #1]
345 ; NONEON-NOSVE-NEXT: strb w8, [sp, #66]
346 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]
347 ; NONEON-NOSVE-NEXT: cmp w9, w8
348 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
349 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp]
350 ; NONEON-NOSVE-NEXT: strb w8, [sp, #65]
351 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #16]
352 ; NONEON-NOSVE-NEXT: cmp w9, w8
353 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
354 ; NONEON-NOSVE-NEXT: strb w8, [sp, #64]
355 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
356 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
357 ; NONEON-NOSVE-NEXT: add sp, sp, #96
358 ; NONEON-NOSVE-NEXT: ret
359 %op1 = load <32 x i8>, ptr %a
360 %op2 = load <32 x i8>, ptr %b
361 %res = call <32 x i8> @llvm.smax.v32i8(<32 x i8> %op1, <32 x i8> %op2)
362 store <32 x i8> %res, ptr %a
363 ret void
364 }
366 define <4 x i16> @smax_v4i16(<4 x i16> %op1, <4 x i16> %op2) {
367 ; CHECK-LABEL: smax_v4i16:
368 ; CHECK: // %bb.0:
369 ; CHECK-NEXT: ptrue p0.h, vl4
370 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
371 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
372 ; CHECK-NEXT: smax z0.h, p0/m, z0.h, z1.h
373 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
374 ; CHECK-NEXT: ret
375 ;
376 ; NONEON-NOSVE-LABEL: smax_v4i16:
377 ; NONEON-NOSVE: // %bb.0:
378 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
379 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
380 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
381 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #22]
382 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]
383 ; NONEON-NOSVE-NEXT: cmp w9, w8
384 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
385 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #12]
386 ; NONEON-NOSVE-NEXT: strh w8, [sp, #30]
387 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #20]
388 ; NONEON-NOSVE-NEXT: cmp w9, w8
389 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
390 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]
391 ; NONEON-NOSVE-NEXT: strh w8, [sp, #28]
392 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]
393 ; NONEON-NOSVE-NEXT: cmp w9, w8
394 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
395 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]
396 ; NONEON-NOSVE-NEXT: strh w8, [sp, #26]
397 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #16]
398 ; NONEON-NOSVE-NEXT: cmp w9, w8
399 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
400 ; NONEON-NOSVE-NEXT: strh w8, [sp, #24]
401 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
402 ; NONEON-NOSVE-NEXT: add sp, sp, #32
403 ; NONEON-NOSVE-NEXT: ret
404 %res = call <4 x i16> @llvm.smax.v4i16(<4 x i16> %op1, <4 x i16> %op2)
405 ret <4 x i16> %res
406 }
408 define <8 x i16> @smax_v8i16(<8 x i16> %op1, <8 x i16> %op2) {
409 ; CHECK-LABEL: smax_v8i16:
410 ; CHECK: // %bb.0:
411 ; CHECK-NEXT: ptrue p0.h, vl8
412 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
413 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
414 ; CHECK-NEXT: smax z0.h, p0/m, z0.h, z1.h
415 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
416 ; CHECK-NEXT: ret
417 ;
418 ; NONEON-NOSVE-LABEL: smax_v8i16:
419 ; NONEON-NOSVE: // %bb.0:
420 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
421 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
422 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #30]
423 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]
424 ; NONEON-NOSVE-NEXT: cmp w9, w8
425 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
426 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #12]
427 ; NONEON-NOSVE-NEXT: strh w8, [sp, #46]
428 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #28]
429 ; NONEON-NOSVE-NEXT: cmp w9, w8
430 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
431 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]
432 ; NONEON-NOSVE-NEXT: strh w8, [sp, #44]
433 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #26]
434 ; NONEON-NOSVE-NEXT: cmp w9, w8
435 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
436 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]
437 ; NONEON-NOSVE-NEXT: strh w8, [sp, #42]
438 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #24]
439 ; NONEON-NOSVE-NEXT: cmp w9, w8
440 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
441 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #6]
442 ; NONEON-NOSVE-NEXT: strh w8, [sp, #40]
443 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #22]
444 ; NONEON-NOSVE-NEXT: cmp w9, w8
445 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
446 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #4]
447 ; NONEON-NOSVE-NEXT: strh w8, [sp, #38]
448 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #20]
449 ; NONEON-NOSVE-NEXT: cmp w9, w8
450 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
451 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #2]
452 ; NONEON-NOSVE-NEXT: strh w8, [sp, #36]
453 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]
454 ; NONEON-NOSVE-NEXT: cmp w9, w8
455 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
456 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp]
457 ; NONEON-NOSVE-NEXT: strh w8, [sp, #34]
458 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #16]
459 ; NONEON-NOSVE-NEXT: cmp w9, w8
460 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
461 ; NONEON-NOSVE-NEXT: strh w8, [sp, #32]
462 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
463 ; NONEON-NOSVE-NEXT: add sp, sp, #48
464 ; NONEON-NOSVE-NEXT: ret
465 %res = call <8 x i16> @llvm.smax.v8i16(<8 x i16> %op1, <8 x i16> %op2)
466 ret <8 x i16> %res
467 }
469 define void @smax_v16i16(ptr %a, ptr %b) {
470 ; CHECK-LABEL: smax_v16i16:
471 ; CHECK: // %bb.0:
472 ; CHECK-NEXT: ldp q0, q3, [x1]
473 ; CHECK-NEXT: ptrue p0.h, vl8
474 ; CHECK-NEXT: ldp q1, q2, [x0]
475 ; CHECK-NEXT: smax z0.h, p0/m, z0.h, z1.h
476 ; CHECK-NEXT: movprfx z1, z2
477 ; CHECK-NEXT: smax z1.h, p0/m, z1.h, z3.h
478 ; CHECK-NEXT: stp q0, q1, [x0]
479 ; CHECK-NEXT: ret
480 ;
481 ; NONEON-NOSVE-LABEL: smax_v16i16:
482 ; NONEON-NOSVE: // %bb.0:
483 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
484 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
485 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
486 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
487 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
488 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
489 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #62]
490 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #46]
491 ; NONEON-NOSVE-NEXT: cmp w9, w8
492 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
493 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #44]
494 ; NONEON-NOSVE-NEXT: strh w8, [sp, #94]
495 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #60]
496 ; NONEON-NOSVE-NEXT: cmp w9, w8
497 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
498 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #42]
499 ; NONEON-NOSVE-NEXT: strh w8, [sp, #92]
500 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #58]
501 ; NONEON-NOSVE-NEXT: cmp w9, w8
502 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
503 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #40]
504 ; NONEON-NOSVE-NEXT: strh w8, [sp, #90]
505 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #56]
506 ; NONEON-NOSVE-NEXT: cmp w9, w8
507 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
508 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #38]
509 ; NONEON-NOSVE-NEXT: strh w8, [sp, #88]
510 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #54]
511 ; NONEON-NOSVE-NEXT: cmp w9, w8
512 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
513 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #36]
514 ; NONEON-NOSVE-NEXT: strh w8, [sp, #86]
515 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #52]
516 ; NONEON-NOSVE-NEXT: cmp w9, w8
517 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
518 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #34]
519 ; NONEON-NOSVE-NEXT: strh w8, [sp, #84]
520 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #50]
521 ; NONEON-NOSVE-NEXT: cmp w9, w8
522 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
523 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #32]
524 ; NONEON-NOSVE-NEXT: strh w8, [sp, #82]
525 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #48]
526 ; NONEON-NOSVE-NEXT: cmp w9, w8
527 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
528 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]
529 ; NONEON-NOSVE-NEXT: strh w8, [sp, #80]
530 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #30]
531 ; NONEON-NOSVE-NEXT: cmp w9, w8
532 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
533 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #12]
534 ; NONEON-NOSVE-NEXT: strh w8, [sp, #78]
535 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #28]
536 ; NONEON-NOSVE-NEXT: cmp w9, w8
537 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
538 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]
539 ; NONEON-NOSVE-NEXT: strh w8, [sp, #76]
540 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #26]
541 ; NONEON-NOSVE-NEXT: cmp w9, w8
542 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
543 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]
544 ; NONEON-NOSVE-NEXT: strh w8, [sp, #74]
545 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #24]
546 ; NONEON-NOSVE-NEXT: cmp w9, w8
547 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
548 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #6]
549 ; NONEON-NOSVE-NEXT: strh w8, [sp, #72]
550 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #22]
551 ; NONEON-NOSVE-NEXT: cmp w9, w8
552 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
553 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #4]
554 ; NONEON-NOSVE-NEXT: strh w8, [sp, #70]
555 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #20]
556 ; NONEON-NOSVE-NEXT: cmp w9, w8
557 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
558 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #2]
559 ; NONEON-NOSVE-NEXT: strh w8, [sp, #68]
560 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]
561 ; NONEON-NOSVE-NEXT: cmp w9, w8
562 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
563 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp]
564 ; NONEON-NOSVE-NEXT: strh w8, [sp, #66]
565 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #16]
566 ; NONEON-NOSVE-NEXT: cmp w9, w8
567 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
568 ; NONEON-NOSVE-NEXT: strh w8, [sp, #64]
569 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
570 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
571 ; NONEON-NOSVE-NEXT: add sp, sp, #96
572 ; NONEON-NOSVE-NEXT: ret
573 %op1 = load <16 x i16>, ptr %a
574 %op2 = load <16 x i16>, ptr %b
575 %res = call <16 x i16> @llvm.smax.v16i16(<16 x i16> %op1, <16 x i16> %op2)
576 store <16 x i16> %res, ptr %a
577 ret void
578 }
580 define <2 x i32> @smax_v2i32(<2 x i32> %op1, <2 x i32> %op2) {
581 ; CHECK-LABEL: smax_v2i32:
582 ; CHECK: // %bb.0:
583 ; CHECK-NEXT: ptrue p0.s, vl2
584 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
585 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
586 ; CHECK-NEXT: smax z0.s, p0/m, z0.s, z1.s
587 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
588 ; CHECK-NEXT: ret
589 ;
590 ; NONEON-NOSVE-LABEL: smax_v2i32:
591 ; NONEON-NOSVE: // %bb.0:
592 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
593 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
594 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
595 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
596 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
597 ; NONEON-NOSVE-NEXT: cmp w10, w8
598 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, gt
599 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
600 ; NONEON-NOSVE-NEXT: cmp w9, w8
601 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
602 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #24]
603 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
604 ; NONEON-NOSVE-NEXT: add sp, sp, #32
605 ; NONEON-NOSVE-NEXT: ret
606 %res = call <2 x i32> @llvm.smax.v2i32(<2 x i32> %op1, <2 x i32> %op2)
607 ret <2 x i32> %res
608 }
610 define <4 x i32> @smax_v4i32(<4 x i32> %op1, <4 x i32> %op2) {
611 ; CHECK-LABEL: smax_v4i32:
612 ; CHECK: // %bb.0:
613 ; CHECK-NEXT: ptrue p0.s, vl4
614 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
615 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
616 ; CHECK-NEXT: smax z0.s, p0/m, z0.s, z1.s
617 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
618 ; CHECK-NEXT: ret
619 ;
620 ; NONEON-NOSVE-LABEL: smax_v4i32:
621 ; NONEON-NOSVE: // %bb.0:
622 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
623 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
624 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
625 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
626 ; NONEON-NOSVE-NEXT: cmp w10, w8
627 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, gt
628 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
629 ; NONEON-NOSVE-NEXT: cmp w9, w8
630 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
631 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
632 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #40]
633 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
634 ; NONEON-NOSVE-NEXT: cmp w10, w8
635 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, gt
636 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
637 ; NONEON-NOSVE-NEXT: cmp w9, w8
638 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
639 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #32]
640 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
641 ; NONEON-NOSVE-NEXT: add sp, sp, #48
642 ; NONEON-NOSVE-NEXT: ret
643 %res = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %op1, <4 x i32> %op2)
644 ret <4 x i32> %res
645 }
647 define void @smax_v8i32(ptr %a, ptr %b) {
648 ; CHECK-LABEL: smax_v8i32:
649 ; CHECK: // %bb.0:
650 ; CHECK-NEXT: ldp q0, q3, [x1]
651 ; CHECK-NEXT: ptrue p0.s, vl4
652 ; CHECK-NEXT: ldp q1, q2, [x0]
653 ; CHECK-NEXT: smax z0.s, p0/m, z0.s, z1.s
654 ; CHECK-NEXT: movprfx z1, z2
655 ; CHECK-NEXT: smax z1.s, p0/m, z1.s, z3.s
656 ; CHECK-NEXT: stp q0, q1, [x0]
657 ; CHECK-NEXT: ret
658 ;
659 ; NONEON-NOSVE-LABEL: smax_v8i32:
660 ; NONEON-NOSVE: // %bb.0:
661 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
662 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
663 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
664 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
665 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
666 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
667 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #40]
668 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #60]
669 ; NONEON-NOSVE-NEXT: cmp w10, w8
670 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, gt
671 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #56]
672 ; NONEON-NOSVE-NEXT: cmp w9, w8
673 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
674 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #32]
675 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #88]
676 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #52]
677 ; NONEON-NOSVE-NEXT: cmp w10, w8
678 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, gt
679 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #48]
680 ; NONEON-NOSVE-NEXT: cmp w9, w8
681 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
682 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
683 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #80]
684 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
685 ; NONEON-NOSVE-NEXT: cmp w10, w8
686 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, gt
687 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
688 ; NONEON-NOSVE-NEXT: cmp w9, w8
689 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
690 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
691 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #72]
692 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
693 ; NONEON-NOSVE-NEXT: cmp w10, w8
694 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, gt
695 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
696 ; NONEON-NOSVE-NEXT: cmp w9, w8
697 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, gt
698 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #64]
699 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
700 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
701 ; NONEON-NOSVE-NEXT: add sp, sp, #96
702 ; NONEON-NOSVE-NEXT: ret
703 %op1 = load <8 x i32>, ptr %a
704 %op2 = load <8 x i32>, ptr %b
705 %res = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %op1, <8 x i32> %op2)
706 store <8 x i32> %res, ptr %a
707 ret void
708 }
710 ; Vector i64 max are not legal for NEON so use SVE when available.
711 define <1 x i64> @smax_v1i64(<1 x i64> %op1, <1 x i64> %op2) {
712 ; CHECK-LABEL: smax_v1i64:
713 ; CHECK: // %bb.0:
714 ; CHECK-NEXT: ptrue p0.d, vl1
715 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
716 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
717 ; CHECK-NEXT: smax z0.d, p0/m, z0.d, z1.d
718 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
719 ; CHECK-NEXT: ret
720 ;
721 ; NONEON-NOSVE-LABEL: smax_v1i64:
722 ; NONEON-NOSVE: // %bb.0:
723 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
724 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
725 ; NONEON-NOSVE-NEXT: fmov x8, d1
726 ; NONEON-NOSVE-NEXT: fmov x9, d0
727 ; NONEON-NOSVE-NEXT: cmp x9, x8
728 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, gt
729 ; NONEON-NOSVE-NEXT: str x8, [sp, #8]
730 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
731 ; NONEON-NOSVE-NEXT: add sp, sp, #16
732 ; NONEON-NOSVE-NEXT: ret
733 %res = call <1 x i64> @llvm.smax.v1i64(<1 x i64> %op1, <1 x i64> %op2)
734 ret <1 x i64> %res
735 }
737 ; Vector i64 max are not legal for NEON so use SVE when available.
738 define <2 x i64> @smax_v2i64(<2 x i64> %op1, <2 x i64> %op2) {
739 ; CHECK-LABEL: smax_v2i64:
740 ; CHECK: // %bb.0:
741 ; CHECK-NEXT: ptrue p0.d, vl2
742 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
743 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
744 ; CHECK-NEXT: smax z0.d, p0/m, z0.d, z1.d
745 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
746 ; CHECK-NEXT: ret
747 ;
748 ; NONEON-NOSVE-LABEL: smax_v2i64:
749 ; NONEON-NOSVE: // %bb.0:
750 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
751 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
752 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
753 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
754 ; NONEON-NOSVE-NEXT: cmp x10, x8
755 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, gt
756 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
757 ; NONEON-NOSVE-NEXT: cmp x9, x8
758 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, gt
759 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #32]
760 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
761 ; NONEON-NOSVE-NEXT: add sp, sp, #48
762 ; NONEON-NOSVE-NEXT: ret
763 %res = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %op1, <2 x i64> %op2)
764 ret <2 x i64> %res
765 }
767 define void @smax_v4i64(ptr %a, ptr %b) {
768 ; CHECK-LABEL: smax_v4i64:
769 ; CHECK: // %bb.0:
770 ; CHECK-NEXT: ldp q0, q3, [x1]
771 ; CHECK-NEXT: ptrue p0.d, vl2
772 ; CHECK-NEXT: ldp q1, q2, [x0]
773 ; CHECK-NEXT: smax z0.d, p0/m, z0.d, z1.d
774 ; CHECK-NEXT: movprfx z1, z2
775 ; CHECK-NEXT: smax z1.d, p0/m, z1.d, z3.d
776 ; CHECK-NEXT: stp q0, q1, [x0]
777 ; CHECK-NEXT: ret
778 ;
779 ; NONEON-NOSVE-LABEL: smax_v4i64:
780 ; NONEON-NOSVE: // %bb.0:
781 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
782 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
783 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
784 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
785 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
786 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
787 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp, #32]
788 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #56]
789 ; NONEON-NOSVE-NEXT: cmp x10, x8
790 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, gt
791 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #48]
792 ; NONEON-NOSVE-NEXT: cmp x9, x8
793 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, gt
794 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
795 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #80]
796 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
797 ; NONEON-NOSVE-NEXT: cmp x10, x8
798 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, gt
799 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
800 ; NONEON-NOSVE-NEXT: cmp x9, x8
801 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, gt
802 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #64]
803 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
804 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
805 ; NONEON-NOSVE-NEXT: add sp, sp, #96
806 ; NONEON-NOSVE-NEXT: ret
807 %op1 = load <4 x i64>, ptr %a
808 %op2 = load <4 x i64>, ptr %b
809 %res = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %op1, <4 x i64> %op2)
810 store <4 x i64> %res, ptr %a
811 ret void
812 }
814 ;
815 ; SMIN
816 ;
818 define <8 x i8> @smin_v8i8(<8 x i8> %op1, <8 x i8> %op2) {
819 ; CHECK-LABEL: smin_v8i8:
820 ; CHECK: // %bb.0:
821 ; CHECK-NEXT: ptrue p0.b, vl8
822 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
823 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
824 ; CHECK-NEXT: smin z0.b, p0/m, z0.b, z1.b
825 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
826 ; CHECK-NEXT: ret
827 ;
828 ; NONEON-NOSVE-LABEL: smin_v8i8:
829 ; NONEON-NOSVE: // %bb.0:
830 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
831 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
832 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
833 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #23]
834 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]
835 ; NONEON-NOSVE-NEXT: cmp w9, w8
836 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
837 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #14]
838 ; NONEON-NOSVE-NEXT: strb w8, [sp, #31]
839 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #22]
840 ; NONEON-NOSVE-NEXT: cmp w9, w8
841 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
842 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]
843 ; NONEON-NOSVE-NEXT: strb w8, [sp, #30]
844 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #21]
845 ; NONEON-NOSVE-NEXT: cmp w9, w8
846 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
847 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #12]
848 ; NONEON-NOSVE-NEXT: strb w8, [sp, #29]
849 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #20]
850 ; NONEON-NOSVE-NEXT: cmp w9, w8
851 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
852 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]
853 ; NONEON-NOSVE-NEXT: strb w8, [sp, #28]
854 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #19]
855 ; NONEON-NOSVE-NEXT: cmp w9, w8
856 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
857 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #10]
858 ; NONEON-NOSVE-NEXT: strb w8, [sp, #27]
859 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #18]
860 ; NONEON-NOSVE-NEXT: cmp w9, w8
861 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
862 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]
863 ; NONEON-NOSVE-NEXT: strb w8, [sp, #26]
864 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]
865 ; NONEON-NOSVE-NEXT: cmp w9, w8
866 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
867 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]
868 ; NONEON-NOSVE-NEXT: strb w8, [sp, #25]
869 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #16]
870 ; NONEON-NOSVE-NEXT: cmp w9, w8
871 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
872 ; NONEON-NOSVE-NEXT: strb w8, [sp, #24]
873 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
874 ; NONEON-NOSVE-NEXT: add sp, sp, #32
875 ; NONEON-NOSVE-NEXT: ret
876 %res = call <8 x i8> @llvm.smin.v8i8(<8 x i8> %op1, <8 x i8> %op2)
877 ret <8 x i8> %res
878 }
880 define <16 x i8> @smin_v16i8(<16 x i8> %op1, <16 x i8> %op2) {
881 ; CHECK-LABEL: smin_v16i8:
882 ; CHECK: // %bb.0:
883 ; CHECK-NEXT: ptrue p0.b, vl16
884 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
885 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
886 ; CHECK-NEXT: smin z0.b, p0/m, z0.b, z1.b
887 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
888 ; CHECK-NEXT: ret
889 ;
890 ; NONEON-NOSVE-LABEL: smin_v16i8:
891 ; NONEON-NOSVE: // %bb.0:
892 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
893 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
894 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #31]
895 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]
896 ; NONEON-NOSVE-NEXT: cmp w9, w8
897 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
898 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #14]
899 ; NONEON-NOSVE-NEXT: strb w8, [sp, #47]
900 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #30]
901 ; NONEON-NOSVE-NEXT: cmp w9, w8
902 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
903 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]
904 ; NONEON-NOSVE-NEXT: strb w8, [sp, #46]
905 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #29]
906 ; NONEON-NOSVE-NEXT: cmp w9, w8
907 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
908 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #12]
909 ; NONEON-NOSVE-NEXT: strb w8, [sp, #45]
910 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #28]
911 ; NONEON-NOSVE-NEXT: cmp w9, w8
912 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
913 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]
914 ; NONEON-NOSVE-NEXT: strb w8, [sp, #44]
915 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #27]
916 ; NONEON-NOSVE-NEXT: cmp w9, w8
917 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
918 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #10]
919 ; NONEON-NOSVE-NEXT: strb w8, [sp, #43]
920 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #26]
921 ; NONEON-NOSVE-NEXT: cmp w9, w8
922 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
923 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]
924 ; NONEON-NOSVE-NEXT: strb w8, [sp, #42]
925 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #25]
926 ; NONEON-NOSVE-NEXT: cmp w9, w8
927 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
928 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]
929 ; NONEON-NOSVE-NEXT: strb w8, [sp, #41]
930 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #24]
931 ; NONEON-NOSVE-NEXT: cmp w9, w8
932 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
933 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #7]
934 ; NONEON-NOSVE-NEXT: strb w8, [sp, #40]
935 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #23]
936 ; NONEON-NOSVE-NEXT: cmp w9, w8
937 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
938 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #6]
939 ; NONEON-NOSVE-NEXT: strb w8, [sp, #39]
940 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #22]
941 ; NONEON-NOSVE-NEXT: cmp w9, w8
942 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
943 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #5]
944 ; NONEON-NOSVE-NEXT: strb w8, [sp, #38]
945 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #21]
946 ; NONEON-NOSVE-NEXT: cmp w9, w8
947 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
948 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #4]
949 ; NONEON-NOSVE-NEXT: strb w8, [sp, #37]
950 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #20]
951 ; NONEON-NOSVE-NEXT: cmp w9, w8
952 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
953 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #3]
954 ; NONEON-NOSVE-NEXT: strb w8, [sp, #36]
955 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #19]
956 ; NONEON-NOSVE-NEXT: cmp w9, w8
957 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
958 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #2]
959 ; NONEON-NOSVE-NEXT: strb w8, [sp, #35]
960 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #18]
961 ; NONEON-NOSVE-NEXT: cmp w9, w8
962 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
963 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #1]
964 ; NONEON-NOSVE-NEXT: strb w8, [sp, #34]
965 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]
966 ; NONEON-NOSVE-NEXT: cmp w9, w8
967 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
968 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp]
969 ; NONEON-NOSVE-NEXT: strb w8, [sp, #33]
970 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #16]
971 ; NONEON-NOSVE-NEXT: cmp w9, w8
972 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
973 ; NONEON-NOSVE-NEXT: strb w8, [sp, #32]
974 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
975 ; NONEON-NOSVE-NEXT: add sp, sp, #48
976 ; NONEON-NOSVE-NEXT: ret
977 %res = call <16 x i8> @llvm.smin.v16i8(<16 x i8> %op1, <16 x i8> %op2)
978 ret <16 x i8> %res
979 }
981 define void @smin_v32i8(ptr %a, ptr %b) {
982 ; CHECK-LABEL: smin_v32i8:
983 ; CHECK: // %bb.0:
984 ; CHECK-NEXT: ldp q0, q3, [x1]
985 ; CHECK-NEXT: ptrue p0.b, vl16
986 ; CHECK-NEXT: ldp q1, q2, [x0]
987 ; CHECK-NEXT: smin z0.b, p0/m, z0.b, z1.b
988 ; CHECK-NEXT: movprfx z1, z2
989 ; CHECK-NEXT: smin z1.b, p0/m, z1.b, z3.b
990 ; CHECK-NEXT: stp q0, q1, [x0]
991 ; CHECK-NEXT: ret
992 ;
993 ; NONEON-NOSVE-LABEL: smin_v32i8:
994 ; NONEON-NOSVE: // %bb.0:
995 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
996 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
997 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
998 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
999 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
1000 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
1001 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #63]
1002 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #47]
1003 ; NONEON-NOSVE-NEXT: cmp w9, w8
1004 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1005 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #46]
1006 ; NONEON-NOSVE-NEXT: strb w8, [sp, #95]
1007 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #62]
1008 ; NONEON-NOSVE-NEXT: cmp w9, w8
1009 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1010 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #45]
1011 ; NONEON-NOSVE-NEXT: strb w8, [sp, #94]
1012 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #61]
1013 ; NONEON-NOSVE-NEXT: cmp w9, w8
1014 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1015 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #44]
1016 ; NONEON-NOSVE-NEXT: strb w8, [sp, #93]
1017 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #60]
1018 ; NONEON-NOSVE-NEXT: cmp w9, w8
1019 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1020 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #43]
1021 ; NONEON-NOSVE-NEXT: strb w8, [sp, #92]
1022 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #59]
1023 ; NONEON-NOSVE-NEXT: cmp w9, w8
1024 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1025 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #42]
1026 ; NONEON-NOSVE-NEXT: strb w8, [sp, #91]
1027 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #58]
1028 ; NONEON-NOSVE-NEXT: cmp w9, w8
1029 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1030 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #41]
1031 ; NONEON-NOSVE-NEXT: strb w8, [sp, #90]
1032 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #57]
1033 ; NONEON-NOSVE-NEXT: cmp w9, w8
1034 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1035 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #40]
1036 ; NONEON-NOSVE-NEXT: strb w8, [sp, #89]
1037 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #56]
1038 ; NONEON-NOSVE-NEXT: cmp w9, w8
1039 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1040 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #39]
1041 ; NONEON-NOSVE-NEXT: strb w8, [sp, #88]
1042 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #55]
1043 ; NONEON-NOSVE-NEXT: cmp w9, w8
1044 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1045 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #38]
1046 ; NONEON-NOSVE-NEXT: strb w8, [sp, #87]
1047 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #54]
1048 ; NONEON-NOSVE-NEXT: cmp w9, w8
1049 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1050 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #37]
1051 ; NONEON-NOSVE-NEXT: strb w8, [sp, #86]
1052 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #53]
1053 ; NONEON-NOSVE-NEXT: cmp w9, w8
1054 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1055 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #36]
1056 ; NONEON-NOSVE-NEXT: strb w8, [sp, #85]
1057 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #52]
1058 ; NONEON-NOSVE-NEXT: cmp w9, w8
1059 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1060 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #35]
1061 ; NONEON-NOSVE-NEXT: strb w8, [sp, #84]
1062 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #51]
1063 ; NONEON-NOSVE-NEXT: cmp w9, w8
1064 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1065 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #34]
1066 ; NONEON-NOSVE-NEXT: strb w8, [sp, #83]
1067 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #50]
1068 ; NONEON-NOSVE-NEXT: cmp w9, w8
1069 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1070 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #33]
1071 ; NONEON-NOSVE-NEXT: strb w8, [sp, #82]
1072 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #49]
1073 ; NONEON-NOSVE-NEXT: cmp w9, w8
1074 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1075 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #32]
1076 ; NONEON-NOSVE-NEXT: strb w8, [sp, #81]
1077 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #48]
1078 ; NONEON-NOSVE-NEXT: cmp w9, w8
1079 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1080 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #15]
1081 ; NONEON-NOSVE-NEXT: strb w8, [sp, #80]
1082 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #31]
1083 ; NONEON-NOSVE-NEXT: cmp w9, w8
1084 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1085 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #14]
1086 ; NONEON-NOSVE-NEXT: strb w8, [sp, #79]
1087 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #30]
1088 ; NONEON-NOSVE-NEXT: cmp w9, w8
1089 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1090 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #13]
1091 ; NONEON-NOSVE-NEXT: strb w8, [sp, #78]
1092 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #29]
1093 ; NONEON-NOSVE-NEXT: cmp w9, w8
1094 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1095 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #12]
1096 ; NONEON-NOSVE-NEXT: strb w8, [sp, #77]
1097 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #28]
1098 ; NONEON-NOSVE-NEXT: cmp w9, w8
1099 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1100 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #11]
1101 ; NONEON-NOSVE-NEXT: strb w8, [sp, #76]
1102 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #27]
1103 ; NONEON-NOSVE-NEXT: cmp w9, w8
1104 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1105 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #10]
1106 ; NONEON-NOSVE-NEXT: strb w8, [sp, #75]
1107 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #26]
1108 ; NONEON-NOSVE-NEXT: cmp w9, w8
1109 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1110 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #9]
1111 ; NONEON-NOSVE-NEXT: strb w8, [sp, #74]
1112 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #25]
1113 ; NONEON-NOSVE-NEXT: cmp w9, w8
1114 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1115 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #8]
1116 ; NONEON-NOSVE-NEXT: strb w8, [sp, #73]
1117 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #24]
1118 ; NONEON-NOSVE-NEXT: cmp w9, w8
1119 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1120 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #7]
1121 ; NONEON-NOSVE-NEXT: strb w8, [sp, #72]
1122 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #23]
1123 ; NONEON-NOSVE-NEXT: cmp w9, w8
1124 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1125 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #6]
1126 ; NONEON-NOSVE-NEXT: strb w8, [sp, #71]
1127 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #22]
1128 ; NONEON-NOSVE-NEXT: cmp w9, w8
1129 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1130 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #5]
1131 ; NONEON-NOSVE-NEXT: strb w8, [sp, #70]
1132 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #21]
1133 ; NONEON-NOSVE-NEXT: cmp w9, w8
1134 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1135 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #4]
1136 ; NONEON-NOSVE-NEXT: strb w8, [sp, #69]
1137 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #20]
1138 ; NONEON-NOSVE-NEXT: cmp w9, w8
1139 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1140 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #3]
1141 ; NONEON-NOSVE-NEXT: strb w8, [sp, #68]
1142 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #19]
1143 ; NONEON-NOSVE-NEXT: cmp w9, w8
1144 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1145 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #2]
1146 ; NONEON-NOSVE-NEXT: strb w8, [sp, #67]
1147 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #18]
1148 ; NONEON-NOSVE-NEXT: cmp w9, w8
1149 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1150 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp, #1]
1151 ; NONEON-NOSVE-NEXT: strb w8, [sp, #66]
1152 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #17]
1153 ; NONEON-NOSVE-NEXT: cmp w9, w8
1154 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1155 ; NONEON-NOSVE-NEXT: ldrsb w9, [sp]
1156 ; NONEON-NOSVE-NEXT: strb w8, [sp, #65]
1157 ; NONEON-NOSVE-NEXT: ldrsb w8, [sp, #16]
1158 ; NONEON-NOSVE-NEXT: cmp w9, w8
1159 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1160 ; NONEON-NOSVE-NEXT: strb w8, [sp, #64]
1161 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
1162 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
1163 ; NONEON-NOSVE-NEXT: add sp, sp, #96
1164 ; NONEON-NOSVE-NEXT: ret
1165 %op1 = load <32 x i8>, ptr %a
1166 %op2 = load <32 x i8>, ptr %b
1167 %res = call <32 x i8> @llvm.smin.v32i8(<32 x i8> %op1, <32 x i8> %op2)
1168 store <32 x i8> %res, ptr %a
1169 ret void
1170 }
1172 define <4 x i16> @smin_v4i16(<4 x i16> %op1, <4 x i16> %op2) {
1173 ; CHECK-LABEL: smin_v4i16:
1174 ; CHECK: // %bb.0:
1175 ; CHECK-NEXT: ptrue p0.h, vl4
1176 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
1177 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
1178 ; CHECK-NEXT: smin z0.h, p0/m, z0.h, z1.h
1179 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
1180 ; CHECK-NEXT: ret
1181 ;
1182 ; NONEON-NOSVE-LABEL: smin_v4i16:
1183 ; NONEON-NOSVE: // %bb.0:
1184 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
1185 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
1186 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
1187 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #22]
1188 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]
1189 ; NONEON-NOSVE-NEXT: cmp w9, w8
1190 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1191 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #12]
1192 ; NONEON-NOSVE-NEXT: strh w8, [sp, #30]
1193 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #20]
1194 ; NONEON-NOSVE-NEXT: cmp w9, w8
1195 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1196 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]
1197 ; NONEON-NOSVE-NEXT: strh w8, [sp, #28]
1198 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]
1199 ; NONEON-NOSVE-NEXT: cmp w9, w8
1200 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1201 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]
1202 ; NONEON-NOSVE-NEXT: strh w8, [sp, #26]
1203 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #16]
1204 ; NONEON-NOSVE-NEXT: cmp w9, w8
1205 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1206 ; NONEON-NOSVE-NEXT: strh w8, [sp, #24]
1207 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
1208 ; NONEON-NOSVE-NEXT: add sp, sp, #32
1209 ; NONEON-NOSVE-NEXT: ret
1210 %res = call <4 x i16> @llvm.smin.v4i16(<4 x i16> %op1, <4 x i16> %op2)
1211 ret <4 x i16> %res
1212 }
1214 define <8 x i16> @smin_v8i16(<8 x i16> %op1, <8 x i16> %op2) {
1215 ; CHECK-LABEL: smin_v8i16:
1216 ; CHECK: // %bb.0:
1217 ; CHECK-NEXT: ptrue p0.h, vl8
1218 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
1219 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
1220 ; CHECK-NEXT: smin z0.h, p0/m, z0.h, z1.h
1221 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
1222 ; CHECK-NEXT: ret
1223 ;
1224 ; NONEON-NOSVE-LABEL: smin_v8i16:
1225 ; NONEON-NOSVE: // %bb.0:
1226 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
1227 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
1228 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #30]
1229 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]
1230 ; NONEON-NOSVE-NEXT: cmp w9, w8
1231 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1232 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #12]
1233 ; NONEON-NOSVE-NEXT: strh w8, [sp, #46]
1234 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #28]
1235 ; NONEON-NOSVE-NEXT: cmp w9, w8
1236 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1237 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]
1238 ; NONEON-NOSVE-NEXT: strh w8, [sp, #44]
1239 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #26]
1240 ; NONEON-NOSVE-NEXT: cmp w9, w8
1241 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1242 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]
1243 ; NONEON-NOSVE-NEXT: strh w8, [sp, #42]
1244 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #24]
1245 ; NONEON-NOSVE-NEXT: cmp w9, w8
1246 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1247 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #6]
1248 ; NONEON-NOSVE-NEXT: strh w8, [sp, #40]
1249 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #22]
1250 ; NONEON-NOSVE-NEXT: cmp w9, w8
1251 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1252 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #4]
1253 ; NONEON-NOSVE-NEXT: strh w8, [sp, #38]
1254 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #20]
1255 ; NONEON-NOSVE-NEXT: cmp w9, w8
1256 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1257 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #2]
1258 ; NONEON-NOSVE-NEXT: strh w8, [sp, #36]
1259 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]
1260 ; NONEON-NOSVE-NEXT: cmp w9, w8
1261 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1262 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp]
1263 ; NONEON-NOSVE-NEXT: strh w8, [sp, #34]
1264 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #16]
1265 ; NONEON-NOSVE-NEXT: cmp w9, w8
1266 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1267 ; NONEON-NOSVE-NEXT: strh w8, [sp, #32]
1268 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
1269 ; NONEON-NOSVE-NEXT: add sp, sp, #48
1270 ; NONEON-NOSVE-NEXT: ret
1271 %res = call <8 x i16> @llvm.smin.v8i16(<8 x i16> %op1, <8 x i16> %op2)
1272 ret <8 x i16> %res
1273 }
1275 define void @smin_v16i16(ptr %a, ptr %b) {
1276 ; CHECK-LABEL: smin_v16i16:
1277 ; CHECK: // %bb.0:
1278 ; CHECK-NEXT: ldp q0, q3, [x1]
1279 ; CHECK-NEXT: ptrue p0.h, vl8
1280 ; CHECK-NEXT: ldp q1, q2, [x0]
1281 ; CHECK-NEXT: smin z0.h, p0/m, z0.h, z1.h
1282 ; CHECK-NEXT: movprfx z1, z2
1283 ; CHECK-NEXT: smin z1.h, p0/m, z1.h, z3.h
1284 ; CHECK-NEXT: stp q0, q1, [x0]
1285 ; CHECK-NEXT: ret
1286 ;
1287 ; NONEON-NOSVE-LABEL: smin_v16i16:
1288 ; NONEON-NOSVE: // %bb.0:
1289 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
1290 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
1291 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
1292 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
1293 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
1294 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
1295 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #62]
1296 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #46]
1297 ; NONEON-NOSVE-NEXT: cmp w9, w8
1298 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1299 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #44]
1300 ; NONEON-NOSVE-NEXT: strh w8, [sp, #94]
1301 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #60]
1302 ; NONEON-NOSVE-NEXT: cmp w9, w8
1303 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1304 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #42]
1305 ; NONEON-NOSVE-NEXT: strh w8, [sp, #92]
1306 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #58]
1307 ; NONEON-NOSVE-NEXT: cmp w9, w8
1308 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1309 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #40]
1310 ; NONEON-NOSVE-NEXT: strh w8, [sp, #90]
1311 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #56]
1312 ; NONEON-NOSVE-NEXT: cmp w9, w8
1313 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1314 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #38]
1315 ; NONEON-NOSVE-NEXT: strh w8, [sp, #88]
1316 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #54]
1317 ; NONEON-NOSVE-NEXT: cmp w9, w8
1318 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1319 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #36]
1320 ; NONEON-NOSVE-NEXT: strh w8, [sp, #86]
1321 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #52]
1322 ; NONEON-NOSVE-NEXT: cmp w9, w8
1323 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1324 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #34]
1325 ; NONEON-NOSVE-NEXT: strh w8, [sp, #84]
1326 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #50]
1327 ; NONEON-NOSVE-NEXT: cmp w9, w8
1328 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1329 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #32]
1330 ; NONEON-NOSVE-NEXT: strh w8, [sp, #82]
1331 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #48]
1332 ; NONEON-NOSVE-NEXT: cmp w9, w8
1333 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1334 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #14]
1335 ; NONEON-NOSVE-NEXT: strh w8, [sp, #80]
1336 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #30]
1337 ; NONEON-NOSVE-NEXT: cmp w9, w8
1338 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1339 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #12]
1340 ; NONEON-NOSVE-NEXT: strh w8, [sp, #78]
1341 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #28]
1342 ; NONEON-NOSVE-NEXT: cmp w9, w8
1343 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1344 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #10]
1345 ; NONEON-NOSVE-NEXT: strh w8, [sp, #76]
1346 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #26]
1347 ; NONEON-NOSVE-NEXT: cmp w9, w8
1348 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1349 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #8]
1350 ; NONEON-NOSVE-NEXT: strh w8, [sp, #74]
1351 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #24]
1352 ; NONEON-NOSVE-NEXT: cmp w9, w8
1353 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1354 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #6]
1355 ; NONEON-NOSVE-NEXT: strh w8, [sp, #72]
1356 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #22]
1357 ; NONEON-NOSVE-NEXT: cmp w9, w8
1358 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1359 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #4]
1360 ; NONEON-NOSVE-NEXT: strh w8, [sp, #70]
1361 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #20]
1362 ; NONEON-NOSVE-NEXT: cmp w9, w8
1363 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1364 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp, #2]
1365 ; NONEON-NOSVE-NEXT: strh w8, [sp, #68]
1366 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #18]
1367 ; NONEON-NOSVE-NEXT: cmp w9, w8
1368 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1369 ; NONEON-NOSVE-NEXT: ldrsh w9, [sp]
1370 ; NONEON-NOSVE-NEXT: strh w8, [sp, #66]
1371 ; NONEON-NOSVE-NEXT: ldrsh w8, [sp, #16]
1372 ; NONEON-NOSVE-NEXT: cmp w9, w8
1373 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1374 ; NONEON-NOSVE-NEXT: strh w8, [sp, #64]
1375 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
1376 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
1377 ; NONEON-NOSVE-NEXT: add sp, sp, #96
1378 ; NONEON-NOSVE-NEXT: ret
1379 %op1 = load <16 x i16>, ptr %a
1380 %op2 = load <16 x i16>, ptr %b
1381 %res = call <16 x i16> @llvm.smin.v16i16(<16 x i16> %op1, <16 x i16> %op2)
1382 store <16 x i16> %res, ptr %a
1383 ret void
1384 }
1386 define <2 x i32> @smin_v2i32(<2 x i32> %op1, <2 x i32> %op2) {
1387 ; CHECK-LABEL: smin_v2i32:
1388 ; CHECK: // %bb.0:
1389 ; CHECK-NEXT: ptrue p0.s, vl2
1390 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
1391 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
1392 ; CHECK-NEXT: smin z0.s, p0/m, z0.s, z1.s
1393 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
1394 ; CHECK-NEXT: ret
1395 ;
1396 ; NONEON-NOSVE-LABEL: smin_v2i32:
1397 ; NONEON-NOSVE: // %bb.0:
1398 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
1399 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
1400 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
1401 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
1402 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
1403 ; NONEON-NOSVE-NEXT: cmp w10, w8
1404 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lt
1405 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
1406 ; NONEON-NOSVE-NEXT: cmp w9, w8
1407 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1408 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #24]
1409 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
1410 ; NONEON-NOSVE-NEXT: add sp, sp, #32
1411 ; NONEON-NOSVE-NEXT: ret
1412 %res = call <2 x i32> @llvm.smin.v2i32(<2 x i32> %op1, <2 x i32> %op2)
1413 ret <2 x i32> %res
1414 }
1416 define <4 x i32> @smin_v4i32(<4 x i32> %op1, <4 x i32> %op2) {
1417 ; CHECK-LABEL: smin_v4i32:
1418 ; CHECK: // %bb.0:
1419 ; CHECK-NEXT: ptrue p0.s, vl4
1420 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
1421 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
1422 ; CHECK-NEXT: smin z0.s, p0/m, z0.s, z1.s
1423 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
1424 ; CHECK-NEXT: ret
1425 ;
1426 ; NONEON-NOSVE-LABEL: smin_v4i32:
1427 ; NONEON-NOSVE: // %bb.0:
1428 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
1429 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
1430 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
1431 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
1432 ; NONEON-NOSVE-NEXT: cmp w10, w8
1433 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lt
1434 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
1435 ; NONEON-NOSVE-NEXT: cmp w9, w8
1436 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1437 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
1438 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #40]
1439 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
1440 ; NONEON-NOSVE-NEXT: cmp w10, w8
1441 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lt
1442 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
1443 ; NONEON-NOSVE-NEXT: cmp w9, w8
1444 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1445 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #32]
1446 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
1447 ; NONEON-NOSVE-NEXT: add sp, sp, #48
1448 ; NONEON-NOSVE-NEXT: ret
1449 %res = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %op1, <4 x i32> %op2)
1450 ret <4 x i32> %res
1451 }
1453 define void @smin_v8i32(ptr %a, ptr %b) {
1454 ; CHECK-LABEL: smin_v8i32:
1455 ; CHECK: // %bb.0:
1456 ; CHECK-NEXT: ldp q0, q3, [x1]
1457 ; CHECK-NEXT: ptrue p0.s, vl4
1458 ; CHECK-NEXT: ldp q1, q2, [x0]
1459 ; CHECK-NEXT: smin z0.s, p0/m, z0.s, z1.s
1460 ; CHECK-NEXT: movprfx z1, z2
1461 ; CHECK-NEXT: smin z1.s, p0/m, z1.s, z3.s
1462 ; CHECK-NEXT: stp q0, q1, [x0]
1463 ; CHECK-NEXT: ret
1464 ;
1465 ; NONEON-NOSVE-LABEL: smin_v8i32:
1466 ; NONEON-NOSVE: // %bb.0:
1467 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
1468 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
1469 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
1470 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
1471 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
1472 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
1473 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #40]
1474 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #60]
1475 ; NONEON-NOSVE-NEXT: cmp w10, w8
1476 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lt
1477 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #56]
1478 ; NONEON-NOSVE-NEXT: cmp w9, w8
1479 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1480 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #32]
1481 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #88]
1482 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #52]
1483 ; NONEON-NOSVE-NEXT: cmp w10, w8
1484 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lt
1485 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #48]
1486 ; NONEON-NOSVE-NEXT: cmp w9, w8
1487 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1488 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
1489 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #80]
1490 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
1491 ; NONEON-NOSVE-NEXT: cmp w10, w8
1492 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lt
1493 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
1494 ; NONEON-NOSVE-NEXT: cmp w9, w8
1495 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1496 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
1497 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #72]
1498 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
1499 ; NONEON-NOSVE-NEXT: cmp w10, w8
1500 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lt
1501 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
1502 ; NONEON-NOSVE-NEXT: cmp w9, w8
1503 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lt
1504 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #64]
1505 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
1506 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
1507 ; NONEON-NOSVE-NEXT: add sp, sp, #96
1508 ; NONEON-NOSVE-NEXT: ret
1509 %op1 = load <8 x i32>, ptr %a
1510 %op2 = load <8 x i32>, ptr %b
1511 %res = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %op1, <8 x i32> %op2)
1512 store <8 x i32> %res, ptr %a
1513 ret void
1514 }
1516 ; Vector i64 min are not legal for NEON so use SVE when available.
1517 define <1 x i64> @smin_v1i64(<1 x i64> %op1, <1 x i64> %op2) {
1518 ; CHECK-LABEL: smin_v1i64:
1519 ; CHECK: // %bb.0:
1520 ; CHECK-NEXT: ptrue p0.d, vl1
1521 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
1522 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
1523 ; CHECK-NEXT: smin z0.d, p0/m, z0.d, z1.d
1524 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
1525 ; CHECK-NEXT: ret
1526 ;
1527 ; NONEON-NOSVE-LABEL: smin_v1i64:
1528 ; NONEON-NOSVE: // %bb.0:
1529 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
1530 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
1531 ; NONEON-NOSVE-NEXT: fmov x8, d1
1532 ; NONEON-NOSVE-NEXT: fmov x9, d0
1533 ; NONEON-NOSVE-NEXT: cmp x9, x8
1534 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lt
1535 ; NONEON-NOSVE-NEXT: str x8, [sp, #8]
1536 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
1537 ; NONEON-NOSVE-NEXT: add sp, sp, #16
1538 ; NONEON-NOSVE-NEXT: ret
1539 %res = call <1 x i64> @llvm.smin.v1i64(<1 x i64> %op1, <1 x i64> %op2)
1540 ret <1 x i64> %res
1541 }
1543 ; Vector i64 min are not legal for NEON so use SVE when available.
1544 define <2 x i64> @smin_v2i64(<2 x i64> %op1, <2 x i64> %op2) {
1545 ; CHECK-LABEL: smin_v2i64:
1546 ; CHECK: // %bb.0:
1547 ; CHECK-NEXT: ptrue p0.d, vl2
1548 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
1549 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
1550 ; CHECK-NEXT: smin z0.d, p0/m, z0.d, z1.d
1551 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
1552 ; CHECK-NEXT: ret
1553 ;
1554 ; NONEON-NOSVE-LABEL: smin_v2i64:
1555 ; NONEON-NOSVE: // %bb.0:
1556 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
1557 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
1558 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
1559 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
1560 ; NONEON-NOSVE-NEXT: cmp x10, x8
1561 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, lt
1562 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
1563 ; NONEON-NOSVE-NEXT: cmp x9, x8
1564 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lt
1565 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #32]
1566 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
1567 ; NONEON-NOSVE-NEXT: add sp, sp, #48
1568 ; NONEON-NOSVE-NEXT: ret
1569 %res = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %op1, <2 x i64> %op2)
1570 ret <2 x i64> %res
1571 }
1573 define void @smin_v4i64(ptr %a, ptr %b) {
1574 ; CHECK-LABEL: smin_v4i64:
1575 ; CHECK: // %bb.0:
1576 ; CHECK-NEXT: ldp q0, q3, [x1]
1577 ; CHECK-NEXT: ptrue p0.d, vl2
1578 ; CHECK-NEXT: ldp q1, q2, [x0]
1579 ; CHECK-NEXT: smin z0.d, p0/m, z0.d, z1.d
1580 ; CHECK-NEXT: movprfx z1, z2
1581 ; CHECK-NEXT: smin z1.d, p0/m, z1.d, z3.d
1582 ; CHECK-NEXT: stp q0, q1, [x0]
1583 ; CHECK-NEXT: ret
1584 ;
1585 ; NONEON-NOSVE-LABEL: smin_v4i64:
1586 ; NONEON-NOSVE: // %bb.0:
1587 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
1588 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
1589 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
1590 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
1591 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
1592 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
1593 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp, #32]
1594 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #56]
1595 ; NONEON-NOSVE-NEXT: cmp x10, x8
1596 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, lt
1597 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #48]
1598 ; NONEON-NOSVE-NEXT: cmp x9, x8
1599 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lt
1600 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
1601 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #80]
1602 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
1603 ; NONEON-NOSVE-NEXT: cmp x10, x8
1604 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, lt
1605 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
1606 ; NONEON-NOSVE-NEXT: cmp x9, x8
1607 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lt
1608 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #64]
1609 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
1610 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
1611 ; NONEON-NOSVE-NEXT: add sp, sp, #96
1612 ; NONEON-NOSVE-NEXT: ret
1613 %op1 = load <4 x i64>, ptr %a
1614 %op2 = load <4 x i64>, ptr %b
1615 %res = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %op1, <4 x i64> %op2)
1616 store <4 x i64> %res, ptr %a
1617 ret void
1618 }
1620 ;
1621 ; UMAX
1622 ;
1624 define <8 x i8> @umax_v8i8(<8 x i8> %op1, <8 x i8> %op2) {
1625 ; CHECK-LABEL: umax_v8i8:
1626 ; CHECK: // %bb.0:
1627 ; CHECK-NEXT: ptrue p0.b, vl8
1628 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
1629 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
1630 ; CHECK-NEXT: umax z0.b, p0/m, z0.b, z1.b
1631 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
1632 ; CHECK-NEXT: ret
1633 ;
1634 ; NONEON-NOSVE-LABEL: umax_v8i8:
1635 ; NONEON-NOSVE: // %bb.0:
1636 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
1637 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
1638 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
1639 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23]
1640 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]
1641 ; NONEON-NOSVE-NEXT: cmp w9, w8
1642 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1643 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #14]
1644 ; NONEON-NOSVE-NEXT: strb w8, [sp, #31]
1645 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22]
1646 ; NONEON-NOSVE-NEXT: cmp w9, w8
1647 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1648 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]
1649 ; NONEON-NOSVE-NEXT: strb w8, [sp, #30]
1650 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]
1651 ; NONEON-NOSVE-NEXT: cmp w9, w8
1652 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1653 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]
1654 ; NONEON-NOSVE-NEXT: strb w8, [sp, #29]
1655 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20]
1656 ; NONEON-NOSVE-NEXT: cmp w9, w8
1657 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1658 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]
1659 ; NONEON-NOSVE-NEXT: strb w8, [sp, #28]
1660 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19]
1661 ; NONEON-NOSVE-NEXT: cmp w9, w8
1662 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1663 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10]
1664 ; NONEON-NOSVE-NEXT: strb w8, [sp, #27]
1665 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18]
1666 ; NONEON-NOSVE-NEXT: cmp w9, w8
1667 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1668 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]
1669 ; NONEON-NOSVE-NEXT: strb w8, [sp, #26]
1670 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]
1671 ; NONEON-NOSVE-NEXT: cmp w9, w8
1672 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1673 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]
1674 ; NONEON-NOSVE-NEXT: strb w8, [sp, #25]
1675 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16]
1676 ; NONEON-NOSVE-NEXT: cmp w9, w8
1677 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1678 ; NONEON-NOSVE-NEXT: strb w8, [sp, #24]
1679 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
1680 ; NONEON-NOSVE-NEXT: add sp, sp, #32
1681 ; NONEON-NOSVE-NEXT: ret
1682 %res = call <8 x i8> @llvm.umax.v8i8(<8 x i8> %op1, <8 x i8> %op2)
1683 ret <8 x i8> %res
1684 }
1686 define <16 x i8> @umax_v16i8(<16 x i8> %op1, <16 x i8> %op2) {
1687 ; CHECK-LABEL: umax_v16i8:
1688 ; CHECK: // %bb.0:
1689 ; CHECK-NEXT: ptrue p0.b, vl16
1690 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
1691 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
1692 ; CHECK-NEXT: umax z0.b, p0/m, z0.b, z1.b
1693 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
1694 ; CHECK-NEXT: ret
1695 ;
1696 ; NONEON-NOSVE-LABEL: umax_v16i8:
1697 ; NONEON-NOSVE: // %bb.0:
1698 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
1699 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
1700 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31]
1701 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]
1702 ; NONEON-NOSVE-NEXT: cmp w9, w8
1703 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1704 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #14]
1705 ; NONEON-NOSVE-NEXT: strb w8, [sp, #47]
1706 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #30]
1707 ; NONEON-NOSVE-NEXT: cmp w9, w8
1708 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1709 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]
1710 ; NONEON-NOSVE-NEXT: strb w8, [sp, #46]
1711 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29]
1712 ; NONEON-NOSVE-NEXT: cmp w9, w8
1713 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1714 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]
1715 ; NONEON-NOSVE-NEXT: strb w8, [sp, #45]
1716 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #28]
1717 ; NONEON-NOSVE-NEXT: cmp w9, w8
1718 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1719 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]
1720 ; NONEON-NOSVE-NEXT: strb w8, [sp, #44]
1721 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27]
1722 ; NONEON-NOSVE-NEXT: cmp w9, w8
1723 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1724 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10]
1725 ; NONEON-NOSVE-NEXT: strb w8, [sp, #43]
1726 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #26]
1727 ; NONEON-NOSVE-NEXT: cmp w9, w8
1728 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1729 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]
1730 ; NONEON-NOSVE-NEXT: strb w8, [sp, #42]
1731 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25]
1732 ; NONEON-NOSVE-NEXT: cmp w9, w8
1733 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1734 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]
1735 ; NONEON-NOSVE-NEXT: strb w8, [sp, #41]
1736 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #24]
1737 ; NONEON-NOSVE-NEXT: cmp w9, w8
1738 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1739 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #7]
1740 ; NONEON-NOSVE-NEXT: strb w8, [sp, #40]
1741 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23]
1742 ; NONEON-NOSVE-NEXT: cmp w9, w8
1743 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1744 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #6]
1745 ; NONEON-NOSVE-NEXT: strb w8, [sp, #39]
1746 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22]
1747 ; NONEON-NOSVE-NEXT: cmp w9, w8
1748 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1749 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]
1750 ; NONEON-NOSVE-NEXT: strb w8, [sp, #38]
1751 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]
1752 ; NONEON-NOSVE-NEXT: cmp w9, w8
1753 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1754 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #4]
1755 ; NONEON-NOSVE-NEXT: strb w8, [sp, #37]
1756 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20]
1757 ; NONEON-NOSVE-NEXT: cmp w9, w8
1758 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1759 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #3]
1760 ; NONEON-NOSVE-NEXT: strb w8, [sp, #36]
1761 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19]
1762 ; NONEON-NOSVE-NEXT: cmp w9, w8
1763 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1764 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #2]
1765 ; NONEON-NOSVE-NEXT: strb w8, [sp, #35]
1766 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18]
1767 ; NONEON-NOSVE-NEXT: cmp w9, w8
1768 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1769 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]
1770 ; NONEON-NOSVE-NEXT: strb w8, [sp, #34]
1771 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]
1772 ; NONEON-NOSVE-NEXT: cmp w9, w8
1773 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1774 ; NONEON-NOSVE-NEXT: ldrb w9, [sp]
1775 ; NONEON-NOSVE-NEXT: strb w8, [sp, #33]
1776 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16]
1777 ; NONEON-NOSVE-NEXT: cmp w9, w8
1778 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1779 ; NONEON-NOSVE-NEXT: strb w8, [sp, #32]
1780 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
1781 ; NONEON-NOSVE-NEXT: add sp, sp, #48
1782 ; NONEON-NOSVE-NEXT: ret
1783 %res = call <16 x i8> @llvm.umax.v16i8(<16 x i8> %op1, <16 x i8> %op2)
1784 ret <16 x i8> %res
1785 }
1787 define void @umax_v32i8(ptr %a, ptr %b) {
1788 ; CHECK-LABEL: umax_v32i8:
1789 ; CHECK: // %bb.0:
1790 ; CHECK-NEXT: ldp q0, q3, [x1]
1791 ; CHECK-NEXT: ptrue p0.b, vl16
1792 ; CHECK-NEXT: ldp q1, q2, [x0]
1793 ; CHECK-NEXT: umax z0.b, p0/m, z0.b, z1.b
1794 ; CHECK-NEXT: movprfx z1, z2
1795 ; CHECK-NEXT: umax z1.b, p0/m, z1.b, z3.b
1796 ; CHECK-NEXT: stp q0, q1, [x0]
1797 ; CHECK-NEXT: ret
1798 ;
1799 ; NONEON-NOSVE-LABEL: umax_v32i8:
1800 ; NONEON-NOSVE: // %bb.0:
1801 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
1802 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
1803 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
1804 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
1805 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
1806 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
1807 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #63]
1808 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #47]
1809 ; NONEON-NOSVE-NEXT: cmp w9, w8
1810 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1811 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #46]
1812 ; NONEON-NOSVE-NEXT: strb w8, [sp, #95]
1813 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #62]
1814 ; NONEON-NOSVE-NEXT: cmp w9, w8
1815 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1816 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #45]
1817 ; NONEON-NOSVE-NEXT: strb w8, [sp, #94]
1818 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #61]
1819 ; NONEON-NOSVE-NEXT: cmp w9, w8
1820 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1821 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #44]
1822 ; NONEON-NOSVE-NEXT: strb w8, [sp, #93]
1823 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #60]
1824 ; NONEON-NOSVE-NEXT: cmp w9, w8
1825 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1826 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #43]
1827 ; NONEON-NOSVE-NEXT: strb w8, [sp, #92]
1828 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #59]
1829 ; NONEON-NOSVE-NEXT: cmp w9, w8
1830 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1831 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #42]
1832 ; NONEON-NOSVE-NEXT: strb w8, [sp, #91]
1833 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #58]
1834 ; NONEON-NOSVE-NEXT: cmp w9, w8
1835 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1836 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #41]
1837 ; NONEON-NOSVE-NEXT: strb w8, [sp, #90]
1838 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #57]
1839 ; NONEON-NOSVE-NEXT: cmp w9, w8
1840 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1841 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #40]
1842 ; NONEON-NOSVE-NEXT: strb w8, [sp, #89]
1843 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #56]
1844 ; NONEON-NOSVE-NEXT: cmp w9, w8
1845 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1846 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #39]
1847 ; NONEON-NOSVE-NEXT: strb w8, [sp, #88]
1848 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #55]
1849 ; NONEON-NOSVE-NEXT: cmp w9, w8
1850 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1851 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #38]
1852 ; NONEON-NOSVE-NEXT: strb w8, [sp, #87]
1853 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #54]
1854 ; NONEON-NOSVE-NEXT: cmp w9, w8
1855 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1856 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #37]
1857 ; NONEON-NOSVE-NEXT: strb w8, [sp, #86]
1858 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #53]
1859 ; NONEON-NOSVE-NEXT: cmp w9, w8
1860 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1861 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #36]
1862 ; NONEON-NOSVE-NEXT: strb w8, [sp, #85]
1863 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #52]
1864 ; NONEON-NOSVE-NEXT: cmp w9, w8
1865 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1866 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #35]
1867 ; NONEON-NOSVE-NEXT: strb w8, [sp, #84]
1868 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #51]
1869 ; NONEON-NOSVE-NEXT: cmp w9, w8
1870 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1871 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #34]
1872 ; NONEON-NOSVE-NEXT: strb w8, [sp, #83]
1873 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #50]
1874 ; NONEON-NOSVE-NEXT: cmp w9, w8
1875 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1876 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #33]
1877 ; NONEON-NOSVE-NEXT: strb w8, [sp, #82]
1878 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #49]
1879 ; NONEON-NOSVE-NEXT: cmp w9, w8
1880 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1881 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #32]
1882 ; NONEON-NOSVE-NEXT: strb w8, [sp, #81]
1883 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #48]
1884 ; NONEON-NOSVE-NEXT: cmp w9, w8
1885 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1886 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]
1887 ; NONEON-NOSVE-NEXT: strb w8, [sp, #80]
1888 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31]
1889 ; NONEON-NOSVE-NEXT: cmp w9, w8
1890 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1891 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #14]
1892 ; NONEON-NOSVE-NEXT: strb w8, [sp, #79]
1893 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #30]
1894 ; NONEON-NOSVE-NEXT: cmp w9, w8
1895 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1896 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]
1897 ; NONEON-NOSVE-NEXT: strb w8, [sp, #78]
1898 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29]
1899 ; NONEON-NOSVE-NEXT: cmp w9, w8
1900 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1901 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]
1902 ; NONEON-NOSVE-NEXT: strb w8, [sp, #77]
1903 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #28]
1904 ; NONEON-NOSVE-NEXT: cmp w9, w8
1905 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1906 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]
1907 ; NONEON-NOSVE-NEXT: strb w8, [sp, #76]
1908 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27]
1909 ; NONEON-NOSVE-NEXT: cmp w9, w8
1910 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1911 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10]
1912 ; NONEON-NOSVE-NEXT: strb w8, [sp, #75]
1913 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #26]
1914 ; NONEON-NOSVE-NEXT: cmp w9, w8
1915 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1916 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]
1917 ; NONEON-NOSVE-NEXT: strb w8, [sp, #74]
1918 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25]
1919 ; NONEON-NOSVE-NEXT: cmp w9, w8
1920 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1921 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]
1922 ; NONEON-NOSVE-NEXT: strb w8, [sp, #73]
1923 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #24]
1924 ; NONEON-NOSVE-NEXT: cmp w9, w8
1925 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1926 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #7]
1927 ; NONEON-NOSVE-NEXT: strb w8, [sp, #72]
1928 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23]
1929 ; NONEON-NOSVE-NEXT: cmp w9, w8
1930 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1931 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #6]
1932 ; NONEON-NOSVE-NEXT: strb w8, [sp, #71]
1933 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22]
1934 ; NONEON-NOSVE-NEXT: cmp w9, w8
1935 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1936 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]
1937 ; NONEON-NOSVE-NEXT: strb w8, [sp, #70]
1938 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]
1939 ; NONEON-NOSVE-NEXT: cmp w9, w8
1940 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1941 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #4]
1942 ; NONEON-NOSVE-NEXT: strb w8, [sp, #69]
1943 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20]
1944 ; NONEON-NOSVE-NEXT: cmp w9, w8
1945 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1946 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #3]
1947 ; NONEON-NOSVE-NEXT: strb w8, [sp, #68]
1948 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19]
1949 ; NONEON-NOSVE-NEXT: cmp w9, w8
1950 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1951 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #2]
1952 ; NONEON-NOSVE-NEXT: strb w8, [sp, #67]
1953 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18]
1954 ; NONEON-NOSVE-NEXT: cmp w9, w8
1955 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1956 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]
1957 ; NONEON-NOSVE-NEXT: strb w8, [sp, #66]
1958 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]
1959 ; NONEON-NOSVE-NEXT: cmp w9, w8
1960 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1961 ; NONEON-NOSVE-NEXT: ldrb w9, [sp]
1962 ; NONEON-NOSVE-NEXT: strb w8, [sp, #65]
1963 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16]
1964 ; NONEON-NOSVE-NEXT: cmp w9, w8
1965 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1966 ; NONEON-NOSVE-NEXT: strb w8, [sp, #64]
1967 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
1968 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
1969 ; NONEON-NOSVE-NEXT: add sp, sp, #96
1970 ; NONEON-NOSVE-NEXT: ret
1971 %op1 = load <32 x i8>, ptr %a
1972 %op2 = load <32 x i8>, ptr %b
1973 %res = call <32 x i8> @llvm.umax.v32i8(<32 x i8> %op1, <32 x i8> %op2)
1974 store <32 x i8> %res, ptr %a
1975 ret void
1976 }
1978 define <4 x i16> @umax_v4i16(<4 x i16> %op1, <4 x i16> %op2) {
1979 ; CHECK-LABEL: umax_v4i16:
1980 ; CHECK: // %bb.0:
1981 ; CHECK-NEXT: ptrue p0.h, vl4
1982 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
1983 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
1984 ; CHECK-NEXT: umax z0.h, p0/m, z0.h, z1.h
1985 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
1986 ; CHECK-NEXT: ret
1987 ;
1988 ; NONEON-NOSVE-LABEL: umax_v4i16:
1989 ; NONEON-NOSVE: // %bb.0:
1990 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
1991 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
1992 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
1993 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22]
1994 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]
1995 ; NONEON-NOSVE-NEXT: cmp w9, w8
1996 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
1997 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]
1998 ; NONEON-NOSVE-NEXT: strh w8, [sp, #30]
1999 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20]
2000 ; NONEON-NOSVE-NEXT: cmp w9, w8
2001 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2002 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]
2003 ; NONEON-NOSVE-NEXT: strh w8, [sp, #28]
2004 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]
2005 ; NONEON-NOSVE-NEXT: cmp w9, w8
2006 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2007 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]
2008 ; NONEON-NOSVE-NEXT: strh w8, [sp, #26]
2009 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16]
2010 ; NONEON-NOSVE-NEXT: cmp w9, w8
2011 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2012 ; NONEON-NOSVE-NEXT: strh w8, [sp, #24]
2013 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
2014 ; NONEON-NOSVE-NEXT: add sp, sp, #32
2015 ; NONEON-NOSVE-NEXT: ret
2016 %res = call <4 x i16> @llvm.umax.v4i16(<4 x i16> %op1, <4 x i16> %op2)
2017 ret <4 x i16> %res
2018 }
2020 define <8 x i16> @umax_v8i16(<8 x i16> %op1, <8 x i16> %op2) {
2021 ; CHECK-LABEL: umax_v8i16:
2022 ; CHECK: // %bb.0:
2023 ; CHECK-NEXT: ptrue p0.h, vl8
2024 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
2025 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
2026 ; CHECK-NEXT: umax z0.h, p0/m, z0.h, z1.h
2027 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
2028 ; CHECK-NEXT: ret
2029 ;
2030 ; NONEON-NOSVE-LABEL: umax_v8i16:
2031 ; NONEON-NOSVE: // %bb.0:
2032 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
2033 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
2034 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30]
2035 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]
2036 ; NONEON-NOSVE-NEXT: cmp w9, w8
2037 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2038 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]
2039 ; NONEON-NOSVE-NEXT: strh w8, [sp, #46]
2040 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #28]
2041 ; NONEON-NOSVE-NEXT: cmp w9, w8
2042 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2043 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]
2044 ; NONEON-NOSVE-NEXT: strh w8, [sp, #44]
2045 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26]
2046 ; NONEON-NOSVE-NEXT: cmp w9, w8
2047 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2048 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]
2049 ; NONEON-NOSVE-NEXT: strh w8, [sp, #42]
2050 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #24]
2051 ; NONEON-NOSVE-NEXT: cmp w9, w8
2052 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2053 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6]
2054 ; NONEON-NOSVE-NEXT: strh w8, [sp, #40]
2055 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22]
2056 ; NONEON-NOSVE-NEXT: cmp w9, w8
2057 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2058 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4]
2059 ; NONEON-NOSVE-NEXT: strh w8, [sp, #38]
2060 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20]
2061 ; NONEON-NOSVE-NEXT: cmp w9, w8
2062 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2063 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]
2064 ; NONEON-NOSVE-NEXT: strh w8, [sp, #36]
2065 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]
2066 ; NONEON-NOSVE-NEXT: cmp w9, w8
2067 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2068 ; NONEON-NOSVE-NEXT: ldrh w9, [sp]
2069 ; NONEON-NOSVE-NEXT: strh w8, [sp, #34]
2070 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16]
2071 ; NONEON-NOSVE-NEXT: cmp w9, w8
2072 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2073 ; NONEON-NOSVE-NEXT: strh w8, [sp, #32]
2074 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
2075 ; NONEON-NOSVE-NEXT: add sp, sp, #48
2076 ; NONEON-NOSVE-NEXT: ret
2077 %res = call <8 x i16> @llvm.umax.v8i16(<8 x i16> %op1, <8 x i16> %op2)
2078 ret <8 x i16> %res
2079 }
2081 define void @umax_v16i16(ptr %a, ptr %b) {
2082 ; CHECK-LABEL: umax_v16i16:
2083 ; CHECK: // %bb.0:
2084 ; CHECK-NEXT: ldp q0, q3, [x1]
2085 ; CHECK-NEXT: ptrue p0.h, vl8
2086 ; CHECK-NEXT: ldp q1, q2, [x0]
2087 ; CHECK-NEXT: umax z0.h, p0/m, z0.h, z1.h
2088 ; CHECK-NEXT: movprfx z1, z2
2089 ; CHECK-NEXT: umax z1.h, p0/m, z1.h, z3.h
2090 ; CHECK-NEXT: stp q0, q1, [x0]
2091 ; CHECK-NEXT: ret
2092 ;
2093 ; NONEON-NOSVE-LABEL: umax_v16i16:
2094 ; NONEON-NOSVE: // %bb.0:
2095 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
2096 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
2097 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
2098 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
2099 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
2100 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
2101 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #62]
2102 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #46]
2103 ; NONEON-NOSVE-NEXT: cmp w9, w8
2104 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2105 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #44]
2106 ; NONEON-NOSVE-NEXT: strh w8, [sp, #94]
2107 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #60]
2108 ; NONEON-NOSVE-NEXT: cmp w9, w8
2109 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2110 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #42]
2111 ; NONEON-NOSVE-NEXT: strh w8, [sp, #92]
2112 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #58]
2113 ; NONEON-NOSVE-NEXT: cmp w9, w8
2114 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2115 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #40]
2116 ; NONEON-NOSVE-NEXT: strh w8, [sp, #90]
2117 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #56]
2118 ; NONEON-NOSVE-NEXT: cmp w9, w8
2119 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2120 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #38]
2121 ; NONEON-NOSVE-NEXT: strh w8, [sp, #88]
2122 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #54]
2123 ; NONEON-NOSVE-NEXT: cmp w9, w8
2124 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2125 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #36]
2126 ; NONEON-NOSVE-NEXT: strh w8, [sp, #86]
2127 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #52]
2128 ; NONEON-NOSVE-NEXT: cmp w9, w8
2129 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2130 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #34]
2131 ; NONEON-NOSVE-NEXT: strh w8, [sp, #84]
2132 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #50]
2133 ; NONEON-NOSVE-NEXT: cmp w9, w8
2134 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2135 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #32]
2136 ; NONEON-NOSVE-NEXT: strh w8, [sp, #82]
2137 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #48]
2138 ; NONEON-NOSVE-NEXT: cmp w9, w8
2139 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2140 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]
2141 ; NONEON-NOSVE-NEXT: strh w8, [sp, #80]
2142 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30]
2143 ; NONEON-NOSVE-NEXT: cmp w9, w8
2144 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2145 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]
2146 ; NONEON-NOSVE-NEXT: strh w8, [sp, #78]
2147 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #28]
2148 ; NONEON-NOSVE-NEXT: cmp w9, w8
2149 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2150 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]
2151 ; NONEON-NOSVE-NEXT: strh w8, [sp, #76]
2152 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26]
2153 ; NONEON-NOSVE-NEXT: cmp w9, w8
2154 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2155 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]
2156 ; NONEON-NOSVE-NEXT: strh w8, [sp, #74]
2157 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #24]
2158 ; NONEON-NOSVE-NEXT: cmp w9, w8
2159 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2160 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6]
2161 ; NONEON-NOSVE-NEXT: strh w8, [sp, #72]
2162 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22]
2163 ; NONEON-NOSVE-NEXT: cmp w9, w8
2164 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2165 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4]
2166 ; NONEON-NOSVE-NEXT: strh w8, [sp, #70]
2167 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20]
2168 ; NONEON-NOSVE-NEXT: cmp w9, w8
2169 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2170 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]
2171 ; NONEON-NOSVE-NEXT: strh w8, [sp, #68]
2172 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]
2173 ; NONEON-NOSVE-NEXT: cmp w9, w8
2174 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2175 ; NONEON-NOSVE-NEXT: ldrh w9, [sp]
2176 ; NONEON-NOSVE-NEXT: strh w8, [sp, #66]
2177 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16]
2178 ; NONEON-NOSVE-NEXT: cmp w9, w8
2179 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2180 ; NONEON-NOSVE-NEXT: strh w8, [sp, #64]
2181 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
2182 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
2183 ; NONEON-NOSVE-NEXT: add sp, sp, #96
2184 ; NONEON-NOSVE-NEXT: ret
2185 %op1 = load <16 x i16>, ptr %a
2186 %op2 = load <16 x i16>, ptr %b
2187 %res = call <16 x i16> @llvm.umax.v16i16(<16 x i16> %op1, <16 x i16> %op2)
2188 store <16 x i16> %res, ptr %a
2189 ret void
2190 }
2192 define <2 x i32> @umax_v2i32(<2 x i32> %op1, <2 x i32> %op2) {
2193 ; CHECK-LABEL: umax_v2i32:
2194 ; CHECK: // %bb.0:
2195 ; CHECK-NEXT: ptrue p0.s, vl2
2196 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
2197 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
2198 ; CHECK-NEXT: umax z0.s, p0/m, z0.s, z1.s
2199 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
2200 ; CHECK-NEXT: ret
2201 ;
2202 ; NONEON-NOSVE-LABEL: umax_v2i32:
2203 ; NONEON-NOSVE: // %bb.0:
2204 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
2205 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
2206 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
2207 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
2208 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
2209 ; NONEON-NOSVE-NEXT: cmp w10, w8
2210 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, hi
2211 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
2212 ; NONEON-NOSVE-NEXT: cmp w9, w8
2213 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2214 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #24]
2215 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
2216 ; NONEON-NOSVE-NEXT: add sp, sp, #32
2217 ; NONEON-NOSVE-NEXT: ret
2218 %res = call <2 x i32> @llvm.umax.v2i32(<2 x i32> %op1, <2 x i32> %op2)
2219 ret <2 x i32> %res
2220 }
2222 define <4 x i32> @umax_v4i32(<4 x i32> %op1, <4 x i32> %op2) {
2223 ; CHECK-LABEL: umax_v4i32:
2224 ; CHECK: // %bb.0:
2225 ; CHECK-NEXT: ptrue p0.s, vl4
2226 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
2227 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
2228 ; CHECK-NEXT: umax z0.s, p0/m, z0.s, z1.s
2229 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
2230 ; CHECK-NEXT: ret
2231 ;
2232 ; NONEON-NOSVE-LABEL: umax_v4i32:
2233 ; NONEON-NOSVE: // %bb.0:
2234 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
2235 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
2236 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
2237 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
2238 ; NONEON-NOSVE-NEXT: cmp w10, w8
2239 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, hi
2240 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
2241 ; NONEON-NOSVE-NEXT: cmp w9, w8
2242 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2243 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
2244 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #40]
2245 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
2246 ; NONEON-NOSVE-NEXT: cmp w10, w8
2247 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, hi
2248 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
2249 ; NONEON-NOSVE-NEXT: cmp w9, w8
2250 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2251 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #32]
2252 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
2253 ; NONEON-NOSVE-NEXT: add sp, sp, #48
2254 ; NONEON-NOSVE-NEXT: ret
2255 %res = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %op1, <4 x i32> %op2)
2256 ret <4 x i32> %res
2257 }
2259 define void @umax_v8i32(ptr %a, ptr %b) {
2260 ; CHECK-LABEL: umax_v8i32:
2261 ; CHECK: // %bb.0:
2262 ; CHECK-NEXT: ldp q0, q3, [x1]
2263 ; CHECK-NEXT: ptrue p0.s, vl4
2264 ; CHECK-NEXT: ldp q1, q2, [x0]
2265 ; CHECK-NEXT: umax z0.s, p0/m, z0.s, z1.s
2266 ; CHECK-NEXT: movprfx z1, z2
2267 ; CHECK-NEXT: umax z1.s, p0/m, z1.s, z3.s
2268 ; CHECK-NEXT: stp q0, q1, [x0]
2269 ; CHECK-NEXT: ret
2270 ;
2271 ; NONEON-NOSVE-LABEL: umax_v8i32:
2272 ; NONEON-NOSVE: // %bb.0:
2273 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
2274 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
2275 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
2276 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
2277 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
2278 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
2279 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #40]
2280 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #60]
2281 ; NONEON-NOSVE-NEXT: cmp w10, w8
2282 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, hi
2283 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #56]
2284 ; NONEON-NOSVE-NEXT: cmp w9, w8
2285 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2286 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #32]
2287 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #88]
2288 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #52]
2289 ; NONEON-NOSVE-NEXT: cmp w10, w8
2290 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, hi
2291 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #48]
2292 ; NONEON-NOSVE-NEXT: cmp w9, w8
2293 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2294 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
2295 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #80]
2296 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
2297 ; NONEON-NOSVE-NEXT: cmp w10, w8
2298 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, hi
2299 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
2300 ; NONEON-NOSVE-NEXT: cmp w9, w8
2301 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2302 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
2303 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #72]
2304 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
2305 ; NONEON-NOSVE-NEXT: cmp w10, w8
2306 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, hi
2307 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
2308 ; NONEON-NOSVE-NEXT: cmp w9, w8
2309 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, hi
2310 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #64]
2311 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
2312 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
2313 ; NONEON-NOSVE-NEXT: add sp, sp, #96
2314 ; NONEON-NOSVE-NEXT: ret
2315 %op1 = load <8 x i32>, ptr %a
2316 %op2 = load <8 x i32>, ptr %b
2317 %res = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %op1, <8 x i32> %op2)
2318 store <8 x i32> %res, ptr %a
2319 ret void
2320 }
2322 ; Vector i64 max are not legal for NEON so use SVE when available.
2323 define <1 x i64> @umax_v1i64(<1 x i64> %op1, <1 x i64> %op2) {
2324 ; CHECK-LABEL: umax_v1i64:
2325 ; CHECK: // %bb.0:
2326 ; CHECK-NEXT: ptrue p0.d, vl1
2327 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
2328 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
2329 ; CHECK-NEXT: umax z0.d, p0/m, z0.d, z1.d
2330 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
2331 ; CHECK-NEXT: ret
2332 ;
2333 ; NONEON-NOSVE-LABEL: umax_v1i64:
2334 ; NONEON-NOSVE: // %bb.0:
2335 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
2336 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
2337 ; NONEON-NOSVE-NEXT: fmov x8, d1
2338 ; NONEON-NOSVE-NEXT: fmov x9, d0
2339 ; NONEON-NOSVE-NEXT: cmp x9, x8
2340 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, hi
2341 ; NONEON-NOSVE-NEXT: str x8, [sp, #8]
2342 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
2343 ; NONEON-NOSVE-NEXT: add sp, sp, #16
2344 ; NONEON-NOSVE-NEXT: ret
2345 %res = call <1 x i64> @llvm.umax.v1i64(<1 x i64> %op1, <1 x i64> %op2)
2346 ret <1 x i64> %res
2347 }
2349 ; Vector i64 max are not legal for NEON so use SVE when available.
2350 define <2 x i64> @umax_v2i64(<2 x i64> %op1, <2 x i64> %op2) {
2351 ; CHECK-LABEL: umax_v2i64:
2352 ; CHECK: // %bb.0:
2353 ; CHECK-NEXT: ptrue p0.d, vl2
2354 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
2355 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
2356 ; CHECK-NEXT: umax z0.d, p0/m, z0.d, z1.d
2357 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
2358 ; CHECK-NEXT: ret
2359 ;
2360 ; NONEON-NOSVE-LABEL: umax_v2i64:
2361 ; NONEON-NOSVE: // %bb.0:
2362 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
2363 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
2364 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
2365 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
2366 ; NONEON-NOSVE-NEXT: cmp x10, x8
2367 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, hi
2368 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
2369 ; NONEON-NOSVE-NEXT: cmp x9, x8
2370 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, hi
2371 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #32]
2372 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
2373 ; NONEON-NOSVE-NEXT: add sp, sp, #48
2374 ; NONEON-NOSVE-NEXT: ret
2375 %res = call <2 x i64> @llvm.umax.v2i64(<2 x i64> %op1, <2 x i64> %op2)
2376 ret <2 x i64> %res
2377 }
2379 define void @umax_v4i64(ptr %a, ptr %b) {
2380 ; CHECK-LABEL: umax_v4i64:
2381 ; CHECK: // %bb.0:
2382 ; CHECK-NEXT: ldp q0, q3, [x1]
2383 ; CHECK-NEXT: ptrue p0.d, vl2
2384 ; CHECK-NEXT: ldp q1, q2, [x0]
2385 ; CHECK-NEXT: umax z0.d, p0/m, z0.d, z1.d
2386 ; CHECK-NEXT: movprfx z1, z2
2387 ; CHECK-NEXT: umax z1.d, p0/m, z1.d, z3.d
2388 ; CHECK-NEXT: stp q0, q1, [x0]
2389 ; CHECK-NEXT: ret
2390 ;
2391 ; NONEON-NOSVE-LABEL: umax_v4i64:
2392 ; NONEON-NOSVE: // %bb.0:
2393 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
2394 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
2395 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
2396 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
2397 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
2398 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
2399 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp, #32]
2400 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #56]
2401 ; NONEON-NOSVE-NEXT: cmp x10, x8
2402 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, hi
2403 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #48]
2404 ; NONEON-NOSVE-NEXT: cmp x9, x8
2405 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, hi
2406 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
2407 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #80]
2408 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
2409 ; NONEON-NOSVE-NEXT: cmp x10, x8
2410 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, hi
2411 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
2412 ; NONEON-NOSVE-NEXT: cmp x9, x8
2413 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, hi
2414 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #64]
2415 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
2416 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
2417 ; NONEON-NOSVE-NEXT: add sp, sp, #96
2418 ; NONEON-NOSVE-NEXT: ret
2419 %op1 = load <4 x i64>, ptr %a
2420 %op2 = load <4 x i64>, ptr %b
2421 %res = call <4 x i64> @llvm.umax.v4i64(<4 x i64> %op1, <4 x i64> %op2)
2422 store <4 x i64> %res, ptr %a
2423 ret void
2424 }
2426 ;
2427 ; UMIN
2428 ;
2430 define <8 x i8> @umin_v8i8(<8 x i8> %op1, <8 x i8> %op2) {
2431 ; CHECK-LABEL: umin_v8i8:
2432 ; CHECK: // %bb.0:
2433 ; CHECK-NEXT: ptrue p0.b, vl8
2434 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
2435 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
2436 ; CHECK-NEXT: umin z0.b, p0/m, z0.b, z1.b
2437 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
2438 ; CHECK-NEXT: ret
2439 ;
2440 ; NONEON-NOSVE-LABEL: umin_v8i8:
2441 ; NONEON-NOSVE: // %bb.0:
2442 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
2443 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
2444 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
2445 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23]
2446 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]
2447 ; NONEON-NOSVE-NEXT: cmp w9, w8
2448 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2449 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #14]
2450 ; NONEON-NOSVE-NEXT: strb w8, [sp, #31]
2451 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22]
2452 ; NONEON-NOSVE-NEXT: cmp w9, w8
2453 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2454 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]
2455 ; NONEON-NOSVE-NEXT: strb w8, [sp, #30]
2456 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]
2457 ; NONEON-NOSVE-NEXT: cmp w9, w8
2458 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2459 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]
2460 ; NONEON-NOSVE-NEXT: strb w8, [sp, #29]
2461 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20]
2462 ; NONEON-NOSVE-NEXT: cmp w9, w8
2463 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2464 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]
2465 ; NONEON-NOSVE-NEXT: strb w8, [sp, #28]
2466 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19]
2467 ; NONEON-NOSVE-NEXT: cmp w9, w8
2468 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2469 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10]
2470 ; NONEON-NOSVE-NEXT: strb w8, [sp, #27]
2471 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18]
2472 ; NONEON-NOSVE-NEXT: cmp w9, w8
2473 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2474 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]
2475 ; NONEON-NOSVE-NEXT: strb w8, [sp, #26]
2476 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]
2477 ; NONEON-NOSVE-NEXT: cmp w9, w8
2478 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2479 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]
2480 ; NONEON-NOSVE-NEXT: strb w8, [sp, #25]
2481 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16]
2482 ; NONEON-NOSVE-NEXT: cmp w9, w8
2483 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2484 ; NONEON-NOSVE-NEXT: strb w8, [sp, #24]
2485 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
2486 ; NONEON-NOSVE-NEXT: add sp, sp, #32
2487 ; NONEON-NOSVE-NEXT: ret
2488 %res = call <8 x i8> @llvm.umin.v8i8(<8 x i8> %op1, <8 x i8> %op2)
2489 ret <8 x i8> %res
2490 }
2492 define <16 x i8> @umin_v16i8(<16 x i8> %op1, <16 x i8> %op2) {
2493 ; CHECK-LABEL: umin_v16i8:
2494 ; CHECK: // %bb.0:
2495 ; CHECK-NEXT: ptrue p0.b, vl16
2496 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
2497 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
2498 ; CHECK-NEXT: umin z0.b, p0/m, z0.b, z1.b
2499 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
2500 ; CHECK-NEXT: ret
2501 ;
2502 ; NONEON-NOSVE-LABEL: umin_v16i8:
2503 ; NONEON-NOSVE: // %bb.0:
2504 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
2505 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
2506 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31]
2507 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]
2508 ; NONEON-NOSVE-NEXT: cmp w9, w8
2509 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2510 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #14]
2511 ; NONEON-NOSVE-NEXT: strb w8, [sp, #47]
2512 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #30]
2513 ; NONEON-NOSVE-NEXT: cmp w9, w8
2514 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2515 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]
2516 ; NONEON-NOSVE-NEXT: strb w8, [sp, #46]
2517 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29]
2518 ; NONEON-NOSVE-NEXT: cmp w9, w8
2519 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2520 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]
2521 ; NONEON-NOSVE-NEXT: strb w8, [sp, #45]
2522 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #28]
2523 ; NONEON-NOSVE-NEXT: cmp w9, w8
2524 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2525 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]
2526 ; NONEON-NOSVE-NEXT: strb w8, [sp, #44]
2527 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27]
2528 ; NONEON-NOSVE-NEXT: cmp w9, w8
2529 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2530 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10]
2531 ; NONEON-NOSVE-NEXT: strb w8, [sp, #43]
2532 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #26]
2533 ; NONEON-NOSVE-NEXT: cmp w9, w8
2534 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2535 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]
2536 ; NONEON-NOSVE-NEXT: strb w8, [sp, #42]
2537 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25]
2538 ; NONEON-NOSVE-NEXT: cmp w9, w8
2539 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2540 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]
2541 ; NONEON-NOSVE-NEXT: strb w8, [sp, #41]
2542 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #24]
2543 ; NONEON-NOSVE-NEXT: cmp w9, w8
2544 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2545 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #7]
2546 ; NONEON-NOSVE-NEXT: strb w8, [sp, #40]
2547 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23]
2548 ; NONEON-NOSVE-NEXT: cmp w9, w8
2549 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2550 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #6]
2551 ; NONEON-NOSVE-NEXT: strb w8, [sp, #39]
2552 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22]
2553 ; NONEON-NOSVE-NEXT: cmp w9, w8
2554 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2555 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]
2556 ; NONEON-NOSVE-NEXT: strb w8, [sp, #38]
2557 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]
2558 ; NONEON-NOSVE-NEXT: cmp w9, w8
2559 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2560 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #4]
2561 ; NONEON-NOSVE-NEXT: strb w8, [sp, #37]
2562 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20]
2563 ; NONEON-NOSVE-NEXT: cmp w9, w8
2564 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2565 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #3]
2566 ; NONEON-NOSVE-NEXT: strb w8, [sp, #36]
2567 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19]
2568 ; NONEON-NOSVE-NEXT: cmp w9, w8
2569 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2570 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #2]
2571 ; NONEON-NOSVE-NEXT: strb w8, [sp, #35]
2572 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18]
2573 ; NONEON-NOSVE-NEXT: cmp w9, w8
2574 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2575 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]
2576 ; NONEON-NOSVE-NEXT: strb w8, [sp, #34]
2577 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]
2578 ; NONEON-NOSVE-NEXT: cmp w9, w8
2579 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2580 ; NONEON-NOSVE-NEXT: ldrb w9, [sp]
2581 ; NONEON-NOSVE-NEXT: strb w8, [sp, #33]
2582 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16]
2583 ; NONEON-NOSVE-NEXT: cmp w9, w8
2584 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2585 ; NONEON-NOSVE-NEXT: strb w8, [sp, #32]
2586 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
2587 ; NONEON-NOSVE-NEXT: add sp, sp, #48
2588 ; NONEON-NOSVE-NEXT: ret
2589 %res = call <16 x i8> @llvm.umin.v16i8(<16 x i8> %op1, <16 x i8> %op2)
2590 ret <16 x i8> %res
2591 }
2593 define void @umin_v32i8(ptr %a, ptr %b) {
2594 ; CHECK-LABEL: umin_v32i8:
2595 ; CHECK: // %bb.0:
2596 ; CHECK-NEXT: ldp q0, q3, [x1]
2597 ; CHECK-NEXT: ptrue p0.b, vl16
2598 ; CHECK-NEXT: ldp q1, q2, [x0]
2599 ; CHECK-NEXT: umin z0.b, p0/m, z0.b, z1.b
2600 ; CHECK-NEXT: movprfx z1, z2
2601 ; CHECK-NEXT: umin z1.b, p0/m, z1.b, z3.b
2602 ; CHECK-NEXT: stp q0, q1, [x0]
2603 ; CHECK-NEXT: ret
2604 ;
2605 ; NONEON-NOSVE-LABEL: umin_v32i8:
2606 ; NONEON-NOSVE: // %bb.0:
2607 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
2608 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
2609 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
2610 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
2611 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
2612 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
2613 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #63]
2614 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #47]
2615 ; NONEON-NOSVE-NEXT: cmp w9, w8
2616 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2617 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #46]
2618 ; NONEON-NOSVE-NEXT: strb w8, [sp, #95]
2619 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #62]
2620 ; NONEON-NOSVE-NEXT: cmp w9, w8
2621 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2622 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #45]
2623 ; NONEON-NOSVE-NEXT: strb w8, [sp, #94]
2624 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #61]
2625 ; NONEON-NOSVE-NEXT: cmp w9, w8
2626 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2627 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #44]
2628 ; NONEON-NOSVE-NEXT: strb w8, [sp, #93]
2629 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #60]
2630 ; NONEON-NOSVE-NEXT: cmp w9, w8
2631 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2632 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #43]
2633 ; NONEON-NOSVE-NEXT: strb w8, [sp, #92]
2634 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #59]
2635 ; NONEON-NOSVE-NEXT: cmp w9, w8
2636 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2637 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #42]
2638 ; NONEON-NOSVE-NEXT: strb w8, [sp, #91]
2639 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #58]
2640 ; NONEON-NOSVE-NEXT: cmp w9, w8
2641 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2642 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #41]
2643 ; NONEON-NOSVE-NEXT: strb w8, [sp, #90]
2644 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #57]
2645 ; NONEON-NOSVE-NEXT: cmp w9, w8
2646 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2647 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #40]
2648 ; NONEON-NOSVE-NEXT: strb w8, [sp, #89]
2649 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #56]
2650 ; NONEON-NOSVE-NEXT: cmp w9, w8
2651 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2652 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #39]
2653 ; NONEON-NOSVE-NEXT: strb w8, [sp, #88]
2654 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #55]
2655 ; NONEON-NOSVE-NEXT: cmp w9, w8
2656 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2657 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #38]
2658 ; NONEON-NOSVE-NEXT: strb w8, [sp, #87]
2659 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #54]
2660 ; NONEON-NOSVE-NEXT: cmp w9, w8
2661 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2662 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #37]
2663 ; NONEON-NOSVE-NEXT: strb w8, [sp, #86]
2664 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #53]
2665 ; NONEON-NOSVE-NEXT: cmp w9, w8
2666 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2667 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #36]
2668 ; NONEON-NOSVE-NEXT: strb w8, [sp, #85]
2669 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #52]
2670 ; NONEON-NOSVE-NEXT: cmp w9, w8
2671 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2672 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #35]
2673 ; NONEON-NOSVE-NEXT: strb w8, [sp, #84]
2674 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #51]
2675 ; NONEON-NOSVE-NEXT: cmp w9, w8
2676 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2677 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #34]
2678 ; NONEON-NOSVE-NEXT: strb w8, [sp, #83]
2679 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #50]
2680 ; NONEON-NOSVE-NEXT: cmp w9, w8
2681 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2682 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #33]
2683 ; NONEON-NOSVE-NEXT: strb w8, [sp, #82]
2684 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #49]
2685 ; NONEON-NOSVE-NEXT: cmp w9, w8
2686 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2687 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #32]
2688 ; NONEON-NOSVE-NEXT: strb w8, [sp, #81]
2689 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #48]
2690 ; NONEON-NOSVE-NEXT: cmp w9, w8
2691 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2692 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #15]
2693 ; NONEON-NOSVE-NEXT: strb w8, [sp, #80]
2694 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31]
2695 ; NONEON-NOSVE-NEXT: cmp w9, w8
2696 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2697 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #14]
2698 ; NONEON-NOSVE-NEXT: strb w8, [sp, #79]
2699 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #30]
2700 ; NONEON-NOSVE-NEXT: cmp w9, w8
2701 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2702 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #13]
2703 ; NONEON-NOSVE-NEXT: strb w8, [sp, #78]
2704 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29]
2705 ; NONEON-NOSVE-NEXT: cmp w9, w8
2706 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2707 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12]
2708 ; NONEON-NOSVE-NEXT: strb w8, [sp, #77]
2709 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #28]
2710 ; NONEON-NOSVE-NEXT: cmp w9, w8
2711 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2712 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #11]
2713 ; NONEON-NOSVE-NEXT: strb w8, [sp, #76]
2714 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27]
2715 ; NONEON-NOSVE-NEXT: cmp w9, w8
2716 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2717 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10]
2718 ; NONEON-NOSVE-NEXT: strb w8, [sp, #75]
2719 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #26]
2720 ; NONEON-NOSVE-NEXT: cmp w9, w8
2721 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2722 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #9]
2723 ; NONEON-NOSVE-NEXT: strb w8, [sp, #74]
2724 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25]
2725 ; NONEON-NOSVE-NEXT: cmp w9, w8
2726 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2727 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8]
2728 ; NONEON-NOSVE-NEXT: strb w8, [sp, #73]
2729 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #24]
2730 ; NONEON-NOSVE-NEXT: cmp w9, w8
2731 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2732 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #7]
2733 ; NONEON-NOSVE-NEXT: strb w8, [sp, #72]
2734 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23]
2735 ; NONEON-NOSVE-NEXT: cmp w9, w8
2736 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2737 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #6]
2738 ; NONEON-NOSVE-NEXT: strb w8, [sp, #71]
2739 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22]
2740 ; NONEON-NOSVE-NEXT: cmp w9, w8
2741 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2742 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #5]
2743 ; NONEON-NOSVE-NEXT: strb w8, [sp, #70]
2744 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21]
2745 ; NONEON-NOSVE-NEXT: cmp w9, w8
2746 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2747 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #4]
2748 ; NONEON-NOSVE-NEXT: strb w8, [sp, #69]
2749 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20]
2750 ; NONEON-NOSVE-NEXT: cmp w9, w8
2751 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2752 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #3]
2753 ; NONEON-NOSVE-NEXT: strb w8, [sp, #68]
2754 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19]
2755 ; NONEON-NOSVE-NEXT: cmp w9, w8
2756 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2757 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #2]
2758 ; NONEON-NOSVE-NEXT: strb w8, [sp, #67]
2759 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18]
2760 ; NONEON-NOSVE-NEXT: cmp w9, w8
2761 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2762 ; NONEON-NOSVE-NEXT: ldrb w9, [sp, #1]
2763 ; NONEON-NOSVE-NEXT: strb w8, [sp, #66]
2764 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17]
2765 ; NONEON-NOSVE-NEXT: cmp w9, w8
2766 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2767 ; NONEON-NOSVE-NEXT: ldrb w9, [sp]
2768 ; NONEON-NOSVE-NEXT: strb w8, [sp, #65]
2769 ; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16]
2770 ; NONEON-NOSVE-NEXT: cmp w9, w8
2771 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2772 ; NONEON-NOSVE-NEXT: strb w8, [sp, #64]
2773 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
2774 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
2775 ; NONEON-NOSVE-NEXT: add sp, sp, #96
2776 ; NONEON-NOSVE-NEXT: ret
2777 %op1 = load <32 x i8>, ptr %a
2778 %op2 = load <32 x i8>, ptr %b
2779 %res = call <32 x i8> @llvm.umin.v32i8(<32 x i8> %op1, <32 x i8> %op2)
2780 store <32 x i8> %res, ptr %a
2781 ret void
2782 }
2784 define <4 x i16> @umin_v4i16(<4 x i16> %op1, <4 x i16> %op2) {
2785 ; CHECK-LABEL: umin_v4i16:
2786 ; CHECK: // %bb.0:
2787 ; CHECK-NEXT: ptrue p0.h, vl4
2788 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
2789 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
2790 ; CHECK-NEXT: umin z0.h, p0/m, z0.h, z1.h
2791 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
2792 ; CHECK-NEXT: ret
2793 ;
2794 ; NONEON-NOSVE-LABEL: umin_v4i16:
2795 ; NONEON-NOSVE: // %bb.0:
2796 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
2797 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
2798 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
2799 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22]
2800 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]
2801 ; NONEON-NOSVE-NEXT: cmp w9, w8
2802 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2803 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]
2804 ; NONEON-NOSVE-NEXT: strh w8, [sp, #30]
2805 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20]
2806 ; NONEON-NOSVE-NEXT: cmp w9, w8
2807 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2808 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]
2809 ; NONEON-NOSVE-NEXT: strh w8, [sp, #28]
2810 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]
2811 ; NONEON-NOSVE-NEXT: cmp w9, w8
2812 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2813 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]
2814 ; NONEON-NOSVE-NEXT: strh w8, [sp, #26]
2815 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16]
2816 ; NONEON-NOSVE-NEXT: cmp w9, w8
2817 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2818 ; NONEON-NOSVE-NEXT: strh w8, [sp, #24]
2819 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
2820 ; NONEON-NOSVE-NEXT: add sp, sp, #32
2821 ; NONEON-NOSVE-NEXT: ret
2822 %res = call <4 x i16> @llvm.umin.v4i16(<4 x i16> %op1, <4 x i16> %op2)
2823 ret <4 x i16> %res
2824 }
2826 define <8 x i16> @umin_v8i16(<8 x i16> %op1, <8 x i16> %op2) {
2827 ; CHECK-LABEL: umin_v8i16:
2828 ; CHECK: // %bb.0:
2829 ; CHECK-NEXT: ptrue p0.h, vl8
2830 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
2831 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
2832 ; CHECK-NEXT: umin z0.h, p0/m, z0.h, z1.h
2833 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
2834 ; CHECK-NEXT: ret
2835 ;
2836 ; NONEON-NOSVE-LABEL: umin_v8i16:
2837 ; NONEON-NOSVE: // %bb.0:
2838 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
2839 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
2840 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30]
2841 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]
2842 ; NONEON-NOSVE-NEXT: cmp w9, w8
2843 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2844 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]
2845 ; NONEON-NOSVE-NEXT: strh w8, [sp, #46]
2846 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #28]
2847 ; NONEON-NOSVE-NEXT: cmp w9, w8
2848 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2849 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]
2850 ; NONEON-NOSVE-NEXT: strh w8, [sp, #44]
2851 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26]
2852 ; NONEON-NOSVE-NEXT: cmp w9, w8
2853 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2854 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]
2855 ; NONEON-NOSVE-NEXT: strh w8, [sp, #42]
2856 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #24]
2857 ; NONEON-NOSVE-NEXT: cmp w9, w8
2858 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2859 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6]
2860 ; NONEON-NOSVE-NEXT: strh w8, [sp, #40]
2861 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22]
2862 ; NONEON-NOSVE-NEXT: cmp w9, w8
2863 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2864 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4]
2865 ; NONEON-NOSVE-NEXT: strh w8, [sp, #38]
2866 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20]
2867 ; NONEON-NOSVE-NEXT: cmp w9, w8
2868 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2869 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]
2870 ; NONEON-NOSVE-NEXT: strh w8, [sp, #36]
2871 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]
2872 ; NONEON-NOSVE-NEXT: cmp w9, w8
2873 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2874 ; NONEON-NOSVE-NEXT: ldrh w9, [sp]
2875 ; NONEON-NOSVE-NEXT: strh w8, [sp, #34]
2876 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16]
2877 ; NONEON-NOSVE-NEXT: cmp w9, w8
2878 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2879 ; NONEON-NOSVE-NEXT: strh w8, [sp, #32]
2880 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
2881 ; NONEON-NOSVE-NEXT: add sp, sp, #48
2882 ; NONEON-NOSVE-NEXT: ret
2883 %res = call <8 x i16> @llvm.umin.v8i16(<8 x i16> %op1, <8 x i16> %op2)
2884 ret <8 x i16> %res
2885 }
2887 define void @umin_v16i16(ptr %a, ptr %b) {
2888 ; CHECK-LABEL: umin_v16i16:
2889 ; CHECK: // %bb.0:
2890 ; CHECK-NEXT: ldp q0, q3, [x1]
2891 ; CHECK-NEXT: ptrue p0.h, vl8
2892 ; CHECK-NEXT: ldp q1, q2, [x0]
2893 ; CHECK-NEXT: umin z0.h, p0/m, z0.h, z1.h
2894 ; CHECK-NEXT: movprfx z1, z2
2895 ; CHECK-NEXT: umin z1.h, p0/m, z1.h, z3.h
2896 ; CHECK-NEXT: stp q0, q1, [x0]
2897 ; CHECK-NEXT: ret
2898 ;
2899 ; NONEON-NOSVE-LABEL: umin_v16i16:
2900 ; NONEON-NOSVE: // %bb.0:
2901 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
2902 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
2903 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
2904 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
2905 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
2906 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
2907 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #62]
2908 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #46]
2909 ; NONEON-NOSVE-NEXT: cmp w9, w8
2910 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2911 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #44]
2912 ; NONEON-NOSVE-NEXT: strh w8, [sp, #94]
2913 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #60]
2914 ; NONEON-NOSVE-NEXT: cmp w9, w8
2915 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2916 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #42]
2917 ; NONEON-NOSVE-NEXT: strh w8, [sp, #92]
2918 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #58]
2919 ; NONEON-NOSVE-NEXT: cmp w9, w8
2920 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2921 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #40]
2922 ; NONEON-NOSVE-NEXT: strh w8, [sp, #90]
2923 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #56]
2924 ; NONEON-NOSVE-NEXT: cmp w9, w8
2925 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2926 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #38]
2927 ; NONEON-NOSVE-NEXT: strh w8, [sp, #88]
2928 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #54]
2929 ; NONEON-NOSVE-NEXT: cmp w9, w8
2930 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2931 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #36]
2932 ; NONEON-NOSVE-NEXT: strh w8, [sp, #86]
2933 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #52]
2934 ; NONEON-NOSVE-NEXT: cmp w9, w8
2935 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2936 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #34]
2937 ; NONEON-NOSVE-NEXT: strh w8, [sp, #84]
2938 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #50]
2939 ; NONEON-NOSVE-NEXT: cmp w9, w8
2940 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2941 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #32]
2942 ; NONEON-NOSVE-NEXT: strh w8, [sp, #82]
2943 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #48]
2944 ; NONEON-NOSVE-NEXT: cmp w9, w8
2945 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2946 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14]
2947 ; NONEON-NOSVE-NEXT: strh w8, [sp, #80]
2948 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30]
2949 ; NONEON-NOSVE-NEXT: cmp w9, w8
2950 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2951 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12]
2952 ; NONEON-NOSVE-NEXT: strh w8, [sp, #78]
2953 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #28]
2954 ; NONEON-NOSVE-NEXT: cmp w9, w8
2955 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2956 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10]
2957 ; NONEON-NOSVE-NEXT: strh w8, [sp, #76]
2958 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26]
2959 ; NONEON-NOSVE-NEXT: cmp w9, w8
2960 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2961 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8]
2962 ; NONEON-NOSVE-NEXT: strh w8, [sp, #74]
2963 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #24]
2964 ; NONEON-NOSVE-NEXT: cmp w9, w8
2965 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2966 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6]
2967 ; NONEON-NOSVE-NEXT: strh w8, [sp, #72]
2968 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22]
2969 ; NONEON-NOSVE-NEXT: cmp w9, w8
2970 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2971 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4]
2972 ; NONEON-NOSVE-NEXT: strh w8, [sp, #70]
2973 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20]
2974 ; NONEON-NOSVE-NEXT: cmp w9, w8
2975 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2976 ; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2]
2977 ; NONEON-NOSVE-NEXT: strh w8, [sp, #68]
2978 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18]
2979 ; NONEON-NOSVE-NEXT: cmp w9, w8
2980 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2981 ; NONEON-NOSVE-NEXT: ldrh w9, [sp]
2982 ; NONEON-NOSVE-NEXT: strh w8, [sp, #66]
2983 ; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16]
2984 ; NONEON-NOSVE-NEXT: cmp w9, w8
2985 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
2986 ; NONEON-NOSVE-NEXT: strh w8, [sp, #64]
2987 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
2988 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
2989 ; NONEON-NOSVE-NEXT: add sp, sp, #96
2990 ; NONEON-NOSVE-NEXT: ret
2991 %op1 = load <16 x i16>, ptr %a
2992 %op2 = load <16 x i16>, ptr %b
2993 %res = call <16 x i16> @llvm.umin.v16i16(<16 x i16> %op1, <16 x i16> %op2)
2994 store <16 x i16> %res, ptr %a
2995 ret void
2996 }
2998 define <2 x i32> @umin_v2i32(<2 x i32> %op1, <2 x i32> %op2) {
2999 ; CHECK-LABEL: umin_v2i32:
3000 ; CHECK: // %bb.0:
3001 ; CHECK-NEXT: ptrue p0.s, vl2
3002 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
3003 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
3004 ; CHECK-NEXT: umin z0.s, p0/m, z0.s, z1.s
3005 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
3006 ; CHECK-NEXT: ret
3007 ;
3008 ; NONEON-NOSVE-LABEL: umin_v2i32:
3009 ; NONEON-NOSVE: // %bb.0:
3010 ; NONEON-NOSVE-NEXT: sub sp, sp, #32
3011 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
3012 ; NONEON-NOSVE-NEXT: stp d0, d1, [sp, #8]
3013 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
3014 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
3015 ; NONEON-NOSVE-NEXT: cmp w10, w8
3016 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lo
3017 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
3018 ; NONEON-NOSVE-NEXT: cmp w9, w8
3019 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
3020 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #24]
3021 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #24]
3022 ; NONEON-NOSVE-NEXT: add sp, sp, #32
3023 ; NONEON-NOSVE-NEXT: ret
3024 %res = call <2 x i32> @llvm.umin.v2i32(<2 x i32> %op1, <2 x i32> %op2)
3025 ret <2 x i32> %res
3026 }
3028 define <4 x i32> @umin_v4i32(<4 x i32> %op1, <4 x i32> %op2) {
3029 ; CHECK-LABEL: umin_v4i32:
3030 ; CHECK: // %bb.0:
3031 ; CHECK-NEXT: ptrue p0.s, vl4
3032 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
3033 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
3034 ; CHECK-NEXT: umin z0.s, p0/m, z0.s, z1.s
3035 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
3036 ; CHECK-NEXT: ret
3037 ;
3038 ; NONEON-NOSVE-LABEL: umin_v4i32:
3039 ; NONEON-NOSVE: // %bb.0:
3040 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
3041 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
3042 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
3043 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
3044 ; NONEON-NOSVE-NEXT: cmp w10, w8
3045 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lo
3046 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
3047 ; NONEON-NOSVE-NEXT: cmp w9, w8
3048 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
3049 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
3050 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #40]
3051 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
3052 ; NONEON-NOSVE-NEXT: cmp w10, w8
3053 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lo
3054 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
3055 ; NONEON-NOSVE-NEXT: cmp w9, w8
3056 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
3057 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #32]
3058 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
3059 ; NONEON-NOSVE-NEXT: add sp, sp, #48
3060 ; NONEON-NOSVE-NEXT: ret
3061 %res = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %op1, <4 x i32> %op2)
3062 ret <4 x i32> %res
3063 }
3065 define void @umin_v8i32(ptr %a, ptr %b) {
3066 ; CHECK-LABEL: umin_v8i32:
3067 ; CHECK: // %bb.0:
3068 ; CHECK-NEXT: ldp q0, q3, [x1]
3069 ; CHECK-NEXT: ptrue p0.s, vl4
3070 ; CHECK-NEXT: ldp q1, q2, [x0]
3071 ; CHECK-NEXT: umin z0.s, p0/m, z0.s, z1.s
3072 ; CHECK-NEXT: movprfx z1, z2
3073 ; CHECK-NEXT: umin z1.s, p0/m, z1.s, z3.s
3074 ; CHECK-NEXT: stp q0, q1, [x0]
3075 ; CHECK-NEXT: ret
3076 ;
3077 ; NONEON-NOSVE-LABEL: umin_v8i32:
3078 ; NONEON-NOSVE: // %bb.0:
3079 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
3080 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
3081 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
3082 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
3083 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
3084 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
3085 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #40]
3086 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #60]
3087 ; NONEON-NOSVE-NEXT: cmp w10, w8
3088 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lo
3089 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #56]
3090 ; NONEON-NOSVE-NEXT: cmp w9, w8
3091 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
3092 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #32]
3093 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #88]
3094 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #52]
3095 ; NONEON-NOSVE-NEXT: cmp w10, w8
3096 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lo
3097 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #48]
3098 ; NONEON-NOSVE-NEXT: cmp w9, w8
3099 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
3100 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp, #8]
3101 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #80]
3102 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
3103 ; NONEON-NOSVE-NEXT: cmp w10, w8
3104 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lo
3105 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
3106 ; NONEON-NOSVE-NEXT: cmp w9, w8
3107 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
3108 ; NONEON-NOSVE-NEXT: ldp w9, w10, [sp]
3109 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #72]
3110 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
3111 ; NONEON-NOSVE-NEXT: cmp w10, w8
3112 ; NONEON-NOSVE-NEXT: csel w11, w10, w8, lo
3113 ; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
3114 ; NONEON-NOSVE-NEXT: cmp w9, w8
3115 ; NONEON-NOSVE-NEXT: csel w8, w9, w8, lo
3116 ; NONEON-NOSVE-NEXT: stp w8, w11, [sp, #64]
3117 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
3118 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
3119 ; NONEON-NOSVE-NEXT: add sp, sp, #96
3120 ; NONEON-NOSVE-NEXT: ret
3121 %op1 = load <8 x i32>, ptr %a
3122 %op2 = load <8 x i32>, ptr %b
3123 %res = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %op1, <8 x i32> %op2)
3124 store <8 x i32> %res, ptr %a
3125 ret void
3126 }
3128 ; Vector i64 min are not legal for NEON so use SVE when available.
3129 define <1 x i64> @umin_v1i64(<1 x i64> %op1, <1 x i64> %op2) {
3130 ; CHECK-LABEL: umin_v1i64:
3131 ; CHECK: // %bb.0:
3132 ; CHECK-NEXT: ptrue p0.d, vl1
3133 ; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0
3134 ; CHECK-NEXT: // kill: def $d1 killed $d1 def $z1
3135 ; CHECK-NEXT: umin z0.d, p0/m, z0.d, z1.d
3136 ; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0
3137 ; CHECK-NEXT: ret
3138 ;
3139 ; NONEON-NOSVE-LABEL: umin_v1i64:
3140 ; NONEON-NOSVE: // %bb.0:
3141 ; NONEON-NOSVE-NEXT: sub sp, sp, #16
3142 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16
3143 ; NONEON-NOSVE-NEXT: fmov x8, d1
3144 ; NONEON-NOSVE-NEXT: fmov x9, d0
3145 ; NONEON-NOSVE-NEXT: cmp x9, x8
3146 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lo
3147 ; NONEON-NOSVE-NEXT: str x8, [sp, #8]
3148 ; NONEON-NOSVE-NEXT: ldr d0, [sp, #8]
3149 ; NONEON-NOSVE-NEXT: add sp, sp, #16
3150 ; NONEON-NOSVE-NEXT: ret
3151 %res = call <1 x i64> @llvm.umin.v1i64(<1 x i64> %op1, <1 x i64> %op2)
3152 ret <1 x i64> %res
3153 }
3155 ; Vector i64 min are not legal for NEON so use SVE when available.
3156 define <2 x i64> @umin_v2i64(<2 x i64> %op1, <2 x i64> %op2) {
3157 ; CHECK-LABEL: umin_v2i64:
3158 ; CHECK: // %bb.0:
3159 ; CHECK-NEXT: ptrue p0.d, vl2
3160 ; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
3161 ; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1
3162 ; CHECK-NEXT: umin z0.d, p0/m, z0.d, z1.d
3163 ; CHECK-NEXT: // kill: def $q0 killed $q0 killed $z0
3164 ; CHECK-NEXT: ret
3165 ;
3166 ; NONEON-NOSVE-LABEL: umin_v2i64:
3167 ; NONEON-NOSVE: // %bb.0:
3168 ; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #-48]!
3169 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48
3170 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
3171 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
3172 ; NONEON-NOSVE-NEXT: cmp x10, x8
3173 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, lo
3174 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
3175 ; NONEON-NOSVE-NEXT: cmp x9, x8
3176 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lo
3177 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #32]
3178 ; NONEON-NOSVE-NEXT: ldr q0, [sp, #32]
3179 ; NONEON-NOSVE-NEXT: add sp, sp, #48
3180 ; NONEON-NOSVE-NEXT: ret
3181 %res = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %op1, <2 x i64> %op2)
3182 ret <2 x i64> %res
3183 }
3185 define void @umin_v4i64(ptr %a, ptr %b) {
3186 ; CHECK-LABEL: umin_v4i64:
3187 ; CHECK: // %bb.0:
3188 ; CHECK-NEXT: ldp q0, q3, [x1]
3189 ; CHECK-NEXT: ptrue p0.d, vl2
3190 ; CHECK-NEXT: ldp q1, q2, [x0]
3191 ; CHECK-NEXT: umin z0.d, p0/m, z0.d, z1.d
3192 ; CHECK-NEXT: movprfx z1, z2
3193 ; CHECK-NEXT: umin z1.d, p0/m, z1.d, z3.d
3194 ; CHECK-NEXT: stp q0, q1, [x0]
3195 ; CHECK-NEXT: ret
3196 ;
3197 ; NONEON-NOSVE-LABEL: umin_v4i64:
3198 ; NONEON-NOSVE: // %bb.0:
3199 ; NONEON-NOSVE-NEXT: sub sp, sp, #96
3200 ; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96
3201 ; NONEON-NOSVE-NEXT: ldp q3, q0, [x1]
3202 ; NONEON-NOSVE-NEXT: ldp q2, q1, [x0]
3203 ; NONEON-NOSVE-NEXT: stp q2, q3, [sp]
3204 ; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32]
3205 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp, #32]
3206 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #56]
3207 ; NONEON-NOSVE-NEXT: cmp x10, x8
3208 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, lo
3209 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #48]
3210 ; NONEON-NOSVE-NEXT: cmp x9, x8
3211 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lo
3212 ; NONEON-NOSVE-NEXT: ldp x9, x10, [sp]
3213 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #80]
3214 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #24]
3215 ; NONEON-NOSVE-NEXT: cmp x10, x8
3216 ; NONEON-NOSVE-NEXT: csel x11, x10, x8, lo
3217 ; NONEON-NOSVE-NEXT: ldr x8, [sp, #16]
3218 ; NONEON-NOSVE-NEXT: cmp x9, x8
3219 ; NONEON-NOSVE-NEXT: csel x8, x9, x8, lo
3220 ; NONEON-NOSVE-NEXT: stp x8, x11, [sp, #64]
3221 ; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64]
3222 ; NONEON-NOSVE-NEXT: stp q0, q1, [x0]
3223 ; NONEON-NOSVE-NEXT: add sp, sp, #96
3224 ; NONEON-NOSVE-NEXT: ret
3225 %op1 = load <4 x i64>, ptr %a
3226 %op2 = load <4 x i64>, ptr %b
3227 %res = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %op1, <4 x i64> %op2)
3228 store <4 x i64> %res, ptr %a
3229 ret void
3230 }
3232 declare <8 x i8> @llvm.smin.v8i8(<8 x i8>, <8 x i8>)
3233 declare <16 x i8> @llvm.smin.v16i8(<16 x i8>, <16 x i8>)
3234 declare <32 x i8> @llvm.smin.v32i8(<32 x i8>, <32 x i8>)
3235 declare <4 x i16> @llvm.smin.v4i16(<4 x i16>, <4 x i16>)
3236 declare <8 x i16> @llvm.smin.v8i16(<8 x i16>, <8 x i16>)
3237 declare <16 x i16> @llvm.smin.v16i16(<16 x i16>, <16 x i16>)
3238 declare <2 x i32> @llvm.smin.v2i32(<2 x i32>, <2 x i32>)
3239 declare <4 x i32> @llvm.smin.v4i32(<4 x i32>, <4 x i32>)
3240 declare <8 x i32> @llvm.smin.v8i32(<8 x i32>, <8 x i32>)
3241 declare <1 x i64> @llvm.smin.v1i64(<1 x i64>, <1 x i64>)
3242 declare <2 x i64> @llvm.smin.v2i64(<2 x i64>, <2 x i64>)
3243 declare <4 x i64> @llvm.smin.v4i64(<4 x i64>, <4 x i64>)
3245 declare <8 x i8> @llvm.smax.v8i8(<8 x i8>, <8 x i8>)
3246 declare <16 x i8> @llvm.smax.v16i8(<16 x i8>, <16 x i8>)
3247 declare <32 x i8> @llvm.smax.v32i8(<32 x i8>, <32 x i8>)
3248 declare <4 x i16> @llvm.smax.v4i16(<4 x i16>, <4 x i16>)
3249 declare <8 x i16> @llvm.smax.v8i16(<8 x i16>, <8 x i16>)
3250 declare <16 x i16> @llvm.smax.v16i16(<16 x i16>, <16 x i16>)
3251 declare <2 x i32> @llvm.smax.v2i32(<2 x i32>, <2 x i32>)
3252 declare <4 x i32> @llvm.smax.v4i32(<4 x i32>, <4 x i32>)
3253 declare <8 x i32> @llvm.smax.v8i32(<8 x i32>, <8 x i32>)
3254 declare <1 x i64> @llvm.smax.v1i64(<1 x i64>, <1 x i64>)
3255 declare <2 x i64> @llvm.smax.v2i64(<2 x i64>, <2 x i64>)
3256 declare <4 x i64> @llvm.smax.v4i64(<4 x i64>, <4 x i64>)
3258 declare <8 x i8> @llvm.umin.v8i8(<8 x i8>, <8 x i8>)
3259 declare <16 x i8> @llvm.umin.v16i8(<16 x i8>, <16 x i8>)
3260 declare <32 x i8> @llvm.umin.v32i8(<32 x i8>, <32 x i8>)
3261 declare <4 x i16> @llvm.umin.v4i16(<4 x i16>, <4 x i16>)
3262 declare <8 x i16> @llvm.umin.v8i16(<8 x i16>, <8 x i16>)
3263 declare <16 x i16> @llvm.umin.v16i16(<16 x i16>, <16 x i16>)
3264 declare <2 x i32> @llvm.umin.v2i32(<2 x i32>, <2 x i32>)
3265 declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>)
3266 declare <8 x i32> @llvm.umin.v8i32(<8 x i32>, <8 x i32>)
3267 declare <1 x i64> @llvm.umin.v1i64(<1 x i64>, <1 x i64>)
3268 declare <2 x i64> @llvm.umin.v2i64(<2 x i64>, <2 x i64>)
3269 declare <4 x i64> @llvm.umin.v4i64(<4 x i64>, <4 x i64>)
3271 declare <8 x i8> @llvm.umax.v8i8(<8 x i8>, <8 x i8>)
3272 declare <16 x i8> @llvm.umax.v16i8(<16 x i8>, <16 x i8>)
3273 declare <32 x i8> @llvm.umax.v32i8(<32 x i8>, <32 x i8>)
3274 declare <4 x i16> @llvm.umax.v4i16(<4 x i16>, <4 x i16>)
3275 declare <8 x i16> @llvm.umax.v8i16(<8 x i16>, <8 x i16>)
3276 declare <16 x i16> @llvm.umax.v16i16(<16 x i16>, <16 x i16>)
3277 declare <2 x i32> @llvm.umax.v2i32(<2 x i32>, <2 x i32>)
3278 declare <4 x i32> @llvm.umax.v4i32(<4 x i32>, <4 x i32>)
3279 declare <8 x i32> @llvm.umax.v8i32(<8 x i32>, <8 x i32>)
3280 declare <1 x i64> @llvm.umax.v1i64(<1 x i64>, <1 x i64>)
3281 declare <2 x i64> @llvm.umax.v2i64(<2 x i64>, <2 x i64>)
3282 declare <4 x i64> @llvm.umax.v4i64(<4 x i64>, <4 x i64>)