1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3 ; RUN: llc < %s -mtriple=aarch64-- -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
5 declare i4 @llvm.uadd.sat.i4(i4, i4)
6 declare i8 @llvm.uadd.sat.i8(i8, i8)
7 declare i16 @llvm.uadd.sat.i16(i16, i16)
8 declare i32 @llvm.uadd.sat.i32(i32, i32)
9 declare i64 @llvm.uadd.sat.i64(i64, i64)
11 define i32 @func(i32 %x, i32 %y) nounwind {
12 ; CHECK-SD-LABEL: func:
14 ; CHECK-SD-NEXT: adds w8, w0, w1
15 ; CHECK-SD-NEXT: csinv w0, w8, wzr, lo
18 ; CHECK-GI-LABEL: func:
20 ; CHECK-GI-NEXT: adds w8, w0, w1
21 ; CHECK-GI-NEXT: cset w9, hs
22 ; CHECK-GI-NEXT: tst w9, #0x1
23 ; CHECK-GI-NEXT: csinv w0, w8, wzr, eq
25 %tmp = call i32 @llvm.uadd.sat.i32(i32 %x, i32 %y);
29 define i64 @func2(i64 %x, i64 %y) nounwind {
30 ; CHECK-SD-LABEL: func2:
32 ; CHECK-SD-NEXT: adds x8, x0, x1
33 ; CHECK-SD-NEXT: csinv x0, x8, xzr, lo
36 ; CHECK-GI-LABEL: func2:
38 ; CHECK-GI-NEXT: adds x8, x0, x1
39 ; CHECK-GI-NEXT: cset w9, hs
40 ; CHECK-GI-NEXT: tst w9, #0x1
41 ; CHECK-GI-NEXT: csinv x0, x8, xzr, eq
43 %tmp = call i64 @llvm.uadd.sat.i64(i64 %x, i64 %y);
47 define i16 @func16(i16 %x, i16 %y) nounwind {
48 ; CHECK-SD-LABEL: func16:
50 ; CHECK-SD-NEXT: and w8, w0, #0xffff
51 ; CHECK-SD-NEXT: mov w9, #65535 // =0xffff
52 ; CHECK-SD-NEXT: add w8, w8, w1, uxth
53 ; CHECK-SD-NEXT: cmp w8, w9
54 ; CHECK-SD-NEXT: csel w0, w8, w9, lo
57 ; CHECK-GI-LABEL: func16:
59 ; CHECK-GI-NEXT: and w8, w1, #0xffff
60 ; CHECK-GI-NEXT: add w8, w8, w0, uxth
61 ; CHECK-GI-NEXT: cmp w8, w8, uxth
62 ; CHECK-GI-NEXT: csinv w0, w8, wzr, eq
64 %tmp = call i16 @llvm.uadd.sat.i16(i16 %x, i16 %y);
68 define i8 @func8(i8 %x, i8 %y) nounwind {
69 ; CHECK-SD-LABEL: func8:
71 ; CHECK-SD-NEXT: and w9, w0, #0xff
72 ; CHECK-SD-NEXT: mov w8, #255 // =0xff
73 ; CHECK-SD-NEXT: add w9, w9, w1, uxtb
74 ; CHECK-SD-NEXT: cmp w9, #255
75 ; CHECK-SD-NEXT: csel w0, w9, w8, lo
78 ; CHECK-GI-LABEL: func8:
80 ; CHECK-GI-NEXT: and w8, w1, #0xff
81 ; CHECK-GI-NEXT: add w8, w8, w0, uxtb
82 ; CHECK-GI-NEXT: cmp w8, w8, uxtb
83 ; CHECK-GI-NEXT: csinv w0, w8, wzr, eq
85 %tmp = call i8 @llvm.uadd.sat.i8(i8 %x, i8 %y);
89 define i4 @func3(i4 %x, i4 %y) nounwind {
90 ; CHECK-SD-LABEL: func3:
92 ; CHECK-SD-NEXT: and w9, w1, #0xf
93 ; CHECK-SD-NEXT: and w10, w0, #0xf
94 ; CHECK-SD-NEXT: mov w8, #15 // =0xf
95 ; CHECK-SD-NEXT: add w9, w10, w9
96 ; CHECK-SD-NEXT: cmp w9, #15
97 ; CHECK-SD-NEXT: csel w0, w9, w8, lo
100 ; CHECK-GI-LABEL: func3:
101 ; CHECK-GI: // %bb.0:
102 ; CHECK-GI-NEXT: and w9, w0, #0xf
103 ; CHECK-GI-NEXT: and w10, w1, #0xf
104 ; CHECK-GI-NEXT: mov w8, #15 // =0xf
105 ; CHECK-GI-NEXT: add w9, w9, w10
106 ; CHECK-GI-NEXT: and w10, w9, #0xf
107 ; CHECK-GI-NEXT: cmp w9, w10
108 ; CHECK-GI-NEXT: csel w0, w8, w9, ne
110 %tmp = call i4 @llvm.uadd.sat.i4(i4 %x, i4 %y);
113 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: