1 # RUN: llc -o - %s -mtriple=aarch64-windows -start-before=prologepilog \
2 # RUN: -stop-after=prologepilog | FileCheck %s
4 # Check that the callee-saved registers are saved starting with a STP
5 # with predecrement, followed by a separate stack adjustment later,
6 # if the optsize attribute is set.
8 # CHECK: early-clobber $sp = frame-setup STPXpre killed $x19, killed $x20, $sp, -2
9 # CHECK-NEXT: frame-setup SEH_SaveRegP_X 19, 20, -16
10 # CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
11 # CHECK-NEXT: frame-setup SEH_StackAlloc 16
12 # CHECK-NEXT: frame-setup SEH_PrologEnd
16 define dso_local i32 @func(i32 %a) optsize { ret i32 %a }
22 exposesReturnsTwice: false
24 regBankSelected: false
27 tracksRegLiveness: true
32 isFrameAddressTaken: false
33 isReturnAddressTaken: false
43 cvBytesOfCalleeSavedRegisters: 0
44 hasOpaqueSPAdjustment: false
46 hasMustTailInVarArgFunc: false
52 - { id: 0, name: '', type: default, offset: 0, size: 4, alignment: 4,
53 stack-id: default, callee-saved-register: '', callee-saved-restored: true,
54 local-offset: -4, debug-info-variable: '', debug-info-expression: '',
55 debug-info-location: '' }
58 machineFunctionInfo: {}
61 liveins: $x0, $x19, $x20
63 renamable $x8 = ADDXri %stack.0, 0, 0
64 $x19 = ADDXrr $x0, $x8
65 $x20 = ADDXrr $x19, $x0
66 $x0 = ADDXrr $x0, killed $x20