1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
2 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -O1 -amdgpu-prelink %s | FileCheck %s
4 ; Make sure that sin+cos -> sincos simplification happens after
5 ; initial IR simplifications, otherwise we can't identify the common
8 @.str = private unnamed_addr addrspace(4) constant [21 x i8] c"x: %f, y: %f, z: %f\0A\00", align 1
10 ; Should have call to sincos declarations, not calls to the asm pseudo-libcalls
11 define protected amdgpu_kernel void @swdev456865(ptr addrspace(1) %out0, ptr addrspace(1) %out1, ptr addrspace(1) %out2, float noundef %x) #0 {
12 ; CHECK-LABEL: define protected amdgpu_kernel void @swdev456865(
13 ; CHECK-SAME: ptr addrspace(1) nocapture writeonly initializes((0, 8)) [[OUT0:%.*]], ptr addrspace(1) nocapture writeonly initializes((0, 8)) [[OUT1:%.*]], ptr addrspace(1) nocapture writeonly initializes((0, 8)) [[OUT2:%.*]], float noundef [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
15 ; CHECK-NEXT: [[__SINCOS_:%.*]] = alloca float, align 4, addrspace(5)
16 ; CHECK-NEXT: [[I_I:%.*]] = call float @_Z6sincosfPU3AS5f(float [[X]], ptr addrspace(5) [[__SINCOS_]]) #[[ATTR1:[0-9]+]]
17 ; CHECK-NEXT: [[I_I2:%.*]] = load float, ptr addrspace(5) [[__SINCOS_]], align 4
18 ; CHECK-NEXT: [[ADD:%.*]] = fadd float [[I_I]], [[I_I2]]
19 ; CHECK-NEXT: [[CONV:%.*]] = fpext float [[X]] to double
20 ; CHECK-NEXT: [[CONV5:%.*]] = fpext float [[ADD]] to double
21 ; CHECK-NEXT: store double [[CONV]], ptr addrspace(1) [[OUT0]], align 8
22 ; CHECK-NEXT: store double [[CONV5]], ptr addrspace(1) [[OUT1]], align 8
23 ; CHECK-NEXT: store double [[CONV5]], ptr addrspace(1) [[OUT2]], align 8
24 ; CHECK-NEXT: ret void
27 %x.addr = alloca float, align 4, addrspace(5)
28 %y = alloca float, align 4, addrspace(5)
29 %z = alloca float, align 4, addrspace(5)
30 store float %x, ptr addrspace(5) %x.addr, align 4
31 call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) %y)
32 %i = load float, ptr addrspace(5) %x.addr, align 4
33 %call = call float @_Z3sinf(float noundef %i) #3
34 %i1 = load float, ptr addrspace(5) %x.addr, align 4
35 %call1 = call float @_Z3cosf(float noundef %i1) #3
36 %add = fadd float %call, %call1
37 store float %add, ptr addrspace(5) %y, align 4
38 call void @llvm.lifetime.start.p5(i64 4, ptr addrspace(5) %z)
39 %i2 = load float, ptr addrspace(5) %x.addr, align 4
40 %call2 = call float @_Z3cosf(float noundef %i2) #3
41 %i3 = load float, ptr addrspace(5) %x.addr, align 4
42 %call3 = call float @_Z3sinf(float noundef %i3) #3
43 %add4 = fadd float %call2, %call3
44 store float %add4, ptr addrspace(5) %z, align 4
45 %i4 = load float, ptr addrspace(5) %x.addr, align 4
46 %conv = fpext float %i4 to double
47 %i5 = load float, ptr addrspace(5) %y, align 4
48 %conv5 = fpext float %i5 to double
49 %i6 = load float, ptr addrspace(5) %z, align 4
50 %conv6 = fpext float %i6 to double
51 store double %conv, ptr addrspace(1) %out0, align 8
52 store double %conv5, ptr addrspace(1) %out1, align 8
53 store double %conv6, ptr addrspace(1) %out2, align 8
54 call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) %z)
55 call void @llvm.lifetime.end.p5(i64 4, ptr addrspace(5) %y)
59 declare void @llvm.lifetime.start.p5(i64 immarg, ptr addrspace(5) nocapture) #1
60 declare void @llvm.lifetime.end.p5(i64 immarg, ptr addrspace(5) nocapture) #1
62 define internal float @_Z3cosf(float noundef %arg) #2 {
64 %i = tail call float asm "pseudo-libcall-cos %0, %1", "=v,v"(float noundef %arg) #2
68 define internal float @_Z3sinf(float noundef %arg) #2 {
70 %i = tail call float asm "pseudo-libcall-sin %0, %1", "=v,v"(float noundef %arg) #2
74 attributes #0 = { norecurse nounwind }
75 attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
76 attributes #2 = { mustprogress nofree norecurse nounwind willreturn memory(none) }
77 attributes #3 = { nounwind willreturn memory(none) }