1 ; RUN: llc < %s -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-before=amdgpu-isel -stop-after=amdgpu-isel -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
2 ; RUN: llc < %s -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-before=amdgpu-isel -stop-after=amdgpu-isel -enable-new-pm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK
4 ; This caused failure in infinite cycle in Selection DAG (combine) due to missing insert_subvector.
6 ; CHECK-LABEL: name: test1
7 ; CHECK: GLOBAL_LOAD_DWORDX4
8 ; CHECK: GLOBAL_LOAD_DWORDX4
9 ; CHECK: GLOBAL_STORE_DWORDX4
10 define protected amdgpu_kernel void @test1() local_unnamed_addr !kernel_arg_addr_space !0 !kernel_arg_access_qual !1 !kernel_arg_type !2 !kernel_arg_base_type !2 !kernel_arg_type_qual !3 !kernel_arg_name !4 {
12 %tmp = load <3 x i64>, ptr addrspace(4) undef, align 16, !invariant.load !5
13 %srcA.load2 = extractelement <3 x i64> %tmp, i32 0
14 %tmp1 = inttoptr i64 %srcA.load2 to ptr addrspace(1)
15 %tmp2 = getelementptr inbounds double, ptr addrspace(1) %tmp1, i64 undef
16 %tmp4 = load <3 x double>, ptr addrspace(1) %tmp2, align 8, !tbaa !6
17 %tmp5 = extractelement <3 x double> %tmp4, i32 1
18 %tmp6 = insertelement <3 x double> undef, double %tmp5, i32 1
19 %tmp7 = insertelement <3 x double> %tmp6, double undef, i32 2
20 %tmp8 = load <3 x double>, ptr addrspace(1) undef, align 8, !tbaa !6
21 %tmp9 = extractelement <3 x double> %tmp8, i32 2
22 %tmp10 = insertelement <3 x double> undef, double %tmp9, i32 2
23 %tmp11 = fcmp olt <3 x double> %tmp10, %tmp7
24 %tmp12 = select <3 x i1> %tmp11, <3 x double> zeroinitializer, <3 x double> <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00>
25 %tmp13 = extractelement <3 x double> %tmp12, i64 1
26 %tmp14 = insertelement <2 x double> undef, double %tmp13, i32 1
27 store <2 x double> %tmp14, ptr addrspace(1) undef, align 8, !tbaa !6
31 ; This caused failure in Selection DAG due to lack of insert_subvector implementation.
33 ; CHECK-LABEL: name: test2
34 ; CHECK: GLOBAL_LOAD_DWORDX2
35 ; CHECK: GLOBAL_LOAD_DWORDX2
36 ; CHECK: GLOBAL_STORE_DWORDX2
37 define protected amdgpu_kernel void @test2() local_unnamed_addr !kernel_arg_addr_space !0 !kernel_arg_access_qual !1 !kernel_arg_type !2 !kernel_arg_base_type !2 !kernel_arg_type_qual !3 !kernel_arg_name !4 {
39 %tmp = load <3 x i64>, ptr addrspace(4) undef, align 16, !invariant.load !5
40 %srcA.load2 = extractelement <3 x i64> %tmp, i32 0
41 %tmp1 = inttoptr i64 %srcA.load2 to ptr addrspace(1)
42 %tmp2 = getelementptr inbounds double, ptr addrspace(1) %tmp1, i64 undef
43 %tmp4 = load <3 x double>, ptr addrspace(1) %tmp2, align 8, !tbaa !6
44 %tmp5 = extractelement <3 x double> %tmp4, i32 1
45 %tmp6 = insertelement <3 x double> undef, double %tmp5, i32 1
46 %tmp7 = insertelement <3 x double> %tmp6, double undef, i32 2
47 %tmp8 = load <3 x double>, ptr addrspace(1) undef, align 8, !tbaa !6
48 %tmp9 = extractelement <3 x double> %tmp8, i32 1
49 %tmp10 = insertelement <3 x double> undef, double %tmp9, i32 1
50 %tmp11 = insertelement <3 x double> %tmp10, double undef, i32 2
51 %tmp12 = fcmp olt <3 x double> %tmp11, %tmp7
52 %tmp13 = select <3 x i1> %tmp12, <3 x double> zeroinitializer, <3 x double> <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00>
53 %tmp14 = extractelement <3 x double> %tmp13, i64 2
54 store double %tmp14, ptr addrspace(1) undef, align 8, !tbaa !6
58 !0 = !{i32 1, i32 1, i32 1}
59 !1 = !{!"none", !"none", !"none"}
60 !2 = !{!"ptr", !"ptr", !"ptr"}
62 !4 = !{!"srcA", !"srcB", !"dst"}
65 !7 = !{!"double", !8, i64 0}
66 !8 = !{!"omnipotent char", !9, i64 0}
67 !9 = !{!"Simple C/C++ TBAA"}