| blob | c359b843e3cca1459f312ae6e2461f66a5c44653 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX6 %s
3 ; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s
4 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-TRUE16 %s
5 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX11-FAKE16 %s
6 ; RUN: llc -mtriple=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefixes=CYPRESS %s
7 ; RUN: llc -mtriple=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefixes=CAYMAN %s
9 declare float @llvm.convert.from.fp16.f32(i16) nounwind readnone
11 define amdgpu_kernel void @test_convert_fp16_to_fp32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {
12 ; GFX6-LABEL: test_convert_fp16_to_fp32:
13 ; GFX6: ; %bb.0:
14 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
15 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
16 ; GFX6-NEXT: s_mov_b32 s6, -1
17 ; GFX6-NEXT: s_mov_b32 s10, s6
18 ; GFX6-NEXT: s_mov_b32 s11, s7
19 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
20 ; GFX6-NEXT: s_mov_b32 s8, s2
21 ; GFX6-NEXT: s_mov_b32 s9, s3
22 ; GFX6-NEXT: buffer_load_ushort v0, off, s[8:11], 0
23 ; GFX6-NEXT: s_mov_b32 s4, s0
24 ; GFX6-NEXT: s_mov_b32 s5, s1
25 ; GFX6-NEXT: s_waitcnt vmcnt(0)
26 ; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0
27 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
28 ; GFX6-NEXT: s_endpgm
29 ;
30 ; GFX8-LABEL: test_convert_fp16_to_fp32:
31 ; GFX8: ; %bb.0:
32 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
33 ; GFX8-NEXT: s_mov_b32 s7, 0xf000
34 ; GFX8-NEXT: s_mov_b32 s6, -1
35 ; GFX8-NEXT: s_mov_b32 s10, s6
36 ; GFX8-NEXT: s_mov_b32 s11, s7
37 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
38 ; GFX8-NEXT: s_mov_b32 s8, s2
39 ; GFX8-NEXT: s_mov_b32 s9, s3
40 ; GFX8-NEXT: buffer_load_ushort v0, off, s[8:11], 0
41 ; GFX8-NEXT: s_mov_b32 s4, s0
42 ; GFX8-NEXT: s_mov_b32 s5, s1
43 ; GFX8-NEXT: s_waitcnt vmcnt(0)
44 ; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0
45 ; GFX8-NEXT: buffer_store_dword v0, off, s[4:7], 0
46 ; GFX8-NEXT: s_endpgm
47 ;
48 ; GFX11-TRUE16-LABEL: test_convert_fp16_to_fp32:
49 ; GFX11-TRUE16: ; %bb.0:
50 ; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
51 ; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1
52 ; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000
53 ; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6
54 ; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7
55 ; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
56 ; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2
57 ; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3
58 ; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0
59 ; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0
60 ; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1
61 ; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
62 ; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l
63 ; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0
64 ; GFX11-TRUE16-NEXT: s_endpgm
65 ;
66 ; GFX11-FAKE16-LABEL: test_convert_fp16_to_fp32:
67 ; GFX11-FAKE16: ; %bb.0:
68 ; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
69 ; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1
70 ; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000
71 ; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6
72 ; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7
73 ; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
74 ; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2
75 ; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3
76 ; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0
77 ; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0
78 ; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1
79 ; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
80 ; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0
81 ; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[4:7], 0
82 ; GFX11-FAKE16-NEXT: s_endpgm
83 ;
84 ; CYPRESS-LABEL: test_convert_fp16_to_fp32:
85 ; CYPRESS: ; %bb.0:
86 ; CYPRESS-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
87 ; CYPRESS-NEXT: TEX 0 @6
88 ; CYPRESS-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
89 ; CYPRESS-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
90 ; CYPRESS-NEXT: CF_END
91 ; CYPRESS-NEXT: PAD
92 ; CYPRESS-NEXT: Fetch clause starting at 6:
93 ; CYPRESS-NEXT: VTX_READ_16 T0.X, T0.X, 0, #1
94 ; CYPRESS-NEXT: ALU clause starting at 8:
95 ; CYPRESS-NEXT: MOV * T0.X, KC0[2].Z,
96 ; CYPRESS-NEXT: ALU clause starting at 9:
97 ; CYPRESS-NEXT: FLT16_TO_FLT32 T0.X, T0.X,
98 ; CYPRESS-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
99 ; CYPRESS-NEXT: 2(2.802597e-45), 0(0.000000e+00)
100 ;
101 ; CAYMAN-LABEL: test_convert_fp16_to_fp32:
102 ; CAYMAN: ; %bb.0:
103 ; CAYMAN-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
104 ; CAYMAN-NEXT: TEX 0 @6
105 ; CAYMAN-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
106 ; CAYMAN-NEXT: MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X
107 ; CAYMAN-NEXT: CF_END
108 ; CAYMAN-NEXT: PAD
109 ; CAYMAN-NEXT: Fetch clause starting at 6:
110 ; CAYMAN-NEXT: VTX_READ_16 T0.X, T0.X, 0, #1
111 ; CAYMAN-NEXT: ALU clause starting at 8:
112 ; CAYMAN-NEXT: MOV * T0.X, KC0[2].Z,
113 ; CAYMAN-NEXT: ALU clause starting at 9:
114 ; CAYMAN-NEXT: FLT16_TO_FLT32 * T0.X, T0.X,
115 ; CAYMAN-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
116 ; CAYMAN-NEXT: 2(2.802597e-45), 0(0.000000e+00)
117 %val = load i16, ptr addrspace(1) %in, align 2
118 %cvt = call float @llvm.convert.from.fp16.f32(i16 %val) nounwind readnone
119 store float %cvt, ptr addrspace(1) %out, align 4
120 ret void
121 }