1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX11,GFX11-SDAG %s
3 ; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX11,GFX11-GISEL %s
5 define amdgpu_kernel void @test_get_doorbell(ptr addrspace(1) %out) {
6 ; GFX11-SDAG-LABEL: test_get_doorbell:
8 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
9 ; GFX11-SDAG-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_GET_DOORBELL)
10 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
11 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
12 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
13 ; GFX11-SDAG-NEXT: s_endpgm
15 ; GFX11-GISEL-LABEL: test_get_doorbell:
16 ; GFX11-GISEL: ; %bb.0:
17 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
18 ; GFX11-GISEL-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_GET_DOORBELL)
19 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
20 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
21 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
22 ; GFX11-GISEL-NEXT: s_endpgm
23 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 128)
24 store i32 %ret, ptr addrspace(1) %out
28 define amdgpu_kernel void @test_get_ddid(ptr addrspace(1) %out) {
29 ; GFX11-SDAG-LABEL: test_get_ddid:
30 ; GFX11-SDAG: ; %bb.0:
31 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
32 ; GFX11-SDAG-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_GET_DDID)
33 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
34 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
35 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
36 ; GFX11-SDAG-NEXT: s_endpgm
38 ; GFX11-GISEL-LABEL: test_get_ddid:
39 ; GFX11-GISEL: ; %bb.0:
40 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
41 ; GFX11-GISEL-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_GET_DDID)
42 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
43 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
44 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
45 ; GFX11-GISEL-NEXT: s_endpgm
46 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 129)
47 store i32 %ret, ptr addrspace(1) %out
51 define amdgpu_kernel void @test_get_tma(ptr addrspace(1) %out) {
52 ; GFX11-LABEL: test_get_tma:
54 ; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
55 ; GFX11-NEXT: s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_TMA)
56 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
57 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
58 ; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
59 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
60 ; GFX11-NEXT: s_endpgm
61 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 130)
62 store i64 %ret, ptr addrspace(1) %out
66 define amdgpu_kernel void @test_get_realtime(ptr addrspace(1) %out) {
67 ; GFX11-LABEL: test_get_realtime:
69 ; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
70 ; GFX11-NEXT: s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_REALTIME)
71 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
72 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
73 ; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
74 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
75 ; GFX11-NEXT: s_endpgm
76 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 131)
77 store i64 %ret, ptr addrspace(1) %out
81 define amdgpu_kernel void @test_savewave(ptr addrspace(1) %out) {
82 ; GFX11-SDAG-LABEL: test_savewave:
83 ; GFX11-SDAG: ; %bb.0:
84 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
85 ; GFX11-SDAG-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_SAVE_WAVE)
86 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
87 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
88 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
89 ; GFX11-SDAG-NEXT: s_endpgm
91 ; GFX11-GISEL-LABEL: test_savewave:
92 ; GFX11-GISEL: ; %bb.0:
93 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
94 ; GFX11-GISEL-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(MSG_RTN_SAVE_WAVE)
95 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
96 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
97 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
98 ; GFX11-GISEL-NEXT: s_endpgm
99 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 132)
100 store i32 %ret, ptr addrspace(1) %out
104 define amdgpu_kernel void @test_get_tba(ptr addrspace(1) %out) {
105 ; GFX11-LABEL: test_get_tba:
107 ; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
108 ; GFX11-NEXT: s_sendmsg_rtn_b64 s[2:3], sendmsg(MSG_RTN_GET_TBA)
109 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
110 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
111 ; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
112 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
113 ; GFX11-NEXT: s_endpgm
114 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 133)
115 store i64 %ret, ptr addrspace(1) %out
119 define amdgpu_kernel void @test_get_0_i32(ptr addrspace(1) %out) {
120 ; GFX11-SDAG-LABEL: test_get_0_i32:
121 ; GFX11-SDAG: ; %bb.0:
122 ; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
123 ; GFX11-SDAG-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(0, 0, 0)
124 ; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
125 ; GFX11-SDAG-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2
126 ; GFX11-SDAG-NEXT: global_store_b32 v0, v1, s[0:1]
127 ; GFX11-SDAG-NEXT: s_endpgm
129 ; GFX11-GISEL-LABEL: test_get_0_i32:
130 ; GFX11-GISEL: ; %bb.0:
131 ; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
132 ; GFX11-GISEL-NEXT: s_sendmsg_rtn_b32 s2, sendmsg(0, 0, 0)
133 ; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
134 ; GFX11-GISEL-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v0, s2
135 ; GFX11-GISEL-NEXT: global_store_b32 v1, v0, s[0:1]
136 ; GFX11-GISEL-NEXT: s_endpgm
137 %ret = call i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32 0)
138 store i32 %ret, ptr addrspace(1) %out
142 define amdgpu_kernel void @test_get_99999_i64(ptr addrspace(1) %out) {
143 ; GFX11-LABEL: test_get_99999_i64:
145 ; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
146 ; GFX11-NEXT: s_sendmsg_rtn_b64 s[2:3], 99999
147 ; GFX11-NEXT: v_mov_b32_e32 v2, 0
148 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
149 ; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
150 ; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]
151 ; GFX11-NEXT: s_endpgm
152 %ret = call i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32 99999)
153 store i64 %ret, ptr addrspace(1) %out
157 declare i32 @llvm.amdgcn.s.sendmsg.rtn.i32(i32)
158 declare i64 @llvm.amdgcn.s.sendmsg.rtn.i64(i32)