| blob | 2bb89fdabda7e9c65eda4f526370a213a4697535 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX6 %s
3 ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX8 %s
4 ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX9 %s
5 ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX10 %s
6 ; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX11 %s
8 define amdgpu_kernel void @sin_f16(ptr addrspace(1) %r, ptr addrspace(1) %a) {
9 ; GFX6-LABEL: sin_f16:
10 ; GFX6: ; %bb.0:
11 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
12 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
13 ; GFX6-NEXT: s_mov_b32 s6, -1
14 ; GFX6-NEXT: s_mov_b32 s10, s6
15 ; GFX6-NEXT: s_mov_b32 s11, s7
16 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
17 ; GFX6-NEXT: s_mov_b32 s8, s2
18 ; GFX6-NEXT: s_mov_b32 s9, s3
19 ; GFX6-NEXT: buffer_load_ushort v0, off, s[8:11], 0
20 ; GFX6-NEXT: s_mov_b32 s4, s0
21 ; GFX6-NEXT: s_mov_b32 s5, s1
22 ; GFX6-NEXT: s_waitcnt vmcnt(0)
23 ; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0
24 ; GFX6-NEXT: v_mul_f32_e32 v0, 0x3e22f983, v0
25 ; GFX6-NEXT: v_fract_f32_e32 v0, v0
26 ; GFX6-NEXT: v_sin_f32_e32 v0, v0
27 ; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0
28 ; GFX6-NEXT: buffer_store_short v0, off, s[4:7], 0
29 ; GFX6-NEXT: s_endpgm
30 ;
31 ; GFX8-LABEL: sin_f16:
32 ; GFX8: ; %bb.0:
33 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
34 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
35 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
36 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
37 ; GFX8-NEXT: flat_load_ushort v0, v[0:1]
38 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
39 ; GFX8-NEXT: s_waitcnt vmcnt(0)
40 ; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0
41 ; GFX8-NEXT: v_fract_f16_e32 v0, v0
42 ; GFX8-NEXT: v_sin_f16_e32 v2, v0
43 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
44 ; GFX8-NEXT: flat_store_short v[0:1], v2
45 ; GFX8-NEXT: s_endpgm
46 ;
47 ; GFX9-LABEL: sin_f16:
48 ; GFX9: ; %bb.0:
49 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
50 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
51 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
52 ; GFX9-NEXT: global_load_ushort v1, v0, s[2:3]
53 ; GFX9-NEXT: s_waitcnt vmcnt(0)
54 ; GFX9-NEXT: v_mul_f16_e32 v1, 0.15915494, v1
55 ; GFX9-NEXT: v_sin_f16_e32 v1, v1
56 ; GFX9-NEXT: global_store_short v0, v1, s[0:1]
57 ; GFX9-NEXT: s_endpgm
58 ;
59 ; GFX10-LABEL: sin_f16:
60 ; GFX10: ; %bb.0:
61 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
62 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
63 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
64 ; GFX10-NEXT: global_load_ushort v1, v0, s[2:3]
65 ; GFX10-NEXT: s_waitcnt vmcnt(0)
66 ; GFX10-NEXT: v_mul_f16_e32 v1, 0.15915494, v1
67 ; GFX10-NEXT: v_sin_f16_e32 v1, v1
68 ; GFX10-NEXT: global_store_short v0, v1, s[0:1]
69 ; GFX10-NEXT: s_endpgm
70 ;
71 ; GFX11-LABEL: sin_f16:
72 ; GFX11: ; %bb.0:
73 ; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
74 ; GFX11-NEXT: v_mov_b32_e32 v0, 0
75 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
76 ; GFX11-NEXT: global_load_u16 v1, v0, s[2:3]
77 ; GFX11-NEXT: s_waitcnt vmcnt(0)
78 ; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1
79 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
80 ; GFX11-NEXT: v_sin_f16_e32 v1, v1
81 ; GFX11-NEXT: global_store_b16 v0, v1, s[0:1]
82 ; GFX11-NEXT: s_endpgm
83 %a.val = load half, ptr addrspace(1) %a
84 %r.val = call half @llvm.sin.f16(half %a.val)
85 store half %r.val, ptr addrspace(1) %r
86 ret void
87 }
89 define amdgpu_kernel void @sin_v2f16(ptr addrspace(1) %r, ptr addrspace(1) %a) {
90 ; GFX6-LABEL: sin_v2f16:
91 ; GFX6: ; %bb.0:
92 ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
93 ; GFX6-NEXT: s_mov_b32 s7, 0xf000
94 ; GFX6-NEXT: s_mov_b32 s6, -1
95 ; GFX6-NEXT: s_mov_b32 s10, s6
96 ; GFX6-NEXT: s_mov_b32 s11, s7
97 ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
98 ; GFX6-NEXT: s_mov_b32 s8, s2
99 ; GFX6-NEXT: s_mov_b32 s9, s3
100 ; GFX6-NEXT: buffer_load_dword v0, off, s[8:11], 0
101 ; GFX6-NEXT: s_mov_b32 s4, s0
102 ; GFX6-NEXT: s_mov_b32 s5, s1
103 ; GFX6-NEXT: s_waitcnt vmcnt(0)
104 ; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v0
105 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
106 ; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0
107 ; GFX6-NEXT: v_mul_f32_e32 v1, 0x3e22f983, v1
108 ; GFX6-NEXT: v_fract_f32_e32 v1, v1
109 ; GFX6-NEXT: v_mul_f32_e32 v0, 0x3e22f983, v0
110 ; GFX6-NEXT: v_fract_f32_e32 v0, v0
111 ; GFX6-NEXT: v_sin_f32_e32 v0, v0
112 ; GFX6-NEXT: v_sin_f32_e32 v1, v1
113 ; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0
114 ; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1
115 ; GFX6-NEXT: v_lshlrev_b32_e32 v0, 16, v0
116 ; GFX6-NEXT: v_or_b32_e32 v0, v1, v0
117 ; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0
118 ; GFX6-NEXT: s_endpgm
119 ;
120 ; GFX8-LABEL: sin_v2f16:
121 ; GFX8: ; %bb.0:
122 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
123 ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
124 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
125 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
126 ; GFX8-NEXT: flat_load_dword v0, v[0:1]
127 ; GFX8-NEXT: v_mov_b32_e32 v1, 0x3118
128 ; GFX8-NEXT: s_waitcnt vmcnt(0)
129 ; GFX8-NEXT: v_mul_f16_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
130 ; GFX8-NEXT: v_mul_f16_e32 v0, 0.15915494, v0
131 ; GFX8-NEXT: v_fract_f16_e32 v1, v1
132 ; GFX8-NEXT: v_fract_f16_e32 v0, v0
133 ; GFX8-NEXT: v_sin_f16_sdwa v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
134 ; GFX8-NEXT: v_sin_f16_e32 v3, v0
135 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
136 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
137 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v2
138 ; GFX8-NEXT: flat_store_dword v[0:1], v2
139 ; GFX8-NEXT: s_endpgm
140 ;
141 ; GFX9-LABEL: sin_v2f16:
142 ; GFX9: ; %bb.0:
143 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
144 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
145 ; GFX9-NEXT: v_mov_b32_e32 v2, 0x3118
146 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
147 ; GFX9-NEXT: global_load_dword v1, v0, s[2:3]
148 ; GFX9-NEXT: s_waitcnt vmcnt(0)
149 ; GFX9-NEXT: v_mul_f16_e32 v3, 0.15915494, v1
150 ; GFX9-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
151 ; GFX9-NEXT: v_sin_f16_e32 v2, v3
152 ; GFX9-NEXT: v_sin_f16_e32 v1, v1
153 ; GFX9-NEXT: v_pack_b32_f16 v1, v2, v1
154 ; GFX9-NEXT: global_store_dword v0, v1, s[0:1]
155 ; GFX9-NEXT: s_endpgm
156 ;
157 ; GFX10-LABEL: sin_v2f16:
158 ; GFX10: ; %bb.0:
159 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
160 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
161 ; GFX10-NEXT: v_mov_b32_e32 v2, 0x3118
162 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
163 ; GFX10-NEXT: global_load_dword v1, v0, s[2:3]
164 ; GFX10-NEXT: s_waitcnt vmcnt(0)
165 ; GFX10-NEXT: v_mul_f16_e32 v3, 0.15915494, v1
166 ; GFX10-NEXT: v_mul_f16_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
167 ; GFX10-NEXT: v_sin_f16_e32 v2, v3
168 ; GFX10-NEXT: v_sin_f16_e32 v1, v1
169 ; GFX10-NEXT: v_pack_b32_f16 v1, v2, v1
170 ; GFX10-NEXT: global_store_dword v0, v1, s[0:1]
171 ; GFX10-NEXT: s_endpgm
172 ;
173 ; GFX11-LABEL: sin_v2f16:
174 ; GFX11: ; %bb.0:
175 ; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
176 ; GFX11-NEXT: v_mov_b32_e32 v0, 0
177 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
178 ; GFX11-NEXT: global_load_b32 v1, v0, s[2:3]
179 ; GFX11-NEXT: s_waitcnt vmcnt(0)
180 ; GFX11-NEXT: v_lshrrev_b32_e32 v2, 16, v1
181 ; GFX11-NEXT: v_mul_f16_e32 v1, 0.15915494, v1
182 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
183 ; GFX11-NEXT: v_mul_f16_e32 v2, 0.15915494, v2
184 ; GFX11-NEXT: v_sin_f16_e32 v1, v1
185 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
186 ; GFX11-NEXT: v_sin_f16_e32 v2, v2
187 ; GFX11-NEXT: s_waitcnt_depctr 0xfff
188 ; GFX11-NEXT: v_pack_b32_f16 v1, v1, v2
189 ; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]
190 ; GFX11-NEXT: s_endpgm
191 %a.val = load <2 x half>, ptr addrspace(1) %a
192 %r.val = call <2 x half> @llvm.sin.v2f16(<2 x half> %a.val)
193 store <2 x half> %r.val, ptr addrspace(1) %r
194 ret void
195 }
197 declare half @llvm.sin.f16(half %a)
198 declare <2 x half> @llvm.sin.v2f16(<2 x half> %a)