llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll

   1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals
   2 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-attributor %s | FileCheck --check-prefixes=CHECK,OW %s
   3 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes='amdgpu-attributor<closed-world>' %s | FileCheck --check-prefixes=CHECK,CW %s
   4 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes='amdgpu-attributor<closed-world>' -amdgpu-indirect-call-specialization-threshold=0 %s | FileCheck --check-prefixes=CHECK,NO %s
   5
   6 target datalayout = "A5"
   7
   8 @G = global i32 0, align 4
   9
  10 ;.
  11 ; CHECK: @G = global i32 0, align 4
  12 ;.
  13 define void @bar1() {
  14 ; CHECK-LABEL: define {{[^@]+}}@bar1
  15 ; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
  16 ; CHECK-NEXT:  entry:
  17 ; CHECK-NEXT:    store i32 1, ptr @G, align 4
  18 ; CHECK-NEXT:    ret void
  19 ;
  20 entry:
  21   store i32 1, ptr @G, align 4
  22   ret void
  23 }
  24
  25 define void @bar2() {
  26 ; CHECK-LABEL: define {{[^@]+}}@bar2
  27 ; CHECK-SAME: () #[[ATTR0]] {
  28 ; CHECK-NEXT:  entry:
  29 ; CHECK-NEXT:    store i32 2, ptr @G, align 4
  30 ; CHECK-NEXT:    ret void
  31 ;
  32 entry:
  33   store i32 2, ptr @G, align 4
  34   ret void
  35 }
  36
  37 define ptr @helper1() {
  38 ; CHECK-LABEL: define {{[^@]+}}@helper1
  39 ; CHECK-SAME: () #[[ATTR0]] {
  40 ; CHECK-NEXT:  entry:
  41 ; CHECK-NEXT:    ret ptr @bar1
  42 ;
  43 entry:
  44   ret ptr @bar1
  45 }
  46
  47 define ptr @helper2() {
  48 ; CHECK-LABEL: define {{[^@]+}}@helper2
  49 ; CHECK-SAME: () #[[ATTR0]] {
  50 ; CHECK-NEXT:  entry:
  51 ; CHECK-NEXT:    ret ptr @bar2
  52 ;
  53 entry:
  54   ret ptr @bar2
  55 }
  56
  57 define amdgpu_kernel void @foo(ptr noundef %fp) {
  58 ; OW-LABEL: define {{[^@]+}}@foo
  59 ; OW-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR1:[0-9]+]] {
  60 ; OW-NEXT:  entry:
  61 ; OW-NEXT:    [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
  62 ; OW-NEXT:    store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
  63 ; OW-NEXT:    call void [[FP]]()
  64 ; OW-NEXT:    ret void
  65 ;
  66 ; CW-LABEL: define {{[^@]+}}@foo
  67 ; CW-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR1:[0-9]+]] {
  68 ; CW-NEXT:  entry:
  69 ; CW-NEXT:    [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
  70 ; CW-NEXT:    store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
  71 ; CW-NEXT:    [[TMP0:%.*]] = icmp eq ptr [[FP]], @bar1
  72 ; CW-NEXT:    br i1 [[TMP0]], label [[TMP1:%.*]], label [[TMP2:%.*]]
  73 ; CW:       1:
  74 ; CW-NEXT:    call void @bar1()
  75 ; CW-NEXT:    br label [[TMP5:%.*]]
  76 ; CW:       2:
  77 ; CW-NEXT:    br i1 true, label [[TMP3:%.*]], label [[TMP4:%.*]]
  78 ; CW:       3:
  79 ; CW-NEXT:    call void @bar2()
  80 ; CW-NEXT:    br label [[TMP5]]
  81 ; CW:       4:
  82 ; CW-NEXT:    unreachable
  83 ; CW:       5:
  84 ; CW-NEXT:    ret void
  85 ;
  86 ; NO-LABEL: define {{[^@]+}}@foo
  87 ; NO-SAME: (ptr noundef [[FP:%.*]]) #[[ATTR1:[0-9]+]] {
  88 ; NO-NEXT:  entry:
  89 ; NO-NEXT:    [[FP_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
  90 ; NO-NEXT:    store ptr [[FP]], ptr addrspace(5) [[FP_ADDR]], align 8
  91 ; NO-NEXT:    call void [[FP]](), !callees [[META0:![0-9]+]]
  92 ; NO-NEXT:    ret void
  93 ;
  94 entry:
  95   %fp.addr = alloca ptr, addrspace(5)
  96   store ptr %fp, ptr addrspace(5) %fp.addr
  97   %load = load ptr, ptr addrspace(5) %fp.addr
  98   call void %load()
  99   ret void
 100 }
 101
 102 ;.
 103 ; NO: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
 104 ; NO: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
 105 ;.
 106 ; OW: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
 107 ; OW: attributes #[[ATTR1]] = { "uniform-work-group-size"="false" }
 108 ;.
 109 ; CW: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
 110 ; CW: attributes #[[ATTR1]] = { "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
 111 ;.
 112 ; NO: [[META0]] = !{ptr @bar1, ptr @bar2}
 113 ;.