1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=thumbv6m-none-eabi -float-abi=soft %s -o - | FileCheck %s --check-prefixes=SOFT
3 ; RUN: llc -mtriple=thumbv7m-none-eabihf -mattr=+vfp2sp %s -o - | FileCheck %s --check-prefixes=VFP,VFP2
4 ; RUN: llc -mtriple=thumbv8.1m.main-none-eabihf -mattr=+fullfp16,+fp64 %s -o - | FileCheck %s --check-prefixes=VFP,FULL
8 define i32 @stest_f64i32(double %x) {
9 ; SOFT-LABEL: stest_f64i32:
10 ; SOFT: @ %bb.0: @ %entry
11 ; SOFT-NEXT: .save {r4, lr}
12 ; SOFT-NEXT: push {r4, lr}
13 ; SOFT-NEXT: bl __aeabi_d2lz
14 ; SOFT-NEXT: movs r2, #0
15 ; SOFT-NEXT: ldr r3, .LCPI0_0
16 ; SOFT-NEXT: subs r4, r0, r3
17 ; SOFT-NEXT: mov r4, r1
18 ; SOFT-NEXT: sbcs r4, r2
19 ; SOFT-NEXT: blt .LBB0_2
20 ; SOFT-NEXT: @ %bb.1: @ %entry
21 ; SOFT-NEXT: mov r1, r2
22 ; SOFT-NEXT: .LBB0_2: @ %entry
23 ; SOFT-NEXT: blt .LBB0_4
24 ; SOFT-NEXT: @ %bb.3: @ %entry
25 ; SOFT-NEXT: mov r0, r3
26 ; SOFT-NEXT: .LBB0_4: @ %entry
27 ; SOFT-NEXT: mvns r3, r2
28 ; SOFT-NEXT: movs r2, #1
29 ; SOFT-NEXT: lsls r2, r2, #31
30 ; SOFT-NEXT: subs r4, r2, r0
31 ; SOFT-NEXT: sbcs r3, r1
32 ; SOFT-NEXT: blt .LBB0_6
33 ; SOFT-NEXT: @ %bb.5: @ %entry
34 ; SOFT-NEXT: mov r0, r2
35 ; SOFT-NEXT: .LBB0_6: @ %entry
36 ; SOFT-NEXT: pop {r4, pc}
37 ; SOFT-NEXT: .p2align 2
39 ; SOFT-NEXT: .LCPI0_0:
40 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
42 ; VFP2-LABEL: stest_f64i32:
43 ; VFP2: @ %bb.0: @ %entry
44 ; VFP2-NEXT: .save {r7, lr}
45 ; VFP2-NEXT: push {r7, lr}
46 ; VFP2-NEXT: vmov r0, r1, d0
47 ; VFP2-NEXT: bl __aeabi_d2lz
48 ; VFP2-NEXT: mvn r12, #-2147483648
49 ; VFP2-NEXT: subs.w r3, r0, r12
50 ; VFP2-NEXT: mov.w r2, #0
51 ; VFP2-NEXT: sbcs r3, r1, #0
53 ; VFP2-NEXT: movlt r2, #1
54 ; VFP2-NEXT: cmp r2, #0
56 ; VFP2-NEXT: movne r2, r1
57 ; VFP2-NEXT: moveq r0, r12
58 ; VFP2-NEXT: mov.w r1, #-1
59 ; VFP2-NEXT: rsbs.w r3, r0, #-2147483648
60 ; VFP2-NEXT: sbcs r1, r2
62 ; VFP2-NEXT: movge.w r0, #-2147483648
63 ; VFP2-NEXT: pop {r7, pc}
65 ; FULL-LABEL: stest_f64i32:
66 ; FULL: @ %bb.0: @ %entry
67 ; FULL-NEXT: vcvt.s32.f64 s0, d0
68 ; FULL-NEXT: vmov r0, s0
71 %conv = fptosi double %x to i64
72 %0 = icmp slt i64 %conv, 2147483647
73 %spec.store.select = select i1 %0, i64 %conv, i64 2147483647
74 %1 = icmp sgt i64 %spec.store.select, -2147483648
75 %spec.store.select7 = select i1 %1, i64 %spec.store.select, i64 -2147483648
76 %conv6 = trunc i64 %spec.store.select7 to i32
80 define i32 @utest_f64i32(double %x) {
81 ; SOFT-LABEL: utest_f64i32:
82 ; SOFT: @ %bb.0: @ %entry
83 ; SOFT-NEXT: .save {r7, lr}
84 ; SOFT-NEXT: push {r7, lr}
85 ; SOFT-NEXT: bl __aeabi_d2ulz
86 ; SOFT-NEXT: movs r2, #0
87 ; SOFT-NEXT: adds r3, r0, #1
88 ; SOFT-NEXT: sbcs r1, r2
89 ; SOFT-NEXT: blo .LBB1_2
90 ; SOFT-NEXT: @ %bb.1: @ %entry
91 ; SOFT-NEXT: mvns r0, r2
92 ; SOFT-NEXT: .LBB1_2: @ %entry
93 ; SOFT-NEXT: pop {r7, pc}
95 ; VFP2-LABEL: utest_f64i32:
96 ; VFP2: @ %bb.0: @ %entry
97 ; VFP2-NEXT: .save {r7, lr}
98 ; VFP2-NEXT: push {r7, lr}
99 ; VFP2-NEXT: vmov r0, r1, d0
100 ; VFP2-NEXT: bl __aeabi_d2ulz
101 ; VFP2-NEXT: subs.w r2, r0, #-1
102 ; VFP2-NEXT: sbcs r1, r1, #0
104 ; VFP2-NEXT: movhs.w r0, #-1
105 ; VFP2-NEXT: pop {r7, pc}
107 ; FULL-LABEL: utest_f64i32:
108 ; FULL: @ %bb.0: @ %entry
109 ; FULL-NEXT: vcvt.u32.f64 s0, d0
110 ; FULL-NEXT: vmov r0, s0
113 %conv = fptoui double %x to i64
114 %0 = icmp ult i64 %conv, 4294967295
115 %spec.store.select = select i1 %0, i64 %conv, i64 4294967295
116 %conv6 = trunc i64 %spec.store.select to i32
120 define i32 @ustest_f64i32(double %x) {
121 ; SOFT-LABEL: ustest_f64i32:
122 ; SOFT: @ %bb.0: @ %entry
123 ; SOFT-NEXT: .save {r4, lr}
124 ; SOFT-NEXT: push {r4, lr}
125 ; SOFT-NEXT: bl __aeabi_d2lz
126 ; SOFT-NEXT: movs r2, #0
127 ; SOFT-NEXT: mvns r3, r2
128 ; SOFT-NEXT: adds r4, r0, #1
129 ; SOFT-NEXT: mov r4, r1
130 ; SOFT-NEXT: sbcs r4, r2
131 ; SOFT-NEXT: blt .LBB2_2
132 ; SOFT-NEXT: @ %bb.1: @ %entry
133 ; SOFT-NEXT: mov r1, r2
134 ; SOFT-NEXT: .LBB2_2: @ %entry
135 ; SOFT-NEXT: blt .LBB2_4
136 ; SOFT-NEXT: @ %bb.3: @ %entry
137 ; SOFT-NEXT: mov r0, r3
138 ; SOFT-NEXT: .LBB2_4: @ %entry
139 ; SOFT-NEXT: rsbs r3, r0, #0
140 ; SOFT-NEXT: mov r3, r2
141 ; SOFT-NEXT: sbcs r3, r1
142 ; SOFT-NEXT: blt .LBB2_7
143 ; SOFT-NEXT: @ %bb.5: @ %entry
144 ; SOFT-NEXT: cmp r2, #0
145 ; SOFT-NEXT: beq .LBB2_8
146 ; SOFT-NEXT: .LBB2_6: @ %entry
147 ; SOFT-NEXT: pop {r4, pc}
148 ; SOFT-NEXT: .LBB2_7:
149 ; SOFT-NEXT: movs r2, #1
150 ; SOFT-NEXT: cmp r2, #0
151 ; SOFT-NEXT: bne .LBB2_6
152 ; SOFT-NEXT: .LBB2_8: @ %entry
153 ; SOFT-NEXT: mov r0, r2
154 ; SOFT-NEXT: pop {r4, pc}
156 ; VFP2-LABEL: ustest_f64i32:
157 ; VFP2: @ %bb.0: @ %entry
158 ; VFP2-NEXT: .save {r7, lr}
159 ; VFP2-NEXT: push {r7, lr}
160 ; VFP2-NEXT: vmov r0, r1, d0
161 ; VFP2-NEXT: bl __aeabi_d2lz
162 ; VFP2-NEXT: subs.w r3, r0, #-1
163 ; VFP2-NEXT: mov.w r2, #0
164 ; VFP2-NEXT: sbcs r3, r1, #0
165 ; VFP2-NEXT: mov.w r3, #0
167 ; VFP2-NEXT: movlt r3, #1
168 ; VFP2-NEXT: cmp r3, #0
170 ; VFP2-NEXT: movne r3, r1
171 ; VFP2-NEXT: moveq.w r0, #-1
172 ; VFP2-NEXT: rsbs r1, r0, #0
173 ; VFP2-NEXT: sbcs.w r1, r2, r3
175 ; VFP2-NEXT: movlt r2, #1
176 ; VFP2-NEXT: cmp r2, #0
178 ; VFP2-NEXT: moveq r0, r2
179 ; VFP2-NEXT: pop {r7, pc}
181 ; FULL-LABEL: ustest_f64i32:
182 ; FULL: @ %bb.0: @ %entry
183 ; FULL-NEXT: vcvt.u32.f64 s0, d0
184 ; FULL-NEXT: vmov r0, s0
187 %conv = fptosi double %x to i64
188 %0 = icmp slt i64 %conv, 4294967295
189 %spec.store.select = select i1 %0, i64 %conv, i64 4294967295
190 %1 = icmp sgt i64 %spec.store.select, 0
191 %spec.store.select7 = select i1 %1, i64 %spec.store.select, i64 0
192 %conv6 = trunc i64 %spec.store.select7 to i32
196 define i32 @stest_f32i32(float %x) {
197 ; SOFT-LABEL: stest_f32i32:
198 ; SOFT: @ %bb.0: @ %entry
199 ; SOFT-NEXT: .save {r4, lr}
200 ; SOFT-NEXT: push {r4, lr}
201 ; SOFT-NEXT: bl __aeabi_f2lz
202 ; SOFT-NEXT: movs r2, #0
203 ; SOFT-NEXT: ldr r3, .LCPI3_0
204 ; SOFT-NEXT: subs r4, r0, r3
205 ; SOFT-NEXT: mov r4, r1
206 ; SOFT-NEXT: sbcs r4, r2
207 ; SOFT-NEXT: blt .LBB3_2
208 ; SOFT-NEXT: @ %bb.1: @ %entry
209 ; SOFT-NEXT: mov r1, r2
210 ; SOFT-NEXT: .LBB3_2: @ %entry
211 ; SOFT-NEXT: blt .LBB3_4
212 ; SOFT-NEXT: @ %bb.3: @ %entry
213 ; SOFT-NEXT: mov r0, r3
214 ; SOFT-NEXT: .LBB3_4: @ %entry
215 ; SOFT-NEXT: mvns r3, r2
216 ; SOFT-NEXT: movs r2, #1
217 ; SOFT-NEXT: lsls r2, r2, #31
218 ; SOFT-NEXT: subs r4, r2, r0
219 ; SOFT-NEXT: sbcs r3, r1
220 ; SOFT-NEXT: blt .LBB3_6
221 ; SOFT-NEXT: @ %bb.5: @ %entry
222 ; SOFT-NEXT: mov r0, r2
223 ; SOFT-NEXT: .LBB3_6: @ %entry
224 ; SOFT-NEXT: pop {r4, pc}
225 ; SOFT-NEXT: .p2align 2
226 ; SOFT-NEXT: @ %bb.7:
227 ; SOFT-NEXT: .LCPI3_0:
228 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
230 ; VFP-LABEL: stest_f32i32:
231 ; VFP: @ %bb.0: @ %entry
232 ; VFP-NEXT: vcvt.s32.f32 s0, s0
233 ; VFP-NEXT: vmov r0, s0
236 %conv = fptosi float %x to i64
237 %0 = icmp slt i64 %conv, 2147483647
238 %spec.store.select = select i1 %0, i64 %conv, i64 2147483647
239 %1 = icmp sgt i64 %spec.store.select, -2147483648
240 %spec.store.select7 = select i1 %1, i64 %spec.store.select, i64 -2147483648
241 %conv6 = trunc i64 %spec.store.select7 to i32
245 define i32 @utest_f32i32(float %x) {
246 ; SOFT-LABEL: utest_f32i32:
247 ; SOFT: @ %bb.0: @ %entry
248 ; SOFT-NEXT: .save {r7, lr}
249 ; SOFT-NEXT: push {r7, lr}
250 ; SOFT-NEXT: bl __aeabi_f2ulz
251 ; SOFT-NEXT: movs r2, #0
252 ; SOFT-NEXT: adds r3, r0, #1
253 ; SOFT-NEXT: sbcs r1, r2
254 ; SOFT-NEXT: blo .LBB4_2
255 ; SOFT-NEXT: @ %bb.1: @ %entry
256 ; SOFT-NEXT: mvns r0, r2
257 ; SOFT-NEXT: .LBB4_2: @ %entry
258 ; SOFT-NEXT: pop {r7, pc}
260 ; VFP-LABEL: utest_f32i32:
261 ; VFP: @ %bb.0: @ %entry
262 ; VFP-NEXT: vcvt.u32.f32 s0, s0
263 ; VFP-NEXT: vmov r0, s0
266 %conv = fptoui float %x to i64
267 %0 = icmp ult i64 %conv, 4294967295
268 %spec.store.select = select i1 %0, i64 %conv, i64 4294967295
269 %conv6 = trunc i64 %spec.store.select to i32
273 define i32 @ustest_f32i32(float %x) {
274 ; SOFT-LABEL: ustest_f32i32:
275 ; SOFT: @ %bb.0: @ %entry
276 ; SOFT-NEXT: .save {r4, lr}
277 ; SOFT-NEXT: push {r4, lr}
278 ; SOFT-NEXT: bl __aeabi_f2lz
279 ; SOFT-NEXT: movs r2, #0
280 ; SOFT-NEXT: mvns r3, r2
281 ; SOFT-NEXT: adds r4, r0, #1
282 ; SOFT-NEXT: mov r4, r1
283 ; SOFT-NEXT: sbcs r4, r2
284 ; SOFT-NEXT: blt .LBB5_2
285 ; SOFT-NEXT: @ %bb.1: @ %entry
286 ; SOFT-NEXT: mov r1, r2
287 ; SOFT-NEXT: .LBB5_2: @ %entry
288 ; SOFT-NEXT: blt .LBB5_4
289 ; SOFT-NEXT: @ %bb.3: @ %entry
290 ; SOFT-NEXT: mov r0, r3
291 ; SOFT-NEXT: .LBB5_4: @ %entry
292 ; SOFT-NEXT: rsbs r3, r0, #0
293 ; SOFT-NEXT: mov r3, r2
294 ; SOFT-NEXT: sbcs r3, r1
295 ; SOFT-NEXT: blt .LBB5_7
296 ; SOFT-NEXT: @ %bb.5: @ %entry
297 ; SOFT-NEXT: cmp r2, #0
298 ; SOFT-NEXT: beq .LBB5_8
299 ; SOFT-NEXT: .LBB5_6: @ %entry
300 ; SOFT-NEXT: pop {r4, pc}
301 ; SOFT-NEXT: .LBB5_7:
302 ; SOFT-NEXT: movs r2, #1
303 ; SOFT-NEXT: cmp r2, #0
304 ; SOFT-NEXT: bne .LBB5_6
305 ; SOFT-NEXT: .LBB5_8: @ %entry
306 ; SOFT-NEXT: mov r0, r2
307 ; SOFT-NEXT: pop {r4, pc}
309 ; VFP-LABEL: ustest_f32i32:
310 ; VFP: @ %bb.0: @ %entry
311 ; VFP-NEXT: vcvt.u32.f32 s0, s0
312 ; VFP-NEXT: vmov r0, s0
315 %conv = fptosi float %x to i64
316 %0 = icmp slt i64 %conv, 4294967295
317 %spec.store.select = select i1 %0, i64 %conv, i64 4294967295
318 %1 = icmp sgt i64 %spec.store.select, 0
319 %spec.store.select7 = select i1 %1, i64 %spec.store.select, i64 0
320 %conv6 = trunc i64 %spec.store.select7 to i32
324 define i32 @stest_f16i32(half %x) {
325 ; SOFT-LABEL: stest_f16i32:
326 ; SOFT: @ %bb.0: @ %entry
327 ; SOFT-NEXT: .save {r4, lr}
328 ; SOFT-NEXT: push {r4, lr}
329 ; SOFT-NEXT: uxth r0, r0
330 ; SOFT-NEXT: bl __aeabi_h2f
331 ; SOFT-NEXT: bl __aeabi_f2lz
332 ; SOFT-NEXT: movs r2, #0
333 ; SOFT-NEXT: ldr r3, .LCPI6_0
334 ; SOFT-NEXT: subs r4, r0, r3
335 ; SOFT-NEXT: mov r4, r1
336 ; SOFT-NEXT: sbcs r4, r2
337 ; SOFT-NEXT: blt .LBB6_2
338 ; SOFT-NEXT: @ %bb.1: @ %entry
339 ; SOFT-NEXT: mov r1, r2
340 ; SOFT-NEXT: .LBB6_2: @ %entry
341 ; SOFT-NEXT: blt .LBB6_4
342 ; SOFT-NEXT: @ %bb.3: @ %entry
343 ; SOFT-NEXT: mov r0, r3
344 ; SOFT-NEXT: .LBB6_4: @ %entry
345 ; SOFT-NEXT: mvns r3, r2
346 ; SOFT-NEXT: movs r2, #1
347 ; SOFT-NEXT: lsls r2, r2, #31
348 ; SOFT-NEXT: subs r4, r2, r0
349 ; SOFT-NEXT: sbcs r3, r1
350 ; SOFT-NEXT: blt .LBB6_6
351 ; SOFT-NEXT: @ %bb.5: @ %entry
352 ; SOFT-NEXT: mov r0, r2
353 ; SOFT-NEXT: .LBB6_6: @ %entry
354 ; SOFT-NEXT: pop {r4, pc}
355 ; SOFT-NEXT: .p2align 2
356 ; SOFT-NEXT: @ %bb.7:
357 ; SOFT-NEXT: .LCPI6_0:
358 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
360 ; VFP2-LABEL: stest_f16i32:
361 ; VFP2: @ %bb.0: @ %entry
362 ; VFP2-NEXT: .save {r7, lr}
363 ; VFP2-NEXT: push {r7, lr}
364 ; VFP2-NEXT: vmov r0, s0
365 ; VFP2-NEXT: bl __aeabi_h2f
366 ; VFP2-NEXT: vmov s0, r0
367 ; VFP2-NEXT: vcvt.s32.f32 s0, s0
368 ; VFP2-NEXT: vmov r0, s0
369 ; VFP2-NEXT: pop {r7, pc}
371 ; FULL-LABEL: stest_f16i32:
372 ; FULL: @ %bb.0: @ %entry
373 ; FULL-NEXT: vcvt.s32.f16 s0, s0
374 ; FULL-NEXT: vmov r0, s0
377 %conv = fptosi half %x to i64
378 %0 = icmp slt i64 %conv, 2147483647
379 %spec.store.select = select i1 %0, i64 %conv, i64 2147483647
380 %1 = icmp sgt i64 %spec.store.select, -2147483648
381 %spec.store.select7 = select i1 %1, i64 %spec.store.select, i64 -2147483648
382 %conv6 = trunc i64 %spec.store.select7 to i32
386 define i32 @utesth_f16i32(half %x) {
387 ; SOFT-LABEL: utesth_f16i32:
388 ; SOFT: @ %bb.0: @ %entry
389 ; SOFT-NEXT: .save {r7, lr}
390 ; SOFT-NEXT: push {r7, lr}
391 ; SOFT-NEXT: uxth r0, r0
392 ; SOFT-NEXT: bl __aeabi_h2f
393 ; SOFT-NEXT: bl __aeabi_f2ulz
394 ; SOFT-NEXT: movs r2, #0
395 ; SOFT-NEXT: adds r3, r0, #1
396 ; SOFT-NEXT: sbcs r1, r2
397 ; SOFT-NEXT: blo .LBB7_2
398 ; SOFT-NEXT: @ %bb.1: @ %entry
399 ; SOFT-NEXT: mvns r0, r2
400 ; SOFT-NEXT: .LBB7_2: @ %entry
401 ; SOFT-NEXT: pop {r7, pc}
403 ; VFP2-LABEL: utesth_f16i32:
404 ; VFP2: @ %bb.0: @ %entry
405 ; VFP2-NEXT: .save {r7, lr}
406 ; VFP2-NEXT: push {r7, lr}
407 ; VFP2-NEXT: vmov r0, s0
408 ; VFP2-NEXT: bl __aeabi_h2f
409 ; VFP2-NEXT: vmov s0, r0
410 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
411 ; VFP2-NEXT: vmov r0, s0
412 ; VFP2-NEXT: pop {r7, pc}
414 ; FULL-LABEL: utesth_f16i32:
415 ; FULL: @ %bb.0: @ %entry
416 ; FULL-NEXT: vcvt.u32.f16 s0, s0
417 ; FULL-NEXT: vmov r0, s0
420 %conv = fptoui half %x to i64
421 %0 = icmp ult i64 %conv, 4294967295
422 %spec.store.select = select i1 %0, i64 %conv, i64 4294967295
423 %conv6 = trunc i64 %spec.store.select to i32
427 define i32 @ustest_f16i32(half %x) {
428 ; SOFT-LABEL: ustest_f16i32:
429 ; SOFT: @ %bb.0: @ %entry
430 ; SOFT-NEXT: .save {r4, lr}
431 ; SOFT-NEXT: push {r4, lr}
432 ; SOFT-NEXT: uxth r0, r0
433 ; SOFT-NEXT: bl __aeabi_h2f
434 ; SOFT-NEXT: bl __aeabi_f2lz
435 ; SOFT-NEXT: movs r2, #0
436 ; SOFT-NEXT: mvns r3, r2
437 ; SOFT-NEXT: adds r4, r0, #1
438 ; SOFT-NEXT: mov r4, r1
439 ; SOFT-NEXT: sbcs r4, r2
440 ; SOFT-NEXT: blt .LBB8_2
441 ; SOFT-NEXT: @ %bb.1: @ %entry
442 ; SOFT-NEXT: mov r1, r2
443 ; SOFT-NEXT: .LBB8_2: @ %entry
444 ; SOFT-NEXT: blt .LBB8_4
445 ; SOFT-NEXT: @ %bb.3: @ %entry
446 ; SOFT-NEXT: mov r0, r3
447 ; SOFT-NEXT: .LBB8_4: @ %entry
448 ; SOFT-NEXT: rsbs r3, r0, #0
449 ; SOFT-NEXT: mov r3, r2
450 ; SOFT-NEXT: sbcs r3, r1
451 ; SOFT-NEXT: blt .LBB8_7
452 ; SOFT-NEXT: @ %bb.5: @ %entry
453 ; SOFT-NEXT: cmp r2, #0
454 ; SOFT-NEXT: beq .LBB8_8
455 ; SOFT-NEXT: .LBB8_6: @ %entry
456 ; SOFT-NEXT: pop {r4, pc}
457 ; SOFT-NEXT: .LBB8_7:
458 ; SOFT-NEXT: movs r2, #1
459 ; SOFT-NEXT: cmp r2, #0
460 ; SOFT-NEXT: bne .LBB8_6
461 ; SOFT-NEXT: .LBB8_8: @ %entry
462 ; SOFT-NEXT: mov r0, r2
463 ; SOFT-NEXT: pop {r4, pc}
465 ; VFP2-LABEL: ustest_f16i32:
466 ; VFP2: @ %bb.0: @ %entry
467 ; VFP2-NEXT: .save {r7, lr}
468 ; VFP2-NEXT: push {r7, lr}
469 ; VFP2-NEXT: vmov r0, s0
470 ; VFP2-NEXT: bl __aeabi_h2f
471 ; VFP2-NEXT: vmov s0, r0
472 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
473 ; VFP2-NEXT: vmov r0, s0
474 ; VFP2-NEXT: pop {r7, pc}
476 ; FULL-LABEL: ustest_f16i32:
477 ; FULL: @ %bb.0: @ %entry
478 ; FULL-NEXT: vcvt.u32.f16 s0, s0
479 ; FULL-NEXT: vmov r0, s0
482 %conv = fptosi half %x to i64
483 %0 = icmp slt i64 %conv, 4294967295
484 %spec.store.select = select i1 %0, i64 %conv, i64 4294967295
485 %1 = icmp sgt i64 %spec.store.select, 0
486 %spec.store.select7 = select i1 %1, i64 %spec.store.select, i64 0
487 %conv6 = trunc i64 %spec.store.select7 to i32
493 define i16 @stest_f64i16(double %x) {
494 ; SOFT-LABEL: stest_f64i16:
495 ; SOFT: @ %bb.0: @ %entry
496 ; SOFT-NEXT: .save {r7, lr}
497 ; SOFT-NEXT: push {r7, lr}
498 ; SOFT-NEXT: bl __aeabi_d2iz
499 ; SOFT-NEXT: ldr r1, .LCPI9_0
500 ; SOFT-NEXT: cmp r0, r1
501 ; SOFT-NEXT: blt .LBB9_2
502 ; SOFT-NEXT: @ %bb.1: @ %entry
503 ; SOFT-NEXT: mov r0, r1
504 ; SOFT-NEXT: .LBB9_2: @ %entry
505 ; SOFT-NEXT: ldr r1, .LCPI9_1
506 ; SOFT-NEXT: cmp r0, r1
507 ; SOFT-NEXT: bgt .LBB9_4
508 ; SOFT-NEXT: @ %bb.3: @ %entry
509 ; SOFT-NEXT: mov r0, r1
510 ; SOFT-NEXT: .LBB9_4: @ %entry
511 ; SOFT-NEXT: pop {r7, pc}
512 ; SOFT-NEXT: .p2align 2
513 ; SOFT-NEXT: @ %bb.5:
514 ; SOFT-NEXT: .LCPI9_0:
515 ; SOFT-NEXT: .long 32767 @ 0x7fff
516 ; SOFT-NEXT: .LCPI9_1:
517 ; SOFT-NEXT: .long 4294934528 @ 0xffff8000
519 ; VFP2-LABEL: stest_f64i16:
520 ; VFP2: @ %bb.0: @ %entry
521 ; VFP2-NEXT: .save {r7, lr}
522 ; VFP2-NEXT: push {r7, lr}
523 ; VFP2-NEXT: vmov r0, r1, d0
524 ; VFP2-NEXT: bl __aeabi_d2iz
525 ; VFP2-NEXT: ssat r0, #16, r0
526 ; VFP2-NEXT: pop {r7, pc}
528 ; FULL-LABEL: stest_f64i16:
529 ; FULL: @ %bb.0: @ %entry
530 ; FULL-NEXT: vcvt.s32.f64 s0, d0
531 ; FULL-NEXT: vmov r0, s0
532 ; FULL-NEXT: ssat r0, #16, r0
535 %conv = fptosi double %x to i32
536 %0 = icmp slt i32 %conv, 32767
537 %spec.store.select = select i1 %0, i32 %conv, i32 32767
538 %1 = icmp sgt i32 %spec.store.select, -32768
539 %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 -32768
540 %conv6 = trunc i32 %spec.store.select7 to i16
544 define i16 @utest_f64i16(double %x) {
545 ; SOFT-LABEL: utest_f64i16:
546 ; SOFT: @ %bb.0: @ %entry
547 ; SOFT-NEXT: .save {r7, lr}
548 ; SOFT-NEXT: push {r7, lr}
549 ; SOFT-NEXT: bl __aeabi_d2uiz
550 ; SOFT-NEXT: ldr r1, .LCPI10_0
551 ; SOFT-NEXT: cmp r0, r1
552 ; SOFT-NEXT: blo .LBB10_2
553 ; SOFT-NEXT: @ %bb.1: @ %entry
554 ; SOFT-NEXT: mov r0, r1
555 ; SOFT-NEXT: .LBB10_2: @ %entry
556 ; SOFT-NEXT: pop {r7, pc}
557 ; SOFT-NEXT: .p2align 2
558 ; SOFT-NEXT: @ %bb.3:
559 ; SOFT-NEXT: .LCPI10_0:
560 ; SOFT-NEXT: .long 65535 @ 0xffff
562 ; VFP2-LABEL: utest_f64i16:
563 ; VFP2: @ %bb.0: @ %entry
564 ; VFP2-NEXT: .save {r7, lr}
565 ; VFP2-NEXT: push {r7, lr}
566 ; VFP2-NEXT: vmov r0, r1, d0
567 ; VFP2-NEXT: bl __aeabi_d2uiz
568 ; VFP2-NEXT: movw r1, #65535
569 ; VFP2-NEXT: cmp r0, r1
571 ; VFP2-NEXT: movhs r0, r1
572 ; VFP2-NEXT: pop {r7, pc}
574 ; FULL-LABEL: utest_f64i16:
575 ; FULL: @ %bb.0: @ %entry
576 ; FULL-NEXT: vcvt.u32.f64 s0, d0
577 ; FULL-NEXT: movw r1, #65535
578 ; FULL-NEXT: vmov r0, s0
579 ; FULL-NEXT: cmp r0, r1
580 ; FULL-NEXT: csel r0, r0, r1, lo
583 %conv = fptoui double %x to i32
584 %0 = icmp ult i32 %conv, 65535
585 %spec.store.select = select i1 %0, i32 %conv, i32 65535
586 %conv6 = trunc i32 %spec.store.select to i16
590 define i16 @ustest_f64i16(double %x) {
591 ; SOFT-LABEL: ustest_f64i16:
592 ; SOFT: @ %bb.0: @ %entry
593 ; SOFT-NEXT: .save {r7, lr}
594 ; SOFT-NEXT: push {r7, lr}
595 ; SOFT-NEXT: bl __aeabi_d2iz
596 ; SOFT-NEXT: ldr r1, .LCPI11_0
597 ; SOFT-NEXT: cmp r0, r1
598 ; SOFT-NEXT: blt .LBB11_2
599 ; SOFT-NEXT: @ %bb.1: @ %entry
600 ; SOFT-NEXT: mov r0, r1
601 ; SOFT-NEXT: .LBB11_2: @ %entry
602 ; SOFT-NEXT: asrs r1, r0, #31
603 ; SOFT-NEXT: bics r0, r1
604 ; SOFT-NEXT: pop {r7, pc}
605 ; SOFT-NEXT: .p2align 2
606 ; SOFT-NEXT: @ %bb.3:
607 ; SOFT-NEXT: .LCPI11_0:
608 ; SOFT-NEXT: .long 65535 @ 0xffff
610 ; VFP2-LABEL: ustest_f64i16:
611 ; VFP2: @ %bb.0: @ %entry
612 ; VFP2-NEXT: .save {r7, lr}
613 ; VFP2-NEXT: push {r7, lr}
614 ; VFP2-NEXT: vmov r0, r1, d0
615 ; VFP2-NEXT: bl __aeabi_d2iz
616 ; VFP2-NEXT: usat r0, #16, r0
617 ; VFP2-NEXT: pop {r7, pc}
619 ; FULL-LABEL: ustest_f64i16:
620 ; FULL: @ %bb.0: @ %entry
621 ; FULL-NEXT: vcvt.s32.f64 s0, d0
622 ; FULL-NEXT: vmov r0, s0
623 ; FULL-NEXT: usat r0, #16, r0
626 %conv = fptosi double %x to i32
627 %0 = icmp slt i32 %conv, 65535
628 %spec.store.select = select i1 %0, i32 %conv, i32 65535
629 %1 = icmp sgt i32 %spec.store.select, 0
630 %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 0
631 %conv6 = trunc i32 %spec.store.select7 to i16
635 define i16 @stest_f32i16(float %x) {
636 ; SOFT-LABEL: stest_f32i16:
637 ; SOFT: @ %bb.0: @ %entry
638 ; SOFT-NEXT: .save {r7, lr}
639 ; SOFT-NEXT: push {r7, lr}
640 ; SOFT-NEXT: bl __aeabi_f2iz
641 ; SOFT-NEXT: ldr r1, .LCPI12_0
642 ; SOFT-NEXT: cmp r0, r1
643 ; SOFT-NEXT: blt .LBB12_2
644 ; SOFT-NEXT: @ %bb.1: @ %entry
645 ; SOFT-NEXT: mov r0, r1
646 ; SOFT-NEXT: .LBB12_2: @ %entry
647 ; SOFT-NEXT: ldr r1, .LCPI12_1
648 ; SOFT-NEXT: cmp r0, r1
649 ; SOFT-NEXT: bgt .LBB12_4
650 ; SOFT-NEXT: @ %bb.3: @ %entry
651 ; SOFT-NEXT: mov r0, r1
652 ; SOFT-NEXT: .LBB12_4: @ %entry
653 ; SOFT-NEXT: pop {r7, pc}
654 ; SOFT-NEXT: .p2align 2
655 ; SOFT-NEXT: @ %bb.5:
656 ; SOFT-NEXT: .LCPI12_0:
657 ; SOFT-NEXT: .long 32767 @ 0x7fff
658 ; SOFT-NEXT: .LCPI12_1:
659 ; SOFT-NEXT: .long 4294934528 @ 0xffff8000
661 ; VFP-LABEL: stest_f32i16:
662 ; VFP: @ %bb.0: @ %entry
663 ; VFP-NEXT: vcvt.s32.f32 s0, s0
664 ; VFP-NEXT: vmov r0, s0
665 ; VFP-NEXT: ssat r0, #16, r0
668 %conv = fptosi float %x to i32
669 %0 = icmp slt i32 %conv, 32767
670 %spec.store.select = select i1 %0, i32 %conv, i32 32767
671 %1 = icmp sgt i32 %spec.store.select, -32768
672 %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 -32768
673 %conv6 = trunc i32 %spec.store.select7 to i16
677 define i16 @utest_f32i16(float %x) {
678 ; SOFT-LABEL: utest_f32i16:
679 ; SOFT: @ %bb.0: @ %entry
680 ; SOFT-NEXT: .save {r7, lr}
681 ; SOFT-NEXT: push {r7, lr}
682 ; SOFT-NEXT: bl __aeabi_f2uiz
683 ; SOFT-NEXT: ldr r1, .LCPI13_0
684 ; SOFT-NEXT: cmp r0, r1
685 ; SOFT-NEXT: blo .LBB13_2
686 ; SOFT-NEXT: @ %bb.1: @ %entry
687 ; SOFT-NEXT: mov r0, r1
688 ; SOFT-NEXT: .LBB13_2: @ %entry
689 ; SOFT-NEXT: pop {r7, pc}
690 ; SOFT-NEXT: .p2align 2
691 ; SOFT-NEXT: @ %bb.3:
692 ; SOFT-NEXT: .LCPI13_0:
693 ; SOFT-NEXT: .long 65535 @ 0xffff
695 ; VFP2-LABEL: utest_f32i16:
696 ; VFP2: @ %bb.0: @ %entry
697 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
698 ; VFP2-NEXT: movw r0, #65535
699 ; VFP2-NEXT: vmov r1, s0
700 ; VFP2-NEXT: cmp r1, r0
702 ; VFP2-NEXT: movlo r0, r1
705 ; FULL-LABEL: utest_f32i16:
706 ; FULL: @ %bb.0: @ %entry
707 ; FULL-NEXT: vcvt.u32.f32 s0, s0
708 ; FULL-NEXT: movw r1, #65535
709 ; FULL-NEXT: vmov r0, s0
710 ; FULL-NEXT: cmp r0, r1
711 ; FULL-NEXT: csel r0, r0, r1, lo
714 %conv = fptoui float %x to i32
715 %0 = icmp ult i32 %conv, 65535
716 %spec.store.select = select i1 %0, i32 %conv, i32 65535
717 %conv6 = trunc i32 %spec.store.select to i16
721 define i16 @ustest_f32i16(float %x) {
722 ; SOFT-LABEL: ustest_f32i16:
723 ; SOFT: @ %bb.0: @ %entry
724 ; SOFT-NEXT: .save {r7, lr}
725 ; SOFT-NEXT: push {r7, lr}
726 ; SOFT-NEXT: bl __aeabi_f2iz
727 ; SOFT-NEXT: ldr r1, .LCPI14_0
728 ; SOFT-NEXT: cmp r0, r1
729 ; SOFT-NEXT: blt .LBB14_2
730 ; SOFT-NEXT: @ %bb.1: @ %entry
731 ; SOFT-NEXT: mov r0, r1
732 ; SOFT-NEXT: .LBB14_2: @ %entry
733 ; SOFT-NEXT: asrs r1, r0, #31
734 ; SOFT-NEXT: bics r0, r1
735 ; SOFT-NEXT: pop {r7, pc}
736 ; SOFT-NEXT: .p2align 2
737 ; SOFT-NEXT: @ %bb.3:
738 ; SOFT-NEXT: .LCPI14_0:
739 ; SOFT-NEXT: .long 65535 @ 0xffff
741 ; VFP-LABEL: ustest_f32i16:
742 ; VFP: @ %bb.0: @ %entry
743 ; VFP-NEXT: vcvt.s32.f32 s0, s0
744 ; VFP-NEXT: vmov r0, s0
745 ; VFP-NEXT: usat r0, #16, r0
748 %conv = fptosi float %x to i32
749 %0 = icmp slt i32 %conv, 65535
750 %spec.store.select = select i1 %0, i32 %conv, i32 65535
751 %1 = icmp sgt i32 %spec.store.select, 0
752 %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 0
753 %conv6 = trunc i32 %spec.store.select7 to i16
757 define i16 @stest_f16i16(half %x) {
758 ; SOFT-LABEL: stest_f16i16:
759 ; SOFT: @ %bb.0: @ %entry
760 ; SOFT-NEXT: .save {r7, lr}
761 ; SOFT-NEXT: push {r7, lr}
762 ; SOFT-NEXT: uxth r0, r0
763 ; SOFT-NEXT: bl __aeabi_h2f
764 ; SOFT-NEXT: bl __aeabi_f2iz
765 ; SOFT-NEXT: ldr r1, .LCPI15_0
766 ; SOFT-NEXT: cmp r0, r1
767 ; SOFT-NEXT: blt .LBB15_2
768 ; SOFT-NEXT: @ %bb.1: @ %entry
769 ; SOFT-NEXT: mov r0, r1
770 ; SOFT-NEXT: .LBB15_2: @ %entry
771 ; SOFT-NEXT: ldr r1, .LCPI15_1
772 ; SOFT-NEXT: cmp r0, r1
773 ; SOFT-NEXT: bgt .LBB15_4
774 ; SOFT-NEXT: @ %bb.3: @ %entry
775 ; SOFT-NEXT: mov r0, r1
776 ; SOFT-NEXT: .LBB15_4: @ %entry
777 ; SOFT-NEXT: pop {r7, pc}
778 ; SOFT-NEXT: .p2align 2
779 ; SOFT-NEXT: @ %bb.5:
780 ; SOFT-NEXT: .LCPI15_0:
781 ; SOFT-NEXT: .long 32767 @ 0x7fff
782 ; SOFT-NEXT: .LCPI15_1:
783 ; SOFT-NEXT: .long 4294934528 @ 0xffff8000
785 ; VFP2-LABEL: stest_f16i16:
786 ; VFP2: @ %bb.0: @ %entry
787 ; VFP2-NEXT: .save {r7, lr}
788 ; VFP2-NEXT: push {r7, lr}
789 ; VFP2-NEXT: vmov r0, s0
790 ; VFP2-NEXT: bl __aeabi_h2f
791 ; VFP2-NEXT: vmov s0, r0
792 ; VFP2-NEXT: vcvt.s32.f32 s0, s0
793 ; VFP2-NEXT: vmov r0, s0
794 ; VFP2-NEXT: ssat r0, #16, r0
795 ; VFP2-NEXT: pop {r7, pc}
797 ; FULL-LABEL: stest_f16i16:
798 ; FULL: @ %bb.0: @ %entry
799 ; FULL-NEXT: vcvt.s32.f16 s0, s0
800 ; FULL-NEXT: vmov r0, s0
801 ; FULL-NEXT: ssat r0, #16, r0
804 %conv = fptosi half %x to i32
805 %0 = icmp slt i32 %conv, 32767
806 %spec.store.select = select i1 %0, i32 %conv, i32 32767
807 %1 = icmp sgt i32 %spec.store.select, -32768
808 %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 -32768
809 %conv6 = trunc i32 %spec.store.select7 to i16
813 define i16 @utesth_f16i16(half %x) {
814 ; SOFT-LABEL: utesth_f16i16:
815 ; SOFT: @ %bb.0: @ %entry
816 ; SOFT-NEXT: .save {r7, lr}
817 ; SOFT-NEXT: push {r7, lr}
818 ; SOFT-NEXT: uxth r0, r0
819 ; SOFT-NEXT: bl __aeabi_h2f
820 ; SOFT-NEXT: bl __aeabi_f2uiz
821 ; SOFT-NEXT: ldr r1, .LCPI16_0
822 ; SOFT-NEXT: cmp r0, r1
823 ; SOFT-NEXT: blo .LBB16_2
824 ; SOFT-NEXT: @ %bb.1: @ %entry
825 ; SOFT-NEXT: mov r0, r1
826 ; SOFT-NEXT: .LBB16_2: @ %entry
827 ; SOFT-NEXT: pop {r7, pc}
828 ; SOFT-NEXT: .p2align 2
829 ; SOFT-NEXT: @ %bb.3:
830 ; SOFT-NEXT: .LCPI16_0:
831 ; SOFT-NEXT: .long 65535 @ 0xffff
833 ; VFP2-LABEL: utesth_f16i16:
834 ; VFP2: @ %bb.0: @ %entry
835 ; VFP2-NEXT: .save {r7, lr}
836 ; VFP2-NEXT: push {r7, lr}
837 ; VFP2-NEXT: vmov r0, s0
838 ; VFP2-NEXT: bl __aeabi_h2f
839 ; VFP2-NEXT: vmov s0, r0
840 ; VFP2-NEXT: movw r0, #65535
841 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
842 ; VFP2-NEXT: vmov r1, s0
843 ; VFP2-NEXT: cmp r1, r0
845 ; VFP2-NEXT: movlo r0, r1
846 ; VFP2-NEXT: pop {r7, pc}
848 ; FULL-LABEL: utesth_f16i16:
849 ; FULL: @ %bb.0: @ %entry
850 ; FULL-NEXT: vcvt.u32.f16 s0, s0
851 ; FULL-NEXT: movw r1, #65535
852 ; FULL-NEXT: vmov r0, s0
853 ; FULL-NEXT: cmp r0, r1
854 ; FULL-NEXT: csel r0, r0, r1, lo
857 %conv = fptoui half %x to i32
858 %0 = icmp ult i32 %conv, 65535
859 %spec.store.select = select i1 %0, i32 %conv, i32 65535
860 %conv6 = trunc i32 %spec.store.select to i16
864 define i16 @ustest_f16i16(half %x) {
865 ; SOFT-LABEL: ustest_f16i16:
866 ; SOFT: @ %bb.0: @ %entry
867 ; SOFT-NEXT: .save {r7, lr}
868 ; SOFT-NEXT: push {r7, lr}
869 ; SOFT-NEXT: uxth r0, r0
870 ; SOFT-NEXT: bl __aeabi_h2f
871 ; SOFT-NEXT: bl __aeabi_f2iz
872 ; SOFT-NEXT: ldr r1, .LCPI17_0
873 ; SOFT-NEXT: cmp r0, r1
874 ; SOFT-NEXT: blt .LBB17_2
875 ; SOFT-NEXT: @ %bb.1: @ %entry
876 ; SOFT-NEXT: mov r0, r1
877 ; SOFT-NEXT: .LBB17_2: @ %entry
878 ; SOFT-NEXT: asrs r1, r0, #31
879 ; SOFT-NEXT: bics r0, r1
880 ; SOFT-NEXT: pop {r7, pc}
881 ; SOFT-NEXT: .p2align 2
882 ; SOFT-NEXT: @ %bb.3:
883 ; SOFT-NEXT: .LCPI17_0:
884 ; SOFT-NEXT: .long 65535 @ 0xffff
886 ; VFP2-LABEL: ustest_f16i16:
887 ; VFP2: @ %bb.0: @ %entry
888 ; VFP2-NEXT: .save {r7, lr}
889 ; VFP2-NEXT: push {r7, lr}
890 ; VFP2-NEXT: vmov r0, s0
891 ; VFP2-NEXT: bl __aeabi_h2f
892 ; VFP2-NEXT: vmov s0, r0
893 ; VFP2-NEXT: vcvt.s32.f32 s0, s0
894 ; VFP2-NEXT: vmov r0, s0
895 ; VFP2-NEXT: usat r0, #16, r0
896 ; VFP2-NEXT: pop {r7, pc}
898 ; FULL-LABEL: ustest_f16i16:
899 ; FULL: @ %bb.0: @ %entry
900 ; FULL-NEXT: vcvt.s32.f16 s0, s0
901 ; FULL-NEXT: vmov r0, s0
902 ; FULL-NEXT: usat r0, #16, r0
905 %conv = fptosi half %x to i32
906 %0 = icmp slt i32 %conv, 65535
907 %spec.store.select = select i1 %0, i32 %conv, i32 65535
908 %1 = icmp sgt i32 %spec.store.select, 0
909 %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 0
910 %conv6 = trunc i32 %spec.store.select7 to i16
916 define i64 @stest_f64i64(double %x) {
917 ; SOFT-LABEL: stest_f64i64:
918 ; SOFT: @ %bb.0: @ %entry
919 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
920 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
922 ; SOFT-NEXT: sub sp, #4
923 ; SOFT-NEXT: bl __fixdfti
924 ; SOFT-NEXT: movs r4, #0
925 ; SOFT-NEXT: mvns r5, r4
926 ; SOFT-NEXT: ldr r6, .LCPI18_0
927 ; SOFT-NEXT: adds r7, r0, #1
928 ; SOFT-NEXT: mov r7, r1
929 ; SOFT-NEXT: sbcs r7, r6
930 ; SOFT-NEXT: mov r7, r2
931 ; SOFT-NEXT: sbcs r7, r4
932 ; SOFT-NEXT: mov r7, r3
933 ; SOFT-NEXT: sbcs r7, r4
934 ; SOFT-NEXT: bge .LBB18_8
935 ; SOFT-NEXT: @ %bb.1: @ %entry
936 ; SOFT-NEXT: bge .LBB18_9
937 ; SOFT-NEXT: .LBB18_2: @ %entry
938 ; SOFT-NEXT: bge .LBB18_10
939 ; SOFT-NEXT: .LBB18_3: @ %entry
940 ; SOFT-NEXT: blt .LBB18_5
941 ; SOFT-NEXT: .LBB18_4: @ %entry
942 ; SOFT-NEXT: mov r0, r5
943 ; SOFT-NEXT: .LBB18_5: @ %entry
944 ; SOFT-NEXT: movs r6, #1
945 ; SOFT-NEXT: lsls r6, r6, #31
946 ; SOFT-NEXT: rsbs r7, r0, #0
947 ; SOFT-NEXT: mov r7, r6
948 ; SOFT-NEXT: sbcs r7, r1
949 ; SOFT-NEXT: mov r7, r5
950 ; SOFT-NEXT: sbcs r7, r2
951 ; SOFT-NEXT: sbcs r5, r3
952 ; SOFT-NEXT: bge .LBB18_11
953 ; SOFT-NEXT: @ %bb.6: @ %entry
954 ; SOFT-NEXT: bge .LBB18_12
955 ; SOFT-NEXT: .LBB18_7: @ %entry
956 ; SOFT-NEXT: add sp, #4
957 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
958 ; SOFT-NEXT: .LBB18_8: @ %entry
959 ; SOFT-NEXT: mov r3, r4
960 ; SOFT-NEXT: blt .LBB18_2
961 ; SOFT-NEXT: .LBB18_9: @ %entry
962 ; SOFT-NEXT: mov r2, r4
963 ; SOFT-NEXT: blt .LBB18_3
964 ; SOFT-NEXT: .LBB18_10: @ %entry
965 ; SOFT-NEXT: mov r1, r6
966 ; SOFT-NEXT: bge .LBB18_4
967 ; SOFT-NEXT: b .LBB18_5
968 ; SOFT-NEXT: .LBB18_11: @ %entry
969 ; SOFT-NEXT: mov r0, r4
970 ; SOFT-NEXT: blt .LBB18_7
971 ; SOFT-NEXT: .LBB18_12: @ %entry
972 ; SOFT-NEXT: mov r1, r6
973 ; SOFT-NEXT: add sp, #4
974 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
975 ; SOFT-NEXT: .p2align 2
976 ; SOFT-NEXT: @ %bb.13:
977 ; SOFT-NEXT: .LCPI18_0:
978 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
980 ; VFP2-LABEL: stest_f64i64:
981 ; VFP2: @ %bb.0: @ %entry
982 ; VFP2-NEXT: .save {r4, r5, r7, lr}
983 ; VFP2-NEXT: push {r4, r5, r7, lr}
984 ; VFP2-NEXT: bl __fixdfti
985 ; VFP2-NEXT: subs.w r4, r0, #-1
986 ; VFP2-NEXT: mvn lr, #-2147483648
987 ; VFP2-NEXT: sbcs.w r4, r1, lr
988 ; VFP2-NEXT: mov.w r12, #0
989 ; VFP2-NEXT: sbcs r4, r2, #0
990 ; VFP2-NEXT: sbcs r4, r3, #0
991 ; VFP2-NEXT: mov.w r4, #0
993 ; VFP2-NEXT: movlt r4, #1
994 ; VFP2-NEXT: cmp r4, #0
996 ; VFP2-NEXT: moveq r3, r4
997 ; VFP2-NEXT: movne r4, r2
998 ; VFP2-NEXT: moveq r1, lr
999 ; VFP2-NEXT: mov.w r2, #-1
1001 ; VFP2-NEXT: moveq r0, r2
1002 ; VFP2-NEXT: rsbs r5, r0, #0
1003 ; VFP2-NEXT: mov.w lr, #-2147483648
1004 ; VFP2-NEXT: sbcs.w r5, lr, r1
1005 ; VFP2-NEXT: sbcs.w r4, r2, r4
1006 ; VFP2-NEXT: sbcs r2, r3
1008 ; VFP2-NEXT: movge r0, r12
1009 ; VFP2-NEXT: movge r1, lr
1010 ; VFP2-NEXT: pop {r4, r5, r7, pc}
1012 ; FULL-LABEL: stest_f64i64:
1013 ; FULL: @ %bb.0: @ %entry
1014 ; FULL-NEXT: .save {r4, r5, r7, lr}
1015 ; FULL-NEXT: push {r4, r5, r7, lr}
1016 ; FULL-NEXT: bl __fixdfti
1017 ; FULL-NEXT: subs.w lr, r0, #-1
1018 ; FULL-NEXT: mvn r12, #-2147483648
1019 ; FULL-NEXT: sbcs.w lr, r1, r12
1020 ; FULL-NEXT: sbcs lr, r2, #0
1021 ; FULL-NEXT: sbcs lr, r3, #0
1022 ; FULL-NEXT: cset lr, lt
1023 ; FULL-NEXT: cmp.w lr, #0
1024 ; FULL-NEXT: csel r5, r3, lr, ne
1025 ; FULL-NEXT: mov.w r3, #-1
1026 ; FULL-NEXT: csel r0, r0, r3, ne
1027 ; FULL-NEXT: csel r1, r1, r12, ne
1028 ; FULL-NEXT: csel r2, r2, lr, ne
1029 ; FULL-NEXT: rsbs r4, r0, #0
1030 ; FULL-NEXT: mov.w r12, #-2147483648
1031 ; FULL-NEXT: sbcs.w r4, r12, r1
1032 ; FULL-NEXT: sbcs.w r2, r3, r2
1033 ; FULL-NEXT: sbcs.w r2, r3, r5
1035 ; FULL-NEXT: movge r0, #0
1036 ; FULL-NEXT: csel r1, r1, r12, lt
1037 ; FULL-NEXT: pop {r4, r5, r7, pc}
1039 %conv = fptosi double %x to i128
1040 %0 = icmp slt i128 %conv, 9223372036854775807
1041 %spec.store.select = select i1 %0, i128 %conv, i128 9223372036854775807
1042 %1 = icmp sgt i128 %spec.store.select, -9223372036854775808
1043 %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 -9223372036854775808
1044 %conv6 = trunc i128 %spec.store.select7 to i64
1048 define i64 @utest_f64i64(double %x) {
1049 ; SOFT-LABEL: utest_f64i64:
1050 ; SOFT: @ %bb.0: @ %entry
1051 ; SOFT-NEXT: .save {r4, lr}
1052 ; SOFT-NEXT: push {r4, lr}
1053 ; SOFT-NEXT: bl __fixunsdfti
1054 ; SOFT-NEXT: movs r4, #0
1055 ; SOFT-NEXT: subs r2, r2, #1
1056 ; SOFT-NEXT: sbcs r3, r4
1057 ; SOFT-NEXT: bhs .LBB19_3
1058 ; SOFT-NEXT: @ %bb.1: @ %entry
1059 ; SOFT-NEXT: bhs .LBB19_4
1060 ; SOFT-NEXT: .LBB19_2: @ %entry
1061 ; SOFT-NEXT: pop {r4, pc}
1062 ; SOFT-NEXT: .LBB19_3: @ %entry
1063 ; SOFT-NEXT: mov r0, r4
1064 ; SOFT-NEXT: blo .LBB19_2
1065 ; SOFT-NEXT: .LBB19_4: @ %entry
1066 ; SOFT-NEXT: mov r1, r4
1067 ; SOFT-NEXT: pop {r4, pc}
1069 ; VFP2-LABEL: utest_f64i64:
1070 ; VFP2: @ %bb.0: @ %entry
1071 ; VFP2-NEXT: .save {r7, lr}
1072 ; VFP2-NEXT: push {r7, lr}
1073 ; VFP2-NEXT: bl __fixunsdfti
1074 ; VFP2-NEXT: subs r2, #1
1075 ; VFP2-NEXT: mov.w r12, #0
1076 ; VFP2-NEXT: sbcs r2, r3, #0
1078 ; VFP2-NEXT: movhs r0, r12
1079 ; VFP2-NEXT: movhs r1, r12
1080 ; VFP2-NEXT: pop {r7, pc}
1082 ; FULL-LABEL: utest_f64i64:
1083 ; FULL: @ %bb.0: @ %entry
1084 ; FULL-NEXT: .save {r7, lr}
1085 ; FULL-NEXT: push {r7, lr}
1086 ; FULL-NEXT: bl __fixunsdfti
1087 ; FULL-NEXT: subs r2, #1
1088 ; FULL-NEXT: mov.w r12, #0
1089 ; FULL-NEXT: sbcs r2, r3, #0
1090 ; FULL-NEXT: csel r0, r0, r12, lo
1091 ; FULL-NEXT: csel r1, r1, r12, lo
1092 ; FULL-NEXT: pop {r7, pc}
1094 %conv = fptoui double %x to i128
1095 %0 = icmp ult i128 %conv, 18446744073709551616
1096 %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
1097 %conv6 = trunc i128 %spec.store.select to i64
1101 define i64 @ustest_f64i64(double %x) {
1102 ; SOFT-LABEL: ustest_f64i64:
1103 ; SOFT: @ %bb.0: @ %entry
1104 ; SOFT-NEXT: .save {r4, r5, r6, lr}
1105 ; SOFT-NEXT: push {r4, r5, r6, lr}
1106 ; SOFT-NEXT: bl __fixdfti
1107 ; SOFT-NEXT: movs r4, #1
1108 ; SOFT-NEXT: movs r5, #0
1109 ; SOFT-NEXT: subs r6, r2, #1
1110 ; SOFT-NEXT: mov r6, r3
1111 ; SOFT-NEXT: sbcs r6, r5
1112 ; SOFT-NEXT: bge .LBB20_9
1113 ; SOFT-NEXT: @ %bb.1: @ %entry
1114 ; SOFT-NEXT: bge .LBB20_10
1115 ; SOFT-NEXT: .LBB20_2: @ %entry
1116 ; SOFT-NEXT: bge .LBB20_11
1117 ; SOFT-NEXT: .LBB20_3: @ %entry
1118 ; SOFT-NEXT: blt .LBB20_5
1119 ; SOFT-NEXT: .LBB20_4: @ %entry
1120 ; SOFT-NEXT: mov r0, r5
1121 ; SOFT-NEXT: .LBB20_5: @ %entry
1122 ; SOFT-NEXT: rsbs r6, r0, #0
1123 ; SOFT-NEXT: mov r6, r5
1124 ; SOFT-NEXT: sbcs r6, r1
1125 ; SOFT-NEXT: mov r6, r5
1126 ; SOFT-NEXT: sbcs r6, r2
1127 ; SOFT-NEXT: mov r2, r5
1128 ; SOFT-NEXT: sbcs r2, r3
1129 ; SOFT-NEXT: bge .LBB20_12
1130 ; SOFT-NEXT: @ %bb.6: @ %entry
1131 ; SOFT-NEXT: cmp r4, #0
1132 ; SOFT-NEXT: beq .LBB20_13
1133 ; SOFT-NEXT: .LBB20_7: @ %entry
1134 ; SOFT-NEXT: beq .LBB20_14
1135 ; SOFT-NEXT: .LBB20_8: @ %entry
1136 ; SOFT-NEXT: pop {r4, r5, r6, pc}
1137 ; SOFT-NEXT: .LBB20_9: @ %entry
1138 ; SOFT-NEXT: mov r3, r5
1139 ; SOFT-NEXT: blt .LBB20_2
1140 ; SOFT-NEXT: .LBB20_10: @ %entry
1141 ; SOFT-NEXT: mov r2, r4
1142 ; SOFT-NEXT: blt .LBB20_3
1143 ; SOFT-NEXT: .LBB20_11: @ %entry
1144 ; SOFT-NEXT: mov r1, r5
1145 ; SOFT-NEXT: bge .LBB20_4
1146 ; SOFT-NEXT: b .LBB20_5
1147 ; SOFT-NEXT: .LBB20_12: @ %entry
1148 ; SOFT-NEXT: mov r4, r5
1149 ; SOFT-NEXT: cmp r4, #0
1150 ; SOFT-NEXT: bne .LBB20_7
1151 ; SOFT-NEXT: .LBB20_13: @ %entry
1152 ; SOFT-NEXT: mov r0, r4
1153 ; SOFT-NEXT: bne .LBB20_8
1154 ; SOFT-NEXT: .LBB20_14: @ %entry
1155 ; SOFT-NEXT: mov r1, r4
1156 ; SOFT-NEXT: pop {r4, r5, r6, pc}
1158 ; VFP2-LABEL: ustest_f64i64:
1159 ; VFP2: @ %bb.0: @ %entry
1160 ; VFP2-NEXT: .save {r7, lr}
1161 ; VFP2-NEXT: push {r7, lr}
1162 ; VFP2-NEXT: bl __fixdfti
1163 ; VFP2-NEXT: subs.w lr, r2, #1
1164 ; VFP2-NEXT: mov.w r12, #0
1165 ; VFP2-NEXT: sbcs lr, r3, #0
1166 ; VFP2-NEXT: itttt ge
1167 ; VFP2-NEXT: movge r3, r12
1168 ; VFP2-NEXT: movge r2, #1
1169 ; VFP2-NEXT: movge r1, r12
1170 ; VFP2-NEXT: movge r0, r12
1171 ; VFP2-NEXT: rsbs.w lr, r0, #0
1172 ; VFP2-NEXT: sbcs.w lr, r12, r1
1173 ; VFP2-NEXT: sbcs.w r2, r12, r2
1174 ; VFP2-NEXT: sbcs.w r2, r12, r3
1176 ; VFP2-NEXT: movlt.w r12, #1
1177 ; VFP2-NEXT: cmp.w r12, #0
1179 ; VFP2-NEXT: moveq r0, r12
1180 ; VFP2-NEXT: moveq r1, r12
1181 ; VFP2-NEXT: pop {r7, pc}
1183 ; FULL-LABEL: ustest_f64i64:
1184 ; FULL: @ %bb.0: @ %entry
1185 ; FULL-NEXT: .save {r7, lr}
1186 ; FULL-NEXT: push {r7, lr}
1187 ; FULL-NEXT: bl __fixdfti
1188 ; FULL-NEXT: subs.w lr, r2, #1
1189 ; FULL-NEXT: mov.w r12, #0
1190 ; FULL-NEXT: sbcs lr, r3, #0
1192 ; FULL-NEXT: movge r2, #1
1193 ; FULL-NEXT: csel r0, r0, r12, lt
1194 ; FULL-NEXT: csel lr, r3, r12, lt
1195 ; FULL-NEXT: csel r1, r1, r12, lt
1196 ; FULL-NEXT: rsbs r3, r0, #0
1197 ; FULL-NEXT: sbcs.w r3, r12, r1
1198 ; FULL-NEXT: sbcs.w r2, r12, r2
1199 ; FULL-NEXT: sbcs.w r2, r12, lr
1200 ; FULL-NEXT: cset r2, lt
1201 ; FULL-NEXT: cmp r2, #0
1202 ; FULL-NEXT: csel r0, r0, r2, ne
1203 ; FULL-NEXT: csel r1, r1, r2, ne
1204 ; FULL-NEXT: pop {r7, pc}
1206 %conv = fptosi double %x to i128
1207 %0 = icmp slt i128 %conv, 18446744073709551616
1208 %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
1209 %1 = icmp sgt i128 %spec.store.select, 0
1210 %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 0
1211 %conv6 = trunc i128 %spec.store.select7 to i64
1215 define i64 @stest_f32i64(float %x) {
1216 ; SOFT-LABEL: stest_f32i64:
1217 ; SOFT: @ %bb.0: @ %entry
1218 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
1219 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
1220 ; SOFT-NEXT: .pad #4
1221 ; SOFT-NEXT: sub sp, #4
1222 ; SOFT-NEXT: bl __fixsfti
1223 ; SOFT-NEXT: movs r4, #0
1224 ; SOFT-NEXT: mvns r5, r4
1225 ; SOFT-NEXT: ldr r6, .LCPI21_0
1226 ; SOFT-NEXT: adds r7, r0, #1
1227 ; SOFT-NEXT: mov r7, r1
1228 ; SOFT-NEXT: sbcs r7, r6
1229 ; SOFT-NEXT: mov r7, r2
1230 ; SOFT-NEXT: sbcs r7, r4
1231 ; SOFT-NEXT: mov r7, r3
1232 ; SOFT-NEXT: sbcs r7, r4
1233 ; SOFT-NEXT: bge .LBB21_8
1234 ; SOFT-NEXT: @ %bb.1: @ %entry
1235 ; SOFT-NEXT: bge .LBB21_9
1236 ; SOFT-NEXT: .LBB21_2: @ %entry
1237 ; SOFT-NEXT: bge .LBB21_10
1238 ; SOFT-NEXT: .LBB21_3: @ %entry
1239 ; SOFT-NEXT: blt .LBB21_5
1240 ; SOFT-NEXT: .LBB21_4: @ %entry
1241 ; SOFT-NEXT: mov r0, r5
1242 ; SOFT-NEXT: .LBB21_5: @ %entry
1243 ; SOFT-NEXT: movs r6, #1
1244 ; SOFT-NEXT: lsls r6, r6, #31
1245 ; SOFT-NEXT: rsbs r7, r0, #0
1246 ; SOFT-NEXT: mov r7, r6
1247 ; SOFT-NEXT: sbcs r7, r1
1248 ; SOFT-NEXT: mov r7, r5
1249 ; SOFT-NEXT: sbcs r7, r2
1250 ; SOFT-NEXT: sbcs r5, r3
1251 ; SOFT-NEXT: bge .LBB21_11
1252 ; SOFT-NEXT: @ %bb.6: @ %entry
1253 ; SOFT-NEXT: bge .LBB21_12
1254 ; SOFT-NEXT: .LBB21_7: @ %entry
1255 ; SOFT-NEXT: add sp, #4
1256 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
1257 ; SOFT-NEXT: .LBB21_8: @ %entry
1258 ; SOFT-NEXT: mov r3, r4
1259 ; SOFT-NEXT: blt .LBB21_2
1260 ; SOFT-NEXT: .LBB21_9: @ %entry
1261 ; SOFT-NEXT: mov r2, r4
1262 ; SOFT-NEXT: blt .LBB21_3
1263 ; SOFT-NEXT: .LBB21_10: @ %entry
1264 ; SOFT-NEXT: mov r1, r6
1265 ; SOFT-NEXT: bge .LBB21_4
1266 ; SOFT-NEXT: b .LBB21_5
1267 ; SOFT-NEXT: .LBB21_11: @ %entry
1268 ; SOFT-NEXT: mov r0, r4
1269 ; SOFT-NEXT: blt .LBB21_7
1270 ; SOFT-NEXT: .LBB21_12: @ %entry
1271 ; SOFT-NEXT: mov r1, r6
1272 ; SOFT-NEXT: add sp, #4
1273 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
1274 ; SOFT-NEXT: .p2align 2
1275 ; SOFT-NEXT: @ %bb.13:
1276 ; SOFT-NEXT: .LCPI21_0:
1277 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
1279 ; VFP2-LABEL: stest_f32i64:
1280 ; VFP2: @ %bb.0: @ %entry
1281 ; VFP2-NEXT: .save {r4, r5, r7, lr}
1282 ; VFP2-NEXT: push {r4, r5, r7, lr}
1283 ; VFP2-NEXT: bl __fixsfti
1284 ; VFP2-NEXT: subs.w r4, r0, #-1
1285 ; VFP2-NEXT: mvn lr, #-2147483648
1286 ; VFP2-NEXT: sbcs.w r4, r1, lr
1287 ; VFP2-NEXT: mov.w r12, #0
1288 ; VFP2-NEXT: sbcs r4, r2, #0
1289 ; VFP2-NEXT: sbcs r4, r3, #0
1290 ; VFP2-NEXT: mov.w r4, #0
1292 ; VFP2-NEXT: movlt r4, #1
1293 ; VFP2-NEXT: cmp r4, #0
1294 ; VFP2-NEXT: itet eq
1295 ; VFP2-NEXT: moveq r3, r4
1296 ; VFP2-NEXT: movne r4, r2
1297 ; VFP2-NEXT: moveq r1, lr
1298 ; VFP2-NEXT: mov.w r2, #-1
1300 ; VFP2-NEXT: moveq r0, r2
1301 ; VFP2-NEXT: rsbs r5, r0, #0
1302 ; VFP2-NEXT: mov.w lr, #-2147483648
1303 ; VFP2-NEXT: sbcs.w r5, lr, r1
1304 ; VFP2-NEXT: sbcs.w r4, r2, r4
1305 ; VFP2-NEXT: sbcs r2, r3
1307 ; VFP2-NEXT: movge r0, r12
1308 ; VFP2-NEXT: movge r1, lr
1309 ; VFP2-NEXT: pop {r4, r5, r7, pc}
1311 ; FULL-LABEL: stest_f32i64:
1312 ; FULL: @ %bb.0: @ %entry
1313 ; FULL-NEXT: .save {r4, r5, r7, lr}
1314 ; FULL-NEXT: push {r4, r5, r7, lr}
1315 ; FULL-NEXT: bl __fixsfti
1316 ; FULL-NEXT: subs.w lr, r0, #-1
1317 ; FULL-NEXT: mvn r12, #-2147483648
1318 ; FULL-NEXT: sbcs.w lr, r1, r12
1319 ; FULL-NEXT: sbcs lr, r2, #0
1320 ; FULL-NEXT: sbcs lr, r3, #0
1321 ; FULL-NEXT: cset lr, lt
1322 ; FULL-NEXT: cmp.w lr, #0
1323 ; FULL-NEXT: csel r5, r3, lr, ne
1324 ; FULL-NEXT: mov.w r3, #-1
1325 ; FULL-NEXT: csel r0, r0, r3, ne
1326 ; FULL-NEXT: csel r1, r1, r12, ne
1327 ; FULL-NEXT: csel r2, r2, lr, ne
1328 ; FULL-NEXT: rsbs r4, r0, #0
1329 ; FULL-NEXT: mov.w r12, #-2147483648
1330 ; FULL-NEXT: sbcs.w r4, r12, r1
1331 ; FULL-NEXT: sbcs.w r2, r3, r2
1332 ; FULL-NEXT: sbcs.w r2, r3, r5
1334 ; FULL-NEXT: movge r0, #0
1335 ; FULL-NEXT: csel r1, r1, r12, lt
1336 ; FULL-NEXT: pop {r4, r5, r7, pc}
1338 %conv = fptosi float %x to i128
1339 %0 = icmp slt i128 %conv, 9223372036854775807
1340 %spec.store.select = select i1 %0, i128 %conv, i128 9223372036854775807
1341 %1 = icmp sgt i128 %spec.store.select, -9223372036854775808
1342 %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 -9223372036854775808
1343 %conv6 = trunc i128 %spec.store.select7 to i64
1347 define i64 @utest_f32i64(float %x) {
1348 ; SOFT-LABEL: utest_f32i64:
1349 ; SOFT: @ %bb.0: @ %entry
1350 ; SOFT-NEXT: .save {r4, lr}
1351 ; SOFT-NEXT: push {r4, lr}
1352 ; SOFT-NEXT: bl __fixunssfti
1353 ; SOFT-NEXT: movs r4, #0
1354 ; SOFT-NEXT: subs r2, r2, #1
1355 ; SOFT-NEXT: sbcs r3, r4
1356 ; SOFT-NEXT: bhs .LBB22_3
1357 ; SOFT-NEXT: @ %bb.1: @ %entry
1358 ; SOFT-NEXT: bhs .LBB22_4
1359 ; SOFT-NEXT: .LBB22_2: @ %entry
1360 ; SOFT-NEXT: pop {r4, pc}
1361 ; SOFT-NEXT: .LBB22_3: @ %entry
1362 ; SOFT-NEXT: mov r0, r4
1363 ; SOFT-NEXT: blo .LBB22_2
1364 ; SOFT-NEXT: .LBB22_4: @ %entry
1365 ; SOFT-NEXT: mov r1, r4
1366 ; SOFT-NEXT: pop {r4, pc}
1368 ; VFP2-LABEL: utest_f32i64:
1369 ; VFP2: @ %bb.0: @ %entry
1370 ; VFP2-NEXT: .save {r7, lr}
1371 ; VFP2-NEXT: push {r7, lr}
1372 ; VFP2-NEXT: bl __fixunssfti
1373 ; VFP2-NEXT: subs r2, #1
1374 ; VFP2-NEXT: mov.w r12, #0
1375 ; VFP2-NEXT: sbcs r2, r3, #0
1377 ; VFP2-NEXT: movhs r0, r12
1378 ; VFP2-NEXT: movhs r1, r12
1379 ; VFP2-NEXT: pop {r7, pc}
1381 ; FULL-LABEL: utest_f32i64:
1382 ; FULL: @ %bb.0: @ %entry
1383 ; FULL-NEXT: .save {r7, lr}
1384 ; FULL-NEXT: push {r7, lr}
1385 ; FULL-NEXT: bl __fixunssfti
1386 ; FULL-NEXT: subs r2, #1
1387 ; FULL-NEXT: mov.w r12, #0
1388 ; FULL-NEXT: sbcs r2, r3, #0
1389 ; FULL-NEXT: csel r0, r0, r12, lo
1390 ; FULL-NEXT: csel r1, r1, r12, lo
1391 ; FULL-NEXT: pop {r7, pc}
1393 %conv = fptoui float %x to i128
1394 %0 = icmp ult i128 %conv, 18446744073709551616
1395 %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
1396 %conv6 = trunc i128 %spec.store.select to i64
1400 define i64 @ustest_f32i64(float %x) {
1401 ; SOFT-LABEL: ustest_f32i64:
1402 ; SOFT: @ %bb.0: @ %entry
1403 ; SOFT-NEXT: .save {r4, r5, r6, lr}
1404 ; SOFT-NEXT: push {r4, r5, r6, lr}
1405 ; SOFT-NEXT: bl __fixsfti
1406 ; SOFT-NEXT: movs r4, #1
1407 ; SOFT-NEXT: movs r5, #0
1408 ; SOFT-NEXT: subs r6, r2, #1
1409 ; SOFT-NEXT: mov r6, r3
1410 ; SOFT-NEXT: sbcs r6, r5
1411 ; SOFT-NEXT: bge .LBB23_9
1412 ; SOFT-NEXT: @ %bb.1: @ %entry
1413 ; SOFT-NEXT: bge .LBB23_10
1414 ; SOFT-NEXT: .LBB23_2: @ %entry
1415 ; SOFT-NEXT: bge .LBB23_11
1416 ; SOFT-NEXT: .LBB23_3: @ %entry
1417 ; SOFT-NEXT: blt .LBB23_5
1418 ; SOFT-NEXT: .LBB23_4: @ %entry
1419 ; SOFT-NEXT: mov r0, r5
1420 ; SOFT-NEXT: .LBB23_5: @ %entry
1421 ; SOFT-NEXT: rsbs r6, r0, #0
1422 ; SOFT-NEXT: mov r6, r5
1423 ; SOFT-NEXT: sbcs r6, r1
1424 ; SOFT-NEXT: mov r6, r5
1425 ; SOFT-NEXT: sbcs r6, r2
1426 ; SOFT-NEXT: mov r2, r5
1427 ; SOFT-NEXT: sbcs r2, r3
1428 ; SOFT-NEXT: bge .LBB23_12
1429 ; SOFT-NEXT: @ %bb.6: @ %entry
1430 ; SOFT-NEXT: cmp r4, #0
1431 ; SOFT-NEXT: beq .LBB23_13
1432 ; SOFT-NEXT: .LBB23_7: @ %entry
1433 ; SOFT-NEXT: beq .LBB23_14
1434 ; SOFT-NEXT: .LBB23_8: @ %entry
1435 ; SOFT-NEXT: pop {r4, r5, r6, pc}
1436 ; SOFT-NEXT: .LBB23_9: @ %entry
1437 ; SOFT-NEXT: mov r3, r5
1438 ; SOFT-NEXT: blt .LBB23_2
1439 ; SOFT-NEXT: .LBB23_10: @ %entry
1440 ; SOFT-NEXT: mov r2, r4
1441 ; SOFT-NEXT: blt .LBB23_3
1442 ; SOFT-NEXT: .LBB23_11: @ %entry
1443 ; SOFT-NEXT: mov r1, r5
1444 ; SOFT-NEXT: bge .LBB23_4
1445 ; SOFT-NEXT: b .LBB23_5
1446 ; SOFT-NEXT: .LBB23_12: @ %entry
1447 ; SOFT-NEXT: mov r4, r5
1448 ; SOFT-NEXT: cmp r4, #0
1449 ; SOFT-NEXT: bne .LBB23_7
1450 ; SOFT-NEXT: .LBB23_13: @ %entry
1451 ; SOFT-NEXT: mov r0, r4
1452 ; SOFT-NEXT: bne .LBB23_8
1453 ; SOFT-NEXT: .LBB23_14: @ %entry
1454 ; SOFT-NEXT: mov r1, r4
1455 ; SOFT-NEXT: pop {r4, r5, r6, pc}
1457 ; VFP2-LABEL: ustest_f32i64:
1458 ; VFP2: @ %bb.0: @ %entry
1459 ; VFP2-NEXT: .save {r7, lr}
1460 ; VFP2-NEXT: push {r7, lr}
1461 ; VFP2-NEXT: bl __fixsfti
1462 ; VFP2-NEXT: subs.w lr, r2, #1
1463 ; VFP2-NEXT: mov.w r12, #0
1464 ; VFP2-NEXT: sbcs lr, r3, #0
1465 ; VFP2-NEXT: itttt ge
1466 ; VFP2-NEXT: movge r3, r12
1467 ; VFP2-NEXT: movge r2, #1
1468 ; VFP2-NEXT: movge r1, r12
1469 ; VFP2-NEXT: movge r0, r12
1470 ; VFP2-NEXT: rsbs.w lr, r0, #0
1471 ; VFP2-NEXT: sbcs.w lr, r12, r1
1472 ; VFP2-NEXT: sbcs.w r2, r12, r2
1473 ; VFP2-NEXT: sbcs.w r2, r12, r3
1475 ; VFP2-NEXT: movlt.w r12, #1
1476 ; VFP2-NEXT: cmp.w r12, #0
1478 ; VFP2-NEXT: moveq r0, r12
1479 ; VFP2-NEXT: moveq r1, r12
1480 ; VFP2-NEXT: pop {r7, pc}
1482 ; FULL-LABEL: ustest_f32i64:
1483 ; FULL: @ %bb.0: @ %entry
1484 ; FULL-NEXT: .save {r7, lr}
1485 ; FULL-NEXT: push {r7, lr}
1486 ; FULL-NEXT: bl __fixsfti
1487 ; FULL-NEXT: subs.w lr, r2, #1
1488 ; FULL-NEXT: mov.w r12, #0
1489 ; FULL-NEXT: sbcs lr, r3, #0
1491 ; FULL-NEXT: movge r2, #1
1492 ; FULL-NEXT: csel r0, r0, r12, lt
1493 ; FULL-NEXT: csel lr, r3, r12, lt
1494 ; FULL-NEXT: csel r1, r1, r12, lt
1495 ; FULL-NEXT: rsbs r3, r0, #0
1496 ; FULL-NEXT: sbcs.w r3, r12, r1
1497 ; FULL-NEXT: sbcs.w r2, r12, r2
1498 ; FULL-NEXT: sbcs.w r2, r12, lr
1499 ; FULL-NEXT: cset r2, lt
1500 ; FULL-NEXT: cmp r2, #0
1501 ; FULL-NEXT: csel r0, r0, r2, ne
1502 ; FULL-NEXT: csel r1, r1, r2, ne
1503 ; FULL-NEXT: pop {r7, pc}
1505 %conv = fptosi float %x to i128
1506 %0 = icmp slt i128 %conv, 18446744073709551616
1507 %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
1508 %1 = icmp sgt i128 %spec.store.select, 0
1509 %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 0
1510 %conv6 = trunc i128 %spec.store.select7 to i64
1514 define i64 @stest_f16i64(half %x) {
1515 ; SOFT-LABEL: stest_f16i64:
1516 ; SOFT: @ %bb.0: @ %entry
1517 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
1518 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
1519 ; SOFT-NEXT: .pad #4
1520 ; SOFT-NEXT: sub sp, #4
1521 ; SOFT-NEXT: uxth r0, r0
1522 ; SOFT-NEXT: bl __aeabi_h2f
1523 ; SOFT-NEXT: bl __fixsfti
1524 ; SOFT-NEXT: movs r4, #0
1525 ; SOFT-NEXT: mvns r5, r4
1526 ; SOFT-NEXT: ldr r6, .LCPI24_0
1527 ; SOFT-NEXT: adds r7, r0, #1
1528 ; SOFT-NEXT: mov r7, r1
1529 ; SOFT-NEXT: sbcs r7, r6
1530 ; SOFT-NEXT: mov r7, r2
1531 ; SOFT-NEXT: sbcs r7, r4
1532 ; SOFT-NEXT: mov r7, r3
1533 ; SOFT-NEXT: sbcs r7, r4
1534 ; SOFT-NEXT: bge .LBB24_8
1535 ; SOFT-NEXT: @ %bb.1: @ %entry
1536 ; SOFT-NEXT: bge .LBB24_9
1537 ; SOFT-NEXT: .LBB24_2: @ %entry
1538 ; SOFT-NEXT: bge .LBB24_10
1539 ; SOFT-NEXT: .LBB24_3: @ %entry
1540 ; SOFT-NEXT: blt .LBB24_5
1541 ; SOFT-NEXT: .LBB24_4: @ %entry
1542 ; SOFT-NEXT: mov r0, r5
1543 ; SOFT-NEXT: .LBB24_5: @ %entry
1544 ; SOFT-NEXT: movs r6, #1
1545 ; SOFT-NEXT: lsls r6, r6, #31
1546 ; SOFT-NEXT: rsbs r7, r0, #0
1547 ; SOFT-NEXT: mov r7, r6
1548 ; SOFT-NEXT: sbcs r7, r1
1549 ; SOFT-NEXT: mov r7, r5
1550 ; SOFT-NEXT: sbcs r7, r2
1551 ; SOFT-NEXT: sbcs r5, r3
1552 ; SOFT-NEXT: bge .LBB24_11
1553 ; SOFT-NEXT: @ %bb.6: @ %entry
1554 ; SOFT-NEXT: bge .LBB24_12
1555 ; SOFT-NEXT: .LBB24_7: @ %entry
1556 ; SOFT-NEXT: add sp, #4
1557 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
1558 ; SOFT-NEXT: .LBB24_8: @ %entry
1559 ; SOFT-NEXT: mov r3, r4
1560 ; SOFT-NEXT: blt .LBB24_2
1561 ; SOFT-NEXT: .LBB24_9: @ %entry
1562 ; SOFT-NEXT: mov r2, r4
1563 ; SOFT-NEXT: blt .LBB24_3
1564 ; SOFT-NEXT: .LBB24_10: @ %entry
1565 ; SOFT-NEXT: mov r1, r6
1566 ; SOFT-NEXT: bge .LBB24_4
1567 ; SOFT-NEXT: b .LBB24_5
1568 ; SOFT-NEXT: .LBB24_11: @ %entry
1569 ; SOFT-NEXT: mov r0, r4
1570 ; SOFT-NEXT: blt .LBB24_7
1571 ; SOFT-NEXT: .LBB24_12: @ %entry
1572 ; SOFT-NEXT: mov r1, r6
1573 ; SOFT-NEXT: add sp, #4
1574 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
1575 ; SOFT-NEXT: .p2align 2
1576 ; SOFT-NEXT: @ %bb.13:
1577 ; SOFT-NEXT: .LCPI24_0:
1578 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
1580 ; VFP2-LABEL: stest_f16i64:
1581 ; VFP2: @ %bb.0: @ %entry
1582 ; VFP2-NEXT: .save {r4, r5, r7, lr}
1583 ; VFP2-NEXT: push {r4, r5, r7, lr}
1584 ; VFP2-NEXT: vmov r0, s0
1585 ; VFP2-NEXT: bl __aeabi_h2f
1586 ; VFP2-NEXT: vmov s0, r0
1587 ; VFP2-NEXT: bl __fixsfti
1588 ; VFP2-NEXT: subs.w r4, r0, #-1
1589 ; VFP2-NEXT: mvn lr, #-2147483648
1590 ; VFP2-NEXT: sbcs.w r4, r1, lr
1591 ; VFP2-NEXT: mov.w r12, #0
1592 ; VFP2-NEXT: sbcs r4, r2, #0
1593 ; VFP2-NEXT: sbcs r4, r3, #0
1594 ; VFP2-NEXT: mov.w r4, #0
1596 ; VFP2-NEXT: movlt r4, #1
1597 ; VFP2-NEXT: cmp r4, #0
1598 ; VFP2-NEXT: itet eq
1599 ; VFP2-NEXT: moveq r3, r4
1600 ; VFP2-NEXT: movne r4, r2
1601 ; VFP2-NEXT: moveq r1, lr
1602 ; VFP2-NEXT: mov.w r2, #-1
1604 ; VFP2-NEXT: moveq r0, r2
1605 ; VFP2-NEXT: rsbs r5, r0, #0
1606 ; VFP2-NEXT: mov.w lr, #-2147483648
1607 ; VFP2-NEXT: sbcs.w r5, lr, r1
1608 ; VFP2-NEXT: sbcs.w r4, r2, r4
1609 ; VFP2-NEXT: sbcs r2, r3
1611 ; VFP2-NEXT: movge r0, r12
1612 ; VFP2-NEXT: movge r1, lr
1613 ; VFP2-NEXT: pop {r4, r5, r7, pc}
1615 ; FULL-LABEL: stest_f16i64:
1616 ; FULL: @ %bb.0: @ %entry
1617 ; FULL-NEXT: .save {r4, r5, r7, lr}
1618 ; FULL-NEXT: push {r4, r5, r7, lr}
1619 ; FULL-NEXT: vmov.f16 r0, s0
1620 ; FULL-NEXT: vmov s0, r0
1621 ; FULL-NEXT: bl __fixhfti
1622 ; FULL-NEXT: subs.w lr, r0, #-1
1623 ; FULL-NEXT: mvn r12, #-2147483648
1624 ; FULL-NEXT: sbcs.w lr, r1, r12
1625 ; FULL-NEXT: sbcs lr, r2, #0
1626 ; FULL-NEXT: sbcs lr, r3, #0
1627 ; FULL-NEXT: cset lr, lt
1628 ; FULL-NEXT: cmp.w lr, #0
1629 ; FULL-NEXT: csel r5, r3, lr, ne
1630 ; FULL-NEXT: mov.w r3, #-1
1631 ; FULL-NEXT: csel r0, r0, r3, ne
1632 ; FULL-NEXT: csel r1, r1, r12, ne
1633 ; FULL-NEXT: csel r2, r2, lr, ne
1634 ; FULL-NEXT: rsbs r4, r0, #0
1635 ; FULL-NEXT: mov.w r12, #-2147483648
1636 ; FULL-NEXT: sbcs.w r4, r12, r1
1637 ; FULL-NEXT: sbcs.w r2, r3, r2
1638 ; FULL-NEXT: sbcs.w r2, r3, r5
1640 ; FULL-NEXT: movge r0, #0
1641 ; FULL-NEXT: csel r1, r1, r12, lt
1642 ; FULL-NEXT: pop {r4, r5, r7, pc}
1644 %conv = fptosi half %x to i128
1645 %0 = icmp slt i128 %conv, 9223372036854775807
1646 %spec.store.select = select i1 %0, i128 %conv, i128 9223372036854775807
1647 %1 = icmp sgt i128 %spec.store.select, -9223372036854775808
1648 %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 -9223372036854775808
1649 %conv6 = trunc i128 %spec.store.select7 to i64
1653 define i64 @utesth_f16i64(half %x) {
1654 ; SOFT-LABEL: utesth_f16i64:
1655 ; SOFT: @ %bb.0: @ %entry
1656 ; SOFT-NEXT: .save {r4, lr}
1657 ; SOFT-NEXT: push {r4, lr}
1658 ; SOFT-NEXT: uxth r0, r0
1659 ; SOFT-NEXT: bl __aeabi_h2f
1660 ; SOFT-NEXT: bl __fixunssfti
1661 ; SOFT-NEXT: movs r4, #0
1662 ; SOFT-NEXT: subs r2, r2, #1
1663 ; SOFT-NEXT: sbcs r3, r4
1664 ; SOFT-NEXT: bhs .LBB25_3
1665 ; SOFT-NEXT: @ %bb.1: @ %entry
1666 ; SOFT-NEXT: bhs .LBB25_4
1667 ; SOFT-NEXT: .LBB25_2: @ %entry
1668 ; SOFT-NEXT: pop {r4, pc}
1669 ; SOFT-NEXT: .LBB25_3: @ %entry
1670 ; SOFT-NEXT: mov r0, r4
1671 ; SOFT-NEXT: blo .LBB25_2
1672 ; SOFT-NEXT: .LBB25_4: @ %entry
1673 ; SOFT-NEXT: mov r1, r4
1674 ; SOFT-NEXT: pop {r4, pc}
1676 ; VFP2-LABEL: utesth_f16i64:
1677 ; VFP2: @ %bb.0: @ %entry
1678 ; VFP2-NEXT: .save {r7, lr}
1679 ; VFP2-NEXT: push {r7, lr}
1680 ; VFP2-NEXT: vmov r0, s0
1681 ; VFP2-NEXT: bl __aeabi_h2f
1682 ; VFP2-NEXT: vmov s0, r0
1683 ; VFP2-NEXT: bl __fixunssfti
1684 ; VFP2-NEXT: subs r2, #1
1685 ; VFP2-NEXT: mov.w r12, #0
1686 ; VFP2-NEXT: sbcs r2, r3, #0
1688 ; VFP2-NEXT: movhs r0, r12
1689 ; VFP2-NEXT: movhs r1, r12
1690 ; VFP2-NEXT: pop {r7, pc}
1692 ; FULL-LABEL: utesth_f16i64:
1693 ; FULL: @ %bb.0: @ %entry
1694 ; FULL-NEXT: .save {r7, lr}
1695 ; FULL-NEXT: push {r7, lr}
1696 ; FULL-NEXT: vmov.f16 r0, s0
1697 ; FULL-NEXT: vmov s0, r0
1698 ; FULL-NEXT: bl __fixunshfti
1699 ; FULL-NEXT: subs r2, #1
1700 ; FULL-NEXT: mov.w r12, #0
1701 ; FULL-NEXT: sbcs r2, r3, #0
1702 ; FULL-NEXT: csel r0, r0, r12, lo
1703 ; FULL-NEXT: csel r1, r1, r12, lo
1704 ; FULL-NEXT: pop {r7, pc}
1706 %conv = fptoui half %x to i128
1707 %0 = icmp ult i128 %conv, 18446744073709551616
1708 %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
1709 %conv6 = trunc i128 %spec.store.select to i64
1713 define i64 @ustest_f16i64(half %x) {
1714 ; SOFT-LABEL: ustest_f16i64:
1715 ; SOFT: @ %bb.0: @ %entry
1716 ; SOFT-NEXT: .save {r4, r5, r6, lr}
1717 ; SOFT-NEXT: push {r4, r5, r6, lr}
1718 ; SOFT-NEXT: uxth r0, r0
1719 ; SOFT-NEXT: bl __aeabi_h2f
1720 ; SOFT-NEXT: bl __fixsfti
1721 ; SOFT-NEXT: movs r4, #1
1722 ; SOFT-NEXT: movs r5, #0
1723 ; SOFT-NEXT: subs r6, r2, #1
1724 ; SOFT-NEXT: mov r6, r3
1725 ; SOFT-NEXT: sbcs r6, r5
1726 ; SOFT-NEXT: bge .LBB26_9
1727 ; SOFT-NEXT: @ %bb.1: @ %entry
1728 ; SOFT-NEXT: bge .LBB26_10
1729 ; SOFT-NEXT: .LBB26_2: @ %entry
1730 ; SOFT-NEXT: bge .LBB26_11
1731 ; SOFT-NEXT: .LBB26_3: @ %entry
1732 ; SOFT-NEXT: blt .LBB26_5
1733 ; SOFT-NEXT: .LBB26_4: @ %entry
1734 ; SOFT-NEXT: mov r0, r5
1735 ; SOFT-NEXT: .LBB26_5: @ %entry
1736 ; SOFT-NEXT: rsbs r6, r0, #0
1737 ; SOFT-NEXT: mov r6, r5
1738 ; SOFT-NEXT: sbcs r6, r1
1739 ; SOFT-NEXT: mov r6, r5
1740 ; SOFT-NEXT: sbcs r6, r2
1741 ; SOFT-NEXT: mov r2, r5
1742 ; SOFT-NEXT: sbcs r2, r3
1743 ; SOFT-NEXT: bge .LBB26_12
1744 ; SOFT-NEXT: @ %bb.6: @ %entry
1745 ; SOFT-NEXT: cmp r4, #0
1746 ; SOFT-NEXT: beq .LBB26_13
1747 ; SOFT-NEXT: .LBB26_7: @ %entry
1748 ; SOFT-NEXT: beq .LBB26_14
1749 ; SOFT-NEXT: .LBB26_8: @ %entry
1750 ; SOFT-NEXT: pop {r4, r5, r6, pc}
1751 ; SOFT-NEXT: .LBB26_9: @ %entry
1752 ; SOFT-NEXT: mov r3, r5
1753 ; SOFT-NEXT: blt .LBB26_2
1754 ; SOFT-NEXT: .LBB26_10: @ %entry
1755 ; SOFT-NEXT: mov r2, r4
1756 ; SOFT-NEXT: blt .LBB26_3
1757 ; SOFT-NEXT: .LBB26_11: @ %entry
1758 ; SOFT-NEXT: mov r1, r5
1759 ; SOFT-NEXT: bge .LBB26_4
1760 ; SOFT-NEXT: b .LBB26_5
1761 ; SOFT-NEXT: .LBB26_12: @ %entry
1762 ; SOFT-NEXT: mov r4, r5
1763 ; SOFT-NEXT: cmp r4, #0
1764 ; SOFT-NEXT: bne .LBB26_7
1765 ; SOFT-NEXT: .LBB26_13: @ %entry
1766 ; SOFT-NEXT: mov r0, r4
1767 ; SOFT-NEXT: bne .LBB26_8
1768 ; SOFT-NEXT: .LBB26_14: @ %entry
1769 ; SOFT-NEXT: mov r1, r4
1770 ; SOFT-NEXT: pop {r4, r5, r6, pc}
1772 ; VFP2-LABEL: ustest_f16i64:
1773 ; VFP2: @ %bb.0: @ %entry
1774 ; VFP2-NEXT: .save {r7, lr}
1775 ; VFP2-NEXT: push {r7, lr}
1776 ; VFP2-NEXT: vmov r0, s0
1777 ; VFP2-NEXT: bl __aeabi_h2f
1778 ; VFP2-NEXT: vmov s0, r0
1779 ; VFP2-NEXT: bl __fixsfti
1780 ; VFP2-NEXT: subs.w lr, r2, #1
1781 ; VFP2-NEXT: mov.w r12, #0
1782 ; VFP2-NEXT: sbcs lr, r3, #0
1783 ; VFP2-NEXT: itttt ge
1784 ; VFP2-NEXT: movge r3, r12
1785 ; VFP2-NEXT: movge r2, #1
1786 ; VFP2-NEXT: movge r1, r12
1787 ; VFP2-NEXT: movge r0, r12
1788 ; VFP2-NEXT: rsbs.w lr, r0, #0
1789 ; VFP2-NEXT: sbcs.w lr, r12, r1
1790 ; VFP2-NEXT: sbcs.w r2, r12, r2
1791 ; VFP2-NEXT: sbcs.w r2, r12, r3
1793 ; VFP2-NEXT: movlt.w r12, #1
1794 ; VFP2-NEXT: cmp.w r12, #0
1796 ; VFP2-NEXT: moveq r0, r12
1797 ; VFP2-NEXT: moveq r1, r12
1798 ; VFP2-NEXT: pop {r7, pc}
1800 ; FULL-LABEL: ustest_f16i64:
1801 ; FULL: @ %bb.0: @ %entry
1802 ; FULL-NEXT: .save {r7, lr}
1803 ; FULL-NEXT: push {r7, lr}
1804 ; FULL-NEXT: vmov.f16 r0, s0
1805 ; FULL-NEXT: vmov s0, r0
1806 ; FULL-NEXT: bl __fixhfti
1807 ; FULL-NEXT: subs.w lr, r2, #1
1808 ; FULL-NEXT: mov.w r12, #0
1809 ; FULL-NEXT: sbcs lr, r3, #0
1811 ; FULL-NEXT: movge r2, #1
1812 ; FULL-NEXT: csel r0, r0, r12, lt
1813 ; FULL-NEXT: csel lr, r3, r12, lt
1814 ; FULL-NEXT: csel r1, r1, r12, lt
1815 ; FULL-NEXT: rsbs r3, r0, #0
1816 ; FULL-NEXT: sbcs.w r3, r12, r1
1817 ; FULL-NEXT: sbcs.w r2, r12, r2
1818 ; FULL-NEXT: sbcs.w r2, r12, lr
1819 ; FULL-NEXT: cset r2, lt
1820 ; FULL-NEXT: cmp r2, #0
1821 ; FULL-NEXT: csel r0, r0, r2, ne
1822 ; FULL-NEXT: csel r1, r1, r2, ne
1823 ; FULL-NEXT: pop {r7, pc}
1825 %conv = fptosi half %x to i128
1826 %0 = icmp slt i128 %conv, 18446744073709551616
1827 %spec.store.select = select i1 %0, i128 %conv, i128 18446744073709551616
1828 %1 = icmp sgt i128 %spec.store.select, 0
1829 %spec.store.select7 = select i1 %1, i128 %spec.store.select, i128 0
1830 %conv6 = trunc i128 %spec.store.select7 to i64
1839 define i32 @stest_f64i32_mm(double %x) {
1840 ; SOFT-LABEL: stest_f64i32_mm:
1841 ; SOFT: @ %bb.0: @ %entry
1842 ; SOFT-NEXT: .save {r4, r5, r7, lr}
1843 ; SOFT-NEXT: push {r4, r5, r7, lr}
1844 ; SOFT-NEXT: bl __aeabi_d2lz
1845 ; SOFT-NEXT: movs r2, #1
1846 ; SOFT-NEXT: movs r3, #0
1847 ; SOFT-NEXT: ldr r4, .LCPI27_0
1848 ; SOFT-NEXT: subs r5, r0, r4
1849 ; SOFT-NEXT: mov r5, r1
1850 ; SOFT-NEXT: sbcs r5, r3
1851 ; SOFT-NEXT: bge .LBB27_7
1852 ; SOFT-NEXT: @ %bb.1: @ %entry
1853 ; SOFT-NEXT: mov r4, r2
1854 ; SOFT-NEXT: bge .LBB27_8
1855 ; SOFT-NEXT: .LBB27_2: @ %entry
1856 ; SOFT-NEXT: cmp r4, #0
1857 ; SOFT-NEXT: bne .LBB27_4
1858 ; SOFT-NEXT: .LBB27_3: @ %entry
1859 ; SOFT-NEXT: mov r1, r4
1860 ; SOFT-NEXT: .LBB27_4: @ %entry
1861 ; SOFT-NEXT: mvns r3, r3
1862 ; SOFT-NEXT: lsls r2, r2, #31
1863 ; SOFT-NEXT: subs r4, r2, r0
1864 ; SOFT-NEXT: sbcs r3, r1
1865 ; SOFT-NEXT: blt .LBB27_6
1866 ; SOFT-NEXT: @ %bb.5: @ %entry
1867 ; SOFT-NEXT: mov r0, r2
1868 ; SOFT-NEXT: .LBB27_6: @ %entry
1869 ; SOFT-NEXT: pop {r4, r5, r7, pc}
1870 ; SOFT-NEXT: .LBB27_7: @ %entry
1871 ; SOFT-NEXT: mov r0, r4
1872 ; SOFT-NEXT: mov r4, r2
1873 ; SOFT-NEXT: blt .LBB27_2
1874 ; SOFT-NEXT: .LBB27_8: @ %entry
1875 ; SOFT-NEXT: mov r4, r3
1876 ; SOFT-NEXT: cmp r4, #0
1877 ; SOFT-NEXT: beq .LBB27_3
1878 ; SOFT-NEXT: b .LBB27_4
1879 ; SOFT-NEXT: .p2align 2
1880 ; SOFT-NEXT: @ %bb.9:
1881 ; SOFT-NEXT: .LCPI27_0:
1882 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
1884 ; VFP2-LABEL: stest_f64i32_mm:
1885 ; VFP2: @ %bb.0: @ %entry
1886 ; VFP2-NEXT: .save {r7, lr}
1887 ; VFP2-NEXT: push {r7, lr}
1888 ; VFP2-NEXT: vmov r0, r1, d0
1889 ; VFP2-NEXT: bl __aeabi_d2lz
1890 ; VFP2-NEXT: mvn r2, #-2147483648
1891 ; VFP2-NEXT: subs r3, r0, r2
1892 ; VFP2-NEXT: sbcs r3, r1, #0
1894 ; VFP2-NEXT: movge r0, r2
1895 ; VFP2-NEXT: mov.w r2, #0
1897 ; VFP2-NEXT: movlt r2, #1
1898 ; VFP2-NEXT: cmp r2, #0
1900 ; VFP2-NEXT: movne r2, r1
1901 ; VFP2-NEXT: mov.w r1, #-1
1902 ; VFP2-NEXT: rsbs.w r3, r0, #-2147483648
1903 ; VFP2-NEXT: sbcs r1, r2
1905 ; VFP2-NEXT: movge.w r0, #-2147483648
1906 ; VFP2-NEXT: pop {r7, pc}
1908 ; FULL-LABEL: stest_f64i32_mm:
1909 ; FULL: @ %bb.0: @ %entry
1910 ; FULL-NEXT: vcvt.s32.f64 s0, d0
1911 ; FULL-NEXT: vmov r0, s0
1914 %conv = fptosi double %x to i64
1915 %spec.store.select = call i64 @llvm.smin.i64(i64 %conv, i64 2147483647)
1916 %spec.store.select7 = call i64 @llvm.smax.i64(i64 %spec.store.select, i64 -2147483648)
1917 %conv6 = trunc i64 %spec.store.select7 to i32
1921 define i32 @utest_f64i32_mm(double %x) {
1922 ; SOFT-LABEL: utest_f64i32_mm:
1923 ; SOFT: @ %bb.0: @ %entry
1924 ; SOFT-NEXT: .save {r7, lr}
1925 ; SOFT-NEXT: push {r7, lr}
1926 ; SOFT-NEXT: bl __aeabi_d2ulz
1927 ; SOFT-NEXT: cmp r1, #0
1928 ; SOFT-NEXT: beq .LBB28_2
1929 ; SOFT-NEXT: @ %bb.1: @ %entry
1930 ; SOFT-NEXT: movs r0, #0
1931 ; SOFT-NEXT: mvns r0, r0
1932 ; SOFT-NEXT: .LBB28_2: @ %entry
1933 ; SOFT-NEXT: pop {r7, pc}
1935 ; VFP2-LABEL: utest_f64i32_mm:
1936 ; VFP2: @ %bb.0: @ %entry
1937 ; VFP2-NEXT: .save {r7, lr}
1938 ; VFP2-NEXT: push {r7, lr}
1939 ; VFP2-NEXT: vmov r0, r1, d0
1940 ; VFP2-NEXT: bl __aeabi_d2ulz
1941 ; VFP2-NEXT: cmp r1, #0
1943 ; VFP2-NEXT: movne.w r0, #-1
1944 ; VFP2-NEXT: pop {r7, pc}
1946 ; FULL-LABEL: utest_f64i32_mm:
1947 ; FULL: @ %bb.0: @ %entry
1948 ; FULL-NEXT: vcvt.u32.f64 s0, d0
1949 ; FULL-NEXT: vmov r0, s0
1952 %conv = fptoui double %x to i64
1953 %spec.store.select = call i64 @llvm.umin.i64(i64 %conv, i64 4294967295)
1954 %conv6 = trunc i64 %spec.store.select to i32
1958 define i32 @ustest_f64i32_mm(double %x) {
1959 ; SOFT-LABEL: ustest_f64i32_mm:
1960 ; SOFT: @ %bb.0: @ %entry
1961 ; SOFT-NEXT: .save {r7, lr}
1962 ; SOFT-NEXT: push {r7, lr}
1963 ; SOFT-NEXT: bl __aeabi_d2lz
1964 ; SOFT-NEXT: mov r2, r0
1965 ; SOFT-NEXT: movs r0, #0
1966 ; SOFT-NEXT: cmp r1, #1
1967 ; SOFT-NEXT: blt .LBB29_2
1968 ; SOFT-NEXT: @ %bb.1: @ %entry
1969 ; SOFT-NEXT: mvns r2, r0
1970 ; SOFT-NEXT: .LBB29_2: @ %entry
1971 ; SOFT-NEXT: asrs r3, r1, #31
1972 ; SOFT-NEXT: ands r3, r1
1973 ; SOFT-NEXT: bmi .LBB29_4
1974 ; SOFT-NEXT: @ %bb.3: @ %entry
1975 ; SOFT-NEXT: mov r0, r2
1976 ; SOFT-NEXT: .LBB29_4: @ %entry
1977 ; SOFT-NEXT: pop {r7, pc}
1979 ; VFP2-LABEL: ustest_f64i32_mm:
1980 ; VFP2: @ %bb.0: @ %entry
1981 ; VFP2-NEXT: .save {r7, lr}
1982 ; VFP2-NEXT: push {r7, lr}
1983 ; VFP2-NEXT: vmov r0, r1, d0
1984 ; VFP2-NEXT: bl __aeabi_d2lz
1985 ; VFP2-NEXT: cmp r1, #1
1987 ; VFP2-NEXT: movge.w r0, #-1
1988 ; VFP2-NEXT: ands.w r1, r1, r1, asr #31
1990 ; VFP2-NEXT: movmi r0, #0
1991 ; VFP2-NEXT: pop {r7, pc}
1993 ; FULL-LABEL: ustest_f64i32_mm:
1994 ; FULL: @ %bb.0: @ %entry
1995 ; FULL-NEXT: vcvt.u32.f64 s0, d0
1996 ; FULL-NEXT: vmov r0, s0
1999 %conv = fptosi double %x to i64
2000 %spec.store.select = call i64 @llvm.smin.i64(i64 %conv, i64 4294967295)
2001 %spec.store.select7 = call i64 @llvm.smax.i64(i64 %spec.store.select, i64 0)
2002 %conv6 = trunc i64 %spec.store.select7 to i32
2006 define i32 @stest_f32i32_mm(float %x) {
2007 ; SOFT-LABEL: stest_f32i32_mm:
2008 ; SOFT: @ %bb.0: @ %entry
2009 ; SOFT-NEXT: .save {r4, r5, r7, lr}
2010 ; SOFT-NEXT: push {r4, r5, r7, lr}
2011 ; SOFT-NEXT: bl __aeabi_f2lz
2012 ; SOFT-NEXT: movs r2, #1
2013 ; SOFT-NEXT: movs r3, #0
2014 ; SOFT-NEXT: ldr r4, .LCPI30_0
2015 ; SOFT-NEXT: subs r5, r0, r4
2016 ; SOFT-NEXT: mov r5, r1
2017 ; SOFT-NEXT: sbcs r5, r3
2018 ; SOFT-NEXT: bge .LBB30_7
2019 ; SOFT-NEXT: @ %bb.1: @ %entry
2020 ; SOFT-NEXT: mov r4, r2
2021 ; SOFT-NEXT: bge .LBB30_8
2022 ; SOFT-NEXT: .LBB30_2: @ %entry
2023 ; SOFT-NEXT: cmp r4, #0
2024 ; SOFT-NEXT: bne .LBB30_4
2025 ; SOFT-NEXT: .LBB30_3: @ %entry
2026 ; SOFT-NEXT: mov r1, r4
2027 ; SOFT-NEXT: .LBB30_4: @ %entry
2028 ; SOFT-NEXT: mvns r3, r3
2029 ; SOFT-NEXT: lsls r2, r2, #31
2030 ; SOFT-NEXT: subs r4, r2, r0
2031 ; SOFT-NEXT: sbcs r3, r1
2032 ; SOFT-NEXT: blt .LBB30_6
2033 ; SOFT-NEXT: @ %bb.5: @ %entry
2034 ; SOFT-NEXT: mov r0, r2
2035 ; SOFT-NEXT: .LBB30_6: @ %entry
2036 ; SOFT-NEXT: pop {r4, r5, r7, pc}
2037 ; SOFT-NEXT: .LBB30_7: @ %entry
2038 ; SOFT-NEXT: mov r0, r4
2039 ; SOFT-NEXT: mov r4, r2
2040 ; SOFT-NEXT: blt .LBB30_2
2041 ; SOFT-NEXT: .LBB30_8: @ %entry
2042 ; SOFT-NEXT: mov r4, r3
2043 ; SOFT-NEXT: cmp r4, #0
2044 ; SOFT-NEXT: beq .LBB30_3
2045 ; SOFT-NEXT: b .LBB30_4
2046 ; SOFT-NEXT: .p2align 2
2047 ; SOFT-NEXT: @ %bb.9:
2048 ; SOFT-NEXT: .LCPI30_0:
2049 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
2051 ; VFP-LABEL: stest_f32i32_mm:
2052 ; VFP: @ %bb.0: @ %entry
2053 ; VFP-NEXT: vcvt.s32.f32 s0, s0
2054 ; VFP-NEXT: vmov r0, s0
2057 %conv = fptosi float %x to i64
2058 %spec.store.select = call i64 @llvm.smin.i64(i64 %conv, i64 2147483647)
2059 %spec.store.select7 = call i64 @llvm.smax.i64(i64 %spec.store.select, i64 -2147483648)
2060 %conv6 = trunc i64 %spec.store.select7 to i32
2064 define i32 @utest_f32i32_mm(float %x) {
2065 ; SOFT-LABEL: utest_f32i32_mm:
2066 ; SOFT: @ %bb.0: @ %entry
2067 ; SOFT-NEXT: .save {r7, lr}
2068 ; SOFT-NEXT: push {r7, lr}
2069 ; SOFT-NEXT: bl __aeabi_f2ulz
2070 ; SOFT-NEXT: cmp r1, #0
2071 ; SOFT-NEXT: beq .LBB31_2
2072 ; SOFT-NEXT: @ %bb.1: @ %entry
2073 ; SOFT-NEXT: movs r0, #0
2074 ; SOFT-NEXT: mvns r0, r0
2075 ; SOFT-NEXT: .LBB31_2: @ %entry
2076 ; SOFT-NEXT: pop {r7, pc}
2078 ; VFP-LABEL: utest_f32i32_mm:
2079 ; VFP: @ %bb.0: @ %entry
2080 ; VFP-NEXT: vcvt.u32.f32 s0, s0
2081 ; VFP-NEXT: vmov r0, s0
2084 %conv = fptoui float %x to i64
2085 %spec.store.select = call i64 @llvm.umin.i64(i64 %conv, i64 4294967295)
2086 %conv6 = trunc i64 %spec.store.select to i32
2090 define i32 @ustest_f32i32_mm(float %x) {
2091 ; SOFT-LABEL: ustest_f32i32_mm:
2092 ; SOFT: @ %bb.0: @ %entry
2093 ; SOFT-NEXT: .save {r7, lr}
2094 ; SOFT-NEXT: push {r7, lr}
2095 ; SOFT-NEXT: bl __aeabi_f2lz
2096 ; SOFT-NEXT: mov r2, r0
2097 ; SOFT-NEXT: movs r0, #0
2098 ; SOFT-NEXT: cmp r1, #1
2099 ; SOFT-NEXT: blt .LBB32_2
2100 ; SOFT-NEXT: @ %bb.1: @ %entry
2101 ; SOFT-NEXT: mvns r2, r0
2102 ; SOFT-NEXT: .LBB32_2: @ %entry
2103 ; SOFT-NEXT: asrs r3, r1, #31
2104 ; SOFT-NEXT: ands r3, r1
2105 ; SOFT-NEXT: bmi .LBB32_4
2106 ; SOFT-NEXT: @ %bb.3: @ %entry
2107 ; SOFT-NEXT: mov r0, r2
2108 ; SOFT-NEXT: .LBB32_4: @ %entry
2109 ; SOFT-NEXT: pop {r7, pc}
2111 ; VFP-LABEL: ustest_f32i32_mm:
2112 ; VFP: @ %bb.0: @ %entry
2113 ; VFP-NEXT: vcvt.u32.f32 s0, s0
2114 ; VFP-NEXT: vmov r0, s0
2117 %conv = fptosi float %x to i64
2118 %spec.store.select = call i64 @llvm.smin.i64(i64 %conv, i64 4294967295)
2119 %spec.store.select7 = call i64 @llvm.smax.i64(i64 %spec.store.select, i64 0)
2120 %conv6 = trunc i64 %spec.store.select7 to i32
2124 define i32 @stest_f16i32_mm(half %x) {
2125 ; SOFT-LABEL: stest_f16i32_mm:
2126 ; SOFT: @ %bb.0: @ %entry
2127 ; SOFT-NEXT: .save {r4, r5, r7, lr}
2128 ; SOFT-NEXT: push {r4, r5, r7, lr}
2129 ; SOFT-NEXT: uxth r0, r0
2130 ; SOFT-NEXT: bl __aeabi_h2f
2131 ; SOFT-NEXT: bl __aeabi_f2lz
2132 ; SOFT-NEXT: movs r2, #1
2133 ; SOFT-NEXT: movs r3, #0
2134 ; SOFT-NEXT: ldr r4, .LCPI33_0
2135 ; SOFT-NEXT: subs r5, r0, r4
2136 ; SOFT-NEXT: mov r5, r1
2137 ; SOFT-NEXT: sbcs r5, r3
2138 ; SOFT-NEXT: bge .LBB33_7
2139 ; SOFT-NEXT: @ %bb.1: @ %entry
2140 ; SOFT-NEXT: mov r4, r2
2141 ; SOFT-NEXT: bge .LBB33_8
2142 ; SOFT-NEXT: .LBB33_2: @ %entry
2143 ; SOFT-NEXT: cmp r4, #0
2144 ; SOFT-NEXT: bne .LBB33_4
2145 ; SOFT-NEXT: .LBB33_3: @ %entry
2146 ; SOFT-NEXT: mov r1, r4
2147 ; SOFT-NEXT: .LBB33_4: @ %entry
2148 ; SOFT-NEXT: mvns r3, r3
2149 ; SOFT-NEXT: lsls r2, r2, #31
2150 ; SOFT-NEXT: subs r4, r2, r0
2151 ; SOFT-NEXT: sbcs r3, r1
2152 ; SOFT-NEXT: blt .LBB33_6
2153 ; SOFT-NEXT: @ %bb.5: @ %entry
2154 ; SOFT-NEXT: mov r0, r2
2155 ; SOFT-NEXT: .LBB33_6: @ %entry
2156 ; SOFT-NEXT: pop {r4, r5, r7, pc}
2157 ; SOFT-NEXT: .LBB33_7: @ %entry
2158 ; SOFT-NEXT: mov r0, r4
2159 ; SOFT-NEXT: mov r4, r2
2160 ; SOFT-NEXT: blt .LBB33_2
2161 ; SOFT-NEXT: .LBB33_8: @ %entry
2162 ; SOFT-NEXT: mov r4, r3
2163 ; SOFT-NEXT: cmp r4, #0
2164 ; SOFT-NEXT: beq .LBB33_3
2165 ; SOFT-NEXT: b .LBB33_4
2166 ; SOFT-NEXT: .p2align 2
2167 ; SOFT-NEXT: @ %bb.9:
2168 ; SOFT-NEXT: .LCPI33_0:
2169 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
2171 ; VFP2-LABEL: stest_f16i32_mm:
2172 ; VFP2: @ %bb.0: @ %entry
2173 ; VFP2-NEXT: .save {r7, lr}
2174 ; VFP2-NEXT: push {r7, lr}
2175 ; VFP2-NEXT: vmov r0, s0
2176 ; VFP2-NEXT: bl __aeabi_h2f
2177 ; VFP2-NEXT: vmov s0, r0
2178 ; VFP2-NEXT: vcvt.s32.f32 s0, s0
2179 ; VFP2-NEXT: vmov r0, s0
2180 ; VFP2-NEXT: pop {r7, pc}
2182 ; FULL-LABEL: stest_f16i32_mm:
2183 ; FULL: @ %bb.0: @ %entry
2184 ; FULL-NEXT: vcvt.s32.f16 s0, s0
2185 ; FULL-NEXT: vmov r0, s0
2188 %conv = fptosi half %x to i64
2189 %spec.store.select = call i64 @llvm.smin.i64(i64 %conv, i64 2147483647)
2190 %spec.store.select7 = call i64 @llvm.smax.i64(i64 %spec.store.select, i64 -2147483648)
2191 %conv6 = trunc i64 %spec.store.select7 to i32
2195 define i32 @utesth_f16i32_mm(half %x) {
2196 ; SOFT-LABEL: utesth_f16i32_mm:
2197 ; SOFT: @ %bb.0: @ %entry
2198 ; SOFT-NEXT: .save {r7, lr}
2199 ; SOFT-NEXT: push {r7, lr}
2200 ; SOFT-NEXT: uxth r0, r0
2201 ; SOFT-NEXT: bl __aeabi_h2f
2202 ; SOFT-NEXT: bl __aeabi_f2ulz
2203 ; SOFT-NEXT: cmp r1, #0
2204 ; SOFT-NEXT: beq .LBB34_2
2205 ; SOFT-NEXT: @ %bb.1: @ %entry
2206 ; SOFT-NEXT: movs r0, #0
2207 ; SOFT-NEXT: mvns r0, r0
2208 ; SOFT-NEXT: .LBB34_2: @ %entry
2209 ; SOFT-NEXT: pop {r7, pc}
2211 ; VFP2-LABEL: utesth_f16i32_mm:
2212 ; VFP2: @ %bb.0: @ %entry
2213 ; VFP2-NEXT: .save {r7, lr}
2214 ; VFP2-NEXT: push {r7, lr}
2215 ; VFP2-NEXT: vmov r0, s0
2216 ; VFP2-NEXT: bl __aeabi_h2f
2217 ; VFP2-NEXT: vmov s0, r0
2218 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
2219 ; VFP2-NEXT: vmov r0, s0
2220 ; VFP2-NEXT: pop {r7, pc}
2222 ; FULL-LABEL: utesth_f16i32_mm:
2223 ; FULL: @ %bb.0: @ %entry
2224 ; FULL-NEXT: vcvt.u32.f16 s0, s0
2225 ; FULL-NEXT: vmov r0, s0
2228 %conv = fptoui half %x to i64
2229 %spec.store.select = call i64 @llvm.umin.i64(i64 %conv, i64 4294967295)
2230 %conv6 = trunc i64 %spec.store.select to i32
2234 define i32 @ustest_f16i32_mm(half %x) {
2235 ; SOFT-LABEL: ustest_f16i32_mm:
2236 ; SOFT: @ %bb.0: @ %entry
2237 ; SOFT-NEXT: .save {r7, lr}
2238 ; SOFT-NEXT: push {r7, lr}
2239 ; SOFT-NEXT: uxth r0, r0
2240 ; SOFT-NEXT: bl __aeabi_h2f
2241 ; SOFT-NEXT: bl __aeabi_f2lz
2242 ; SOFT-NEXT: mov r2, r0
2243 ; SOFT-NEXT: movs r0, #0
2244 ; SOFT-NEXT: cmp r1, #1
2245 ; SOFT-NEXT: blt .LBB35_2
2246 ; SOFT-NEXT: @ %bb.1: @ %entry
2247 ; SOFT-NEXT: mvns r2, r0
2248 ; SOFT-NEXT: .LBB35_2: @ %entry
2249 ; SOFT-NEXT: asrs r3, r1, #31
2250 ; SOFT-NEXT: ands r3, r1
2251 ; SOFT-NEXT: bmi .LBB35_4
2252 ; SOFT-NEXT: @ %bb.3: @ %entry
2253 ; SOFT-NEXT: mov r0, r2
2254 ; SOFT-NEXT: .LBB35_4: @ %entry
2255 ; SOFT-NEXT: pop {r7, pc}
2257 ; VFP2-LABEL: ustest_f16i32_mm:
2258 ; VFP2: @ %bb.0: @ %entry
2259 ; VFP2-NEXT: .save {r7, lr}
2260 ; VFP2-NEXT: push {r7, lr}
2261 ; VFP2-NEXT: vmov r0, s0
2262 ; VFP2-NEXT: bl __aeabi_h2f
2263 ; VFP2-NEXT: vmov s0, r0
2264 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
2265 ; VFP2-NEXT: vmov r0, s0
2266 ; VFP2-NEXT: pop {r7, pc}
2268 ; FULL-LABEL: ustest_f16i32_mm:
2269 ; FULL: @ %bb.0: @ %entry
2270 ; FULL-NEXT: vcvt.u32.f16 s0, s0
2271 ; FULL-NEXT: vmov r0, s0
2274 %conv = fptosi half %x to i64
2275 %spec.store.select = call i64 @llvm.smin.i64(i64 %conv, i64 4294967295)
2276 %spec.store.select7 = call i64 @llvm.smax.i64(i64 %spec.store.select, i64 0)
2277 %conv6 = trunc i64 %spec.store.select7 to i32
2283 define i16 @stest_f64i16_mm(double %x) {
2284 ; SOFT-LABEL: stest_f64i16_mm:
2285 ; SOFT: @ %bb.0: @ %entry
2286 ; SOFT-NEXT: .save {r7, lr}
2287 ; SOFT-NEXT: push {r7, lr}
2288 ; SOFT-NEXT: bl __aeabi_d2iz
2289 ; SOFT-NEXT: ldr r1, .LCPI36_0
2290 ; SOFT-NEXT: cmp r0, r1
2291 ; SOFT-NEXT: blt .LBB36_2
2292 ; SOFT-NEXT: @ %bb.1: @ %entry
2293 ; SOFT-NEXT: mov r0, r1
2294 ; SOFT-NEXT: .LBB36_2: @ %entry
2295 ; SOFT-NEXT: ldr r1, .LCPI36_1
2296 ; SOFT-NEXT: cmp r0, r1
2297 ; SOFT-NEXT: bgt .LBB36_4
2298 ; SOFT-NEXT: @ %bb.3: @ %entry
2299 ; SOFT-NEXT: mov r0, r1
2300 ; SOFT-NEXT: .LBB36_4: @ %entry
2301 ; SOFT-NEXT: pop {r7, pc}
2302 ; SOFT-NEXT: .p2align 2
2303 ; SOFT-NEXT: @ %bb.5:
2304 ; SOFT-NEXT: .LCPI36_0:
2305 ; SOFT-NEXT: .long 32767 @ 0x7fff
2306 ; SOFT-NEXT: .LCPI36_1:
2307 ; SOFT-NEXT: .long 4294934528 @ 0xffff8000
2309 ; VFP2-LABEL: stest_f64i16_mm:
2310 ; VFP2: @ %bb.0: @ %entry
2311 ; VFP2-NEXT: .save {r7, lr}
2312 ; VFP2-NEXT: push {r7, lr}
2313 ; VFP2-NEXT: vmov r0, r1, d0
2314 ; VFP2-NEXT: bl __aeabi_d2iz
2315 ; VFP2-NEXT: ssat r0, #16, r0
2316 ; VFP2-NEXT: pop {r7, pc}
2318 ; FULL-LABEL: stest_f64i16_mm:
2319 ; FULL: @ %bb.0: @ %entry
2320 ; FULL-NEXT: vcvt.s32.f64 s0, d0
2321 ; FULL-NEXT: vmov r0, s0
2322 ; FULL-NEXT: ssat r0, #16, r0
2325 %conv = fptosi double %x to i32
2326 %spec.store.select = call i32 @llvm.smin.i32(i32 %conv, i32 32767)
2327 %spec.store.select7 = call i32 @llvm.smax.i32(i32 %spec.store.select, i32 -32768)
2328 %conv6 = trunc i32 %spec.store.select7 to i16
2332 define i16 @utest_f64i16_mm(double %x) {
2333 ; SOFT-LABEL: utest_f64i16_mm:
2334 ; SOFT: @ %bb.0: @ %entry
2335 ; SOFT-NEXT: .save {r7, lr}
2336 ; SOFT-NEXT: push {r7, lr}
2337 ; SOFT-NEXT: bl __aeabi_d2uiz
2338 ; SOFT-NEXT: ldr r1, .LCPI37_0
2339 ; SOFT-NEXT: cmp r0, r1
2340 ; SOFT-NEXT: blo .LBB37_2
2341 ; SOFT-NEXT: @ %bb.1: @ %entry
2342 ; SOFT-NEXT: mov r0, r1
2343 ; SOFT-NEXT: .LBB37_2: @ %entry
2344 ; SOFT-NEXT: pop {r7, pc}
2345 ; SOFT-NEXT: .p2align 2
2346 ; SOFT-NEXT: @ %bb.3:
2347 ; SOFT-NEXT: .LCPI37_0:
2348 ; SOFT-NEXT: .long 65535 @ 0xffff
2350 ; VFP2-LABEL: utest_f64i16_mm:
2351 ; VFP2: @ %bb.0: @ %entry
2352 ; VFP2-NEXT: .save {r7, lr}
2353 ; VFP2-NEXT: push {r7, lr}
2354 ; VFP2-NEXT: vmov r0, r1, d0
2355 ; VFP2-NEXT: bl __aeabi_d2uiz
2356 ; VFP2-NEXT: movw r1, #65535
2357 ; VFP2-NEXT: cmp r0, r1
2359 ; VFP2-NEXT: movhs r0, r1
2360 ; VFP2-NEXT: pop {r7, pc}
2362 ; FULL-LABEL: utest_f64i16_mm:
2363 ; FULL: @ %bb.0: @ %entry
2364 ; FULL-NEXT: vcvt.u32.f64 s0, d0
2365 ; FULL-NEXT: movw r1, #65535
2366 ; FULL-NEXT: vmov r0, s0
2367 ; FULL-NEXT: cmp r0, r1
2368 ; FULL-NEXT: csel r0, r0, r1, lo
2371 %conv = fptoui double %x to i32
2372 %spec.store.select = call i32 @llvm.umin.i32(i32 %conv, i32 65535)
2373 %conv6 = trunc i32 %spec.store.select to i16
2377 define i16 @ustest_f64i16_mm(double %x) {
2378 ; SOFT-LABEL: ustest_f64i16_mm:
2379 ; SOFT: @ %bb.0: @ %entry
2380 ; SOFT-NEXT: .save {r7, lr}
2381 ; SOFT-NEXT: push {r7, lr}
2382 ; SOFT-NEXT: bl __aeabi_d2iz
2383 ; SOFT-NEXT: ldr r1, .LCPI38_0
2384 ; SOFT-NEXT: cmp r0, r1
2385 ; SOFT-NEXT: blt .LBB38_2
2386 ; SOFT-NEXT: @ %bb.1: @ %entry
2387 ; SOFT-NEXT: mov r0, r1
2388 ; SOFT-NEXT: .LBB38_2: @ %entry
2389 ; SOFT-NEXT: asrs r1, r0, #31
2390 ; SOFT-NEXT: bics r0, r1
2391 ; SOFT-NEXT: pop {r7, pc}
2392 ; SOFT-NEXT: .p2align 2
2393 ; SOFT-NEXT: @ %bb.3:
2394 ; SOFT-NEXT: .LCPI38_0:
2395 ; SOFT-NEXT: .long 65535 @ 0xffff
2397 ; VFP2-LABEL: ustest_f64i16_mm:
2398 ; VFP2: @ %bb.0: @ %entry
2399 ; VFP2-NEXT: .save {r7, lr}
2400 ; VFP2-NEXT: push {r7, lr}
2401 ; VFP2-NEXT: vmov r0, r1, d0
2402 ; VFP2-NEXT: bl __aeabi_d2iz
2403 ; VFP2-NEXT: usat r0, #16, r0
2404 ; VFP2-NEXT: pop {r7, pc}
2406 ; FULL-LABEL: ustest_f64i16_mm:
2407 ; FULL: @ %bb.0: @ %entry
2408 ; FULL-NEXT: vcvt.s32.f64 s0, d0
2409 ; FULL-NEXT: vmov r0, s0
2410 ; FULL-NEXT: usat r0, #16, r0
2413 %conv = fptosi double %x to i32
2414 %spec.store.select = call i32 @llvm.smin.i32(i32 %conv, i32 65535)
2415 %spec.store.select7 = call i32 @llvm.smax.i32(i32 %spec.store.select, i32 0)
2416 %conv6 = trunc i32 %spec.store.select7 to i16
2420 define i16 @stest_f32i16_mm(float %x) {
2421 ; SOFT-LABEL: stest_f32i16_mm:
2422 ; SOFT: @ %bb.0: @ %entry
2423 ; SOFT-NEXT: .save {r7, lr}
2424 ; SOFT-NEXT: push {r7, lr}
2425 ; SOFT-NEXT: bl __aeabi_f2iz
2426 ; SOFT-NEXT: ldr r1, .LCPI39_0
2427 ; SOFT-NEXT: cmp r0, r1
2428 ; SOFT-NEXT: blt .LBB39_2
2429 ; SOFT-NEXT: @ %bb.1: @ %entry
2430 ; SOFT-NEXT: mov r0, r1
2431 ; SOFT-NEXT: .LBB39_2: @ %entry
2432 ; SOFT-NEXT: ldr r1, .LCPI39_1
2433 ; SOFT-NEXT: cmp r0, r1
2434 ; SOFT-NEXT: bgt .LBB39_4
2435 ; SOFT-NEXT: @ %bb.3: @ %entry
2436 ; SOFT-NEXT: mov r0, r1
2437 ; SOFT-NEXT: .LBB39_4: @ %entry
2438 ; SOFT-NEXT: pop {r7, pc}
2439 ; SOFT-NEXT: .p2align 2
2440 ; SOFT-NEXT: @ %bb.5:
2441 ; SOFT-NEXT: .LCPI39_0:
2442 ; SOFT-NEXT: .long 32767 @ 0x7fff
2443 ; SOFT-NEXT: .LCPI39_1:
2444 ; SOFT-NEXT: .long 4294934528 @ 0xffff8000
2446 ; VFP-LABEL: stest_f32i16_mm:
2447 ; VFP: @ %bb.0: @ %entry
2448 ; VFP-NEXT: vcvt.s32.f32 s0, s0
2449 ; VFP-NEXT: vmov r0, s0
2450 ; VFP-NEXT: ssat r0, #16, r0
2453 %conv = fptosi float %x to i32
2454 %spec.store.select = call i32 @llvm.smin.i32(i32 %conv, i32 32767)
2455 %spec.store.select7 = call i32 @llvm.smax.i32(i32 %spec.store.select, i32 -32768)
2456 %conv6 = trunc i32 %spec.store.select7 to i16
2460 define i16 @utest_f32i16_mm(float %x) {
2461 ; SOFT-LABEL: utest_f32i16_mm:
2462 ; SOFT: @ %bb.0: @ %entry
2463 ; SOFT-NEXT: .save {r7, lr}
2464 ; SOFT-NEXT: push {r7, lr}
2465 ; SOFT-NEXT: bl __aeabi_f2uiz
2466 ; SOFT-NEXT: ldr r1, .LCPI40_0
2467 ; SOFT-NEXT: cmp r0, r1
2468 ; SOFT-NEXT: blo .LBB40_2
2469 ; SOFT-NEXT: @ %bb.1: @ %entry
2470 ; SOFT-NEXT: mov r0, r1
2471 ; SOFT-NEXT: .LBB40_2: @ %entry
2472 ; SOFT-NEXT: pop {r7, pc}
2473 ; SOFT-NEXT: .p2align 2
2474 ; SOFT-NEXT: @ %bb.3:
2475 ; SOFT-NEXT: .LCPI40_0:
2476 ; SOFT-NEXT: .long 65535 @ 0xffff
2478 ; VFP2-LABEL: utest_f32i16_mm:
2479 ; VFP2: @ %bb.0: @ %entry
2480 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
2481 ; VFP2-NEXT: movw r0, #65535
2482 ; VFP2-NEXT: vmov r1, s0
2483 ; VFP2-NEXT: cmp r1, r0
2485 ; VFP2-NEXT: movlo r0, r1
2488 ; FULL-LABEL: utest_f32i16_mm:
2489 ; FULL: @ %bb.0: @ %entry
2490 ; FULL-NEXT: vcvt.u32.f32 s0, s0
2491 ; FULL-NEXT: movw r1, #65535
2492 ; FULL-NEXT: vmov r0, s0
2493 ; FULL-NEXT: cmp r0, r1
2494 ; FULL-NEXT: csel r0, r0, r1, lo
2497 %conv = fptoui float %x to i32
2498 %spec.store.select = call i32 @llvm.umin.i32(i32 %conv, i32 65535)
2499 %conv6 = trunc i32 %spec.store.select to i16
2503 define i16 @ustest_f32i16_mm(float %x) {
2504 ; SOFT-LABEL: ustest_f32i16_mm:
2505 ; SOFT: @ %bb.0: @ %entry
2506 ; SOFT-NEXT: .save {r7, lr}
2507 ; SOFT-NEXT: push {r7, lr}
2508 ; SOFT-NEXT: bl __aeabi_f2iz
2509 ; SOFT-NEXT: ldr r1, .LCPI41_0
2510 ; SOFT-NEXT: cmp r0, r1
2511 ; SOFT-NEXT: blt .LBB41_2
2512 ; SOFT-NEXT: @ %bb.1: @ %entry
2513 ; SOFT-NEXT: mov r0, r1
2514 ; SOFT-NEXT: .LBB41_2: @ %entry
2515 ; SOFT-NEXT: asrs r1, r0, #31
2516 ; SOFT-NEXT: bics r0, r1
2517 ; SOFT-NEXT: pop {r7, pc}
2518 ; SOFT-NEXT: .p2align 2
2519 ; SOFT-NEXT: @ %bb.3:
2520 ; SOFT-NEXT: .LCPI41_0:
2521 ; SOFT-NEXT: .long 65535 @ 0xffff
2523 ; VFP-LABEL: ustest_f32i16_mm:
2524 ; VFP: @ %bb.0: @ %entry
2525 ; VFP-NEXT: vcvt.s32.f32 s0, s0
2526 ; VFP-NEXT: vmov r0, s0
2527 ; VFP-NEXT: usat r0, #16, r0
2530 %conv = fptosi float %x to i32
2531 %spec.store.select = call i32 @llvm.smin.i32(i32 %conv, i32 65535)
2532 %spec.store.select7 = call i32 @llvm.smax.i32(i32 %spec.store.select, i32 0)
2533 %conv6 = trunc i32 %spec.store.select7 to i16
2537 define i16 @stest_f16i16_mm(half %x) {
2538 ; SOFT-LABEL: stest_f16i16_mm:
2539 ; SOFT: @ %bb.0: @ %entry
2540 ; SOFT-NEXT: .save {r7, lr}
2541 ; SOFT-NEXT: push {r7, lr}
2542 ; SOFT-NEXT: uxth r0, r0
2543 ; SOFT-NEXT: bl __aeabi_h2f
2544 ; SOFT-NEXT: bl __aeabi_f2iz
2545 ; SOFT-NEXT: ldr r1, .LCPI42_0
2546 ; SOFT-NEXT: cmp r0, r1
2547 ; SOFT-NEXT: blt .LBB42_2
2548 ; SOFT-NEXT: @ %bb.1: @ %entry
2549 ; SOFT-NEXT: mov r0, r1
2550 ; SOFT-NEXT: .LBB42_2: @ %entry
2551 ; SOFT-NEXT: ldr r1, .LCPI42_1
2552 ; SOFT-NEXT: cmp r0, r1
2553 ; SOFT-NEXT: bgt .LBB42_4
2554 ; SOFT-NEXT: @ %bb.3: @ %entry
2555 ; SOFT-NEXT: mov r0, r1
2556 ; SOFT-NEXT: .LBB42_4: @ %entry
2557 ; SOFT-NEXT: pop {r7, pc}
2558 ; SOFT-NEXT: .p2align 2
2559 ; SOFT-NEXT: @ %bb.5:
2560 ; SOFT-NEXT: .LCPI42_0:
2561 ; SOFT-NEXT: .long 32767 @ 0x7fff
2562 ; SOFT-NEXT: .LCPI42_1:
2563 ; SOFT-NEXT: .long 4294934528 @ 0xffff8000
2565 ; VFP2-LABEL: stest_f16i16_mm:
2566 ; VFP2: @ %bb.0: @ %entry
2567 ; VFP2-NEXT: .save {r7, lr}
2568 ; VFP2-NEXT: push {r7, lr}
2569 ; VFP2-NEXT: vmov r0, s0
2570 ; VFP2-NEXT: bl __aeabi_h2f
2571 ; VFP2-NEXT: vmov s0, r0
2572 ; VFP2-NEXT: vcvt.s32.f32 s0, s0
2573 ; VFP2-NEXT: vmov r0, s0
2574 ; VFP2-NEXT: ssat r0, #16, r0
2575 ; VFP2-NEXT: pop {r7, pc}
2577 ; FULL-LABEL: stest_f16i16_mm:
2578 ; FULL: @ %bb.0: @ %entry
2579 ; FULL-NEXT: vcvt.s32.f16 s0, s0
2580 ; FULL-NEXT: vmov r0, s0
2581 ; FULL-NEXT: ssat r0, #16, r0
2584 %conv = fptosi half %x to i32
2585 %spec.store.select = call i32 @llvm.smin.i32(i32 %conv, i32 32767)
2586 %spec.store.select7 = call i32 @llvm.smax.i32(i32 %spec.store.select, i32 -32768)
2587 %conv6 = trunc i32 %spec.store.select7 to i16
2591 define i16 @utesth_f16i16_mm(half %x) {
2592 ; SOFT-LABEL: utesth_f16i16_mm:
2593 ; SOFT: @ %bb.0: @ %entry
2594 ; SOFT-NEXT: .save {r7, lr}
2595 ; SOFT-NEXT: push {r7, lr}
2596 ; SOFT-NEXT: uxth r0, r0
2597 ; SOFT-NEXT: bl __aeabi_h2f
2598 ; SOFT-NEXT: bl __aeabi_f2uiz
2599 ; SOFT-NEXT: ldr r1, .LCPI43_0
2600 ; SOFT-NEXT: cmp r0, r1
2601 ; SOFT-NEXT: blo .LBB43_2
2602 ; SOFT-NEXT: @ %bb.1: @ %entry
2603 ; SOFT-NEXT: mov r0, r1
2604 ; SOFT-NEXT: .LBB43_2: @ %entry
2605 ; SOFT-NEXT: pop {r7, pc}
2606 ; SOFT-NEXT: .p2align 2
2607 ; SOFT-NEXT: @ %bb.3:
2608 ; SOFT-NEXT: .LCPI43_0:
2609 ; SOFT-NEXT: .long 65535 @ 0xffff
2611 ; VFP2-LABEL: utesth_f16i16_mm:
2612 ; VFP2: @ %bb.0: @ %entry
2613 ; VFP2-NEXT: .save {r7, lr}
2614 ; VFP2-NEXT: push {r7, lr}
2615 ; VFP2-NEXT: vmov r0, s0
2616 ; VFP2-NEXT: bl __aeabi_h2f
2617 ; VFP2-NEXT: vmov s0, r0
2618 ; VFP2-NEXT: movw r0, #65535
2619 ; VFP2-NEXT: vcvt.u32.f32 s0, s0
2620 ; VFP2-NEXT: vmov r1, s0
2621 ; VFP2-NEXT: cmp r1, r0
2623 ; VFP2-NEXT: movlo r0, r1
2624 ; VFP2-NEXT: pop {r7, pc}
2626 ; FULL-LABEL: utesth_f16i16_mm:
2627 ; FULL: @ %bb.0: @ %entry
2628 ; FULL-NEXT: vcvt.u32.f16 s0, s0
2629 ; FULL-NEXT: movw r1, #65535
2630 ; FULL-NEXT: vmov r0, s0
2631 ; FULL-NEXT: cmp r0, r1
2632 ; FULL-NEXT: csel r0, r0, r1, lo
2635 %conv = fptoui half %x to i32
2636 %spec.store.select = call i32 @llvm.umin.i32(i32 %conv, i32 65535)
2637 %conv6 = trunc i32 %spec.store.select to i16
2641 define i16 @ustest_f16i16_mm(half %x) {
2642 ; SOFT-LABEL: ustest_f16i16_mm:
2643 ; SOFT: @ %bb.0: @ %entry
2644 ; SOFT-NEXT: .save {r7, lr}
2645 ; SOFT-NEXT: push {r7, lr}
2646 ; SOFT-NEXT: uxth r0, r0
2647 ; SOFT-NEXT: bl __aeabi_h2f
2648 ; SOFT-NEXT: bl __aeabi_f2iz
2649 ; SOFT-NEXT: ldr r1, .LCPI44_0
2650 ; SOFT-NEXT: cmp r0, r1
2651 ; SOFT-NEXT: blt .LBB44_2
2652 ; SOFT-NEXT: @ %bb.1: @ %entry
2653 ; SOFT-NEXT: mov r0, r1
2654 ; SOFT-NEXT: .LBB44_2: @ %entry
2655 ; SOFT-NEXT: asrs r1, r0, #31
2656 ; SOFT-NEXT: bics r0, r1
2657 ; SOFT-NEXT: pop {r7, pc}
2658 ; SOFT-NEXT: .p2align 2
2659 ; SOFT-NEXT: @ %bb.3:
2660 ; SOFT-NEXT: .LCPI44_0:
2661 ; SOFT-NEXT: .long 65535 @ 0xffff
2663 ; VFP2-LABEL: ustest_f16i16_mm:
2664 ; VFP2: @ %bb.0: @ %entry
2665 ; VFP2-NEXT: .save {r7, lr}
2666 ; VFP2-NEXT: push {r7, lr}
2667 ; VFP2-NEXT: vmov r0, s0
2668 ; VFP2-NEXT: bl __aeabi_h2f
2669 ; VFP2-NEXT: vmov s0, r0
2670 ; VFP2-NEXT: vcvt.s32.f32 s0, s0
2671 ; VFP2-NEXT: vmov r0, s0
2672 ; VFP2-NEXT: usat r0, #16, r0
2673 ; VFP2-NEXT: pop {r7, pc}
2675 ; FULL-LABEL: ustest_f16i16_mm:
2676 ; FULL: @ %bb.0: @ %entry
2677 ; FULL-NEXT: vcvt.s32.f16 s0, s0
2678 ; FULL-NEXT: vmov r0, s0
2679 ; FULL-NEXT: usat r0, #16, r0
2682 %conv = fptosi half %x to i32
2683 %spec.store.select = call i32 @llvm.smin.i32(i32 %conv, i32 65535)
2684 %spec.store.select7 = call i32 @llvm.smax.i32(i32 %spec.store.select, i32 0)
2685 %conv6 = trunc i32 %spec.store.select7 to i16
2691 define i64 @stest_f64i64_mm(double %x) {
2692 ; SOFT-LABEL: stest_f64i64_mm:
2693 ; SOFT: @ %bb.0: @ %entry
2694 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
2695 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
2696 ; SOFT-NEXT: .pad #12
2697 ; SOFT-NEXT: sub sp, #12
2698 ; SOFT-NEXT: bl __fixdfti
2699 ; SOFT-NEXT: mov r7, r0
2700 ; SOFT-NEXT: movs r0, #1
2701 ; SOFT-NEXT: movs r5, #0
2702 ; SOFT-NEXT: ldr r6, .LCPI45_0
2703 ; SOFT-NEXT: adds r4, r7, #1
2704 ; SOFT-NEXT: mov r4, r1
2705 ; SOFT-NEXT: sbcs r4, r6
2706 ; SOFT-NEXT: mov r4, r2
2707 ; SOFT-NEXT: sbcs r4, r5
2708 ; SOFT-NEXT: mov r4, r3
2709 ; SOFT-NEXT: sbcs r4, r5
2710 ; SOFT-NEXT: mov r4, r0
2711 ; SOFT-NEXT: blt .LBB45_2
2712 ; SOFT-NEXT: @ %bb.1: @ %entry
2713 ; SOFT-NEXT: mov r4, r5
2714 ; SOFT-NEXT: .LBB45_2: @ %entry
2715 ; SOFT-NEXT: mvns r6, r5
2716 ; SOFT-NEXT: cmp r4, #0
2717 ; SOFT-NEXT: beq .LBB45_12
2718 ; SOFT-NEXT: @ %bb.3: @ %entry
2719 ; SOFT-NEXT: beq .LBB45_13
2720 ; SOFT-NEXT: .LBB45_4: @ %entry
2721 ; SOFT-NEXT: str r2, [sp, #8] @ 4-byte Spill
2722 ; SOFT-NEXT: beq .LBB45_14
2723 ; SOFT-NEXT: .LBB45_5: @ %entry
2724 ; SOFT-NEXT: str r3, [sp, #4] @ 4-byte Spill
2725 ; SOFT-NEXT: bne .LBB45_7
2726 ; SOFT-NEXT: .LBB45_6: @ %entry
2727 ; SOFT-NEXT: mov r7, r6
2728 ; SOFT-NEXT: .LBB45_7: @ %entry
2729 ; SOFT-NEXT: lsls r3, r0, #31
2730 ; SOFT-NEXT: rsbs r4, r7, #0
2731 ; SOFT-NEXT: mov r4, r3
2732 ; SOFT-NEXT: sbcs r4, r1
2733 ; SOFT-NEXT: mov r4, r6
2734 ; SOFT-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
2735 ; SOFT-NEXT: sbcs r4, r2
2736 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
2737 ; SOFT-NEXT: sbcs r6, r2
2738 ; SOFT-NEXT: bge .LBB45_15
2739 ; SOFT-NEXT: @ %bb.8: @ %entry
2740 ; SOFT-NEXT: cmp r0, #0
2741 ; SOFT-NEXT: beq .LBB45_16
2742 ; SOFT-NEXT: .LBB45_9: @ %entry
2743 ; SOFT-NEXT: bne .LBB45_11
2744 ; SOFT-NEXT: .LBB45_10: @ %entry
2745 ; SOFT-NEXT: mov r1, r3
2746 ; SOFT-NEXT: .LBB45_11: @ %entry
2747 ; SOFT-NEXT: mov r0, r7
2748 ; SOFT-NEXT: add sp, #12
2749 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
2750 ; SOFT-NEXT: .LBB45_12: @ %entry
2751 ; SOFT-NEXT: mov r3, r4
2752 ; SOFT-NEXT: bne .LBB45_4
2753 ; SOFT-NEXT: .LBB45_13: @ %entry
2754 ; SOFT-NEXT: mov r2, r4
2755 ; SOFT-NEXT: str r2, [sp, #8] @ 4-byte Spill
2756 ; SOFT-NEXT: bne .LBB45_5
2757 ; SOFT-NEXT: .LBB45_14: @ %entry
2758 ; SOFT-NEXT: ldr r1, .LCPI45_0
2759 ; SOFT-NEXT: str r3, [sp, #4] @ 4-byte Spill
2760 ; SOFT-NEXT: beq .LBB45_6
2761 ; SOFT-NEXT: b .LBB45_7
2762 ; SOFT-NEXT: .LBB45_15: @ %entry
2763 ; SOFT-NEXT: mov r0, r5
2764 ; SOFT-NEXT: cmp r0, #0
2765 ; SOFT-NEXT: bne .LBB45_9
2766 ; SOFT-NEXT: .LBB45_16: @ %entry
2767 ; SOFT-NEXT: mov r7, r0
2768 ; SOFT-NEXT: beq .LBB45_10
2769 ; SOFT-NEXT: b .LBB45_11
2770 ; SOFT-NEXT: .p2align 2
2771 ; SOFT-NEXT: @ %bb.17:
2772 ; SOFT-NEXT: .LCPI45_0:
2773 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
2775 ; VFP2-LABEL: stest_f64i64_mm:
2776 ; VFP2: @ %bb.0: @ %entry
2777 ; VFP2-NEXT: .save {r4, r5, r7, lr}
2778 ; VFP2-NEXT: push {r4, r5, r7, lr}
2779 ; VFP2-NEXT: bl __fixdfti
2780 ; VFP2-NEXT: subs.w r4, r0, #-1
2781 ; VFP2-NEXT: mvn lr, #-2147483648
2782 ; VFP2-NEXT: sbcs.w r4, r1, lr
2783 ; VFP2-NEXT: mov.w r12, #0
2784 ; VFP2-NEXT: sbcs r4, r2, #0
2785 ; VFP2-NEXT: sbcs r4, r3, #0
2786 ; VFP2-NEXT: mov.w r4, #0
2788 ; VFP2-NEXT: movlt r4, #1
2789 ; VFP2-NEXT: cmp r4, #0
2790 ; VFP2-NEXT: itet eq
2791 ; VFP2-NEXT: moveq r3, r4
2792 ; VFP2-NEXT: movne r4, r2
2793 ; VFP2-NEXT: moveq r1, lr
2794 ; VFP2-NEXT: mov.w r2, #-1
2796 ; VFP2-NEXT: moveq r0, r2
2797 ; VFP2-NEXT: rsbs r5, r0, #0
2798 ; VFP2-NEXT: mov.w lr, #-2147483648
2799 ; VFP2-NEXT: sbcs.w r5, lr, r1
2800 ; VFP2-NEXT: sbcs.w r4, r2, r4
2801 ; VFP2-NEXT: sbcs r2, r3
2803 ; VFP2-NEXT: movlt.w r12, #1
2804 ; VFP2-NEXT: cmp.w r12, #0
2806 ; VFP2-NEXT: moveq r0, r12
2807 ; VFP2-NEXT: moveq r1, lr
2808 ; VFP2-NEXT: pop {r4, r5, r7, pc}
2810 ; FULL-LABEL: stest_f64i64_mm:
2811 ; FULL: @ %bb.0: @ %entry
2812 ; FULL-NEXT: .save {r4, r5, r7, lr}
2813 ; FULL-NEXT: push {r4, r5, r7, lr}
2814 ; FULL-NEXT: bl __fixdfti
2815 ; FULL-NEXT: subs.w lr, r0, #-1
2816 ; FULL-NEXT: mvn r12, #-2147483648
2817 ; FULL-NEXT: sbcs.w lr, r1, r12
2818 ; FULL-NEXT: sbcs lr, r2, #0
2819 ; FULL-NEXT: sbcs lr, r3, #0
2820 ; FULL-NEXT: cset lr, lt
2821 ; FULL-NEXT: cmp.w lr, #0
2822 ; FULL-NEXT: csel r5, r3, lr, ne
2823 ; FULL-NEXT: mov.w r3, #-1
2824 ; FULL-NEXT: csel r0, r0, r3, ne
2825 ; FULL-NEXT: csel r1, r1, r12, ne
2826 ; FULL-NEXT: csel r2, r2, lr, ne
2827 ; FULL-NEXT: rsbs r4, r0, #0
2828 ; FULL-NEXT: mov.w r12, #-2147483648
2829 ; FULL-NEXT: sbcs.w r4, r12, r1
2830 ; FULL-NEXT: sbcs.w r2, r3, r2
2831 ; FULL-NEXT: sbcs.w r2, r3, r5
2832 ; FULL-NEXT: cset r2, lt
2833 ; FULL-NEXT: cmp r2, #0
2834 ; FULL-NEXT: csel r0, r0, r2, ne
2835 ; FULL-NEXT: csel r1, r1, r12, ne
2836 ; FULL-NEXT: pop {r4, r5, r7, pc}
2838 %conv = fptosi double %x to i128
2839 %spec.store.select = call i128 @llvm.smin.i128(i128 %conv, i128 9223372036854775807)
2840 %spec.store.select7 = call i128 @llvm.smax.i128(i128 %spec.store.select, i128 -9223372036854775808)
2841 %conv6 = trunc i128 %spec.store.select7 to i64
2845 define i64 @utest_f64i64_mm(double %x) {
2846 ; SOFT-LABEL: utest_f64i64_mm:
2847 ; SOFT: @ %bb.0: @ %entry
2848 ; SOFT-NEXT: .save {r4, lr}
2849 ; SOFT-NEXT: push {r4, lr}
2850 ; SOFT-NEXT: bl __fixunsdfti
2851 ; SOFT-NEXT: movs r4, #0
2852 ; SOFT-NEXT: subs r2, r2, #1
2853 ; SOFT-NEXT: sbcs r3, r4
2854 ; SOFT-NEXT: blo .LBB46_4
2855 ; SOFT-NEXT: @ %bb.1: @ %entry
2856 ; SOFT-NEXT: cmp r4, #0
2857 ; SOFT-NEXT: beq .LBB46_5
2858 ; SOFT-NEXT: .LBB46_2: @ %entry
2859 ; SOFT-NEXT: beq .LBB46_6
2860 ; SOFT-NEXT: .LBB46_3: @ %entry
2861 ; SOFT-NEXT: pop {r4, pc}
2862 ; SOFT-NEXT: .LBB46_4:
2863 ; SOFT-NEXT: movs r4, #1
2864 ; SOFT-NEXT: cmp r4, #0
2865 ; SOFT-NEXT: bne .LBB46_2
2866 ; SOFT-NEXT: .LBB46_5: @ %entry
2867 ; SOFT-NEXT: mov r0, r4
2868 ; SOFT-NEXT: bne .LBB46_3
2869 ; SOFT-NEXT: .LBB46_6: @ %entry
2870 ; SOFT-NEXT: mov r1, r4
2871 ; SOFT-NEXT: pop {r4, pc}
2873 ; VFP2-LABEL: utest_f64i64_mm:
2874 ; VFP2: @ %bb.0: @ %entry
2875 ; VFP2-NEXT: .save {r7, lr}
2876 ; VFP2-NEXT: push {r7, lr}
2877 ; VFP2-NEXT: bl __fixunsdfti
2878 ; VFP2-NEXT: subs r2, #1
2879 ; VFP2-NEXT: mov.w r12, #0
2880 ; VFP2-NEXT: sbcs r2, r3, #0
2882 ; VFP2-NEXT: movlo.w r12, #1
2883 ; VFP2-NEXT: cmp.w r12, #0
2885 ; VFP2-NEXT: moveq r0, r12
2886 ; VFP2-NEXT: moveq r1, r12
2887 ; VFP2-NEXT: pop {r7, pc}
2889 ; FULL-LABEL: utest_f64i64_mm:
2890 ; FULL: @ %bb.0: @ %entry
2891 ; FULL-NEXT: .save {r7, lr}
2892 ; FULL-NEXT: push {r7, lr}
2893 ; FULL-NEXT: bl __fixunsdfti
2894 ; FULL-NEXT: subs r2, #1
2895 ; FULL-NEXT: sbcs r2, r3, #0
2896 ; FULL-NEXT: cset r2, lo
2897 ; FULL-NEXT: cmp r2, #0
2898 ; FULL-NEXT: csel r0, r0, r2, ne
2899 ; FULL-NEXT: csel r1, r1, r2, ne
2900 ; FULL-NEXT: pop {r7, pc}
2902 %conv = fptoui double %x to i128
2903 %spec.store.select = call i128 @llvm.umin.i128(i128 %conv, i128 18446744073709551616)
2904 %conv6 = trunc i128 %spec.store.select to i64
2908 define i64 @ustest_f64i64_mm(double %x) {
2909 ; SOFT-LABEL: ustest_f64i64_mm:
2910 ; SOFT: @ %bb.0: @ %entry
2911 ; SOFT-NEXT: .save {r4, lr}
2912 ; SOFT-NEXT: push {r4, lr}
2913 ; SOFT-NEXT: bl __fixdfti
2914 ; SOFT-NEXT: mov r4, r1
2915 ; SOFT-NEXT: movs r1, #0
2916 ; SOFT-NEXT: subs r2, r2, #1
2917 ; SOFT-NEXT: mov r2, r3
2918 ; SOFT-NEXT: sbcs r2, r1
2919 ; SOFT-NEXT: blt .LBB47_2
2920 ; SOFT-NEXT: @ %bb.1: @ %entry
2921 ; SOFT-NEXT: mov r2, r1
2922 ; SOFT-NEXT: cmp r2, #0
2923 ; SOFT-NEXT: beq .LBB47_3
2924 ; SOFT-NEXT: b .LBB47_4
2925 ; SOFT-NEXT: .LBB47_2:
2926 ; SOFT-NEXT: movs r2, #1
2927 ; SOFT-NEXT: cmp r2, #0
2928 ; SOFT-NEXT: bne .LBB47_4
2929 ; SOFT-NEXT: .LBB47_3: @ %entry
2930 ; SOFT-NEXT: mov r4, r2
2931 ; SOFT-NEXT: .LBB47_4: @ %entry
2932 ; SOFT-NEXT: beq .LBB47_10
2933 ; SOFT-NEXT: @ %bb.5: @ %entry
2934 ; SOFT-NEXT: bne .LBB47_7
2935 ; SOFT-NEXT: .LBB47_6: @ %entry
2936 ; SOFT-NEXT: mov r3, r2
2937 ; SOFT-NEXT: .LBB47_7: @ %entry
2938 ; SOFT-NEXT: cmp r3, #0
2939 ; SOFT-NEXT: mov r2, r1
2940 ; SOFT-NEXT: bpl .LBB47_11
2941 ; SOFT-NEXT: @ %bb.8: @ %entry
2942 ; SOFT-NEXT: bpl .LBB47_12
2943 ; SOFT-NEXT: .LBB47_9: @ %entry
2944 ; SOFT-NEXT: mov r0, r2
2945 ; SOFT-NEXT: pop {r4, pc}
2946 ; SOFT-NEXT: .LBB47_10: @ %entry
2947 ; SOFT-NEXT: mov r0, r2
2948 ; SOFT-NEXT: beq .LBB47_6
2949 ; SOFT-NEXT: b .LBB47_7
2950 ; SOFT-NEXT: .LBB47_11: @ %entry
2951 ; SOFT-NEXT: mov r2, r0
2952 ; SOFT-NEXT: bmi .LBB47_9
2953 ; SOFT-NEXT: .LBB47_12: @ %entry
2954 ; SOFT-NEXT: mov r1, r4
2955 ; SOFT-NEXT: mov r0, r2
2956 ; SOFT-NEXT: pop {r4, pc}
2958 ; VFP2-LABEL: ustest_f64i64_mm:
2959 ; VFP2: @ %bb.0: @ %entry
2960 ; VFP2-NEXT: .save {r7, lr}
2961 ; VFP2-NEXT: push {r7, lr}
2962 ; VFP2-NEXT: bl __fixdfti
2963 ; VFP2-NEXT: subs r2, #1
2964 ; VFP2-NEXT: mov.w r12, #0
2965 ; VFP2-NEXT: sbcs r2, r3, #0
2967 ; VFP2-NEXT: movlt.w r12, #1
2968 ; VFP2-NEXT: cmp.w r12, #0
2969 ; VFP2-NEXT: itte eq
2970 ; VFP2-NEXT: moveq r1, r12
2971 ; VFP2-NEXT: moveq r0, r12
2972 ; VFP2-NEXT: movne r12, r3
2973 ; VFP2-NEXT: cmp.w r12, #0
2975 ; VFP2-NEXT: movmi r0, #0
2976 ; VFP2-NEXT: movmi r1, #0
2977 ; VFP2-NEXT: pop {r7, pc}
2979 ; FULL-LABEL: ustest_f64i64_mm:
2980 ; FULL: @ %bb.0: @ %entry
2981 ; FULL-NEXT: .save {r7, lr}
2982 ; FULL-NEXT: push {r7, lr}
2983 ; FULL-NEXT: bl __fixdfti
2984 ; FULL-NEXT: subs r2, #1
2985 ; FULL-NEXT: sbcs r2, r3, #0
2986 ; FULL-NEXT: cset r2, lt
2987 ; FULL-NEXT: cmp r2, #0
2988 ; FULL-NEXT: csel r1, r1, r2, ne
2989 ; FULL-NEXT: csel r0, r0, r2, ne
2990 ; FULL-NEXT: csel r2, r3, r2, ne
2991 ; FULL-NEXT: cmp r2, #0
2993 ; FULL-NEXT: movmi r0, #0
2994 ; FULL-NEXT: movmi r1, #0
2995 ; FULL-NEXT: pop {r7, pc}
2997 %conv = fptosi double %x to i128
2998 %spec.store.select = call i128 @llvm.smin.i128(i128 %conv, i128 18446744073709551616)
2999 %spec.store.select7 = call i128 @llvm.smax.i128(i128 %spec.store.select, i128 0)
3000 %conv6 = trunc i128 %spec.store.select7 to i64
3004 define i64 @stest_f32i64_mm(float %x) {
3005 ; SOFT-LABEL: stest_f32i64_mm:
3006 ; SOFT: @ %bb.0: @ %entry
3007 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
3008 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
3009 ; SOFT-NEXT: .pad #12
3010 ; SOFT-NEXT: sub sp, #12
3011 ; SOFT-NEXT: bl __fixsfti
3012 ; SOFT-NEXT: mov r7, r0
3013 ; SOFT-NEXT: movs r0, #1
3014 ; SOFT-NEXT: movs r5, #0
3015 ; SOFT-NEXT: ldr r6, .LCPI48_0
3016 ; SOFT-NEXT: adds r4, r7, #1
3017 ; SOFT-NEXT: mov r4, r1
3018 ; SOFT-NEXT: sbcs r4, r6
3019 ; SOFT-NEXT: mov r4, r2
3020 ; SOFT-NEXT: sbcs r4, r5
3021 ; SOFT-NEXT: mov r4, r3
3022 ; SOFT-NEXT: sbcs r4, r5
3023 ; SOFT-NEXT: mov r4, r0
3024 ; SOFT-NEXT: blt .LBB48_2
3025 ; SOFT-NEXT: @ %bb.1: @ %entry
3026 ; SOFT-NEXT: mov r4, r5
3027 ; SOFT-NEXT: .LBB48_2: @ %entry
3028 ; SOFT-NEXT: mvns r6, r5
3029 ; SOFT-NEXT: cmp r4, #0
3030 ; SOFT-NEXT: beq .LBB48_12
3031 ; SOFT-NEXT: @ %bb.3: @ %entry
3032 ; SOFT-NEXT: beq .LBB48_13
3033 ; SOFT-NEXT: .LBB48_4: @ %entry
3034 ; SOFT-NEXT: str r2, [sp, #8] @ 4-byte Spill
3035 ; SOFT-NEXT: beq .LBB48_14
3036 ; SOFT-NEXT: .LBB48_5: @ %entry
3037 ; SOFT-NEXT: str r3, [sp, #4] @ 4-byte Spill
3038 ; SOFT-NEXT: bne .LBB48_7
3039 ; SOFT-NEXT: .LBB48_6: @ %entry
3040 ; SOFT-NEXT: mov r7, r6
3041 ; SOFT-NEXT: .LBB48_7: @ %entry
3042 ; SOFT-NEXT: lsls r3, r0, #31
3043 ; SOFT-NEXT: rsbs r4, r7, #0
3044 ; SOFT-NEXT: mov r4, r3
3045 ; SOFT-NEXT: sbcs r4, r1
3046 ; SOFT-NEXT: mov r4, r6
3047 ; SOFT-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
3048 ; SOFT-NEXT: sbcs r4, r2
3049 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3050 ; SOFT-NEXT: sbcs r6, r2
3051 ; SOFT-NEXT: bge .LBB48_15
3052 ; SOFT-NEXT: @ %bb.8: @ %entry
3053 ; SOFT-NEXT: cmp r0, #0
3054 ; SOFT-NEXT: beq .LBB48_16
3055 ; SOFT-NEXT: .LBB48_9: @ %entry
3056 ; SOFT-NEXT: bne .LBB48_11
3057 ; SOFT-NEXT: .LBB48_10: @ %entry
3058 ; SOFT-NEXT: mov r1, r3
3059 ; SOFT-NEXT: .LBB48_11: @ %entry
3060 ; SOFT-NEXT: mov r0, r7
3061 ; SOFT-NEXT: add sp, #12
3062 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
3063 ; SOFT-NEXT: .LBB48_12: @ %entry
3064 ; SOFT-NEXT: mov r3, r4
3065 ; SOFT-NEXT: bne .LBB48_4
3066 ; SOFT-NEXT: .LBB48_13: @ %entry
3067 ; SOFT-NEXT: mov r2, r4
3068 ; SOFT-NEXT: str r2, [sp, #8] @ 4-byte Spill
3069 ; SOFT-NEXT: bne .LBB48_5
3070 ; SOFT-NEXT: .LBB48_14: @ %entry
3071 ; SOFT-NEXT: ldr r1, .LCPI48_0
3072 ; SOFT-NEXT: str r3, [sp, #4] @ 4-byte Spill
3073 ; SOFT-NEXT: beq .LBB48_6
3074 ; SOFT-NEXT: b .LBB48_7
3075 ; SOFT-NEXT: .LBB48_15: @ %entry
3076 ; SOFT-NEXT: mov r0, r5
3077 ; SOFT-NEXT: cmp r0, #0
3078 ; SOFT-NEXT: bne .LBB48_9
3079 ; SOFT-NEXT: .LBB48_16: @ %entry
3080 ; SOFT-NEXT: mov r7, r0
3081 ; SOFT-NEXT: beq .LBB48_10
3082 ; SOFT-NEXT: b .LBB48_11
3083 ; SOFT-NEXT: .p2align 2
3084 ; SOFT-NEXT: @ %bb.17:
3085 ; SOFT-NEXT: .LCPI48_0:
3086 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
3088 ; VFP2-LABEL: stest_f32i64_mm:
3089 ; VFP2: @ %bb.0: @ %entry
3090 ; VFP2-NEXT: .save {r4, r5, r7, lr}
3091 ; VFP2-NEXT: push {r4, r5, r7, lr}
3092 ; VFP2-NEXT: bl __fixsfti
3093 ; VFP2-NEXT: subs.w r4, r0, #-1
3094 ; VFP2-NEXT: mvn lr, #-2147483648
3095 ; VFP2-NEXT: sbcs.w r4, r1, lr
3096 ; VFP2-NEXT: mov.w r12, #0
3097 ; VFP2-NEXT: sbcs r4, r2, #0
3098 ; VFP2-NEXT: sbcs r4, r3, #0
3099 ; VFP2-NEXT: mov.w r4, #0
3101 ; VFP2-NEXT: movlt r4, #1
3102 ; VFP2-NEXT: cmp r4, #0
3103 ; VFP2-NEXT: itet eq
3104 ; VFP2-NEXT: moveq r3, r4
3105 ; VFP2-NEXT: movne r4, r2
3106 ; VFP2-NEXT: moveq r1, lr
3107 ; VFP2-NEXT: mov.w r2, #-1
3109 ; VFP2-NEXT: moveq r0, r2
3110 ; VFP2-NEXT: rsbs r5, r0, #0
3111 ; VFP2-NEXT: mov.w lr, #-2147483648
3112 ; VFP2-NEXT: sbcs.w r5, lr, r1
3113 ; VFP2-NEXT: sbcs.w r4, r2, r4
3114 ; VFP2-NEXT: sbcs r2, r3
3116 ; VFP2-NEXT: movlt.w r12, #1
3117 ; VFP2-NEXT: cmp.w r12, #0
3119 ; VFP2-NEXT: moveq r0, r12
3120 ; VFP2-NEXT: moveq r1, lr
3121 ; VFP2-NEXT: pop {r4, r5, r7, pc}
3123 ; FULL-LABEL: stest_f32i64_mm:
3124 ; FULL: @ %bb.0: @ %entry
3125 ; FULL-NEXT: .save {r4, r5, r7, lr}
3126 ; FULL-NEXT: push {r4, r5, r7, lr}
3127 ; FULL-NEXT: bl __fixsfti
3128 ; FULL-NEXT: subs.w lr, r0, #-1
3129 ; FULL-NEXT: mvn r12, #-2147483648
3130 ; FULL-NEXT: sbcs.w lr, r1, r12
3131 ; FULL-NEXT: sbcs lr, r2, #0
3132 ; FULL-NEXT: sbcs lr, r3, #0
3133 ; FULL-NEXT: cset lr, lt
3134 ; FULL-NEXT: cmp.w lr, #0
3135 ; FULL-NEXT: csel r5, r3, lr, ne
3136 ; FULL-NEXT: mov.w r3, #-1
3137 ; FULL-NEXT: csel r0, r0, r3, ne
3138 ; FULL-NEXT: csel r1, r1, r12, ne
3139 ; FULL-NEXT: csel r2, r2, lr, ne
3140 ; FULL-NEXT: rsbs r4, r0, #0
3141 ; FULL-NEXT: mov.w r12, #-2147483648
3142 ; FULL-NEXT: sbcs.w r4, r12, r1
3143 ; FULL-NEXT: sbcs.w r2, r3, r2
3144 ; FULL-NEXT: sbcs.w r2, r3, r5
3145 ; FULL-NEXT: cset r2, lt
3146 ; FULL-NEXT: cmp r2, #0
3147 ; FULL-NEXT: csel r0, r0, r2, ne
3148 ; FULL-NEXT: csel r1, r1, r12, ne
3149 ; FULL-NEXT: pop {r4, r5, r7, pc}
3151 %conv = fptosi float %x to i128
3152 %spec.store.select = call i128 @llvm.smin.i128(i128 %conv, i128 9223372036854775807)
3153 %spec.store.select7 = call i128 @llvm.smax.i128(i128 %spec.store.select, i128 -9223372036854775808)
3154 %conv6 = trunc i128 %spec.store.select7 to i64
3158 define i64 @utest_f32i64_mm(float %x) {
3159 ; SOFT-LABEL: utest_f32i64_mm:
3160 ; SOFT: @ %bb.0: @ %entry
3161 ; SOFT-NEXT: .save {r4, lr}
3162 ; SOFT-NEXT: push {r4, lr}
3163 ; SOFT-NEXT: bl __fixunssfti
3164 ; SOFT-NEXT: movs r4, #0
3165 ; SOFT-NEXT: subs r2, r2, #1
3166 ; SOFT-NEXT: sbcs r3, r4
3167 ; SOFT-NEXT: blo .LBB49_4
3168 ; SOFT-NEXT: @ %bb.1: @ %entry
3169 ; SOFT-NEXT: cmp r4, #0
3170 ; SOFT-NEXT: beq .LBB49_5
3171 ; SOFT-NEXT: .LBB49_2: @ %entry
3172 ; SOFT-NEXT: beq .LBB49_6
3173 ; SOFT-NEXT: .LBB49_3: @ %entry
3174 ; SOFT-NEXT: pop {r4, pc}
3175 ; SOFT-NEXT: .LBB49_4:
3176 ; SOFT-NEXT: movs r4, #1
3177 ; SOFT-NEXT: cmp r4, #0
3178 ; SOFT-NEXT: bne .LBB49_2
3179 ; SOFT-NEXT: .LBB49_5: @ %entry
3180 ; SOFT-NEXT: mov r0, r4
3181 ; SOFT-NEXT: bne .LBB49_3
3182 ; SOFT-NEXT: .LBB49_6: @ %entry
3183 ; SOFT-NEXT: mov r1, r4
3184 ; SOFT-NEXT: pop {r4, pc}
3186 ; VFP2-LABEL: utest_f32i64_mm:
3187 ; VFP2: @ %bb.0: @ %entry
3188 ; VFP2-NEXT: .save {r7, lr}
3189 ; VFP2-NEXT: push {r7, lr}
3190 ; VFP2-NEXT: bl __fixunssfti
3191 ; VFP2-NEXT: subs r2, #1
3192 ; VFP2-NEXT: mov.w r12, #0
3193 ; VFP2-NEXT: sbcs r2, r3, #0
3195 ; VFP2-NEXT: movlo.w r12, #1
3196 ; VFP2-NEXT: cmp.w r12, #0
3198 ; VFP2-NEXT: moveq r0, r12
3199 ; VFP2-NEXT: moveq r1, r12
3200 ; VFP2-NEXT: pop {r7, pc}
3202 ; FULL-LABEL: utest_f32i64_mm:
3203 ; FULL: @ %bb.0: @ %entry
3204 ; FULL-NEXT: .save {r7, lr}
3205 ; FULL-NEXT: push {r7, lr}
3206 ; FULL-NEXT: bl __fixunssfti
3207 ; FULL-NEXT: subs r2, #1
3208 ; FULL-NEXT: sbcs r2, r3, #0
3209 ; FULL-NEXT: cset r2, lo
3210 ; FULL-NEXT: cmp r2, #0
3211 ; FULL-NEXT: csel r0, r0, r2, ne
3212 ; FULL-NEXT: csel r1, r1, r2, ne
3213 ; FULL-NEXT: pop {r7, pc}
3215 %conv = fptoui float %x to i128
3216 %spec.store.select = call i128 @llvm.umin.i128(i128 %conv, i128 18446744073709551616)
3217 %conv6 = trunc i128 %spec.store.select to i64
3221 define i64 @ustest_f32i64_mm(float %x) {
3222 ; SOFT-LABEL: ustest_f32i64_mm:
3223 ; SOFT: @ %bb.0: @ %entry
3224 ; SOFT-NEXT: .save {r4, lr}
3225 ; SOFT-NEXT: push {r4, lr}
3226 ; SOFT-NEXT: bl __fixsfti
3227 ; SOFT-NEXT: mov r4, r1
3228 ; SOFT-NEXT: movs r1, #0
3229 ; SOFT-NEXT: subs r2, r2, #1
3230 ; SOFT-NEXT: mov r2, r3
3231 ; SOFT-NEXT: sbcs r2, r1
3232 ; SOFT-NEXT: blt .LBB50_2
3233 ; SOFT-NEXT: @ %bb.1: @ %entry
3234 ; SOFT-NEXT: mov r2, r1
3235 ; SOFT-NEXT: cmp r2, #0
3236 ; SOFT-NEXT: beq .LBB50_3
3237 ; SOFT-NEXT: b .LBB50_4
3238 ; SOFT-NEXT: .LBB50_2:
3239 ; SOFT-NEXT: movs r2, #1
3240 ; SOFT-NEXT: cmp r2, #0
3241 ; SOFT-NEXT: bne .LBB50_4
3242 ; SOFT-NEXT: .LBB50_3: @ %entry
3243 ; SOFT-NEXT: mov r4, r2
3244 ; SOFT-NEXT: .LBB50_4: @ %entry
3245 ; SOFT-NEXT: beq .LBB50_10
3246 ; SOFT-NEXT: @ %bb.5: @ %entry
3247 ; SOFT-NEXT: bne .LBB50_7
3248 ; SOFT-NEXT: .LBB50_6: @ %entry
3249 ; SOFT-NEXT: mov r3, r2
3250 ; SOFT-NEXT: .LBB50_7: @ %entry
3251 ; SOFT-NEXT: cmp r3, #0
3252 ; SOFT-NEXT: mov r2, r1
3253 ; SOFT-NEXT: bpl .LBB50_11
3254 ; SOFT-NEXT: @ %bb.8: @ %entry
3255 ; SOFT-NEXT: bpl .LBB50_12
3256 ; SOFT-NEXT: .LBB50_9: @ %entry
3257 ; SOFT-NEXT: mov r0, r2
3258 ; SOFT-NEXT: pop {r4, pc}
3259 ; SOFT-NEXT: .LBB50_10: @ %entry
3260 ; SOFT-NEXT: mov r0, r2
3261 ; SOFT-NEXT: beq .LBB50_6
3262 ; SOFT-NEXT: b .LBB50_7
3263 ; SOFT-NEXT: .LBB50_11: @ %entry
3264 ; SOFT-NEXT: mov r2, r0
3265 ; SOFT-NEXT: bmi .LBB50_9
3266 ; SOFT-NEXT: .LBB50_12: @ %entry
3267 ; SOFT-NEXT: mov r1, r4
3268 ; SOFT-NEXT: mov r0, r2
3269 ; SOFT-NEXT: pop {r4, pc}
3271 ; VFP2-LABEL: ustest_f32i64_mm:
3272 ; VFP2: @ %bb.0: @ %entry
3273 ; VFP2-NEXT: .save {r7, lr}
3274 ; VFP2-NEXT: push {r7, lr}
3275 ; VFP2-NEXT: bl __fixsfti
3276 ; VFP2-NEXT: subs r2, #1
3277 ; VFP2-NEXT: mov.w r12, #0
3278 ; VFP2-NEXT: sbcs r2, r3, #0
3280 ; VFP2-NEXT: movlt.w r12, #1
3281 ; VFP2-NEXT: cmp.w r12, #0
3282 ; VFP2-NEXT: itte eq
3283 ; VFP2-NEXT: moveq r1, r12
3284 ; VFP2-NEXT: moveq r0, r12
3285 ; VFP2-NEXT: movne r12, r3
3286 ; VFP2-NEXT: cmp.w r12, #0
3288 ; VFP2-NEXT: movmi r0, #0
3289 ; VFP2-NEXT: movmi r1, #0
3290 ; VFP2-NEXT: pop {r7, pc}
3292 ; FULL-LABEL: ustest_f32i64_mm:
3293 ; FULL: @ %bb.0: @ %entry
3294 ; FULL-NEXT: .save {r7, lr}
3295 ; FULL-NEXT: push {r7, lr}
3296 ; FULL-NEXT: bl __fixsfti
3297 ; FULL-NEXT: subs r2, #1
3298 ; FULL-NEXT: sbcs r2, r3, #0
3299 ; FULL-NEXT: cset r2, lt
3300 ; FULL-NEXT: cmp r2, #0
3301 ; FULL-NEXT: csel r1, r1, r2, ne
3302 ; FULL-NEXT: csel r0, r0, r2, ne
3303 ; FULL-NEXT: csel r2, r3, r2, ne
3304 ; FULL-NEXT: cmp r2, #0
3306 ; FULL-NEXT: movmi r0, #0
3307 ; FULL-NEXT: movmi r1, #0
3308 ; FULL-NEXT: pop {r7, pc}
3310 %conv = fptosi float %x to i128
3311 %spec.store.select = call i128 @llvm.smin.i128(i128 %conv, i128 18446744073709551616)
3312 %spec.store.select7 = call i128 @llvm.smax.i128(i128 %spec.store.select, i128 0)
3313 %conv6 = trunc i128 %spec.store.select7 to i64
3317 define i64 @stest_f16i64_mm(half %x) {
3318 ; SOFT-LABEL: stest_f16i64_mm:
3319 ; SOFT: @ %bb.0: @ %entry
3320 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
3321 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
3322 ; SOFT-NEXT: .pad #12
3323 ; SOFT-NEXT: sub sp, #12
3324 ; SOFT-NEXT: uxth r0, r0
3325 ; SOFT-NEXT: bl __aeabi_h2f
3326 ; SOFT-NEXT: bl __fixsfti
3327 ; SOFT-NEXT: mov r7, r0
3328 ; SOFT-NEXT: movs r0, #1
3329 ; SOFT-NEXT: movs r5, #0
3330 ; SOFT-NEXT: ldr r6, .LCPI51_0
3331 ; SOFT-NEXT: adds r4, r7, #1
3332 ; SOFT-NEXT: mov r4, r1
3333 ; SOFT-NEXT: sbcs r4, r6
3334 ; SOFT-NEXT: mov r4, r2
3335 ; SOFT-NEXT: sbcs r4, r5
3336 ; SOFT-NEXT: mov r4, r3
3337 ; SOFT-NEXT: sbcs r4, r5
3338 ; SOFT-NEXT: mov r4, r0
3339 ; SOFT-NEXT: blt .LBB51_2
3340 ; SOFT-NEXT: @ %bb.1: @ %entry
3341 ; SOFT-NEXT: mov r4, r5
3342 ; SOFT-NEXT: .LBB51_2: @ %entry
3343 ; SOFT-NEXT: mvns r6, r5
3344 ; SOFT-NEXT: cmp r4, #0
3345 ; SOFT-NEXT: beq .LBB51_12
3346 ; SOFT-NEXT: @ %bb.3: @ %entry
3347 ; SOFT-NEXT: beq .LBB51_13
3348 ; SOFT-NEXT: .LBB51_4: @ %entry
3349 ; SOFT-NEXT: str r2, [sp, #8] @ 4-byte Spill
3350 ; SOFT-NEXT: beq .LBB51_14
3351 ; SOFT-NEXT: .LBB51_5: @ %entry
3352 ; SOFT-NEXT: str r3, [sp, #4] @ 4-byte Spill
3353 ; SOFT-NEXT: bne .LBB51_7
3354 ; SOFT-NEXT: .LBB51_6: @ %entry
3355 ; SOFT-NEXT: mov r7, r6
3356 ; SOFT-NEXT: .LBB51_7: @ %entry
3357 ; SOFT-NEXT: lsls r3, r0, #31
3358 ; SOFT-NEXT: rsbs r4, r7, #0
3359 ; SOFT-NEXT: mov r4, r3
3360 ; SOFT-NEXT: sbcs r4, r1
3361 ; SOFT-NEXT: mov r4, r6
3362 ; SOFT-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
3363 ; SOFT-NEXT: sbcs r4, r2
3364 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3365 ; SOFT-NEXT: sbcs r6, r2
3366 ; SOFT-NEXT: bge .LBB51_15
3367 ; SOFT-NEXT: @ %bb.8: @ %entry
3368 ; SOFT-NEXT: cmp r0, #0
3369 ; SOFT-NEXT: beq .LBB51_16
3370 ; SOFT-NEXT: .LBB51_9: @ %entry
3371 ; SOFT-NEXT: bne .LBB51_11
3372 ; SOFT-NEXT: .LBB51_10: @ %entry
3373 ; SOFT-NEXT: mov r1, r3
3374 ; SOFT-NEXT: .LBB51_11: @ %entry
3375 ; SOFT-NEXT: mov r0, r7
3376 ; SOFT-NEXT: add sp, #12
3377 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
3378 ; SOFT-NEXT: .LBB51_12: @ %entry
3379 ; SOFT-NEXT: mov r3, r4
3380 ; SOFT-NEXT: bne .LBB51_4
3381 ; SOFT-NEXT: .LBB51_13: @ %entry
3382 ; SOFT-NEXT: mov r2, r4
3383 ; SOFT-NEXT: str r2, [sp, #8] @ 4-byte Spill
3384 ; SOFT-NEXT: bne .LBB51_5
3385 ; SOFT-NEXT: .LBB51_14: @ %entry
3386 ; SOFT-NEXT: ldr r1, .LCPI51_0
3387 ; SOFT-NEXT: str r3, [sp, #4] @ 4-byte Spill
3388 ; SOFT-NEXT: beq .LBB51_6
3389 ; SOFT-NEXT: b .LBB51_7
3390 ; SOFT-NEXT: .LBB51_15: @ %entry
3391 ; SOFT-NEXT: mov r0, r5
3392 ; SOFT-NEXT: cmp r0, #0
3393 ; SOFT-NEXT: bne .LBB51_9
3394 ; SOFT-NEXT: .LBB51_16: @ %entry
3395 ; SOFT-NEXT: mov r7, r0
3396 ; SOFT-NEXT: beq .LBB51_10
3397 ; SOFT-NEXT: b .LBB51_11
3398 ; SOFT-NEXT: .p2align 2
3399 ; SOFT-NEXT: @ %bb.17:
3400 ; SOFT-NEXT: .LCPI51_0:
3401 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
3403 ; VFP2-LABEL: stest_f16i64_mm:
3404 ; VFP2: @ %bb.0: @ %entry
3405 ; VFP2-NEXT: .save {r4, r5, r7, lr}
3406 ; VFP2-NEXT: push {r4, r5, r7, lr}
3407 ; VFP2-NEXT: vmov r0, s0
3408 ; VFP2-NEXT: bl __aeabi_h2f
3409 ; VFP2-NEXT: vmov s0, r0
3410 ; VFP2-NEXT: bl __fixsfti
3411 ; VFP2-NEXT: subs.w r4, r0, #-1
3412 ; VFP2-NEXT: mvn lr, #-2147483648
3413 ; VFP2-NEXT: sbcs.w r4, r1, lr
3414 ; VFP2-NEXT: mov.w r12, #0
3415 ; VFP2-NEXT: sbcs r4, r2, #0
3416 ; VFP2-NEXT: sbcs r4, r3, #0
3417 ; VFP2-NEXT: mov.w r4, #0
3419 ; VFP2-NEXT: movlt r4, #1
3420 ; VFP2-NEXT: cmp r4, #0
3421 ; VFP2-NEXT: itet eq
3422 ; VFP2-NEXT: moveq r3, r4
3423 ; VFP2-NEXT: movne r4, r2
3424 ; VFP2-NEXT: moveq r1, lr
3425 ; VFP2-NEXT: mov.w r2, #-1
3427 ; VFP2-NEXT: moveq r0, r2
3428 ; VFP2-NEXT: rsbs r5, r0, #0
3429 ; VFP2-NEXT: mov.w lr, #-2147483648
3430 ; VFP2-NEXT: sbcs.w r5, lr, r1
3431 ; VFP2-NEXT: sbcs.w r4, r2, r4
3432 ; VFP2-NEXT: sbcs r2, r3
3434 ; VFP2-NEXT: movlt.w r12, #1
3435 ; VFP2-NEXT: cmp.w r12, #0
3437 ; VFP2-NEXT: moveq r0, r12
3438 ; VFP2-NEXT: moveq r1, lr
3439 ; VFP2-NEXT: pop {r4, r5, r7, pc}
3441 ; FULL-LABEL: stest_f16i64_mm:
3442 ; FULL: @ %bb.0: @ %entry
3443 ; FULL-NEXT: .save {r4, r5, r7, lr}
3444 ; FULL-NEXT: push {r4, r5, r7, lr}
3445 ; FULL-NEXT: vmov.f16 r0, s0
3446 ; FULL-NEXT: vmov s0, r0
3447 ; FULL-NEXT: bl __fixhfti
3448 ; FULL-NEXT: subs.w lr, r0, #-1
3449 ; FULL-NEXT: mvn r12, #-2147483648
3450 ; FULL-NEXT: sbcs.w lr, r1, r12
3451 ; FULL-NEXT: sbcs lr, r2, #0
3452 ; FULL-NEXT: sbcs lr, r3, #0
3453 ; FULL-NEXT: cset lr, lt
3454 ; FULL-NEXT: cmp.w lr, #0
3455 ; FULL-NEXT: csel r5, r3, lr, ne
3456 ; FULL-NEXT: mov.w r3, #-1
3457 ; FULL-NEXT: csel r0, r0, r3, ne
3458 ; FULL-NEXT: csel r1, r1, r12, ne
3459 ; FULL-NEXT: csel r2, r2, lr, ne
3460 ; FULL-NEXT: rsbs r4, r0, #0
3461 ; FULL-NEXT: mov.w r12, #-2147483648
3462 ; FULL-NEXT: sbcs.w r4, r12, r1
3463 ; FULL-NEXT: sbcs.w r2, r3, r2
3464 ; FULL-NEXT: sbcs.w r2, r3, r5
3465 ; FULL-NEXT: cset r2, lt
3466 ; FULL-NEXT: cmp r2, #0
3467 ; FULL-NEXT: csel r0, r0, r2, ne
3468 ; FULL-NEXT: csel r1, r1, r12, ne
3469 ; FULL-NEXT: pop {r4, r5, r7, pc}
3471 %conv = fptosi half %x to i128
3472 %spec.store.select = call i128 @llvm.smin.i128(i128 %conv, i128 9223372036854775807)
3473 %spec.store.select7 = call i128 @llvm.smax.i128(i128 %spec.store.select, i128 -9223372036854775808)
3474 %conv6 = trunc i128 %spec.store.select7 to i64
3478 define i64 @utesth_f16i64_mm(half %x) {
3479 ; SOFT-LABEL: utesth_f16i64_mm:
3480 ; SOFT: @ %bb.0: @ %entry
3481 ; SOFT-NEXT: .save {r4, lr}
3482 ; SOFT-NEXT: push {r4, lr}
3483 ; SOFT-NEXT: uxth r0, r0
3484 ; SOFT-NEXT: bl __aeabi_h2f
3485 ; SOFT-NEXT: bl __fixunssfti
3486 ; SOFT-NEXT: movs r4, #0
3487 ; SOFT-NEXT: subs r2, r2, #1
3488 ; SOFT-NEXT: sbcs r3, r4
3489 ; SOFT-NEXT: blo .LBB52_4
3490 ; SOFT-NEXT: @ %bb.1: @ %entry
3491 ; SOFT-NEXT: cmp r4, #0
3492 ; SOFT-NEXT: beq .LBB52_5
3493 ; SOFT-NEXT: .LBB52_2: @ %entry
3494 ; SOFT-NEXT: beq .LBB52_6
3495 ; SOFT-NEXT: .LBB52_3: @ %entry
3496 ; SOFT-NEXT: pop {r4, pc}
3497 ; SOFT-NEXT: .LBB52_4:
3498 ; SOFT-NEXT: movs r4, #1
3499 ; SOFT-NEXT: cmp r4, #0
3500 ; SOFT-NEXT: bne .LBB52_2
3501 ; SOFT-NEXT: .LBB52_5: @ %entry
3502 ; SOFT-NEXT: mov r0, r4
3503 ; SOFT-NEXT: bne .LBB52_3
3504 ; SOFT-NEXT: .LBB52_6: @ %entry
3505 ; SOFT-NEXT: mov r1, r4
3506 ; SOFT-NEXT: pop {r4, pc}
3508 ; VFP2-LABEL: utesth_f16i64_mm:
3509 ; VFP2: @ %bb.0: @ %entry
3510 ; VFP2-NEXT: .save {r7, lr}
3511 ; VFP2-NEXT: push {r7, lr}
3512 ; VFP2-NEXT: vmov r0, s0
3513 ; VFP2-NEXT: bl __aeabi_h2f
3514 ; VFP2-NEXT: vmov s0, r0
3515 ; VFP2-NEXT: bl __fixunssfti
3516 ; VFP2-NEXT: subs r2, #1
3517 ; VFP2-NEXT: mov.w r12, #0
3518 ; VFP2-NEXT: sbcs r2, r3, #0
3520 ; VFP2-NEXT: movlo.w r12, #1
3521 ; VFP2-NEXT: cmp.w r12, #0
3523 ; VFP2-NEXT: moveq r0, r12
3524 ; VFP2-NEXT: moveq r1, r12
3525 ; VFP2-NEXT: pop {r7, pc}
3527 ; FULL-LABEL: utesth_f16i64_mm:
3528 ; FULL: @ %bb.0: @ %entry
3529 ; FULL-NEXT: .save {r7, lr}
3530 ; FULL-NEXT: push {r7, lr}
3531 ; FULL-NEXT: vmov.f16 r0, s0
3532 ; FULL-NEXT: vmov s0, r0
3533 ; FULL-NEXT: bl __fixunshfti
3534 ; FULL-NEXT: subs r2, #1
3535 ; FULL-NEXT: sbcs r2, r3, #0
3536 ; FULL-NEXT: cset r2, lo
3537 ; FULL-NEXT: cmp r2, #0
3538 ; FULL-NEXT: csel r0, r0, r2, ne
3539 ; FULL-NEXT: csel r1, r1, r2, ne
3540 ; FULL-NEXT: pop {r7, pc}
3542 %conv = fptoui half %x to i128
3543 %spec.store.select = call i128 @llvm.umin.i128(i128 %conv, i128 18446744073709551616)
3544 %conv6 = trunc i128 %spec.store.select to i64
3548 define i64 @ustest_f16i64_mm(half %x) {
3549 ; SOFT-LABEL: ustest_f16i64_mm:
3550 ; SOFT: @ %bb.0: @ %entry
3551 ; SOFT-NEXT: .save {r4, lr}
3552 ; SOFT-NEXT: push {r4, lr}
3553 ; SOFT-NEXT: uxth r0, r0
3554 ; SOFT-NEXT: bl __aeabi_h2f
3555 ; SOFT-NEXT: bl __fixsfti
3556 ; SOFT-NEXT: mov r4, r1
3557 ; SOFT-NEXT: movs r1, #0
3558 ; SOFT-NEXT: subs r2, r2, #1
3559 ; SOFT-NEXT: mov r2, r3
3560 ; SOFT-NEXT: sbcs r2, r1
3561 ; SOFT-NEXT: blt .LBB53_2
3562 ; SOFT-NEXT: @ %bb.1: @ %entry
3563 ; SOFT-NEXT: mov r2, r1
3564 ; SOFT-NEXT: cmp r2, #0
3565 ; SOFT-NEXT: beq .LBB53_3
3566 ; SOFT-NEXT: b .LBB53_4
3567 ; SOFT-NEXT: .LBB53_2:
3568 ; SOFT-NEXT: movs r2, #1
3569 ; SOFT-NEXT: cmp r2, #0
3570 ; SOFT-NEXT: bne .LBB53_4
3571 ; SOFT-NEXT: .LBB53_3: @ %entry
3572 ; SOFT-NEXT: mov r4, r2
3573 ; SOFT-NEXT: .LBB53_4: @ %entry
3574 ; SOFT-NEXT: beq .LBB53_10
3575 ; SOFT-NEXT: @ %bb.5: @ %entry
3576 ; SOFT-NEXT: bne .LBB53_7
3577 ; SOFT-NEXT: .LBB53_6: @ %entry
3578 ; SOFT-NEXT: mov r3, r2
3579 ; SOFT-NEXT: .LBB53_7: @ %entry
3580 ; SOFT-NEXT: cmp r3, #0
3581 ; SOFT-NEXT: mov r2, r1
3582 ; SOFT-NEXT: bpl .LBB53_11
3583 ; SOFT-NEXT: @ %bb.8: @ %entry
3584 ; SOFT-NEXT: bpl .LBB53_12
3585 ; SOFT-NEXT: .LBB53_9: @ %entry
3586 ; SOFT-NEXT: mov r0, r2
3587 ; SOFT-NEXT: pop {r4, pc}
3588 ; SOFT-NEXT: .LBB53_10: @ %entry
3589 ; SOFT-NEXT: mov r0, r2
3590 ; SOFT-NEXT: beq .LBB53_6
3591 ; SOFT-NEXT: b .LBB53_7
3592 ; SOFT-NEXT: .LBB53_11: @ %entry
3593 ; SOFT-NEXT: mov r2, r0
3594 ; SOFT-NEXT: bmi .LBB53_9
3595 ; SOFT-NEXT: .LBB53_12: @ %entry
3596 ; SOFT-NEXT: mov r1, r4
3597 ; SOFT-NEXT: mov r0, r2
3598 ; SOFT-NEXT: pop {r4, pc}
3600 ; VFP2-LABEL: ustest_f16i64_mm:
3601 ; VFP2: @ %bb.0: @ %entry
3602 ; VFP2-NEXT: .save {r7, lr}
3603 ; VFP2-NEXT: push {r7, lr}
3604 ; VFP2-NEXT: vmov r0, s0
3605 ; VFP2-NEXT: bl __aeabi_h2f
3606 ; VFP2-NEXT: vmov s0, r0
3607 ; VFP2-NEXT: bl __fixsfti
3608 ; VFP2-NEXT: subs r2, #1
3609 ; VFP2-NEXT: mov.w r12, #0
3610 ; VFP2-NEXT: sbcs r2, r3, #0
3612 ; VFP2-NEXT: movlt.w r12, #1
3613 ; VFP2-NEXT: cmp.w r12, #0
3614 ; VFP2-NEXT: itte eq
3615 ; VFP2-NEXT: moveq r1, r12
3616 ; VFP2-NEXT: moveq r0, r12
3617 ; VFP2-NEXT: movne r12, r3
3618 ; VFP2-NEXT: cmp.w r12, #0
3620 ; VFP2-NEXT: movmi r0, #0
3621 ; VFP2-NEXT: movmi r1, #0
3622 ; VFP2-NEXT: pop {r7, pc}
3624 ; FULL-LABEL: ustest_f16i64_mm:
3625 ; FULL: @ %bb.0: @ %entry
3626 ; FULL-NEXT: .save {r7, lr}
3627 ; FULL-NEXT: push {r7, lr}
3628 ; FULL-NEXT: vmov.f16 r0, s0
3629 ; FULL-NEXT: vmov s0, r0
3630 ; FULL-NEXT: bl __fixhfti
3631 ; FULL-NEXT: subs r2, #1
3632 ; FULL-NEXT: sbcs r2, r3, #0
3633 ; FULL-NEXT: cset r2, lt
3634 ; FULL-NEXT: cmp r2, #0
3635 ; FULL-NEXT: csel r1, r1, r2, ne
3636 ; FULL-NEXT: csel r0, r0, r2, ne
3637 ; FULL-NEXT: csel r2, r3, r2, ne
3638 ; FULL-NEXT: cmp r2, #0
3640 ; FULL-NEXT: movmi r0, #0
3641 ; FULL-NEXT: movmi r1, #0
3642 ; FULL-NEXT: pop {r7, pc}
3644 %conv = fptosi half %x to i128
3645 %spec.store.select = call i128 @llvm.smin.i128(i128 %conv, i128 18446744073709551616)
3646 %spec.store.select7 = call i128 @llvm.smax.i128(i128 %spec.store.select, i128 0)
3647 %conv6 = trunc i128 %spec.store.select7 to i64
3652 define void @unroll_maxmin(ptr nocapture %0, ptr nocapture readonly %1, i32 %2) {
3653 ; SOFT-LABEL: unroll_maxmin:
3655 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
3656 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
3657 ; SOFT-NEXT: .pad #20
3658 ; SOFT-NEXT: sub sp, #20
3659 ; SOFT-NEXT: mov r4, r1
3660 ; SOFT-NEXT: mov r5, r0
3661 ; SOFT-NEXT: movs r0, #0
3662 ; SOFT-NEXT: str r0, [sp, #16] @ 4-byte Spill
3663 ; SOFT-NEXT: mvns r0, r0
3664 ; SOFT-NEXT: str r0, [sp, #8] @ 4-byte Spill
3665 ; SOFT-NEXT: movs r0, #1
3666 ; SOFT-NEXT: lsls r1, r0, #31
3667 ; SOFT-NEXT: str r1, [sp, #12] @ 4-byte Spill
3668 ; SOFT-NEXT: str r0, [sp, #4] @ 4-byte Spill
3669 ; SOFT-NEXT: lsls r7, r0, #10
3670 ; SOFT-NEXT: b .LBB54_2
3671 ; SOFT-NEXT: .LBB54_1: @ in Loop: Header=BB54_2 Depth=1
3672 ; SOFT-NEXT: str r0, [r5, #4]
3673 ; SOFT-NEXT: adds r4, #8
3674 ; SOFT-NEXT: adds r5, #8
3675 ; SOFT-NEXT: subs r7, r7, #2
3676 ; SOFT-NEXT: beq .LBB54_18
3677 ; SOFT-NEXT: .LBB54_2: @ =>This Inner Loop Header: Depth=1
3678 ; SOFT-NEXT: ldr r0, [r4]
3679 ; SOFT-NEXT: movs r1, #79
3680 ; SOFT-NEXT: lsls r6, r1, #24
3681 ; SOFT-NEXT: mov r1, r6
3682 ; SOFT-NEXT: bl __aeabi_fmul
3683 ; SOFT-NEXT: bl __aeabi_f2lz
3684 ; SOFT-NEXT: ldr r2, .LCPI54_0
3685 ; SOFT-NEXT: subs r2, r0, r2
3686 ; SOFT-NEXT: mov r2, r1
3687 ; SOFT-NEXT: ldr r3, [sp, #16] @ 4-byte Reload
3688 ; SOFT-NEXT: sbcs r2, r3
3689 ; SOFT-NEXT: bge .LBB54_14
3690 ; SOFT-NEXT: @ %bb.3: @ in Loop: Header=BB54_2 Depth=1
3691 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3692 ; SOFT-NEXT: bge .LBB54_15
3693 ; SOFT-NEXT: .LBB54_4: @ in Loop: Header=BB54_2 Depth=1
3694 ; SOFT-NEXT: cmp r2, #0
3695 ; SOFT-NEXT: bne .LBB54_6
3696 ; SOFT-NEXT: .LBB54_5: @ in Loop: Header=BB54_2 Depth=1
3697 ; SOFT-NEXT: mov r1, r2
3698 ; SOFT-NEXT: .LBB54_6: @ in Loop: Header=BB54_2 Depth=1
3699 ; SOFT-NEXT: ldr r2, [sp, #12] @ 4-byte Reload
3700 ; SOFT-NEXT: subs r2, r2, r0
3701 ; SOFT-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
3702 ; SOFT-NEXT: sbcs r2, r1
3703 ; SOFT-NEXT: blt .LBB54_8
3704 ; SOFT-NEXT: @ %bb.7: @ in Loop: Header=BB54_2 Depth=1
3705 ; SOFT-NEXT: ldr r0, [sp, #12] @ 4-byte Reload
3706 ; SOFT-NEXT: .LBB54_8: @ in Loop: Header=BB54_2 Depth=1
3707 ; SOFT-NEXT: str r0, [r5]
3708 ; SOFT-NEXT: ldr r0, [r4, #4]
3709 ; SOFT-NEXT: mov r1, r6
3710 ; SOFT-NEXT: bl __aeabi_fmul
3711 ; SOFT-NEXT: bl __aeabi_f2lz
3712 ; SOFT-NEXT: ldr r2, .LCPI54_0
3713 ; SOFT-NEXT: subs r2, r0, r2
3714 ; SOFT-NEXT: mov r2, r1
3715 ; SOFT-NEXT: ldr r3, [sp, #16] @ 4-byte Reload
3716 ; SOFT-NEXT: sbcs r2, r3
3717 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3718 ; SOFT-NEXT: bge .LBB54_16
3719 ; SOFT-NEXT: @ %bb.9: @ in Loop: Header=BB54_2 Depth=1
3720 ; SOFT-NEXT: cmp r2, #0
3721 ; SOFT-NEXT: beq .LBB54_17
3722 ; SOFT-NEXT: .LBB54_10: @ in Loop: Header=BB54_2 Depth=1
3723 ; SOFT-NEXT: bne .LBB54_12
3724 ; SOFT-NEXT: .LBB54_11: @ in Loop: Header=BB54_2 Depth=1
3725 ; SOFT-NEXT: ldr r0, .LCPI54_0
3726 ; SOFT-NEXT: .LBB54_12: @ in Loop: Header=BB54_2 Depth=1
3727 ; SOFT-NEXT: ldr r2, [sp, #12] @ 4-byte Reload
3728 ; SOFT-NEXT: subs r2, r2, r0
3729 ; SOFT-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
3730 ; SOFT-NEXT: sbcs r2, r1
3731 ; SOFT-NEXT: blt .LBB54_1
3732 ; SOFT-NEXT: @ %bb.13: @ in Loop: Header=BB54_2 Depth=1
3733 ; SOFT-NEXT: ldr r0, [sp, #12] @ 4-byte Reload
3734 ; SOFT-NEXT: b .LBB54_1
3735 ; SOFT-NEXT: .LBB54_14: @ in Loop: Header=BB54_2 Depth=1
3736 ; SOFT-NEXT: ldr r0, .LCPI54_0
3737 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3738 ; SOFT-NEXT: blt .LBB54_4
3739 ; SOFT-NEXT: .LBB54_15: @ in Loop: Header=BB54_2 Depth=1
3740 ; SOFT-NEXT: ldr r2, [sp, #16] @ 4-byte Reload
3741 ; SOFT-NEXT: cmp r2, #0
3742 ; SOFT-NEXT: beq .LBB54_5
3743 ; SOFT-NEXT: b .LBB54_6
3744 ; SOFT-NEXT: .LBB54_16: @ in Loop: Header=BB54_2 Depth=1
3745 ; SOFT-NEXT: ldr r2, [sp, #16] @ 4-byte Reload
3746 ; SOFT-NEXT: cmp r2, #0
3747 ; SOFT-NEXT: bne .LBB54_10
3748 ; SOFT-NEXT: .LBB54_17: @ in Loop: Header=BB54_2 Depth=1
3749 ; SOFT-NEXT: mov r1, r2
3750 ; SOFT-NEXT: beq .LBB54_11
3751 ; SOFT-NEXT: b .LBB54_12
3752 ; SOFT-NEXT: .LBB54_18:
3753 ; SOFT-NEXT: add sp, #20
3754 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
3755 ; SOFT-NEXT: .p2align 2
3756 ; SOFT-NEXT: @ %bb.19:
3757 ; SOFT-NEXT: .LCPI54_0:
3758 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
3760 ; VFP2-LABEL: unroll_maxmin:
3762 ; VFP2-NEXT: subs r1, #8
3763 ; VFP2-NEXT: subs r0, #8
3764 ; VFP2-NEXT: vldr s0, .LCPI54_0
3765 ; VFP2-NEXT: mov.w r2, #1024
3766 ; VFP2-NEXT: .LBB54_1: @ =>This Inner Loop Header: Depth=1
3767 ; VFP2-NEXT: vldr s2, [r1, #8]
3768 ; VFP2-NEXT: subs r2, #2
3769 ; VFP2-NEXT: vmul.f32 s2, s2, s0
3770 ; VFP2-NEXT: vcvt.s32.f32 s2, s2
3771 ; VFP2-NEXT: vmov r3, s2
3772 ; VFP2-NEXT: str r3, [r0, #8]!
3773 ; VFP2-NEXT: vldr s2, [r1, #12]
3774 ; VFP2-NEXT: add.w r1, r1, #8
3775 ; VFP2-NEXT: vmul.f32 s2, s2, s0
3776 ; VFP2-NEXT: vcvt.s32.f32 s2, s2
3777 ; VFP2-NEXT: vstr s2, [r0, #4]
3778 ; VFP2-NEXT: bne .LBB54_1
3779 ; VFP2-NEXT: @ %bb.2:
3781 ; VFP2-NEXT: .p2align 2
3782 ; VFP2-NEXT: @ %bb.3:
3783 ; VFP2-NEXT: .LCPI54_0:
3784 ; VFP2-NEXT: .long 0x4f000000 @ float 2.14748365E+9
3786 ; FULL-LABEL: unroll_maxmin:
3788 ; FULL-NEXT: .save {r7, lr}
3789 ; FULL-NEXT: push {r7, lr}
3790 ; FULL-NEXT: mov.w lr, #512
3791 ; FULL-NEXT: subs r1, #8
3792 ; FULL-NEXT: subs r0, #8
3793 ; FULL-NEXT: vldr s0, .LCPI54_0
3794 ; FULL-NEXT: .LBB54_1: @ =>This Inner Loop Header: Depth=1
3795 ; FULL-NEXT: vldr s2, [r1, #8]
3796 ; FULL-NEXT: vmul.f32 s2, s2, s0
3797 ; FULL-NEXT: vcvt.s32.f32 s2, s2
3798 ; FULL-NEXT: vmov r2, s2
3799 ; FULL-NEXT: str r2, [r0, #8]!
3800 ; FULL-NEXT: vldr s2, [r1, #12]
3801 ; FULL-NEXT: adds r1, #8
3802 ; FULL-NEXT: vmul.f32 s2, s2, s0
3803 ; FULL-NEXT: vcvt.s32.f32 s2, s2
3804 ; FULL-NEXT: vstr s2, [r0, #4]
3805 ; FULL-NEXT: le lr, .LBB54_1
3806 ; FULL-NEXT: @ %bb.2:
3807 ; FULL-NEXT: pop {r7, pc}
3808 ; FULL-NEXT: .p2align 2
3809 ; FULL-NEXT: @ %bb.3:
3810 ; FULL-NEXT: .LCPI54_0:
3811 ; FULL-NEXT: .long 0x4f000000 @ float 2.14748365E+9
3818 %6 = phi i32 [ 0, %3 ], [ %28, %5 ]
3819 %7 = getelementptr inbounds float, ptr %1, i32 %6
3820 %8 = load float, ptr %7, align 4
3821 %9 = fmul float %8, 0x41E0000000000000
3822 %10 = fptosi float %9 to i64
3823 %11 = icmp slt i64 %10, 2147483647
3824 %12 = select i1 %11, i64 %10, i64 2147483647
3825 %13 = icmp sgt i64 %12, -2147483648
3826 %14 = select i1 %13, i64 %12, i64 -2147483648
3827 %15 = trunc i64 %14 to i32
3828 %16 = getelementptr inbounds i32, ptr %0, i32 %6
3829 store i32 %15, ptr %16, align 4
3830 %17 = or disjoint i32 %6, 1
3831 %18 = getelementptr inbounds float, ptr %1, i32 %17
3832 %19 = load float, ptr %18, align 4
3833 %20 = fmul float %19, 0x41E0000000000000
3834 %21 = fptosi float %20 to i64
3835 %22 = icmp slt i64 %21, 2147483647
3836 %23 = select i1 %22, i64 %21, i64 2147483647
3837 %24 = icmp sgt i64 %23, -2147483648
3838 %25 = select i1 %24, i64 %23, i64 -2147483648
3839 %26 = trunc i64 %25 to i32
3840 %27 = getelementptr inbounds i32, ptr %0, i32 %17
3841 store i32 %26, ptr %27, align 4
3842 %28 = add nuw nsw i32 %6, 2
3843 %29 = icmp eq i32 %28, 1024
3844 br i1 %29, label %4, label %5
3847 define void @unroll_minmax(ptr nocapture %0, ptr nocapture readonly %1, i32 %2) {
3848 ; SOFT-LABEL: unroll_minmax:
3850 ; SOFT-NEXT: .save {r4, r5, r6, r7, lr}
3851 ; SOFT-NEXT: push {r4, r5, r6, r7, lr}
3852 ; SOFT-NEXT: .pad #12
3853 ; SOFT-NEXT: sub sp, #12
3854 ; SOFT-NEXT: mov r4, r1
3855 ; SOFT-NEXT: mov r5, r0
3856 ; SOFT-NEXT: movs r0, #0
3857 ; SOFT-NEXT: str r0, [sp] @ 4-byte Spill
3858 ; SOFT-NEXT: mvns r0, r0
3859 ; SOFT-NEXT: str r0, [sp, #8] @ 4-byte Spill
3860 ; SOFT-NEXT: movs r0, #1
3861 ; SOFT-NEXT: lsls r1, r0, #31
3862 ; SOFT-NEXT: str r1, [sp, #4] @ 4-byte Spill
3863 ; SOFT-NEXT: lsls r7, r0, #10
3864 ; SOFT-NEXT: b .LBB55_2
3865 ; SOFT-NEXT: .LBB55_1: @ in Loop: Header=BB55_2 Depth=1
3866 ; SOFT-NEXT: str r0, [r5, #4]
3867 ; SOFT-NEXT: adds r4, #8
3868 ; SOFT-NEXT: adds r5, #8
3869 ; SOFT-NEXT: subs r7, r7, #2
3870 ; SOFT-NEXT: beq .LBB55_14
3871 ; SOFT-NEXT: .LBB55_2: @ =>This Inner Loop Header: Depth=1
3872 ; SOFT-NEXT: ldr r0, [r4]
3873 ; SOFT-NEXT: movs r1, #79
3874 ; SOFT-NEXT: lsls r6, r1, #24
3875 ; SOFT-NEXT: mov r1, r6
3876 ; SOFT-NEXT: bl __aeabi_fmul
3877 ; SOFT-NEXT: bl __aeabi_f2lz
3878 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3879 ; SOFT-NEXT: subs r2, r2, r0
3880 ; SOFT-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
3881 ; SOFT-NEXT: sbcs r2, r1
3882 ; SOFT-NEXT: blt .LBB55_4
3883 ; SOFT-NEXT: @ %bb.3: @ in Loop: Header=BB55_2 Depth=1
3884 ; SOFT-NEXT: ldr r1, [sp, #8] @ 4-byte Reload
3885 ; SOFT-NEXT: .LBB55_4: @ in Loop: Header=BB55_2 Depth=1
3886 ; SOFT-NEXT: blt .LBB55_6
3887 ; SOFT-NEXT: @ %bb.5: @ in Loop: Header=BB55_2 Depth=1
3888 ; SOFT-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
3889 ; SOFT-NEXT: .LBB55_6: @ in Loop: Header=BB55_2 Depth=1
3890 ; SOFT-NEXT: ldr r2, .LCPI55_0
3891 ; SOFT-NEXT: subs r2, r0, r2
3892 ; SOFT-NEXT: ldr r2, [sp] @ 4-byte Reload
3893 ; SOFT-NEXT: sbcs r1, r2
3894 ; SOFT-NEXT: blt .LBB55_8
3895 ; SOFT-NEXT: @ %bb.7: @ in Loop: Header=BB55_2 Depth=1
3896 ; SOFT-NEXT: ldr r0, .LCPI55_0
3897 ; SOFT-NEXT: .LBB55_8: @ in Loop: Header=BB55_2 Depth=1
3898 ; SOFT-NEXT: str r0, [r5]
3899 ; SOFT-NEXT: ldr r0, [r4, #4]
3900 ; SOFT-NEXT: mov r1, r6
3901 ; SOFT-NEXT: bl __aeabi_fmul
3902 ; SOFT-NEXT: bl __aeabi_f2lz
3903 ; SOFT-NEXT: ldr r2, [sp, #4] @ 4-byte Reload
3904 ; SOFT-NEXT: subs r2, r2, r0
3905 ; SOFT-NEXT: ldr r2, [sp, #8] @ 4-byte Reload
3906 ; SOFT-NEXT: sbcs r2, r1
3907 ; SOFT-NEXT: blt .LBB55_10
3908 ; SOFT-NEXT: @ %bb.9: @ in Loop: Header=BB55_2 Depth=1
3909 ; SOFT-NEXT: ldr r1, [sp, #8] @ 4-byte Reload
3910 ; SOFT-NEXT: .LBB55_10: @ in Loop: Header=BB55_2 Depth=1
3911 ; SOFT-NEXT: blt .LBB55_12
3912 ; SOFT-NEXT: @ %bb.11: @ in Loop: Header=BB55_2 Depth=1
3913 ; SOFT-NEXT: ldr r0, [sp, #4] @ 4-byte Reload
3914 ; SOFT-NEXT: .LBB55_12: @ in Loop: Header=BB55_2 Depth=1
3915 ; SOFT-NEXT: ldr r2, .LCPI55_0
3916 ; SOFT-NEXT: subs r2, r0, r2
3917 ; SOFT-NEXT: ldr r2, [sp] @ 4-byte Reload
3918 ; SOFT-NEXT: sbcs r1, r2
3919 ; SOFT-NEXT: blt .LBB55_1
3920 ; SOFT-NEXT: @ %bb.13: @ in Loop: Header=BB55_2 Depth=1
3921 ; SOFT-NEXT: ldr r0, .LCPI55_0
3922 ; SOFT-NEXT: b .LBB55_1
3923 ; SOFT-NEXT: .LBB55_14:
3924 ; SOFT-NEXT: add sp, #12
3925 ; SOFT-NEXT: pop {r4, r5, r6, r7, pc}
3926 ; SOFT-NEXT: .p2align 2
3927 ; SOFT-NEXT: @ %bb.15:
3928 ; SOFT-NEXT: .LCPI55_0:
3929 ; SOFT-NEXT: .long 2147483647 @ 0x7fffffff
3931 ; VFP2-LABEL: unroll_minmax:
3933 ; VFP2-NEXT: subs r1, #8
3934 ; VFP2-NEXT: subs r0, #8
3935 ; VFP2-NEXT: vldr s0, .LCPI55_0
3936 ; VFP2-NEXT: mov.w r2, #1024
3937 ; VFP2-NEXT: .LBB55_1: @ =>This Inner Loop Header: Depth=1
3938 ; VFP2-NEXT: vldr s2, [r1, #8]
3939 ; VFP2-NEXT: subs r2, #2
3940 ; VFP2-NEXT: vmul.f32 s2, s2, s0
3941 ; VFP2-NEXT: vcvt.s32.f32 s2, s2
3942 ; VFP2-NEXT: vmov r3, s2
3943 ; VFP2-NEXT: str r3, [r0, #8]!
3944 ; VFP2-NEXT: vldr s2, [r1, #12]
3945 ; VFP2-NEXT: add.w r1, r1, #8
3946 ; VFP2-NEXT: vmul.f32 s2, s2, s0
3947 ; VFP2-NEXT: vcvt.s32.f32 s2, s2
3948 ; VFP2-NEXT: vstr s2, [r0, #4]
3949 ; VFP2-NEXT: bne .LBB55_1
3950 ; VFP2-NEXT: @ %bb.2:
3952 ; VFP2-NEXT: .p2align 2
3953 ; VFP2-NEXT: @ %bb.3:
3954 ; VFP2-NEXT: .LCPI55_0:
3955 ; VFP2-NEXT: .long 0x4f000000 @ float 2.14748365E+9
3957 ; FULL-LABEL: unroll_minmax:
3959 ; FULL-NEXT: .save {r7, lr}
3960 ; FULL-NEXT: push {r7, lr}
3961 ; FULL-NEXT: mov.w lr, #512
3962 ; FULL-NEXT: subs r1, #8
3963 ; FULL-NEXT: subs r0, #8
3964 ; FULL-NEXT: vldr s0, .LCPI55_0
3965 ; FULL-NEXT: .LBB55_1: @ =>This Inner Loop Header: Depth=1
3966 ; FULL-NEXT: vldr s2, [r1, #8]
3967 ; FULL-NEXT: vmul.f32 s2, s2, s0
3968 ; FULL-NEXT: vcvt.s32.f32 s2, s2
3969 ; FULL-NEXT: vmov r2, s2
3970 ; FULL-NEXT: str r2, [r0, #8]!
3971 ; FULL-NEXT: vldr s2, [r1, #12]
3972 ; FULL-NEXT: adds r1, #8
3973 ; FULL-NEXT: vmul.f32 s2, s2, s0
3974 ; FULL-NEXT: vcvt.s32.f32 s2, s2
3975 ; FULL-NEXT: vstr s2, [r0, #4]
3976 ; FULL-NEXT: le lr, .LBB55_1
3977 ; FULL-NEXT: @ %bb.2:
3978 ; FULL-NEXT: pop {r7, pc}
3979 ; FULL-NEXT: .p2align 2
3980 ; FULL-NEXT: @ %bb.3:
3981 ; FULL-NEXT: .LCPI55_0:
3982 ; FULL-NEXT: .long 0x4f000000 @ float 2.14748365E+9
3989 %6 = phi i32 [ 0, %3 ], [ %28, %5 ]
3990 %7 = getelementptr inbounds float, ptr %1, i32 %6
3991 %8 = load float, ptr %7, align 4
3992 %9 = fmul float %8, 0x41E0000000000000
3993 %10 = fptosi float %9 to i64
3994 %11 = icmp sgt i64 %10, -2147483648
3995 %12 = select i1 %11, i64 %10, i64 -2147483648
3996 %13 = icmp slt i64 %12, 2147483647
3997 %14 = select i1 %13, i64 %12, i64 2147483647
3998 %15 = trunc i64 %14 to i32
3999 %16 = getelementptr inbounds i32, ptr %0, i32 %6
4000 store i32 %15, ptr %16, align 4
4001 %17 = or disjoint i32 %6, 1
4002 %18 = getelementptr inbounds float, ptr %1, i32 %17
4003 %19 = load float, ptr %18, align 4
4004 %20 = fmul float %19, 0x41E0000000000000
4005 %21 = fptosi float %20 to i64
4006 %22 = icmp sgt i64 %21, -2147483648
4007 %23 = select i1 %22, i64 %21, i64 -2147483648
4008 %24 = icmp slt i64 %23, 2147483647
4009 %25 = select i1 %24, i64 %23, i64 2147483647
4010 %26 = trunc i64 %25 to i32
4011 %27 = getelementptr inbounds i32, ptr %0, i32 %17
4012 store i32 %26, ptr %27, align 4
4013 %28 = add nuw nsw i32 %6, 2
4014 %29 = icmp eq i32 %28, 1024
4015 br i1 %29, label %4, label %5
4018 define i32 @stest_f32i32i64(float %x) {
4019 ; SOFT-LABEL: stest_f32i32i64:
4020 ; SOFT: @ %bb.0: @ %entry
4021 ; SOFT-NEXT: .save {r4, lr}
4022 ; SOFT-NEXT: push {r4, lr}
4023 ; SOFT-NEXT: bl __aeabi_f2lz
4024 ; SOFT-NEXT: movs r3, #0
4025 ; SOFT-NEXT: ldr r2, .LCPI56_0
4026 ; SOFT-NEXT: subs r4, r0, r2
4027 ; SOFT-NEXT: sbcs r1, r3
4028 ; SOFT-NEXT: blt .LBB56_2
4029 ; SOFT-NEXT: @ %bb.1: @ %entry
4030 ; SOFT-NEXT: mov r0, r2
4031 ; SOFT-NEXT: .LBB56_2: @ %entry
4032 ; SOFT-NEXT: ldr r1, .LCPI56_1
4033 ; SOFT-NEXT: cmp r0, r1
4034 ; SOFT-NEXT: bgt .LBB56_4
4035 ; SOFT-NEXT: @ %bb.3: @ %entry
4036 ; SOFT-NEXT: mov r0, r1
4037 ; SOFT-NEXT: .LBB56_4: @ %entry
4038 ; SOFT-NEXT: pop {r4, pc}
4039 ; SOFT-NEXT: .p2align 2
4040 ; SOFT-NEXT: @ %bb.5:
4041 ; SOFT-NEXT: .LCPI56_0:
4042 ; SOFT-NEXT: .long 32767 @ 0x7fff
4043 ; SOFT-NEXT: .LCPI56_1:
4044 ; SOFT-NEXT: .long 4294934528 @ 0xffff8000
4046 ; VFP2-LABEL: stest_f32i32i64:
4047 ; VFP2: @ %bb.0: @ %entry
4048 ; VFP2-NEXT: .save {r7, lr}
4049 ; VFP2-NEXT: push {r7, lr}
4050 ; VFP2-NEXT: vmov r0, s0
4051 ; VFP2-NEXT: bl __aeabi_f2lz
4052 ; VFP2-NEXT: movw r2, #32767
4053 ; VFP2-NEXT: subs r3, r0, r2
4054 ; VFP2-NEXT: sbcs r1, r1, #0
4056 ; VFP2-NEXT: movge r0, r2
4057 ; VFP2-NEXT: movw r1, #32768
4058 ; VFP2-NEXT: cmn.w r0, #32768
4059 ; VFP2-NEXT: movt r1, #65535
4061 ; VFP2-NEXT: movle r0, r1
4062 ; VFP2-NEXT: pop {r7, pc}
4064 ; FULL-LABEL: stest_f32i32i64:
4065 ; FULL: @ %bb.0: @ %entry
4066 ; FULL-NEXT: .save {r7, lr}
4067 ; FULL-NEXT: push {r7, lr}
4068 ; FULL-NEXT: vmov r0, s0
4069 ; FULL-NEXT: bl __aeabi_f2lz
4070 ; FULL-NEXT: movw r2, #32767
4071 ; FULL-NEXT: subs r3, r0, r2
4072 ; FULL-NEXT: sbcs r1, r1, #0
4073 ; FULL-NEXT: csel r0, r0, r2, lt
4074 ; FULL-NEXT: movw r1, #32768
4075 ; FULL-NEXT: movt r1, #65535
4076 ; FULL-NEXT: cmn.w r0, #32768
4077 ; FULL-NEXT: csel r0, r0, r1, gt
4078 ; FULL-NEXT: pop {r7, pc}
4080 %conv = fptosi float %x to i64
4081 %convt = trunc i64 %conv to i32
4082 %0 = icmp slt i64 %conv, 32767
4083 %spec.store.select = select i1 %0, i32 %convt, i32 32767
4084 %1 = icmp sgt i32 %spec.store.select, -32768
4085 %spec.store.select7 = select i1 %1, i32 %spec.store.select, i32 -32768
4086 ret i32 %spec.store.select7
4091 declare i32 @llvm.smin.i32(i32, i32)
4092 declare i32 @llvm.smax.i32(i32, i32)
4093 declare i32 @llvm.umin.i32(i32, i32)
4094 declare i64 @llvm.smin.i64(i64, i64)
4095 declare i64 @llvm.smax.i64(i64, i64)
4096 declare i64 @llvm.umin.i64(i64, i64)
4097 declare i128 @llvm.smin.i128(i128, i128)
4098 declare i128 @llvm.smax.i128(i128, i128)
4099 declare i128 @llvm.umin.i128(i128, i128)