1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mcpu=atmega328p -O0 < %s -mtriple=avr | FileCheck --check-prefix=CHECK-MEGA %s
3 ; RUN: llc -mattr=avrtiny -O0 < %s -mtriple=avr | FileCheck %s
5 define i16 @reg_copy16(i16, i16 %a) {
6 ; CHECK-MEGA-LABEL: reg_copy16:
8 ; CHECK-MEGA-NEXT: movw r24, r22
11 ; CHECK-LABEL: reg_copy16:
13 ; CHECK-NEXT: mov r24, r22
14 ; CHECK-NEXT: mov r25, r23
19 define i8 @return_zero() {
20 ; CHECK-MEGA-LABEL: return_zero:
21 ; CHECK-MEGA: ; %bb.0:
22 ; CHECK-MEGA-NEXT: mov r24, r1
23 ; CHECK-MEGA-NEXT: ret
25 ; CHECK-LABEL: return_zero:
27 ; CHECK-NEXT: mov r24, r17
32 define i8 @atomic_load8(ptr %foo) {
33 ; CHECK-MEGA-LABEL: atomic_load8:
34 ; CHECK-MEGA: ; %bb.0:
35 ; CHECK-MEGA-NEXT: movw r26, r24
36 ; CHECK-MEGA-NEXT: in r0, 63
37 ; CHECK-MEGA-NEXT: cli
38 ; CHECK-MEGA-NEXT: ld r24, X
39 ; CHECK-MEGA-NEXT: out 63, r0
40 ; CHECK-MEGA-NEXT: ret
42 ; CHECK-LABEL: atomic_load8:
44 ; CHECK-NEXT: mov r26, r24
45 ; CHECK-NEXT: mov r27, r25
46 ; CHECK-NEXT: in r16, 63
48 ; CHECK-NEXT: ld r24, X
49 ; CHECK-NEXT: out 63, r16
51 %val = load atomic i8, ptr %foo unordered, align 1
55 define avr_signalcc void @signal_handler_with_asm() {
56 ; CHECK-MEGA-LABEL: signal_handler_with_asm:
57 ; CHECK-MEGA: ; %bb.0:
58 ; CHECK-MEGA-NEXT: push r0
59 ; CHECK-MEGA-NEXT: in r0, 63
60 ; CHECK-MEGA-NEXT: push r0
61 ; CHECK-MEGA-NEXT: push r1
62 ; CHECK-MEGA-NEXT: clr r1
63 ; CHECK-MEGA-NEXT: push r24
64 ; CHECK-MEGA-NEXT: ldi r24, 3
65 ; CHECK-MEGA-NEXT: ;APP
66 ; CHECK-MEGA-NEXT: mov r24, r24
67 ; CHECK-MEGA-NEXT: ;NO_APP
68 ; CHECK-MEGA-NEXT: pop r24
69 ; CHECK-MEGA-NEXT: pop r1
70 ; CHECK-MEGA-NEXT: pop r0
71 ; CHECK-MEGA-NEXT: out 63, r0
72 ; CHECK-MEGA-NEXT: pop r0
73 ; CHECK-MEGA-NEXT: reti
75 ; CHECK-LABEL: signal_handler_with_asm:
77 ; CHECK-NEXT: push r16
78 ; CHECK-NEXT: in r16, 63
79 ; CHECK-NEXT: push r16
80 ; CHECK-NEXT: push r17
82 ; CHECK-NEXT: push r24
83 ; CHECK-NEXT: ldi r24, 3
85 ; CHECK-NEXT: mov r24, r24
90 ; CHECK-NEXT: out 63, r16
93 call i8 asm sideeffect "mov $0, $1", "=r,r"(i8 3) nounwind
99 define avr_signalcc void @signal_handler_with_call() {
100 ; CHECK-MEGA-LABEL: signal_handler_with_call:
101 ; CHECK-MEGA: ; %bb.0:
102 ; CHECK-MEGA-NEXT: push r0
103 ; CHECK-MEGA-NEXT: in r0, 63
104 ; CHECK-MEGA-NEXT: push r0
105 ; CHECK-MEGA-NEXT: push r1
106 ; CHECK-MEGA-NEXT: clr r1
107 ; CHECK-MEGA-NEXT: push r18
108 ; CHECK-MEGA-NEXT: push r19
109 ; CHECK-MEGA-NEXT: push r20
110 ; CHECK-MEGA-NEXT: push r21
111 ; CHECK-MEGA-NEXT: push r22
112 ; CHECK-MEGA-NEXT: push r23
113 ; CHECK-MEGA-NEXT: push r24
114 ; CHECK-MEGA-NEXT: push r25
115 ; CHECK-MEGA-NEXT: push r26
116 ; CHECK-MEGA-NEXT: push r27
117 ; CHECK-MEGA-NEXT: push r30
118 ; CHECK-MEGA-NEXT: push r31
119 ; CHECK-MEGA-NEXT: call foo
120 ; CHECK-MEGA-NEXT: pop r31
121 ; CHECK-MEGA-NEXT: pop r30
122 ; CHECK-MEGA-NEXT: pop r27
123 ; CHECK-MEGA-NEXT: pop r26
124 ; CHECK-MEGA-NEXT: pop r25
125 ; CHECK-MEGA-NEXT: pop r24
126 ; CHECK-MEGA-NEXT: pop r23
127 ; CHECK-MEGA-NEXT: pop r22
128 ; CHECK-MEGA-NEXT: pop r21
129 ; CHECK-MEGA-NEXT: pop r20
130 ; CHECK-MEGA-NEXT: pop r19
131 ; CHECK-MEGA-NEXT: pop r18
132 ; CHECK-MEGA-NEXT: pop r1
133 ; CHECK-MEGA-NEXT: pop r0
134 ; CHECK-MEGA-NEXT: out 63, r0
135 ; CHECK-MEGA-NEXT: pop r0
136 ; CHECK-MEGA-NEXT: reti
138 ; CHECK-LABEL: signal_handler_with_call:
140 ; CHECK-NEXT: push r16
141 ; CHECK-NEXT: in r16, 63
142 ; CHECK-NEXT: push r16
143 ; CHECK-NEXT: push r17
144 ; CHECK-NEXT: clr r17
145 ; CHECK-NEXT: push r20
146 ; CHECK-NEXT: push r21
147 ; CHECK-NEXT: push r22
148 ; CHECK-NEXT: push r23
149 ; CHECK-NEXT: push r24
150 ; CHECK-NEXT: push r25
151 ; CHECK-NEXT: push r26
152 ; CHECK-NEXT: push r27
153 ; CHECK-NEXT: push r30
154 ; CHECK-NEXT: push r31
155 ; CHECK-NEXT: rcall foo
156 ; CHECK-NEXT: pop r31
157 ; CHECK-NEXT: pop r30
158 ; CHECK-NEXT: pop r27
159 ; CHECK-NEXT: pop r26
160 ; CHECK-NEXT: pop r25
161 ; CHECK-NEXT: pop r24
162 ; CHECK-NEXT: pop r23
163 ; CHECK-NEXT: pop r22
164 ; CHECK-NEXT: pop r21
165 ; CHECK-NEXT: pop r20
166 ; CHECK-NEXT: pop r17
167 ; CHECK-NEXT: pop r16
168 ; CHECK-NEXT: out 63, r16
169 ; CHECK-NEXT: pop r16