| blob | 65488850d4bab98be706405bbbcf8cd37dba0b34 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s
3 ; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
5 define i32 @selectRR_eq_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
6 ; CHECK-LABEL: selectRR_eq_i32:
7 ; CHECK: # %bb.0: # %entry
8 ; CHECK-NEXT: cmpne16 a1, a0
9 ; CHECK-NEXT: movf32 a2, a3
10 ; CHECK-NEXT: mov16 a0, a2
11 ; CHECK-NEXT: rts16
12 ;
13 ; GENERIC-LABEL: selectRR_eq_i32:
14 ; GENERIC: # %bb.0: # %entry
15 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
16 ; GENERIC-NEXT: subi16 sp, sp, 4
17 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
18 ; GENERIC-NEXT: cmpne16 a1, a0
19 ; GENERIC-NEXT: mvcv16 a0
20 ; GENERIC-NEXT: btsti16 a0, 0
21 ; GENERIC-NEXT: bt16 .LBB0_2
22 ; GENERIC-NEXT: # %bb.1: # %entry
23 ; GENERIC-NEXT: mov16 a3, a2
24 ; GENERIC-NEXT: .LBB0_2: # %entry
25 ; GENERIC-NEXT: mov16 a0, a3
26 ; GENERIC-NEXT: addi16 sp, sp, 4
27 ; GENERIC-NEXT: rts16
28 entry:
29 %icmp = icmp eq i32 %y, %x
30 %ret = select i1 %icmp, i32 %m, i32 %n
31 ret i32 %ret
32 }
34 define i32 @selectRI_eq_i32(i32 %x, i32 %n, i32 %m) {
35 ; CHECK-LABEL: selectRI_eq_i32:
36 ; CHECK: # %bb.0: # %entry
37 ; CHECK-NEXT: cmpnei16 a0, 10
38 ; CHECK-NEXT: movf32 a1, a2
39 ; CHECK-NEXT: mov16 a0, a1
40 ; CHECK-NEXT: rts16
41 ;
42 ; GENERIC-LABEL: selectRI_eq_i32:
43 ; GENERIC: # %bb.0: # %entry
44 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
45 ; GENERIC-NEXT: subi16 sp, sp, 4
46 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
47 ; GENERIC-NEXT: cmpnei16 a0, 10
48 ; GENERIC-NEXT: mvcv16 a0
49 ; GENERIC-NEXT: btsti16 a0, 0
50 ; GENERIC-NEXT: bt16 .LBB1_2
51 ; GENERIC-NEXT: # %bb.1: # %entry
52 ; GENERIC-NEXT: mov16 a2, a1
53 ; GENERIC-NEXT: .LBB1_2: # %entry
54 ; GENERIC-NEXT: mov16 a0, a2
55 ; GENERIC-NEXT: addi16 sp, sp, 4
56 ; GENERIC-NEXT: rts16
57 entry:
58 %icmp = icmp eq i32 %x, 10
59 %ret = select i1 %icmp, i32 %m, i32 %n
60 ret i32 %ret
61 }
63 define i32 @selectRX_eq_i32(i32 %x, i32 %n, i32 %m) {
64 ; CHECK-LABEL: selectRX_eq_i32:
65 ; CHECK: # %bb.0: # %entry
66 ; CHECK-NEXT: movih32 a3, 729
67 ; CHECK-NEXT: ori32 a3, a3, 2033
68 ; CHECK-NEXT: cmpne16 a0, a3
69 ; CHECK-NEXT: movf32 a1, a2
70 ; CHECK-NEXT: mov16 a0, a1
71 ; CHECK-NEXT: rts16
72 ;
73 ; GENERIC-LABEL: selectRX_eq_i32:
74 ; GENERIC: # %bb.0: # %entry
75 ; GENERIC-NEXT: subi16 sp, sp, 4
76 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
77 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
78 ; GENERIC-NEXT: .cfi_offset l0, -4
79 ; GENERIC-NEXT: subi16 sp, sp, 4
80 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
81 ; GENERIC-NEXT: movi16 a3, 2
82 ; GENERIC-NEXT: lsli16 a3, a3, 24
83 ; GENERIC-NEXT: movi16 l0, 217
84 ; GENERIC-NEXT: lsli16 l0, l0, 16
85 ; GENERIC-NEXT: or16 l0, a3
86 ; GENERIC-NEXT: movi16 a3, 7
87 ; GENERIC-NEXT: lsli16 a3, a3, 8
88 ; GENERIC-NEXT: or16 a3, l0
89 ; GENERIC-NEXT: movi16 l0, 241
90 ; GENERIC-NEXT: or16 l0, a3
91 ; GENERIC-NEXT: cmpne16 a0, l0
92 ; GENERIC-NEXT: mvcv16 a0
93 ; GENERIC-NEXT: btsti16 a0, 0
94 ; GENERIC-NEXT: bt16 .LBB2_2
95 ; GENERIC-NEXT: # %bb.1: # %entry
96 ; GENERIC-NEXT: mov16 a2, a1
97 ; GENERIC-NEXT: .LBB2_2: # %entry
98 ; GENERIC-NEXT: mov16 a0, a2
99 ; GENERIC-NEXT: addi16 sp, sp, 4
100 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
101 ; GENERIC-NEXT: addi16 sp, sp, 4
102 ; GENERIC-NEXT: rts16
103 entry:
104 %icmp = icmp eq i32 %x, 47777777
105 %ret = select i1 %icmp, i32 %m, i32 %n
106 ret i32 %ret
107 }
109 define i32 @selectC_eq_i32(i1 %c, i32 %n, i32 %m) {
110 ; CHECK-LABEL: selectC_eq_i32:
111 ; CHECK: # %bb.0: # %entry
112 ; CHECK-NEXT: btsti16 a0, 0
113 ; CHECK-NEXT: movt32 a1, a2
114 ; CHECK-NEXT: mov16 a0, a1
115 ; CHECK-NEXT: rts16
116 ;
117 ; GENERIC-LABEL: selectC_eq_i32:
118 ; GENERIC: # %bb.0: # %entry
119 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
120 ; GENERIC-NEXT: subi16 sp, sp, 4
121 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
122 ; GENERIC-NEXT: btsti16 a0, 0
123 ; GENERIC-NEXT: bt16 .LBB3_2
124 ; GENERIC-NEXT: # %bb.1: # %entry
125 ; GENERIC-NEXT: mov16 a2, a1
126 ; GENERIC-NEXT: .LBB3_2: # %entry
127 ; GENERIC-NEXT: mov16 a0, a2
128 ; GENERIC-NEXT: addi16 sp, sp, 4
129 ; GENERIC-NEXT: rts16
130 entry:
131 %ret = select i1 %c, i32 %m, i32 %n
132 ret i32 %ret
133 }
135 define i32 @selectRI_0_if_true(i1 %c, i32 %q) {
136 ; CHECK-LABEL: selectRI_0_if_true:
137 ; CHECK: # %bb.0:
138 ; CHECK-NEXT: btsti16 a0, 0
139 ; CHECK-NEXT: clrt32 a1
140 ; CHECK-NEXT: mov16 a0, a1
141 ; CHECK-NEXT: rts16
142 ;
143 ; GENERIC-LABEL: selectRI_0_if_true:
144 ; GENERIC: # %bb.0:
145 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
146 ; GENERIC-NEXT: subi16 sp, sp, 4
147 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
148 ; GENERIC-NEXT: mov16 a2, a0
149 ; GENERIC-NEXT: movi16 a0, 0
150 ; GENERIC-NEXT: btsti16 a2, 0
151 ; GENERIC-NEXT: bt16 .LBB4_2
152 ; GENERIC-NEXT: # %bb.1:
153 ; GENERIC-NEXT: mov16 a0, a1
154 ; GENERIC-NEXT: .LBB4_2:
155 ; GENERIC-NEXT: addi16 sp, sp, 4
156 ; GENERIC-NEXT: rts16
157 %ret = select i1 %c, i32 0, i32 %q
158 ret i32 %ret
159 }
161 define i32 @selectRI_0_if_false(i1 %c, i32 %q) {
162 ; CHECK-LABEL: selectRI_0_if_false:
163 ; CHECK: # %bb.0:
164 ; CHECK-NEXT: btsti16 a0, 0
165 ; CHECK-NEXT: clrf32 a1
166 ; CHECK-NEXT: mov16 a0, a1
167 ; CHECK-NEXT: rts16
168 ;
169 ; GENERIC-LABEL: selectRI_0_if_false:
170 ; GENERIC: # %bb.0:
171 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
172 ; GENERIC-NEXT: subi16 sp, sp, 4
173 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
174 ; GENERIC-NEXT: btsti16 a0, 0
175 ; GENERIC-NEXT: bt16 .LBB5_2
176 ; GENERIC-NEXT: # %bb.1:
177 ; GENERIC-NEXT: movi16 a1, 0
178 ; GENERIC-NEXT: .LBB5_2:
179 ; GENERIC-NEXT: mov16 a0, a1
180 ; GENERIC-NEXT: addi16 sp, sp, 4
181 ; GENERIC-NEXT: rts16
182 %ret = select i1 %c, i32 %q, i32 0
183 ret i32 %ret
184 }
186 define i64 @selectRR_eq_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
187 ; CHECK-LABEL: selectRR_eq_i64:
188 ; CHECK: # %bb.0: # %entry
189 ; CHECK-NEXT: xor16 a1, a3
190 ; CHECK-NEXT: xor16 a0, a2
191 ; CHECK-NEXT: or16 a0, a1
192 ; CHECK-NEXT: cmpnei16 a0, 0
193 ; CHECK-NEXT: movi16 a0, 0
194 ; CHECK-NEXT: addu16 a0, sp
195 ; CHECK-NEXT: mov16 a1, a0
196 ; CHECK-NEXT: addi16 a0, sp, 8
197 ; CHECK-NEXT: movf32 a1, a0
198 ; CHECK-NEXT: ld16.w a0, (a1, 0)
199 ; CHECK-NEXT: ld16.w a1, (a1, 4)
200 ; CHECK-NEXT: rts16
201 ;
202 ; GENERIC-LABEL: selectRR_eq_i64:
203 ; GENERIC: # %bb.0: # %entry
204 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
205 ; GENERIC-NEXT: subi16 sp, sp, 4
206 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
207 ; GENERIC-NEXT: xor16 a1, a3
208 ; GENERIC-NEXT: xor16 a0, a2
209 ; GENERIC-NEXT: or16 a0, a1
210 ; GENERIC-NEXT: cmpnei16 a0, 0
211 ; GENERIC-NEXT: mvcv16 a0
212 ; GENERIC-NEXT: btsti16 a0, 0
213 ; GENERIC-NEXT: bt16 .LBB6_2
214 ; GENERIC-NEXT: # %bb.1: # %entry
215 ; GENERIC-NEXT: movi16 a0, 4
216 ; GENERIC-NEXT: br32 .LBB6_3
217 ; GENERIC-NEXT: .LBB6_2:
218 ; GENERIC-NEXT: movi16 a0, 12
219 ; GENERIC-NEXT: .LBB6_3: # %entry
220 ; GENERIC-NEXT: addu16 a0, sp
221 ; GENERIC-NEXT: mov16 a1, a0
222 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
223 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
224 ; GENERIC-NEXT: addi16 sp, sp, 4
225 ; GENERIC-NEXT: rts16
226 entry:
227 %icmp = icmp eq i64 %y, %x
228 %ret = select i1 %icmp, i64 %m, i64 %n
229 ret i64 %ret
230 }
232 define i64 @selectRI_eq_i64(i64 %x, i64 %n, i64 %m) {
233 ; CHECK-LABEL: selectRI_eq_i64:
234 ; CHECK: # %bb.0: # %entry
235 ; CHECK-NEXT: ld32.w t0, (sp, 4)
236 ; CHECK-NEXT: ld32.w t1, (sp, 0)
237 ; CHECK-NEXT: xori32 a0, a0, 10
238 ; CHECK-NEXT: or16 a0, a1
239 ; CHECK-NEXT: cmpnei16 a0, 0
240 ; CHECK-NEXT: movf32 a2, t1
241 ; CHECK-NEXT: movf32 a3, t0
242 ; CHECK-NEXT: mov16 a0, a2
243 ; CHECK-NEXT: mov16 a1, a3
244 ; CHECK-NEXT: rts16
245 ;
246 ; GENERIC-LABEL: selectRI_eq_i64:
247 ; GENERIC: # %bb.0: # %entry
248 ; GENERIC-NEXT: subi16 sp, sp, 4
249 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
250 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
251 ; GENERIC-NEXT: .cfi_offset l0, -4
252 ; GENERIC-NEXT: subi16 sp, sp, 4
253 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
254 ; GENERIC-NEXT: movi16 l0, 10
255 ; GENERIC-NEXT: xor16 l0, a0
256 ; GENERIC-NEXT: or16 l0, a1
257 ; GENERIC-NEXT: cmpnei16 l0, 0
258 ; GENERIC-NEXT: mvcv16 a0
259 ; GENERIC-NEXT: btsti16 a0, 0
260 ; GENERIC-NEXT: bf16 .LBB7_2
261 ; GENERIC-NEXT: # %bb.1:
262 ; GENERIC-NEXT: ld16.w a2, (sp, 8)
263 ; GENERIC-NEXT: .LBB7_2: # %entry
264 ; GENERIC-NEXT: btsti16 a0, 0
265 ; GENERIC-NEXT: bf16 .LBB7_4
266 ; GENERIC-NEXT: # %bb.3:
267 ; GENERIC-NEXT: ld16.w a3, (sp, 12)
268 ; GENERIC-NEXT: .LBB7_4: # %entry
269 ; GENERIC-NEXT: mov16 a0, a2
270 ; GENERIC-NEXT: mov16 a1, a3
271 ; GENERIC-NEXT: addi16 sp, sp, 4
272 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
273 ; GENERIC-NEXT: addi16 sp, sp, 4
274 ; GENERIC-NEXT: rts16
275 entry:
276 %icmp = icmp eq i64 %x, 10
277 %ret = select i1 %icmp, i64 %m, i64 %n
278 ret i64 %ret
279 }
281 define i64 @selectRX_eq_i64(i64 %x, i64 %n, i64 %m) {
282 ; CHECK-LABEL: selectRX_eq_i64:
283 ; CHECK: # %bb.0: # %entry
284 ; CHECK-NEXT: subi16 sp, sp, 4
285 ; CHECK-NEXT: .cfi_def_cfa_offset 4
286 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
287 ; CHECK-NEXT: .cfi_offset l0, -4
288 ; CHECK-NEXT: .cfi_def_cfa_offset 4
289 ; CHECK-NEXT: ld32.w t0, (sp, 8)
290 ; CHECK-NEXT: ld32.w t1, (sp, 4)
291 ; CHECK-NEXT: movih32 l0, 729
292 ; CHECK-NEXT: ori32 l0, l0, 2033
293 ; CHECK-NEXT: xor16 a0, l0
294 ; CHECK-NEXT: or16 a0, a1
295 ; CHECK-NEXT: cmpnei16 a0, 0
296 ; CHECK-NEXT: movf32 a2, t1
297 ; CHECK-NEXT: movf32 a3, t0
298 ; CHECK-NEXT: mov16 a0, a2
299 ; CHECK-NEXT: mov16 a1, a3
300 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
301 ; CHECK-NEXT: addi16 sp, sp, 4
302 ; CHECK-NEXT: rts16
303 ;
304 ; GENERIC-LABEL: selectRX_eq_i64:
305 ; GENERIC: # %bb.0: # %entry
306 ; GENERIC-NEXT: subi16 sp, sp, 8
307 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
308 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
309 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
310 ; GENERIC-NEXT: .cfi_offset l1, -4
311 ; GENERIC-NEXT: .cfi_offset l0, -8
312 ; GENERIC-NEXT: subi16 sp, sp, 4
313 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
314 ; GENERIC-NEXT: movi16 l0, 2
315 ; GENERIC-NEXT: lsli16 l0, l0, 24
316 ; GENERIC-NEXT: movi16 l1, 217
317 ; GENERIC-NEXT: lsli16 l1, l1, 16
318 ; GENERIC-NEXT: or16 l1, l0
319 ; GENERIC-NEXT: movi16 l0, 7
320 ; GENERIC-NEXT: lsli16 l0, l0, 8
321 ; GENERIC-NEXT: or16 l0, l1
322 ; GENERIC-NEXT: movi16 l1, 241
323 ; GENERIC-NEXT: or16 l1, l0
324 ; GENERIC-NEXT: xor16 l1, a0
325 ; GENERIC-NEXT: or16 l1, a1
326 ; GENERIC-NEXT: cmpnei16 l1, 0
327 ; GENERIC-NEXT: mvcv16 a0
328 ; GENERIC-NEXT: btsti16 a0, 0
329 ; GENERIC-NEXT: bf16 .LBB8_2
330 ; GENERIC-NEXT: # %bb.1:
331 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
332 ; GENERIC-NEXT: .LBB8_2: # %entry
333 ; GENERIC-NEXT: btsti16 a0, 0
334 ; GENERIC-NEXT: bf16 .LBB8_4
335 ; GENERIC-NEXT: # %bb.3:
336 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
337 ; GENERIC-NEXT: .LBB8_4: # %entry
338 ; GENERIC-NEXT: mov16 a0, a2
339 ; GENERIC-NEXT: mov16 a1, a3
340 ; GENERIC-NEXT: addi16 sp, sp, 4
341 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
342 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
343 ; GENERIC-NEXT: addi16 sp, sp, 8
344 ; GENERIC-NEXT: rts16
345 entry:
346 %icmp = icmp eq i64 %x, 47777777
347 %ret = select i1 %icmp, i64 %m, i64 %n
348 ret i64 %ret
349 }
351 define i64 @selectC_eq_i64(i1 %c, i64 %n, i64 %m) {
352 ; CHECK-LABEL: selectC_eq_i64:
353 ; CHECK: # %bb.0: # %entry
354 ; CHECK-NEXT: ld32.w t0, (sp, 0)
355 ; CHECK-NEXT: btsti16 a0, 0
356 ; CHECK-NEXT: movt32 a1, a3
357 ; CHECK-NEXT: movt32 a2, t0
358 ; CHECK-NEXT: mov16 a0, a1
359 ; CHECK-NEXT: mov16 a1, a2
360 ; CHECK-NEXT: rts16
361 ;
362 ; GENERIC-LABEL: selectC_eq_i64:
363 ; GENERIC: # %bb.0: # %entry
364 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
365 ; GENERIC-NEXT: subi16 sp, sp, 4
366 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
367 ; GENERIC-NEXT: btsti16 a0, 0
368 ; GENERIC-NEXT: bt16 .LBB9_2
369 ; GENERIC-NEXT: # %bb.1: # %entry
370 ; GENERIC-NEXT: mov16 a3, a1
371 ; GENERIC-NEXT: .LBB9_2: # %entry
372 ; GENERIC-NEXT: btsti16 a0, 0
373 ; GENERIC-NEXT: bf16 .LBB9_4
374 ; GENERIC-NEXT: # %bb.3:
375 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
376 ; GENERIC-NEXT: .LBB9_4: # %entry
377 ; GENERIC-NEXT: mov16 a0, a3
378 ; GENERIC-NEXT: mov16 a1, a2
379 ; GENERIC-NEXT: addi16 sp, sp, 4
380 ; GENERIC-NEXT: rts16
381 entry:
382 %ret = select i1 %c, i64 %m, i64 %n
383 ret i64 %ret
384 }
387 define i16 @selectRR_eq_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
388 ; CHECK-LABEL: selectRR_eq_i16:
389 ; CHECK: # %bb.0: # %entry
390 ; CHECK-NEXT: zexth16 a0, a0
391 ; CHECK-NEXT: zexth16 a1, a1
392 ; CHECK-NEXT: cmpne16 a1, a0
393 ; CHECK-NEXT: movf32 a2, a3
394 ; CHECK-NEXT: mov16 a0, a2
395 ; CHECK-NEXT: rts16
396 ;
397 ; GENERIC-LABEL: selectRR_eq_i16:
398 ; GENERIC: # %bb.0: # %entry
399 ; GENERIC-NEXT: subi16 sp, sp, 12
400 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
401 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
402 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
403 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
404 ; GENERIC-NEXT: .cfi_offset l2, -4
405 ; GENERIC-NEXT: .cfi_offset l1, -8
406 ; GENERIC-NEXT: .cfi_offset l0, -12
407 ; GENERIC-NEXT: subi16 sp, sp, 4
408 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
409 ; GENERIC-NEXT: movi16 l0, 0
410 ; GENERIC-NEXT: lsli16 l1, l0, 24
411 ; GENERIC-NEXT: lsli16 l0, l0, 16
412 ; GENERIC-NEXT: or16 l0, l1
413 ; GENERIC-NEXT: movi16 l1, 255
414 ; GENERIC-NEXT: lsli16 l2, l1, 8
415 ; GENERIC-NEXT: or16 l2, l0
416 ; GENERIC-NEXT: or16 l2, l1
417 ; GENERIC-NEXT: and16 a0, l2
418 ; GENERIC-NEXT: and16 l2, a1
419 ; GENERIC-NEXT: cmpne16 l2, a0
420 ; GENERIC-NEXT: mvcv16 a0
421 ; GENERIC-NEXT: btsti16 a0, 0
422 ; GENERIC-NEXT: bt16 .LBB10_2
423 ; GENERIC-NEXT: # %bb.1: # %entry
424 ; GENERIC-NEXT: mov16 a3, a2
425 ; GENERIC-NEXT: .LBB10_2: # %entry
426 ; GENERIC-NEXT: mov16 a0, a3
427 ; GENERIC-NEXT: addi16 sp, sp, 4
428 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
429 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
430 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
431 ; GENERIC-NEXT: addi16 sp, sp, 12
432 ; GENERIC-NEXT: rts16
433 entry:
434 %icmp = icmp eq i16 %y, %x
435 %ret = select i1 %icmp, i16 %m, i16 %n
436 ret i16 %ret
437 }
439 define i16 @selectRI_eq_i16(i16 %x, i16 %n, i16 %m) {
440 ; CHECK-LABEL: selectRI_eq_i16:
441 ; CHECK: # %bb.0: # %entry
442 ; CHECK-NEXT: zexth16 a0, a0
443 ; CHECK-NEXT: cmpnei16 a0, 10
444 ; CHECK-NEXT: movf32 a1, a2
445 ; CHECK-NEXT: mov16 a0, a1
446 ; CHECK-NEXT: rts16
447 ;
448 ; GENERIC-LABEL: selectRI_eq_i16:
449 ; GENERIC: # %bb.0: # %entry
450 ; GENERIC-NEXT: subi16 sp, sp, 8
451 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
452 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
453 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
454 ; GENERIC-NEXT: .cfi_offset l1, -4
455 ; GENERIC-NEXT: .cfi_offset l0, -8
456 ; GENERIC-NEXT: subi16 sp, sp, 4
457 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
458 ; GENERIC-NEXT: movi16 a3, 0
459 ; GENERIC-NEXT: lsli16 l0, a3, 24
460 ; GENERIC-NEXT: lsli16 a3, a3, 16
461 ; GENERIC-NEXT: or16 a3, l0
462 ; GENERIC-NEXT: movi16 l0, 255
463 ; GENERIC-NEXT: lsli16 l1, l0, 8
464 ; GENERIC-NEXT: or16 l1, a3
465 ; GENERIC-NEXT: or16 l1, l0
466 ; GENERIC-NEXT: and16 l1, a0
467 ; GENERIC-NEXT: cmpnei16 l1, 10
468 ; GENERIC-NEXT: mvcv16 a0
469 ; GENERIC-NEXT: btsti16 a0, 0
470 ; GENERIC-NEXT: bt16 .LBB11_2
471 ; GENERIC-NEXT: # %bb.1: # %entry
472 ; GENERIC-NEXT: mov16 a2, a1
473 ; GENERIC-NEXT: .LBB11_2: # %entry
474 ; GENERIC-NEXT: mov16 a0, a2
475 ; GENERIC-NEXT: addi16 sp, sp, 4
476 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
477 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
478 ; GENERIC-NEXT: addi16 sp, sp, 8
479 ; GENERIC-NEXT: rts16
480 entry:
481 %icmp = icmp eq i16 %x, 10
482 %ret = select i1 %icmp, i16 %m, i16 %n
483 ret i16 %ret
484 }
486 define i16 @selectRX_eq_i16(i16 %x, i16 %n, i16 %m) {
487 ; CHECK-LABEL: selectRX_eq_i16:
488 ; CHECK: # %bb.0: # %entry
489 ; CHECK-NEXT: zexth16 a0, a0
490 ; CHECK-NEXT: cmpnei32 a0, 2033
491 ; CHECK-NEXT: movf32 a1, a2
492 ; CHECK-NEXT: mov16 a0, a1
493 ; CHECK-NEXT: rts16
494 ;
495 ; GENERIC-LABEL: selectRX_eq_i16:
496 ; GENERIC: # %bb.0: # %entry
497 ; GENERIC-NEXT: subi16 sp, sp, 8
498 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
499 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
500 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
501 ; GENERIC-NEXT: .cfi_offset l1, -4
502 ; GENERIC-NEXT: .cfi_offset l0, -8
503 ; GENERIC-NEXT: subi16 sp, sp, 4
504 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
505 ; GENERIC-NEXT: movi16 a3, 0
506 ; GENERIC-NEXT: lsli16 l0, a3, 24
507 ; GENERIC-NEXT: lsli16 a3, a3, 16
508 ; GENERIC-NEXT: or16 a3, l0
509 ; GENERIC-NEXT: movi16 l0, 255
510 ; GENERIC-NEXT: lsli16 l1, l0, 8
511 ; GENERIC-NEXT: or16 l1, a3
512 ; GENERIC-NEXT: or16 l1, l0
513 ; GENERIC-NEXT: and16 l1, a0
514 ; GENERIC-NEXT: movi16 a0, 7
515 ; GENERIC-NEXT: lsli16 a0, a0, 8
516 ; GENERIC-NEXT: or16 a0, a3
517 ; GENERIC-NEXT: movi16 a3, 241
518 ; GENERIC-NEXT: or16 a3, a0
519 ; GENERIC-NEXT: cmpne16 l1, a3
520 ; GENERIC-NEXT: mvcv16 a0
521 ; GENERIC-NEXT: btsti16 a0, 0
522 ; GENERIC-NEXT: bt16 .LBB12_2
523 ; GENERIC-NEXT: # %bb.1: # %entry
524 ; GENERIC-NEXT: mov16 a2, a1
525 ; GENERIC-NEXT: .LBB12_2: # %entry
526 ; GENERIC-NEXT: mov16 a0, a2
527 ; GENERIC-NEXT: addi16 sp, sp, 4
528 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
529 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
530 ; GENERIC-NEXT: addi16 sp, sp, 8
531 ; GENERIC-NEXT: rts16
532 entry:
533 %icmp = icmp eq i16 %x, 47777777
534 %ret = select i1 %icmp, i16 %m, i16 %n
535 ret i16 %ret
536 }
538 define i16 @selectC_eq_i16(i1 %c, i16 %n, i16 %m) {
539 ; CHECK-LABEL: selectC_eq_i16:
540 ; CHECK: # %bb.0: # %entry
541 ; CHECK-NEXT: btsti16 a0, 0
542 ; CHECK-NEXT: movt32 a1, a2
543 ; CHECK-NEXT: mov16 a0, a1
544 ; CHECK-NEXT: rts16
545 ;
546 ; GENERIC-LABEL: selectC_eq_i16:
547 ; GENERIC: # %bb.0: # %entry
548 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
549 ; GENERIC-NEXT: subi16 sp, sp, 4
550 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
551 ; GENERIC-NEXT: btsti16 a0, 0
552 ; GENERIC-NEXT: bt16 .LBB13_2
553 ; GENERIC-NEXT: # %bb.1: # %entry
554 ; GENERIC-NEXT: mov16 a2, a1
555 ; GENERIC-NEXT: .LBB13_2: # %entry
556 ; GENERIC-NEXT: mov16 a0, a2
557 ; GENERIC-NEXT: addi16 sp, sp, 4
558 ; GENERIC-NEXT: rts16
559 entry:
560 %ret = select i1 %c, i16 %m, i16 %n
561 ret i16 %ret
562 }
565 define i8 @selectRR_eq_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
566 ; CHECK-LABEL: selectRR_eq_i8:
567 ; CHECK: # %bb.0: # %entry
568 ; CHECK-NEXT: zextb16 a0, a0
569 ; CHECK-NEXT: zextb16 a1, a1
570 ; CHECK-NEXT: cmpne16 a1, a0
571 ; CHECK-NEXT: movf32 a2, a3
572 ; CHECK-NEXT: mov16 a0, a2
573 ; CHECK-NEXT: rts16
574 ;
575 ; GENERIC-LABEL: selectRR_eq_i8:
576 ; GENERIC: # %bb.0: # %entry
577 ; GENERIC-NEXT: subi16 sp, sp, 4
578 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
579 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
580 ; GENERIC-NEXT: .cfi_offset l0, -4
581 ; GENERIC-NEXT: subi16 sp, sp, 4
582 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
583 ; GENERIC-NEXT: movi16 l0, 255
584 ; GENERIC-NEXT: and16 a0, l0
585 ; GENERIC-NEXT: and16 a1, l0
586 ; GENERIC-NEXT: cmpne16 a1, a0
587 ; GENERIC-NEXT: mvcv16 a0
588 ; GENERIC-NEXT: btsti16 a0, 0
589 ; GENERIC-NEXT: bt16 .LBB14_2
590 ; GENERIC-NEXT: # %bb.1: # %entry
591 ; GENERIC-NEXT: mov16 a3, a2
592 ; GENERIC-NEXT: .LBB14_2: # %entry
593 ; GENERIC-NEXT: mov16 a0, a3
594 ; GENERIC-NEXT: addi16 sp, sp, 4
595 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
596 ; GENERIC-NEXT: addi16 sp, sp, 4
597 ; GENERIC-NEXT: rts16
598 entry:
599 %icmp = icmp eq i8 %y, %x
600 %ret = select i1 %icmp, i8 %m, i8 %n
601 ret i8 %ret
602 }
604 define i8 @selectRI_eq_i8(i8 %x, i8 %n, i8 %m) {
605 ; CHECK-LABEL: selectRI_eq_i8:
606 ; CHECK: # %bb.0: # %entry
607 ; CHECK-NEXT: zextb16 a0, a0
608 ; CHECK-NEXT: cmpnei16 a0, 10
609 ; CHECK-NEXT: movf32 a1, a2
610 ; CHECK-NEXT: mov16 a0, a1
611 ; CHECK-NEXT: rts16
612 ;
613 ; GENERIC-LABEL: selectRI_eq_i8:
614 ; GENERIC: # %bb.0: # %entry
615 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
616 ; GENERIC-NEXT: subi16 sp, sp, 4
617 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
618 ; GENERIC-NEXT: movi16 a3, 255
619 ; GENERIC-NEXT: and16 a3, a0
620 ; GENERIC-NEXT: cmpnei16 a3, 10
621 ; GENERIC-NEXT: mvcv16 a0
622 ; GENERIC-NEXT: btsti16 a0, 0
623 ; GENERIC-NEXT: bt16 .LBB15_2
624 ; GENERIC-NEXT: # %bb.1: # %entry
625 ; GENERIC-NEXT: mov16 a2, a1
626 ; GENERIC-NEXT: .LBB15_2: # %entry
627 ; GENERIC-NEXT: mov16 a0, a2
628 ; GENERIC-NEXT: addi16 sp, sp, 4
629 ; GENERIC-NEXT: rts16
630 entry:
631 %icmp = icmp eq i8 %x, 10
632 %ret = select i1 %icmp, i8 %m, i8 %n
633 ret i8 %ret
634 }
636 define i8 @selectRX_eq_i8(i8 %x, i8 %n, i8 %m) {
637 ; CHECK-LABEL: selectRX_eq_i8:
638 ; CHECK: # %bb.0: # %entry
639 ; CHECK-NEXT: zextb16 a0, a0
640 ; CHECK-NEXT: cmpnei32 a0, 241
641 ; CHECK-NEXT: movf32 a1, a2
642 ; CHECK-NEXT: mov16 a0, a1
643 ; CHECK-NEXT: rts16
644 ;
645 ; GENERIC-LABEL: selectRX_eq_i8:
646 ; GENERIC: # %bb.0: # %entry
647 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
648 ; GENERIC-NEXT: subi16 sp, sp, 4
649 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
650 ; GENERIC-NEXT: movi16 a3, 255
651 ; GENERIC-NEXT: and16 a3, a0
652 ; GENERIC-NEXT: movi16 a0, 241
653 ; GENERIC-NEXT: cmpne16 a3, a0
654 ; GENERIC-NEXT: mvcv16 a0
655 ; GENERIC-NEXT: btsti16 a0, 0
656 ; GENERIC-NEXT: bt16 .LBB16_2
657 ; GENERIC-NEXT: # %bb.1: # %entry
658 ; GENERIC-NEXT: mov16 a2, a1
659 ; GENERIC-NEXT: .LBB16_2: # %entry
660 ; GENERIC-NEXT: mov16 a0, a2
661 ; GENERIC-NEXT: addi16 sp, sp, 4
662 ; GENERIC-NEXT: rts16
663 entry:
664 %icmp = icmp eq i8 %x, 47777777
665 %ret = select i1 %icmp, i8 %m, i8 %n
666 ret i8 %ret
667 }
669 define i8 @selectC_eq_i8(i1 %c, i8 %n, i8 %m) {
670 ; CHECK-LABEL: selectC_eq_i8:
671 ; CHECK: # %bb.0: # %entry
672 ; CHECK-NEXT: btsti16 a0, 0
673 ; CHECK-NEXT: movt32 a1, a2
674 ; CHECK-NEXT: mov16 a0, a1
675 ; CHECK-NEXT: rts16
676 ;
677 ; GENERIC-LABEL: selectC_eq_i8:
678 ; GENERIC: # %bb.0: # %entry
679 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
680 ; GENERIC-NEXT: subi16 sp, sp, 4
681 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
682 ; GENERIC-NEXT: btsti16 a0, 0
683 ; GENERIC-NEXT: bt16 .LBB17_2
684 ; GENERIC-NEXT: # %bb.1: # %entry
685 ; GENERIC-NEXT: mov16 a2, a1
686 ; GENERIC-NEXT: .LBB17_2: # %entry
687 ; GENERIC-NEXT: mov16 a0, a2
688 ; GENERIC-NEXT: addi16 sp, sp, 4
689 ; GENERIC-NEXT: rts16
690 entry:
691 %ret = select i1 %c, i8 %m, i8 %n
692 ret i8 %ret
693 }
696 define i1 @selectRR_eq_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
697 ; CHECK-LABEL: selectRR_eq_i1:
698 ; CHECK: # %bb.0: # %entry
699 ; CHECK-NEXT: xor16 a0, a1
700 ; CHECK-NEXT: btsti16 a0, 0
701 ; CHECK-NEXT: movt32 a3, a2
702 ; CHECK-NEXT: mov16 a0, a3
703 ; CHECK-NEXT: rts16
704 ;
705 ; GENERIC-LABEL: selectRR_eq_i1:
706 ; GENERIC: # %bb.0: # %entry
707 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
708 ; GENERIC-NEXT: subi16 sp, sp, 4
709 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
710 ; GENERIC-NEXT: xor16 a0, a1
711 ; GENERIC-NEXT: btsti16 a0, 0
712 ; GENERIC-NEXT: bt16 .LBB18_2
713 ; GENERIC-NEXT: # %bb.1: # %entry
714 ; GENERIC-NEXT: mov16 a2, a3
715 ; GENERIC-NEXT: .LBB18_2: # %entry
716 ; GENERIC-NEXT: mov16 a0, a2
717 ; GENERIC-NEXT: addi16 sp, sp, 4
718 ; GENERIC-NEXT: rts16
719 entry:
720 %icmp = icmp eq i1 %y, %x
721 %ret = select i1 %icmp, i1 %m, i1 %n
722 ret i1 %ret
723 }
725 define i1 @selectRI_eq_i1(i1 %x, i1 %n, i1 %m) {
726 ; CHECK-LABEL: selectRI_eq_i1:
727 ; CHECK: # %bb.0: # %entry
728 ; CHECK-NEXT: btsti16 a0, 0
729 ; CHECK-NEXT: movt32 a2, a1
730 ; CHECK-NEXT: mov16 a0, a2
731 ; CHECK-NEXT: rts16
732 ;
733 ; GENERIC-LABEL: selectRI_eq_i1:
734 ; GENERIC: # %bb.0: # %entry
735 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
736 ; GENERIC-NEXT: subi16 sp, sp, 4
737 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
738 ; GENERIC-NEXT: btsti16 a0, 0
739 ; GENERIC-NEXT: bt16 .LBB19_2
740 ; GENERIC-NEXT: # %bb.1: # %entry
741 ; GENERIC-NEXT: mov16 a1, a2
742 ; GENERIC-NEXT: .LBB19_2: # %entry
743 ; GENERIC-NEXT: mov16 a0, a1
744 ; GENERIC-NEXT: addi16 sp, sp, 4
745 ; GENERIC-NEXT: rts16
746 entry:
747 %icmp = icmp eq i1 %x, 10
748 %ret = select i1 %icmp, i1 %m, i1 %n
749 ret i1 %ret
750 }
752 define i1 @selectRX_eq_i1(i1 %x, i1 %n, i1 %m) {
753 ; CHECK-LABEL: selectRX_eq_i1:
754 ; CHECK: # %bb.0: # %entry
755 ; CHECK-NEXT: btsti16 a0, 0
756 ; CHECK-NEXT: movt32 a1, a2
757 ; CHECK-NEXT: mov16 a0, a1
758 ; CHECK-NEXT: rts16
759 ;
760 ; GENERIC-LABEL: selectRX_eq_i1:
761 ; GENERIC: # %bb.0: # %entry
762 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
763 ; GENERIC-NEXT: subi16 sp, sp, 4
764 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
765 ; GENERIC-NEXT: btsti16 a0, 0
766 ; GENERIC-NEXT: bt16 .LBB20_2
767 ; GENERIC-NEXT: # %bb.1: # %entry
768 ; GENERIC-NEXT: mov16 a2, a1
769 ; GENERIC-NEXT: .LBB20_2: # %entry
770 ; GENERIC-NEXT: mov16 a0, a2
771 ; GENERIC-NEXT: addi16 sp, sp, 4
772 ; GENERIC-NEXT: rts16
773 entry:
774 %icmp = icmp eq i1 %x, 47777777
775 %ret = select i1 %icmp, i1 %m, i1 %n
776 ret i1 %ret
777 }
779 define i1 @selectC_eq_i1(i1 %c, i1 %n, i1 %m) {
780 ; CHECK-LABEL: selectC_eq_i1:
781 ; CHECK: # %bb.0: # %entry
782 ; CHECK-NEXT: btsti16 a0, 0
783 ; CHECK-NEXT: movt32 a1, a2
784 ; CHECK-NEXT: mov16 a0, a1
785 ; CHECK-NEXT: rts16
786 ;
787 ; GENERIC-LABEL: selectC_eq_i1:
788 ; GENERIC: # %bb.0: # %entry
789 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
790 ; GENERIC-NEXT: subi16 sp, sp, 4
791 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
792 ; GENERIC-NEXT: btsti16 a0, 0
793 ; GENERIC-NEXT: bt16 .LBB21_2
794 ; GENERIC-NEXT: # %bb.1: # %entry
795 ; GENERIC-NEXT: mov16 a2, a1
796 ; GENERIC-NEXT: .LBB21_2: # %entry
797 ; GENERIC-NEXT: mov16 a0, a2
798 ; GENERIC-NEXT: addi16 sp, sp, 4
799 ; GENERIC-NEXT: rts16
800 entry:
801 %ret = select i1 %c, i1 %m, i1 %n
802 ret i1 %ret
803 }
806 define i32 @selectRR_ne_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
807 ; CHECK-LABEL: selectRR_ne_i32:
808 ; CHECK: # %bb.0: # %entry
809 ; CHECK-NEXT: cmpne16 a1, a0
810 ; CHECK-NEXT: movt32 a2, a3
811 ; CHECK-NEXT: mov16 a0, a2
812 ; CHECK-NEXT: rts16
813 ;
814 ; GENERIC-LABEL: selectRR_ne_i32:
815 ; GENERIC: # %bb.0: # %entry
816 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
817 ; GENERIC-NEXT: subi16 sp, sp, 4
818 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
819 ; GENERIC-NEXT: cmpne16 a1, a0
820 ; GENERIC-NEXT: mvcv16 a0
821 ; GENERIC-NEXT: movi16 a1, 1
822 ; GENERIC-NEXT: subu16 a1, a0
823 ; GENERIC-NEXT: btsti16 a1, 0
824 ; GENERIC-NEXT: bt16 .LBB22_2
825 ; GENERIC-NEXT: # %bb.1: # %entry
826 ; GENERIC-NEXT: mov16 a3, a2
827 ; GENERIC-NEXT: .LBB22_2: # %entry
828 ; GENERIC-NEXT: mov16 a0, a3
829 ; GENERIC-NEXT: addi16 sp, sp, 4
830 ; GENERIC-NEXT: rts16
831 entry:
832 %icmp = icmp ne i32 %y, %x
833 %ret = select i1 %icmp, i32 %m, i32 %n
834 ret i32 %ret
835 }
837 define i32 @selectRI_ne_i32(i32 %x, i32 %n, i32 %m) {
838 ; CHECK-LABEL: selectRI_ne_i32:
839 ; CHECK: # %bb.0: # %entry
840 ; CHECK-NEXT: cmpnei16 a0, 10
841 ; CHECK-NEXT: movt32 a1, a2
842 ; CHECK-NEXT: mov16 a0, a1
843 ; CHECK-NEXT: rts16
844 ;
845 ; GENERIC-LABEL: selectRI_ne_i32:
846 ; GENERIC: # %bb.0: # %entry
847 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
848 ; GENERIC-NEXT: subi16 sp, sp, 4
849 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
850 ; GENERIC-NEXT: cmpnei16 a0, 10
851 ; GENERIC-NEXT: mvcv16 a0
852 ; GENERIC-NEXT: movi16 a3, 1
853 ; GENERIC-NEXT: subu16 a3, a0
854 ; GENERIC-NEXT: btsti16 a3, 0
855 ; GENERIC-NEXT: bt16 .LBB23_2
856 ; GENERIC-NEXT: # %bb.1: # %entry
857 ; GENERIC-NEXT: mov16 a2, a1
858 ; GENERIC-NEXT: .LBB23_2: # %entry
859 ; GENERIC-NEXT: mov16 a0, a2
860 ; GENERIC-NEXT: addi16 sp, sp, 4
861 ; GENERIC-NEXT: rts16
862 entry:
863 %icmp = icmp ne i32 %x, 10
864 %ret = select i1 %icmp, i32 %m, i32 %n
865 ret i32 %ret
866 }
868 define i32 @selectRX_ne_i32(i32 %x, i32 %n, i32 %m) {
869 ; CHECK-LABEL: selectRX_ne_i32:
870 ; CHECK: # %bb.0: # %entry
871 ; CHECK-NEXT: movih32 a3, 729
872 ; CHECK-NEXT: ori32 a3, a3, 2033
873 ; CHECK-NEXT: cmpne16 a0, a3
874 ; CHECK-NEXT: movt32 a1, a2
875 ; CHECK-NEXT: mov16 a0, a1
876 ; CHECK-NEXT: rts16
877 ;
878 ; GENERIC-LABEL: selectRX_ne_i32:
879 ; GENERIC: # %bb.0: # %entry
880 ; GENERIC-NEXT: subi16 sp, sp, 4
881 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
882 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
883 ; GENERIC-NEXT: .cfi_offset l0, -4
884 ; GENERIC-NEXT: subi16 sp, sp, 4
885 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
886 ; GENERIC-NEXT: movi16 a3, 2
887 ; GENERIC-NEXT: lsli16 a3, a3, 24
888 ; GENERIC-NEXT: movi16 l0, 217
889 ; GENERIC-NEXT: lsli16 l0, l0, 16
890 ; GENERIC-NEXT: or16 l0, a3
891 ; GENERIC-NEXT: movi16 a3, 7
892 ; GENERIC-NEXT: lsli16 a3, a3, 8
893 ; GENERIC-NEXT: or16 a3, l0
894 ; GENERIC-NEXT: movi16 l0, 241
895 ; GENERIC-NEXT: or16 l0, a3
896 ; GENERIC-NEXT: cmpne16 a0, l0
897 ; GENERIC-NEXT: mvcv16 a0
898 ; GENERIC-NEXT: movi16 a3, 1
899 ; GENERIC-NEXT: subu16 a3, a0
900 ; GENERIC-NEXT: btsti16 a3, 0
901 ; GENERIC-NEXT: bt16 .LBB24_2
902 ; GENERIC-NEXT: # %bb.1: # %entry
903 ; GENERIC-NEXT: mov16 a2, a1
904 ; GENERIC-NEXT: .LBB24_2: # %entry
905 ; GENERIC-NEXT: mov16 a0, a2
906 ; GENERIC-NEXT: addi16 sp, sp, 4
907 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
908 ; GENERIC-NEXT: addi16 sp, sp, 4
909 ; GENERIC-NEXT: rts16
910 entry:
911 %icmp = icmp ne i32 %x, 47777777
912 %ret = select i1 %icmp, i32 %m, i32 %n
913 ret i32 %ret
914 }
916 define i32 @selectC_ne_i32(i1 %c, i32 %n, i32 %m) {
917 ; CHECK-LABEL: selectC_ne_i32:
918 ; CHECK: # %bb.0: # %entry
919 ; CHECK-NEXT: btsti16 a0, 0
920 ; CHECK-NEXT: movt32 a1, a2
921 ; CHECK-NEXT: mov16 a0, a1
922 ; CHECK-NEXT: rts16
923 ;
924 ; GENERIC-LABEL: selectC_ne_i32:
925 ; GENERIC: # %bb.0: # %entry
926 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
927 ; GENERIC-NEXT: subi16 sp, sp, 4
928 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
929 ; GENERIC-NEXT: btsti16 a0, 0
930 ; GENERIC-NEXT: bt16 .LBB25_2
931 ; GENERIC-NEXT: # %bb.1: # %entry
932 ; GENERIC-NEXT: mov16 a2, a1
933 ; GENERIC-NEXT: .LBB25_2: # %entry
934 ; GENERIC-NEXT: mov16 a0, a2
935 ; GENERIC-NEXT: addi16 sp, sp, 4
936 ; GENERIC-NEXT: rts16
937 entry:
938 %ret = select i1 %c, i32 %m, i32 %n
939 ret i32 %ret
940 }
942 define i64 @selectRR_ne_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
943 ; CHECK-LABEL: selectRR_ne_i64:
944 ; CHECK: # %bb.0: # %entry
945 ; CHECK-NEXT: xor16 a1, a3
946 ; CHECK-NEXT: xor16 a0, a2
947 ; CHECK-NEXT: or16 a0, a1
948 ; CHECK-NEXT: cmpnei16 a0, 0
949 ; CHECK-NEXT: movi16 a0, 0
950 ; CHECK-NEXT: addu16 a0, sp
951 ; CHECK-NEXT: mov16 a1, a0
952 ; CHECK-NEXT: addi16 a0, sp, 8
953 ; CHECK-NEXT: movt32 a1, a0
954 ; CHECK-NEXT: ld16.w a0, (a1, 0)
955 ; CHECK-NEXT: ld16.w a1, (a1, 4)
956 ; CHECK-NEXT: rts16
957 ;
958 ; GENERIC-LABEL: selectRR_ne_i64:
959 ; GENERIC: # %bb.0: # %entry
960 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
961 ; GENERIC-NEXT: subi16 sp, sp, 4
962 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
963 ; GENERIC-NEXT: xor16 a1, a3
964 ; GENERIC-NEXT: xor16 a0, a2
965 ; GENERIC-NEXT: or16 a0, a1
966 ; GENERIC-NEXT: cmpnei16 a0, 0
967 ; GENERIC-NEXT: mvcv16 a0
968 ; GENERIC-NEXT: movi16 a1, 1
969 ; GENERIC-NEXT: subu16 a1, a0
970 ; GENERIC-NEXT: btsti16 a1, 0
971 ; GENERIC-NEXT: bt16 .LBB26_2
972 ; GENERIC-NEXT: # %bb.1: # %entry
973 ; GENERIC-NEXT: movi16 a0, 4
974 ; GENERIC-NEXT: br32 .LBB26_3
975 ; GENERIC-NEXT: .LBB26_2:
976 ; GENERIC-NEXT: movi16 a0, 12
977 ; GENERIC-NEXT: .LBB26_3: # %entry
978 ; GENERIC-NEXT: addu16 a0, sp
979 ; GENERIC-NEXT: mov16 a1, a0
980 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
981 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
982 ; GENERIC-NEXT: addi16 sp, sp, 4
983 ; GENERIC-NEXT: rts16
984 entry:
985 %icmp = icmp ne i64 %y, %x
986 %ret = select i1 %icmp, i64 %m, i64 %n
987 ret i64 %ret
988 }
990 define i64 @selectRI_ne_i64(i64 %x, i64 %n, i64 %m) {
991 ; CHECK-LABEL: selectRI_ne_i64:
992 ; CHECK: # %bb.0: # %entry
993 ; CHECK-NEXT: ld32.w t0, (sp, 4)
994 ; CHECK-NEXT: ld32.w t1, (sp, 0)
995 ; CHECK-NEXT: xori32 a0, a0, 10
996 ; CHECK-NEXT: or16 a0, a1
997 ; CHECK-NEXT: cmpnei16 a0, 0
998 ; CHECK-NEXT: movt32 a2, t1
999 ; CHECK-NEXT: movt32 a3, t0
1000 ; CHECK-NEXT: mov16 a0, a2
1001 ; CHECK-NEXT: mov16 a1, a3
1002 ; CHECK-NEXT: rts16
1003 ;
1004 ; GENERIC-LABEL: selectRI_ne_i64:
1005 ; GENERIC: # %bb.0: # %entry
1006 ; GENERIC-NEXT: subi16 sp, sp, 4
1007 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1008 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1009 ; GENERIC-NEXT: .cfi_offset l0, -4
1010 ; GENERIC-NEXT: subi16 sp, sp, 4
1011 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1012 ; GENERIC-NEXT: movi16 l0, 10
1013 ; GENERIC-NEXT: xor16 l0, a0
1014 ; GENERIC-NEXT: or16 l0, a1
1015 ; GENERIC-NEXT: cmpnei16 l0, 0
1016 ; GENERIC-NEXT: mvcv16 a1
1017 ; GENERIC-NEXT: movi16 a0, 1
1018 ; GENERIC-NEXT: subu16 a0, a1
1019 ; GENERIC-NEXT: btsti16 a0, 0
1020 ; GENERIC-NEXT: bf16 .LBB27_2
1021 ; GENERIC-NEXT: # %bb.1:
1022 ; GENERIC-NEXT: ld16.w a2, (sp, 8)
1023 ; GENERIC-NEXT: .LBB27_2: # %entry
1024 ; GENERIC-NEXT: btsti16 a0, 0
1025 ; GENERIC-NEXT: bf16 .LBB27_4
1026 ; GENERIC-NEXT: # %bb.3:
1027 ; GENERIC-NEXT: ld16.w a3, (sp, 12)
1028 ; GENERIC-NEXT: .LBB27_4: # %entry
1029 ; GENERIC-NEXT: mov16 a0, a2
1030 ; GENERIC-NEXT: mov16 a1, a3
1031 ; GENERIC-NEXT: addi16 sp, sp, 4
1032 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1033 ; GENERIC-NEXT: addi16 sp, sp, 4
1034 ; GENERIC-NEXT: rts16
1035 entry:
1036 %icmp = icmp ne i64 %x, 10
1037 %ret = select i1 %icmp, i64 %m, i64 %n
1038 ret i64 %ret
1039 }
1041 define i64 @selectRX_ne_i64(i64 %x, i64 %n, i64 %m) {
1042 ; CHECK-LABEL: selectRX_ne_i64:
1043 ; CHECK: # %bb.0: # %entry
1044 ; CHECK-NEXT: subi16 sp, sp, 4
1045 ; CHECK-NEXT: .cfi_def_cfa_offset 4
1046 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1047 ; CHECK-NEXT: .cfi_offset l0, -4
1048 ; CHECK-NEXT: .cfi_def_cfa_offset 4
1049 ; CHECK-NEXT: ld32.w t0, (sp, 8)
1050 ; CHECK-NEXT: ld32.w t1, (sp, 4)
1051 ; CHECK-NEXT: movih32 l0, 729
1052 ; CHECK-NEXT: ori32 l0, l0, 2033
1053 ; CHECK-NEXT: xor16 a0, l0
1054 ; CHECK-NEXT: or16 a0, a1
1055 ; CHECK-NEXT: cmpnei16 a0, 0
1056 ; CHECK-NEXT: movt32 a2, t1
1057 ; CHECK-NEXT: movt32 a3, t0
1058 ; CHECK-NEXT: mov16 a0, a2
1059 ; CHECK-NEXT: mov16 a1, a3
1060 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1061 ; CHECK-NEXT: addi16 sp, sp, 4
1062 ; CHECK-NEXT: rts16
1063 ;
1064 ; GENERIC-LABEL: selectRX_ne_i64:
1065 ; GENERIC: # %bb.0: # %entry
1066 ; GENERIC-NEXT: subi16 sp, sp, 8
1067 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1068 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
1069 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1070 ; GENERIC-NEXT: .cfi_offset l1, -4
1071 ; GENERIC-NEXT: .cfi_offset l0, -8
1072 ; GENERIC-NEXT: subi16 sp, sp, 4
1073 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
1074 ; GENERIC-NEXT: movi16 l0, 2
1075 ; GENERIC-NEXT: lsli16 l0, l0, 24
1076 ; GENERIC-NEXT: movi16 l1, 217
1077 ; GENERIC-NEXT: lsli16 l1, l1, 16
1078 ; GENERIC-NEXT: or16 l1, l0
1079 ; GENERIC-NEXT: movi16 l0, 7
1080 ; GENERIC-NEXT: lsli16 l0, l0, 8
1081 ; GENERIC-NEXT: or16 l0, l1
1082 ; GENERIC-NEXT: movi16 l1, 241
1083 ; GENERIC-NEXT: or16 l1, l0
1084 ; GENERIC-NEXT: xor16 l1, a0
1085 ; GENERIC-NEXT: or16 l1, a1
1086 ; GENERIC-NEXT: cmpnei16 l1, 0
1087 ; GENERIC-NEXT: mvcv16 a1
1088 ; GENERIC-NEXT: movi16 a0, 1
1089 ; GENERIC-NEXT: subu16 a0, a1
1090 ; GENERIC-NEXT: btsti16 a0, 0
1091 ; GENERIC-NEXT: bf16 .LBB28_2
1092 ; GENERIC-NEXT: # %bb.1:
1093 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
1094 ; GENERIC-NEXT: .LBB28_2: # %entry
1095 ; GENERIC-NEXT: btsti16 a0, 0
1096 ; GENERIC-NEXT: bf16 .LBB28_4
1097 ; GENERIC-NEXT: # %bb.3:
1098 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
1099 ; GENERIC-NEXT: .LBB28_4: # %entry
1100 ; GENERIC-NEXT: mov16 a0, a2
1101 ; GENERIC-NEXT: mov16 a1, a3
1102 ; GENERIC-NEXT: addi16 sp, sp, 4
1103 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1104 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
1105 ; GENERIC-NEXT: addi16 sp, sp, 8
1106 ; GENERIC-NEXT: rts16
1107 entry:
1108 %icmp = icmp ne i64 %x, 47777777
1109 %ret = select i1 %icmp, i64 %m, i64 %n
1110 ret i64 %ret
1111 }
1113 define i64 @selectC_ne_i64(i1 %c, i64 %n, i64 %m) {
1114 ; CHECK-LABEL: selectC_ne_i64:
1115 ; CHECK: # %bb.0: # %entry
1116 ; CHECK-NEXT: ld32.w t0, (sp, 0)
1117 ; CHECK-NEXT: btsti16 a0, 0
1118 ; CHECK-NEXT: movt32 a1, a3
1119 ; CHECK-NEXT: movt32 a2, t0
1120 ; CHECK-NEXT: mov16 a0, a1
1121 ; CHECK-NEXT: mov16 a1, a2
1122 ; CHECK-NEXT: rts16
1123 ;
1124 ; GENERIC-LABEL: selectC_ne_i64:
1125 ; GENERIC: # %bb.0: # %entry
1126 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1127 ; GENERIC-NEXT: subi16 sp, sp, 4
1128 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1129 ; GENERIC-NEXT: btsti16 a0, 0
1130 ; GENERIC-NEXT: bt16 .LBB29_2
1131 ; GENERIC-NEXT: # %bb.1: # %entry
1132 ; GENERIC-NEXT: mov16 a3, a1
1133 ; GENERIC-NEXT: .LBB29_2: # %entry
1134 ; GENERIC-NEXT: btsti16 a0, 0
1135 ; GENERIC-NEXT: bf16 .LBB29_4
1136 ; GENERIC-NEXT: # %bb.3:
1137 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
1138 ; GENERIC-NEXT: .LBB29_4: # %entry
1139 ; GENERIC-NEXT: mov16 a0, a3
1140 ; GENERIC-NEXT: mov16 a1, a2
1141 ; GENERIC-NEXT: addi16 sp, sp, 4
1142 ; GENERIC-NEXT: rts16
1143 entry:
1144 %ret = select i1 %c, i64 %m, i64 %n
1145 ret i64 %ret
1146 }
1149 define i16 @selectRR_ne_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
1150 ; CHECK-LABEL: selectRR_ne_i16:
1151 ; CHECK: # %bb.0: # %entry
1152 ; CHECK-NEXT: zexth16 a0, a0
1153 ; CHECK-NEXT: zexth16 a1, a1
1154 ; CHECK-NEXT: cmpne16 a1, a0
1155 ; CHECK-NEXT: movt32 a2, a3
1156 ; CHECK-NEXT: mov16 a0, a2
1157 ; CHECK-NEXT: rts16
1158 ;
1159 ; GENERIC-LABEL: selectRR_ne_i16:
1160 ; GENERIC: # %bb.0: # %entry
1161 ; GENERIC-NEXT: subi16 sp, sp, 12
1162 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
1163 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
1164 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
1165 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1166 ; GENERIC-NEXT: .cfi_offset l2, -4
1167 ; GENERIC-NEXT: .cfi_offset l1, -8
1168 ; GENERIC-NEXT: .cfi_offset l0, -12
1169 ; GENERIC-NEXT: subi16 sp, sp, 4
1170 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
1171 ; GENERIC-NEXT: movi16 l0, 0
1172 ; GENERIC-NEXT: lsli16 l1, l0, 24
1173 ; GENERIC-NEXT: lsli16 l0, l0, 16
1174 ; GENERIC-NEXT: or16 l0, l1
1175 ; GENERIC-NEXT: movi16 l1, 255
1176 ; GENERIC-NEXT: lsli16 l2, l1, 8
1177 ; GENERIC-NEXT: or16 l2, l0
1178 ; GENERIC-NEXT: or16 l2, l1
1179 ; GENERIC-NEXT: and16 a0, l2
1180 ; GENERIC-NEXT: and16 l2, a1
1181 ; GENERIC-NEXT: cmpne16 l2, a0
1182 ; GENERIC-NEXT: mvcv16 a0
1183 ; GENERIC-NEXT: movi16 a1, 1
1184 ; GENERIC-NEXT: subu16 a1, a0
1185 ; GENERIC-NEXT: btsti16 a1, 0
1186 ; GENERIC-NEXT: bt16 .LBB30_2
1187 ; GENERIC-NEXT: # %bb.1: # %entry
1188 ; GENERIC-NEXT: mov16 a3, a2
1189 ; GENERIC-NEXT: .LBB30_2: # %entry
1190 ; GENERIC-NEXT: mov16 a0, a3
1191 ; GENERIC-NEXT: addi16 sp, sp, 4
1192 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1193 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
1194 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
1195 ; GENERIC-NEXT: addi16 sp, sp, 12
1196 ; GENERIC-NEXT: rts16
1197 entry:
1198 %icmp = icmp ne i16 %y, %x
1199 %ret = select i1 %icmp, i16 %m, i16 %n
1200 ret i16 %ret
1201 }
1203 define i16 @selectRI_ne_i16(i16 %x, i16 %n, i16 %m) {
1204 ; CHECK-LABEL: selectRI_ne_i16:
1205 ; CHECK: # %bb.0: # %entry
1206 ; CHECK-NEXT: zexth16 a0, a0
1207 ; CHECK-NEXT: cmpnei16 a0, 10
1208 ; CHECK-NEXT: movt32 a1, a2
1209 ; CHECK-NEXT: mov16 a0, a1
1210 ; CHECK-NEXT: rts16
1211 ;
1212 ; GENERIC-LABEL: selectRI_ne_i16:
1213 ; GENERIC: # %bb.0: # %entry
1214 ; GENERIC-NEXT: subi16 sp, sp, 8
1215 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1216 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
1217 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1218 ; GENERIC-NEXT: .cfi_offset l1, -4
1219 ; GENERIC-NEXT: .cfi_offset l0, -8
1220 ; GENERIC-NEXT: subi16 sp, sp, 4
1221 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
1222 ; GENERIC-NEXT: movi16 a3, 0
1223 ; GENERIC-NEXT: lsli16 l0, a3, 24
1224 ; GENERIC-NEXT: lsli16 a3, a3, 16
1225 ; GENERIC-NEXT: or16 a3, l0
1226 ; GENERIC-NEXT: movi16 l0, 255
1227 ; GENERIC-NEXT: lsli16 l1, l0, 8
1228 ; GENERIC-NEXT: or16 l1, a3
1229 ; GENERIC-NEXT: or16 l1, l0
1230 ; GENERIC-NEXT: and16 l1, a0
1231 ; GENERIC-NEXT: cmpnei16 l1, 10
1232 ; GENERIC-NEXT: mvcv16 a0
1233 ; GENERIC-NEXT: movi16 a3, 1
1234 ; GENERIC-NEXT: subu16 a3, a0
1235 ; GENERIC-NEXT: btsti16 a3, 0
1236 ; GENERIC-NEXT: bt16 .LBB31_2
1237 ; GENERIC-NEXT: # %bb.1: # %entry
1238 ; GENERIC-NEXT: mov16 a2, a1
1239 ; GENERIC-NEXT: .LBB31_2: # %entry
1240 ; GENERIC-NEXT: mov16 a0, a2
1241 ; GENERIC-NEXT: addi16 sp, sp, 4
1242 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1243 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
1244 ; GENERIC-NEXT: addi16 sp, sp, 8
1245 ; GENERIC-NEXT: rts16
1246 entry:
1247 %icmp = icmp ne i16 %x, 10
1248 %ret = select i1 %icmp, i16 %m, i16 %n
1249 ret i16 %ret
1250 }
1252 define i16 @selectRX_ne_i16(i16 %x, i16 %n, i16 %m) {
1253 ; CHECK-LABEL: selectRX_ne_i16:
1254 ; CHECK: # %bb.0: # %entry
1255 ; CHECK-NEXT: zexth16 a0, a0
1256 ; CHECK-NEXT: cmpnei32 a0, 2033
1257 ; CHECK-NEXT: movt32 a1, a2
1258 ; CHECK-NEXT: mov16 a0, a1
1259 ; CHECK-NEXT: rts16
1260 ;
1261 ; GENERIC-LABEL: selectRX_ne_i16:
1262 ; GENERIC: # %bb.0: # %entry
1263 ; GENERIC-NEXT: subi16 sp, sp, 8
1264 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1265 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
1266 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1267 ; GENERIC-NEXT: .cfi_offset l1, -4
1268 ; GENERIC-NEXT: .cfi_offset l0, -8
1269 ; GENERIC-NEXT: subi16 sp, sp, 4
1270 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
1271 ; GENERIC-NEXT: movi16 a3, 0
1272 ; GENERIC-NEXT: lsli16 l0, a3, 24
1273 ; GENERIC-NEXT: lsli16 a3, a3, 16
1274 ; GENERIC-NEXT: or16 a3, l0
1275 ; GENERIC-NEXT: movi16 l0, 255
1276 ; GENERIC-NEXT: lsli16 l1, l0, 8
1277 ; GENERIC-NEXT: or16 l1, a3
1278 ; GENERIC-NEXT: or16 l1, l0
1279 ; GENERIC-NEXT: and16 l1, a0
1280 ; GENERIC-NEXT: movi16 a0, 7
1281 ; GENERIC-NEXT: lsli16 a0, a0, 8
1282 ; GENERIC-NEXT: or16 a0, a3
1283 ; GENERIC-NEXT: movi16 a3, 241
1284 ; GENERIC-NEXT: or16 a3, a0
1285 ; GENERIC-NEXT: cmpne16 l1, a3
1286 ; GENERIC-NEXT: mvcv16 a0
1287 ; GENERIC-NEXT: movi16 a3, 1
1288 ; GENERIC-NEXT: subu16 a3, a0
1289 ; GENERIC-NEXT: btsti16 a3, 0
1290 ; GENERIC-NEXT: bt16 .LBB32_2
1291 ; GENERIC-NEXT: # %bb.1: # %entry
1292 ; GENERIC-NEXT: mov16 a2, a1
1293 ; GENERIC-NEXT: .LBB32_2: # %entry
1294 ; GENERIC-NEXT: mov16 a0, a2
1295 ; GENERIC-NEXT: addi16 sp, sp, 4
1296 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1297 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
1298 ; GENERIC-NEXT: addi16 sp, sp, 8
1299 ; GENERIC-NEXT: rts16
1300 entry:
1301 %icmp = icmp ne i16 %x, 47777777
1302 %ret = select i1 %icmp, i16 %m, i16 %n
1303 ret i16 %ret
1304 }
1306 define i16 @selectC_ne_i16(i1 %c, i16 %n, i16 %m) {
1307 ; CHECK-LABEL: selectC_ne_i16:
1308 ; CHECK: # %bb.0: # %entry
1309 ; CHECK-NEXT: btsti16 a0, 0
1310 ; CHECK-NEXT: movt32 a1, a2
1311 ; CHECK-NEXT: mov16 a0, a1
1312 ; CHECK-NEXT: rts16
1313 ;
1314 ; GENERIC-LABEL: selectC_ne_i16:
1315 ; GENERIC: # %bb.0: # %entry
1316 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1317 ; GENERIC-NEXT: subi16 sp, sp, 4
1318 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1319 ; GENERIC-NEXT: btsti16 a0, 0
1320 ; GENERIC-NEXT: bt16 .LBB33_2
1321 ; GENERIC-NEXT: # %bb.1: # %entry
1322 ; GENERIC-NEXT: mov16 a2, a1
1323 ; GENERIC-NEXT: .LBB33_2: # %entry
1324 ; GENERIC-NEXT: mov16 a0, a2
1325 ; GENERIC-NEXT: addi16 sp, sp, 4
1326 ; GENERIC-NEXT: rts16
1327 entry:
1328 %ret = select i1 %c, i16 %m, i16 %n
1329 ret i16 %ret
1330 }
1333 define i8 @selectRR_ne_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
1334 ; CHECK-LABEL: selectRR_ne_i8:
1335 ; CHECK: # %bb.0: # %entry
1336 ; CHECK-NEXT: zextb16 a0, a0
1337 ; CHECK-NEXT: zextb16 a1, a1
1338 ; CHECK-NEXT: cmpne16 a1, a0
1339 ; CHECK-NEXT: movt32 a2, a3
1340 ; CHECK-NEXT: mov16 a0, a2
1341 ; CHECK-NEXT: rts16
1342 ;
1343 ; GENERIC-LABEL: selectRR_ne_i8:
1344 ; GENERIC: # %bb.0: # %entry
1345 ; GENERIC-NEXT: subi16 sp, sp, 4
1346 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1347 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1348 ; GENERIC-NEXT: .cfi_offset l0, -4
1349 ; GENERIC-NEXT: subi16 sp, sp, 4
1350 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1351 ; GENERIC-NEXT: movi16 l0, 255
1352 ; GENERIC-NEXT: and16 a0, l0
1353 ; GENERIC-NEXT: and16 a1, l0
1354 ; GENERIC-NEXT: cmpne16 a1, a0
1355 ; GENERIC-NEXT: mvcv16 a0
1356 ; GENERIC-NEXT: movi16 a1, 1
1357 ; GENERIC-NEXT: subu16 a1, a0
1358 ; GENERIC-NEXT: btsti16 a1, 0
1359 ; GENERIC-NEXT: bt16 .LBB34_2
1360 ; GENERIC-NEXT: # %bb.1: # %entry
1361 ; GENERIC-NEXT: mov16 a3, a2
1362 ; GENERIC-NEXT: .LBB34_2: # %entry
1363 ; GENERIC-NEXT: mov16 a0, a3
1364 ; GENERIC-NEXT: addi16 sp, sp, 4
1365 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1366 ; GENERIC-NEXT: addi16 sp, sp, 4
1367 ; GENERIC-NEXT: rts16
1368 entry:
1369 %icmp = icmp ne i8 %y, %x
1370 %ret = select i1 %icmp, i8 %m, i8 %n
1371 ret i8 %ret
1372 }
1374 define i8 @selectRI_ne_i8(i8 %x, i8 %n, i8 %m) {
1375 ; CHECK-LABEL: selectRI_ne_i8:
1376 ; CHECK: # %bb.0: # %entry
1377 ; CHECK-NEXT: zextb16 a0, a0
1378 ; CHECK-NEXT: cmpnei16 a0, 10
1379 ; CHECK-NEXT: movt32 a1, a2
1380 ; CHECK-NEXT: mov16 a0, a1
1381 ; CHECK-NEXT: rts16
1382 ;
1383 ; GENERIC-LABEL: selectRI_ne_i8:
1384 ; GENERIC: # %bb.0: # %entry
1385 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1386 ; GENERIC-NEXT: subi16 sp, sp, 4
1387 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1388 ; GENERIC-NEXT: movi16 a3, 255
1389 ; GENERIC-NEXT: and16 a3, a0
1390 ; GENERIC-NEXT: cmpnei16 a3, 10
1391 ; GENERIC-NEXT: mvcv16 a0
1392 ; GENERIC-NEXT: movi16 a3, 1
1393 ; GENERIC-NEXT: subu16 a3, a0
1394 ; GENERIC-NEXT: btsti16 a3, 0
1395 ; GENERIC-NEXT: bt16 .LBB35_2
1396 ; GENERIC-NEXT: # %bb.1: # %entry
1397 ; GENERIC-NEXT: mov16 a2, a1
1398 ; GENERIC-NEXT: .LBB35_2: # %entry
1399 ; GENERIC-NEXT: mov16 a0, a2
1400 ; GENERIC-NEXT: addi16 sp, sp, 4
1401 ; GENERIC-NEXT: rts16
1402 entry:
1403 %icmp = icmp ne i8 %x, 10
1404 %ret = select i1 %icmp, i8 %m, i8 %n
1405 ret i8 %ret
1406 }
1408 define i8 @selectRX_ne_i8(i8 %x, i8 %n, i8 %m) {
1409 ; CHECK-LABEL: selectRX_ne_i8:
1410 ; CHECK: # %bb.0: # %entry
1411 ; CHECK-NEXT: zextb16 a0, a0
1412 ; CHECK-NEXT: cmpnei32 a0, 241
1413 ; CHECK-NEXT: movt32 a1, a2
1414 ; CHECK-NEXT: mov16 a0, a1
1415 ; CHECK-NEXT: rts16
1416 ;
1417 ; GENERIC-LABEL: selectRX_ne_i8:
1418 ; GENERIC: # %bb.0: # %entry
1419 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1420 ; GENERIC-NEXT: subi16 sp, sp, 4
1421 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1422 ; GENERIC-NEXT: movi16 a3, 255
1423 ; GENERIC-NEXT: and16 a3, a0
1424 ; GENERIC-NEXT: movi16 a0, 241
1425 ; GENERIC-NEXT: cmpne16 a3, a0
1426 ; GENERIC-NEXT: mvcv16 a0
1427 ; GENERIC-NEXT: movi16 a3, 1
1428 ; GENERIC-NEXT: subu16 a3, a0
1429 ; GENERIC-NEXT: btsti16 a3, 0
1430 ; GENERIC-NEXT: bt16 .LBB36_2
1431 ; GENERIC-NEXT: # %bb.1: # %entry
1432 ; GENERIC-NEXT: mov16 a2, a1
1433 ; GENERIC-NEXT: .LBB36_2: # %entry
1434 ; GENERIC-NEXT: mov16 a0, a2
1435 ; GENERIC-NEXT: addi16 sp, sp, 4
1436 ; GENERIC-NEXT: rts16
1437 entry:
1438 %icmp = icmp ne i8 %x, 47777777
1439 %ret = select i1 %icmp, i8 %m, i8 %n
1440 ret i8 %ret
1441 }
1443 define i8 @selectC_ne_i8(i1 %c, i8 %n, i8 %m) {
1444 ; CHECK-LABEL: selectC_ne_i8:
1445 ; CHECK: # %bb.0: # %entry
1446 ; CHECK-NEXT: btsti16 a0, 0
1447 ; CHECK-NEXT: movt32 a1, a2
1448 ; CHECK-NEXT: mov16 a0, a1
1449 ; CHECK-NEXT: rts16
1450 ;
1451 ; GENERIC-LABEL: selectC_ne_i8:
1452 ; GENERIC: # %bb.0: # %entry
1453 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1454 ; GENERIC-NEXT: subi16 sp, sp, 4
1455 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1456 ; GENERIC-NEXT: btsti16 a0, 0
1457 ; GENERIC-NEXT: bt16 .LBB37_2
1458 ; GENERIC-NEXT: # %bb.1: # %entry
1459 ; GENERIC-NEXT: mov16 a2, a1
1460 ; GENERIC-NEXT: .LBB37_2: # %entry
1461 ; GENERIC-NEXT: mov16 a0, a2
1462 ; GENERIC-NEXT: addi16 sp, sp, 4
1463 ; GENERIC-NEXT: rts16
1464 entry:
1465 %ret = select i1 %c, i8 %m, i8 %n
1466 ret i8 %ret
1467 }
1470 define i1 @selectRR_ne_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
1471 ; CHECK-LABEL: selectRR_ne_i1:
1472 ; CHECK: # %bb.0: # %entry
1473 ; CHECK-NEXT: xor16 a0, a1
1474 ; CHECK-NEXT: btsti16 a0, 0
1475 ; CHECK-NEXT: movt32 a2, a3
1476 ; CHECK-NEXT: mov16 a0, a2
1477 ; CHECK-NEXT: rts16
1478 ;
1479 ; GENERIC-LABEL: selectRR_ne_i1:
1480 ; GENERIC: # %bb.0: # %entry
1481 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1482 ; GENERIC-NEXT: subi16 sp, sp, 4
1483 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1484 ; GENERIC-NEXT: xor16 a0, a1
1485 ; GENERIC-NEXT: btsti16 a0, 0
1486 ; GENERIC-NEXT: bt16 .LBB38_2
1487 ; GENERIC-NEXT: # %bb.1: # %entry
1488 ; GENERIC-NEXT: mov16 a3, a2
1489 ; GENERIC-NEXT: .LBB38_2: # %entry
1490 ; GENERIC-NEXT: mov16 a0, a3
1491 ; GENERIC-NEXT: addi16 sp, sp, 4
1492 ; GENERIC-NEXT: rts16
1493 entry:
1494 %icmp = icmp ne i1 %y, %x
1495 %ret = select i1 %icmp, i1 %m, i1 %n
1496 ret i1 %ret
1497 }
1499 define i1 @selectRI_ne_i1(i1 %x, i1 %n, i1 %m) {
1500 ; CHECK-LABEL: selectRI_ne_i1:
1501 ; CHECK: # %bb.0: # %entry
1502 ; CHECK-NEXT: btsti16 a0, 0
1503 ; CHECK-NEXT: movt32 a1, a2
1504 ; CHECK-NEXT: mov16 a0, a1
1505 ; CHECK-NEXT: rts16
1506 ;
1507 ; GENERIC-LABEL: selectRI_ne_i1:
1508 ; GENERIC: # %bb.0: # %entry
1509 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1510 ; GENERIC-NEXT: subi16 sp, sp, 4
1511 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1512 ; GENERIC-NEXT: btsti16 a0, 0
1513 ; GENERIC-NEXT: bt16 .LBB39_2
1514 ; GENERIC-NEXT: # %bb.1: # %entry
1515 ; GENERIC-NEXT: mov16 a2, a1
1516 ; GENERIC-NEXT: .LBB39_2: # %entry
1517 ; GENERIC-NEXT: mov16 a0, a2
1518 ; GENERIC-NEXT: addi16 sp, sp, 4
1519 ; GENERIC-NEXT: rts16
1520 entry:
1521 %icmp = icmp ne i1 %x, 10
1522 %ret = select i1 %icmp, i1 %m, i1 %n
1523 ret i1 %ret
1524 }
1526 define i1 @selectRX_ne_i1(i1 %x, i1 %n, i1 %m) {
1527 ; CHECK-LABEL: selectRX_ne_i1:
1528 ; CHECK: # %bb.0: # %entry
1529 ; CHECK-NEXT: btsti16 a0, 0
1530 ; CHECK-NEXT: movt32 a2, a1
1531 ; CHECK-NEXT: mov16 a0, a2
1532 ; CHECK-NEXT: rts16
1533 ;
1534 ; GENERIC-LABEL: selectRX_ne_i1:
1535 ; GENERIC: # %bb.0: # %entry
1536 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1537 ; GENERIC-NEXT: subi16 sp, sp, 4
1538 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1539 ; GENERIC-NEXT: btsti16 a0, 0
1540 ; GENERIC-NEXT: bt16 .LBB40_2
1541 ; GENERIC-NEXT: # %bb.1: # %entry
1542 ; GENERIC-NEXT: mov16 a1, a2
1543 ; GENERIC-NEXT: .LBB40_2: # %entry
1544 ; GENERIC-NEXT: mov16 a0, a1
1545 ; GENERIC-NEXT: addi16 sp, sp, 4
1546 ; GENERIC-NEXT: rts16
1547 entry:
1548 %icmp = icmp ne i1 %x, 47777777
1549 %ret = select i1 %icmp, i1 %m, i1 %n
1550 ret i1 %ret
1551 }
1553 define i1 @selectC_ne_i1(i1 %c, i1 %n, i1 %m) {
1554 ; CHECK-LABEL: selectC_ne_i1:
1555 ; CHECK: # %bb.0: # %entry
1556 ; CHECK-NEXT: btsti16 a0, 0
1557 ; CHECK-NEXT: movt32 a1, a2
1558 ; CHECK-NEXT: mov16 a0, a1
1559 ; CHECK-NEXT: rts16
1560 ;
1561 ; GENERIC-LABEL: selectC_ne_i1:
1562 ; GENERIC: # %bb.0: # %entry
1563 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1564 ; GENERIC-NEXT: subi16 sp, sp, 4
1565 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1566 ; GENERIC-NEXT: btsti16 a0, 0
1567 ; GENERIC-NEXT: bt16 .LBB41_2
1568 ; GENERIC-NEXT: # %bb.1: # %entry
1569 ; GENERIC-NEXT: mov16 a2, a1
1570 ; GENERIC-NEXT: .LBB41_2: # %entry
1571 ; GENERIC-NEXT: mov16 a0, a2
1572 ; GENERIC-NEXT: addi16 sp, sp, 4
1573 ; GENERIC-NEXT: rts16
1574 entry:
1575 %ret = select i1 %c, i1 %m, i1 %n
1576 ret i1 %ret
1577 }
1580 define i32 @selectRR_ugt_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
1581 ; CHECK-LABEL: selectRR_ugt_i32:
1582 ; CHECK: # %bb.0: # %entry
1583 ; CHECK-NEXT: cmphs16 a0, a1
1584 ; CHECK-NEXT: movf32 a2, a3
1585 ; CHECK-NEXT: mov16 a0, a2
1586 ; CHECK-NEXT: rts16
1587 ;
1588 ; GENERIC-LABEL: selectRR_ugt_i32:
1589 ; GENERIC: # %bb.0: # %entry
1590 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1591 ; GENERIC-NEXT: subi16 sp, sp, 4
1592 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1593 ; GENERIC-NEXT: cmphs16 a0, a1
1594 ; GENERIC-NEXT: mvcv16 a0
1595 ; GENERIC-NEXT: btsti16 a0, 0
1596 ; GENERIC-NEXT: bt16 .LBB42_2
1597 ; GENERIC-NEXT: # %bb.1: # %entry
1598 ; GENERIC-NEXT: mov16 a3, a2
1599 ; GENERIC-NEXT: .LBB42_2: # %entry
1600 ; GENERIC-NEXT: mov16 a0, a3
1601 ; GENERIC-NEXT: addi16 sp, sp, 4
1602 ; GENERIC-NEXT: rts16
1603 entry:
1604 %icmp = icmp ugt i32 %y, %x
1605 %ret = select i1 %icmp, i32 %m, i32 %n
1606 ret i32 %ret
1607 }
1609 define i32 @selectRI_ugt_i32(i32 %x, i32 %n, i32 %m) {
1610 ; CHECK-LABEL: selectRI_ugt_i32:
1611 ; CHECK: # %bb.0: # %entry
1612 ; CHECK-NEXT: movi16 a3, 10
1613 ; CHECK-NEXT: cmphs16 a3, a0
1614 ; CHECK-NEXT: movf32 a1, a2
1615 ; CHECK-NEXT: mov16 a0, a1
1616 ; CHECK-NEXT: rts16
1617 ;
1618 ; GENERIC-LABEL: selectRI_ugt_i32:
1619 ; GENERIC: # %bb.0: # %entry
1620 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1621 ; GENERIC-NEXT: subi16 sp, sp, 4
1622 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1623 ; GENERIC-NEXT: movi16 a3, 10
1624 ; GENERIC-NEXT: cmphs16 a3, a0
1625 ; GENERIC-NEXT: mvcv16 a0
1626 ; GENERIC-NEXT: btsti16 a0, 0
1627 ; GENERIC-NEXT: bt16 .LBB43_2
1628 ; GENERIC-NEXT: # %bb.1: # %entry
1629 ; GENERIC-NEXT: mov16 a2, a1
1630 ; GENERIC-NEXT: .LBB43_2: # %entry
1631 ; GENERIC-NEXT: mov16 a0, a2
1632 ; GENERIC-NEXT: addi16 sp, sp, 4
1633 ; GENERIC-NEXT: rts16
1634 entry:
1635 %icmp = icmp ugt i32 %x, 10
1636 %ret = select i1 %icmp, i32 %m, i32 %n
1637 ret i32 %ret
1638 }
1640 define i32 @selectRX_ugt_i32(i32 %x, i32 %n, i32 %m) {
1641 ; CHECK-LABEL: selectRX_ugt_i32:
1642 ; CHECK: # %bb.0: # %entry
1643 ; CHECK-NEXT: movih32 a3, 729
1644 ; CHECK-NEXT: ori32 a3, a3, 2033
1645 ; CHECK-NEXT: cmphs16 a3, a0
1646 ; CHECK-NEXT: movf32 a1, a2
1647 ; CHECK-NEXT: mov16 a0, a1
1648 ; CHECK-NEXT: rts16
1649 ;
1650 ; GENERIC-LABEL: selectRX_ugt_i32:
1651 ; GENERIC: # %bb.0: # %entry
1652 ; GENERIC-NEXT: subi16 sp, sp, 4
1653 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1654 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1655 ; GENERIC-NEXT: .cfi_offset l0, -4
1656 ; GENERIC-NEXT: subi16 sp, sp, 4
1657 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1658 ; GENERIC-NEXT: movi16 a3, 2
1659 ; GENERIC-NEXT: lsli16 a3, a3, 24
1660 ; GENERIC-NEXT: movi16 l0, 217
1661 ; GENERIC-NEXT: lsli16 l0, l0, 16
1662 ; GENERIC-NEXT: or16 l0, a3
1663 ; GENERIC-NEXT: movi16 a3, 7
1664 ; GENERIC-NEXT: lsli16 a3, a3, 8
1665 ; GENERIC-NEXT: or16 a3, l0
1666 ; GENERIC-NEXT: movi16 l0, 241
1667 ; GENERIC-NEXT: or16 l0, a3
1668 ; GENERIC-NEXT: cmphs16 l0, a0
1669 ; GENERIC-NEXT: mvcv16 a0
1670 ; GENERIC-NEXT: btsti16 a0, 0
1671 ; GENERIC-NEXT: bt16 .LBB44_2
1672 ; GENERIC-NEXT: # %bb.1: # %entry
1673 ; GENERIC-NEXT: mov16 a2, a1
1674 ; GENERIC-NEXT: .LBB44_2: # %entry
1675 ; GENERIC-NEXT: mov16 a0, a2
1676 ; GENERIC-NEXT: addi16 sp, sp, 4
1677 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1678 ; GENERIC-NEXT: addi16 sp, sp, 4
1679 ; GENERIC-NEXT: rts16
1680 entry:
1681 %icmp = icmp ugt i32 %x, 47777777
1682 %ret = select i1 %icmp, i32 %m, i32 %n
1683 ret i32 %ret
1684 }
1686 define i32 @selectC_ugt_i32(i1 %c, i32 %n, i32 %m) {
1687 ; CHECK-LABEL: selectC_ugt_i32:
1688 ; CHECK: # %bb.0: # %entry
1689 ; CHECK-NEXT: btsti16 a0, 0
1690 ; CHECK-NEXT: movt32 a1, a2
1691 ; CHECK-NEXT: mov16 a0, a1
1692 ; CHECK-NEXT: rts16
1693 ;
1694 ; GENERIC-LABEL: selectC_ugt_i32:
1695 ; GENERIC: # %bb.0: # %entry
1696 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1697 ; GENERIC-NEXT: subi16 sp, sp, 4
1698 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1699 ; GENERIC-NEXT: btsti16 a0, 0
1700 ; GENERIC-NEXT: bt16 .LBB45_2
1701 ; GENERIC-NEXT: # %bb.1: # %entry
1702 ; GENERIC-NEXT: mov16 a2, a1
1703 ; GENERIC-NEXT: .LBB45_2: # %entry
1704 ; GENERIC-NEXT: mov16 a0, a2
1705 ; GENERIC-NEXT: addi16 sp, sp, 4
1706 ; GENERIC-NEXT: rts16
1707 entry:
1708 %ret = select i1 %c, i32 %m, i32 %n
1709 ret i32 %ret
1710 }
1712 define i64 @selectRR_ugt_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
1713 ; CHECK-LABEL: selectRR_ugt_i64:
1714 ; CHECK: # %bb.0: # %entry
1715 ; CHECK-NEXT: .cfi_def_cfa_offset 0
1716 ; CHECK-NEXT: subi16 sp, sp, 8
1717 ; CHECK-NEXT: .cfi_def_cfa_offset 8
1718 ; CHECK-NEXT: cmpne16 a3, a1
1719 ; CHECK-NEXT: mvc32 t0
1720 ; CHECK-NEXT: st32.w t0, (sp, 4)
1721 ; CHECK-NEXT: cmphs16 a1, a3
1722 ; CHECK-NEXT: mvcv16 a1
1723 ; CHECK-NEXT: cmphs16 a0, a2
1724 ; CHECK-NEXT: mvcv16 a0
1725 ; CHECK-NEXT: ld16.w a2, (sp, 4)
1726 ; CHECK-NEXT: btsti16 a2, 0
1727 ; CHECK-NEXT: movf32 a1, a0
1728 ; CHECK-NEXT: addi16 a2, sp, 8
1729 ; CHECK-NEXT: addi16 a0, sp, 16
1730 ; CHECK-NEXT: btsti16 a1, 0
1731 ; CHECK-NEXT: movt32 a2, a0
1732 ; CHECK-NEXT: ld16.w a0, (a2, 0)
1733 ; CHECK-NEXT: ld16.w a1, (a2, 4)
1734 ; CHECK-NEXT: addi16 sp, sp, 8
1735 ; CHECK-NEXT: rts16
1736 ;
1737 ; GENERIC-LABEL: selectRR_ugt_i64:
1738 ; GENERIC: # %bb.0: # %entry
1739 ; GENERIC-NEXT: subi16 sp, sp, 4
1740 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1741 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1742 ; GENERIC-NEXT: .cfi_offset l0, -4
1743 ; GENERIC-NEXT: subi16 sp, sp, 4
1744 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1745 ; GENERIC-NEXT: cmphs16 a1, a3
1746 ; GENERIC-NEXT: mvcv16 l0
1747 ; GENERIC-NEXT: cmphs16 a0, a2
1748 ; GENERIC-NEXT: mvcv16 a0
1749 ; GENERIC-NEXT: cmpne16 a3, a1
1750 ; GENERIC-NEXT: mvcv16 a1
1751 ; GENERIC-NEXT: btsti16 a1, 0
1752 ; GENERIC-NEXT: bt16 .LBB46_2
1753 ; GENERIC-NEXT: # %bb.1: # %entry
1754 ; GENERIC-NEXT: mov16 a0, l0
1755 ; GENERIC-NEXT: .LBB46_2: # %entry
1756 ; GENERIC-NEXT: btsti16 a0, 0
1757 ; GENERIC-NEXT: bt16 .LBB46_4
1758 ; GENERIC-NEXT: # %bb.3: # %entry
1759 ; GENERIC-NEXT: movi16 a0, 8
1760 ; GENERIC-NEXT: br32 .LBB46_5
1761 ; GENERIC-NEXT: .LBB46_4:
1762 ; GENERIC-NEXT: movi16 a0, 16
1763 ; GENERIC-NEXT: .LBB46_5: # %entry
1764 ; GENERIC-NEXT: addu16 a0, sp
1765 ; GENERIC-NEXT: mov16 a1, a0
1766 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
1767 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
1768 ; GENERIC-NEXT: addi16 sp, sp, 4
1769 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1770 ; GENERIC-NEXT: addi16 sp, sp, 4
1771 ; GENERIC-NEXT: rts16
1772 entry:
1773 %icmp = icmp ugt i64 %y, %x
1774 %ret = select i1 %icmp, i64 %m, i64 %n
1775 ret i64 %ret
1776 }
1778 define i64 @selectRI_ugt_i64(i64 %x, i64 %n, i64 %m) {
1779 ; CHECK-LABEL: selectRI_ugt_i64:
1780 ; CHECK: # %bb.0: # %entry
1781 ; CHECK-NEXT: subi16 sp, sp, 4
1782 ; CHECK-NEXT: .cfi_def_cfa_offset 4
1783 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1784 ; CHECK-NEXT: .cfi_offset l0, -4
1785 ; CHECK-NEXT: .cfi_def_cfa_offset 4
1786 ; CHECK-NEXT: ld32.w t0, (sp, 8)
1787 ; CHECK-NEXT: ld32.w t1, (sp, 4)
1788 ; CHECK-NEXT: movi16 l0, 10
1789 ; CHECK-NEXT: cmphs16 l0, a0
1790 ; CHECK-NEXT: mvcv16 a0
1791 ; CHECK-NEXT: cmpnei16 a1, 0
1792 ; CHECK-NEXT: mvc32 a1
1793 ; CHECK-NEXT: movf32 a1, a0
1794 ; CHECK-NEXT: btsti16 a1, 0
1795 ; CHECK-NEXT: movt32 a2, t1
1796 ; CHECK-NEXT: movt32 a3, t0
1797 ; CHECK-NEXT: mov16 a0, a2
1798 ; CHECK-NEXT: mov16 a1, a3
1799 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1800 ; CHECK-NEXT: addi16 sp, sp, 4
1801 ; CHECK-NEXT: rts16
1802 ;
1803 ; GENERIC-LABEL: selectRI_ugt_i64:
1804 ; GENERIC: # %bb.0: # %entry
1805 ; GENERIC-NEXT: subi16 sp, sp, 4
1806 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1807 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1808 ; GENERIC-NEXT: .cfi_offset l0, -4
1809 ; GENERIC-NEXT: subi16 sp, sp, 4
1810 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1811 ; GENERIC-NEXT: cmpnei16 a1, 0
1812 ; GENERIC-NEXT: mvcv16 a1
1813 ; GENERIC-NEXT: movi16 l0, 10
1814 ; GENERIC-NEXT: cmphs16 l0, a0
1815 ; GENERIC-NEXT: mvcv16 a0
1816 ; GENERIC-NEXT: btsti16 a1, 0
1817 ; GENERIC-NEXT: bf16 .LBB47_5
1818 ; GENERIC-NEXT: # %bb.1: # %entry
1819 ; GENERIC-NEXT: btsti16 a0, 0
1820 ; GENERIC-NEXT: bt16 .LBB47_6
1821 ; GENERIC-NEXT: .LBB47_2: # %entry
1822 ; GENERIC-NEXT: btsti16 a0, 0
1823 ; GENERIC-NEXT: bf16 .LBB47_4
1824 ; GENERIC-NEXT: .LBB47_3:
1825 ; GENERIC-NEXT: ld16.w a3, (sp, 12)
1826 ; GENERIC-NEXT: .LBB47_4: # %entry
1827 ; GENERIC-NEXT: mov16 a0, a2
1828 ; GENERIC-NEXT: mov16 a1, a3
1829 ; GENERIC-NEXT: addi16 sp, sp, 4
1830 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1831 ; GENERIC-NEXT: addi16 sp, sp, 4
1832 ; GENERIC-NEXT: rts16
1833 ; GENERIC-NEXT: .LBB47_5: # %entry
1834 ; GENERIC-NEXT: movi16 a0, 1
1835 ; GENERIC-NEXT: subu16 a0, a1
1836 ; GENERIC-NEXT: btsti16 a0, 0
1837 ; GENERIC-NEXT: bf16 .LBB47_2
1838 ; GENERIC-NEXT: .LBB47_6:
1839 ; GENERIC-NEXT: ld16.w a2, (sp, 8)
1840 ; GENERIC-NEXT: btsti16 a0, 0
1841 ; GENERIC-NEXT: bt16 .LBB47_3
1842 ; GENERIC-NEXT: br32 .LBB47_4
1843 entry:
1844 %icmp = icmp ugt i64 %x, 10
1845 %ret = select i1 %icmp, i64 %m, i64 %n
1846 ret i64 %ret
1847 }
1849 define i64 @selectRX_ugt_i64(i64 %x, i64 %n, i64 %m) {
1850 ; CHECK-LABEL: selectRX_ugt_i64:
1851 ; CHECK: # %bb.0: # %entry
1852 ; CHECK-NEXT: subi16 sp, sp, 4
1853 ; CHECK-NEXT: .cfi_def_cfa_offset 4
1854 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1855 ; CHECK-NEXT: .cfi_offset l0, -4
1856 ; CHECK-NEXT: .cfi_def_cfa_offset 4
1857 ; CHECK-NEXT: ld32.w t0, (sp, 8)
1858 ; CHECK-NEXT: ld32.w t1, (sp, 4)
1859 ; CHECK-NEXT: movih32 l0, 729
1860 ; CHECK-NEXT: ori32 l0, l0, 2033
1861 ; CHECK-NEXT: cmphs16 l0, a0
1862 ; CHECK-NEXT: mvcv16 a0
1863 ; CHECK-NEXT: cmpnei16 a1, 0
1864 ; CHECK-NEXT: mvc32 a1
1865 ; CHECK-NEXT: movf32 a1, a0
1866 ; CHECK-NEXT: btsti16 a1, 0
1867 ; CHECK-NEXT: movt32 a2, t1
1868 ; CHECK-NEXT: movt32 a3, t0
1869 ; CHECK-NEXT: mov16 a0, a2
1870 ; CHECK-NEXT: mov16 a1, a3
1871 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1872 ; CHECK-NEXT: addi16 sp, sp, 4
1873 ; CHECK-NEXT: rts16
1874 ;
1875 ; GENERIC-LABEL: selectRX_ugt_i64:
1876 ; GENERIC: # %bb.0: # %entry
1877 ; GENERIC-NEXT: subi16 sp, sp, 8
1878 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
1879 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
1880 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1881 ; GENERIC-NEXT: .cfi_offset l1, -4
1882 ; GENERIC-NEXT: .cfi_offset l0, -8
1883 ; GENERIC-NEXT: subi16 sp, sp, 4
1884 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
1885 ; GENERIC-NEXT: cmpnei16 a1, 0
1886 ; GENERIC-NEXT: mvcv16 a1
1887 ; GENERIC-NEXT: movi16 l0, 2
1888 ; GENERIC-NEXT: lsli16 l0, l0, 24
1889 ; GENERIC-NEXT: movi16 l1, 217
1890 ; GENERIC-NEXT: lsli16 l1, l1, 16
1891 ; GENERIC-NEXT: or16 l1, l0
1892 ; GENERIC-NEXT: movi16 l0, 7
1893 ; GENERIC-NEXT: lsli16 l0, l0, 8
1894 ; GENERIC-NEXT: or16 l0, l1
1895 ; GENERIC-NEXT: movi16 l1, 241
1896 ; GENERIC-NEXT: or16 l1, l0
1897 ; GENERIC-NEXT: cmphs16 l1, a0
1898 ; GENERIC-NEXT: mvcv16 a0
1899 ; GENERIC-NEXT: btsti16 a1, 0
1900 ; GENERIC-NEXT: bf16 .LBB48_5
1901 ; GENERIC-NEXT: # %bb.1: # %entry
1902 ; GENERIC-NEXT: btsti16 a0, 0
1903 ; GENERIC-NEXT: bt16 .LBB48_6
1904 ; GENERIC-NEXT: .LBB48_2: # %entry
1905 ; GENERIC-NEXT: btsti16 a0, 0
1906 ; GENERIC-NEXT: bf16 .LBB48_4
1907 ; GENERIC-NEXT: .LBB48_3:
1908 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
1909 ; GENERIC-NEXT: .LBB48_4: # %entry
1910 ; GENERIC-NEXT: mov16 a0, a2
1911 ; GENERIC-NEXT: mov16 a1, a3
1912 ; GENERIC-NEXT: addi16 sp, sp, 4
1913 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
1914 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
1915 ; GENERIC-NEXT: addi16 sp, sp, 8
1916 ; GENERIC-NEXT: rts16
1917 ; GENERIC-NEXT: .LBB48_5: # %entry
1918 ; GENERIC-NEXT: movi16 a0, 1
1919 ; GENERIC-NEXT: subu16 a0, a1
1920 ; GENERIC-NEXT: btsti16 a0, 0
1921 ; GENERIC-NEXT: bf16 .LBB48_2
1922 ; GENERIC-NEXT: .LBB48_6:
1923 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
1924 ; GENERIC-NEXT: btsti16 a0, 0
1925 ; GENERIC-NEXT: bt16 .LBB48_3
1926 ; GENERIC-NEXT: br32 .LBB48_4
1927 entry:
1928 %icmp = icmp ugt i64 %x, 47777777
1929 %ret = select i1 %icmp, i64 %m, i64 %n
1930 ret i64 %ret
1931 }
1933 define i64 @selectC_ugt_i64(i1 %c, i64 %n, i64 %m) {
1934 ; CHECK-LABEL: selectC_ugt_i64:
1935 ; CHECK: # %bb.0: # %entry
1936 ; CHECK-NEXT: ld32.w t0, (sp, 0)
1937 ; CHECK-NEXT: btsti16 a0, 0
1938 ; CHECK-NEXT: movt32 a1, a3
1939 ; CHECK-NEXT: movt32 a2, t0
1940 ; CHECK-NEXT: mov16 a0, a1
1941 ; CHECK-NEXT: mov16 a1, a2
1942 ; CHECK-NEXT: rts16
1943 ;
1944 ; GENERIC-LABEL: selectC_ugt_i64:
1945 ; GENERIC: # %bb.0: # %entry
1946 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
1947 ; GENERIC-NEXT: subi16 sp, sp, 4
1948 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
1949 ; GENERIC-NEXT: btsti16 a0, 0
1950 ; GENERIC-NEXT: bt16 .LBB49_2
1951 ; GENERIC-NEXT: # %bb.1: # %entry
1952 ; GENERIC-NEXT: mov16 a3, a1
1953 ; GENERIC-NEXT: .LBB49_2: # %entry
1954 ; GENERIC-NEXT: btsti16 a0, 0
1955 ; GENERIC-NEXT: bf16 .LBB49_4
1956 ; GENERIC-NEXT: # %bb.3:
1957 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
1958 ; GENERIC-NEXT: .LBB49_4: # %entry
1959 ; GENERIC-NEXT: mov16 a0, a3
1960 ; GENERIC-NEXT: mov16 a1, a2
1961 ; GENERIC-NEXT: addi16 sp, sp, 4
1962 ; GENERIC-NEXT: rts16
1963 entry:
1964 %ret = select i1 %c, i64 %m, i64 %n
1965 ret i64 %ret
1966 }
1969 define i16 @selectRR_ugt_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
1970 ; CHECK-LABEL: selectRR_ugt_i16:
1971 ; CHECK: # %bb.0: # %entry
1972 ; CHECK-NEXT: zexth16 a1, a1
1973 ; CHECK-NEXT: zexth16 a0, a0
1974 ; CHECK-NEXT: cmphs16 a0, a1
1975 ; CHECK-NEXT: movf32 a2, a3
1976 ; CHECK-NEXT: mov16 a0, a2
1977 ; CHECK-NEXT: rts16
1978 ;
1979 ; GENERIC-LABEL: selectRR_ugt_i16:
1980 ; GENERIC: # %bb.0: # %entry
1981 ; GENERIC-NEXT: subi16 sp, sp, 12
1982 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
1983 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
1984 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
1985 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
1986 ; GENERIC-NEXT: .cfi_offset l2, -4
1987 ; GENERIC-NEXT: .cfi_offset l1, -8
1988 ; GENERIC-NEXT: .cfi_offset l0, -12
1989 ; GENERIC-NEXT: subi16 sp, sp, 4
1990 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
1991 ; GENERIC-NEXT: movi16 l0, 0
1992 ; GENERIC-NEXT: lsli16 l1, l0, 24
1993 ; GENERIC-NEXT: lsli16 l0, l0, 16
1994 ; GENERIC-NEXT: or16 l0, l1
1995 ; GENERIC-NEXT: movi16 l1, 255
1996 ; GENERIC-NEXT: lsli16 l2, l1, 8
1997 ; GENERIC-NEXT: or16 l2, l0
1998 ; GENERIC-NEXT: or16 l2, l1
1999 ; GENERIC-NEXT: and16 a1, l2
2000 ; GENERIC-NEXT: and16 l2, a0
2001 ; GENERIC-NEXT: cmphs16 l2, a1
2002 ; GENERIC-NEXT: mvcv16 a0
2003 ; GENERIC-NEXT: btsti16 a0, 0
2004 ; GENERIC-NEXT: bt16 .LBB50_2
2005 ; GENERIC-NEXT: # %bb.1: # %entry
2006 ; GENERIC-NEXT: mov16 a3, a2
2007 ; GENERIC-NEXT: .LBB50_2: # %entry
2008 ; GENERIC-NEXT: mov16 a0, a3
2009 ; GENERIC-NEXT: addi16 sp, sp, 4
2010 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2011 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2012 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
2013 ; GENERIC-NEXT: addi16 sp, sp, 12
2014 ; GENERIC-NEXT: rts16
2015 entry:
2016 %icmp = icmp ugt i16 %y, %x
2017 %ret = select i1 %icmp, i16 %m, i16 %n
2018 ret i16 %ret
2019 }
2021 define i16 @selectRI_ugt_i16(i16 %x, i16 %n, i16 %m) {
2022 ; CHECK-LABEL: selectRI_ugt_i16:
2023 ; CHECK: # %bb.0: # %entry
2024 ; CHECK-NEXT: zexth16 a0, a0
2025 ; CHECK-NEXT: movi16 a3, 10
2026 ; CHECK-NEXT: cmphs16 a3, a0
2027 ; CHECK-NEXT: movf32 a1, a2
2028 ; CHECK-NEXT: mov16 a0, a1
2029 ; CHECK-NEXT: rts16
2030 ;
2031 ; GENERIC-LABEL: selectRI_ugt_i16:
2032 ; GENERIC: # %bb.0: # %entry
2033 ; GENERIC-NEXT: subi16 sp, sp, 8
2034 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2035 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
2036 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2037 ; GENERIC-NEXT: .cfi_offset l1, -4
2038 ; GENERIC-NEXT: .cfi_offset l0, -8
2039 ; GENERIC-NEXT: subi16 sp, sp, 4
2040 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
2041 ; GENERIC-NEXT: movi16 a3, 0
2042 ; GENERIC-NEXT: lsli16 l0, a3, 24
2043 ; GENERIC-NEXT: lsli16 a3, a3, 16
2044 ; GENERIC-NEXT: or16 a3, l0
2045 ; GENERIC-NEXT: movi16 l0, 255
2046 ; GENERIC-NEXT: lsli16 l1, l0, 8
2047 ; GENERIC-NEXT: or16 l1, a3
2048 ; GENERIC-NEXT: or16 l1, l0
2049 ; GENERIC-NEXT: and16 l1, a0
2050 ; GENERIC-NEXT: movi16 a0, 10
2051 ; GENERIC-NEXT: cmphs16 a0, l1
2052 ; GENERIC-NEXT: mvcv16 a0
2053 ; GENERIC-NEXT: btsti16 a0, 0
2054 ; GENERIC-NEXT: bt16 .LBB51_2
2055 ; GENERIC-NEXT: # %bb.1: # %entry
2056 ; GENERIC-NEXT: mov16 a2, a1
2057 ; GENERIC-NEXT: .LBB51_2: # %entry
2058 ; GENERIC-NEXT: mov16 a0, a2
2059 ; GENERIC-NEXT: addi16 sp, sp, 4
2060 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2061 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2062 ; GENERIC-NEXT: addi16 sp, sp, 8
2063 ; GENERIC-NEXT: rts16
2064 entry:
2065 %icmp = icmp ugt i16 %x, 10
2066 %ret = select i1 %icmp, i16 %m, i16 %n
2067 ret i16 %ret
2068 }
2070 define i16 @selectRX_ugt_i16(i16 %x, i16 %n, i16 %m) {
2071 ; CHECK-LABEL: selectRX_ugt_i16:
2072 ; CHECK: # %bb.0: # %entry
2073 ; CHECK-NEXT: zexth16 a0, a0
2074 ; CHECK-NEXT: movi32 a3, 2033
2075 ; CHECK-NEXT: cmphs16 a3, a0
2076 ; CHECK-NEXT: movf32 a1, a2
2077 ; CHECK-NEXT: mov16 a0, a1
2078 ; CHECK-NEXT: rts16
2079 ;
2080 ; GENERIC-LABEL: selectRX_ugt_i16:
2081 ; GENERIC: # %bb.0: # %entry
2082 ; GENERIC-NEXT: subi16 sp, sp, 8
2083 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2084 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
2085 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2086 ; GENERIC-NEXT: .cfi_offset l1, -4
2087 ; GENERIC-NEXT: .cfi_offset l0, -8
2088 ; GENERIC-NEXT: subi16 sp, sp, 4
2089 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
2090 ; GENERIC-NEXT: movi16 a3, 0
2091 ; GENERIC-NEXT: lsli16 l0, a3, 24
2092 ; GENERIC-NEXT: lsli16 a3, a3, 16
2093 ; GENERIC-NEXT: or16 a3, l0
2094 ; GENERIC-NEXT: movi16 l0, 255
2095 ; GENERIC-NEXT: lsli16 l1, l0, 8
2096 ; GENERIC-NEXT: or16 l1, a3
2097 ; GENERIC-NEXT: or16 l1, l0
2098 ; GENERIC-NEXT: and16 l1, a0
2099 ; GENERIC-NEXT: movi16 a0, 7
2100 ; GENERIC-NEXT: lsli16 a0, a0, 8
2101 ; GENERIC-NEXT: or16 a0, a3
2102 ; GENERIC-NEXT: movi16 a3, 241
2103 ; GENERIC-NEXT: or16 a3, a0
2104 ; GENERIC-NEXT: cmphs16 a3, l1
2105 ; GENERIC-NEXT: mvcv16 a0
2106 ; GENERIC-NEXT: btsti16 a0, 0
2107 ; GENERIC-NEXT: bt16 .LBB52_2
2108 ; GENERIC-NEXT: # %bb.1: # %entry
2109 ; GENERIC-NEXT: mov16 a2, a1
2110 ; GENERIC-NEXT: .LBB52_2: # %entry
2111 ; GENERIC-NEXT: mov16 a0, a2
2112 ; GENERIC-NEXT: addi16 sp, sp, 4
2113 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2114 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2115 ; GENERIC-NEXT: addi16 sp, sp, 8
2116 ; GENERIC-NEXT: rts16
2117 entry:
2118 %icmp = icmp ugt i16 %x, 47777777
2119 %ret = select i1 %icmp, i16 %m, i16 %n
2120 ret i16 %ret
2121 }
2123 define i16 @selectC_ugt_i16(i1 %c, i16 %n, i16 %m) {
2124 ; CHECK-LABEL: selectC_ugt_i16:
2125 ; CHECK: # %bb.0: # %entry
2126 ; CHECK-NEXT: btsti16 a0, 0
2127 ; CHECK-NEXT: movt32 a1, a2
2128 ; CHECK-NEXT: mov16 a0, a1
2129 ; CHECK-NEXT: rts16
2130 ;
2131 ; GENERIC-LABEL: selectC_ugt_i16:
2132 ; GENERIC: # %bb.0: # %entry
2133 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2134 ; GENERIC-NEXT: subi16 sp, sp, 4
2135 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2136 ; GENERIC-NEXT: btsti16 a0, 0
2137 ; GENERIC-NEXT: bt16 .LBB53_2
2138 ; GENERIC-NEXT: # %bb.1: # %entry
2139 ; GENERIC-NEXT: mov16 a2, a1
2140 ; GENERIC-NEXT: .LBB53_2: # %entry
2141 ; GENERIC-NEXT: mov16 a0, a2
2142 ; GENERIC-NEXT: addi16 sp, sp, 4
2143 ; GENERIC-NEXT: rts16
2144 entry:
2145 %ret = select i1 %c, i16 %m, i16 %n
2146 ret i16 %ret
2147 }
2150 define i8 @selectRR_ugt_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
2151 ; CHECK-LABEL: selectRR_ugt_i8:
2152 ; CHECK: # %bb.0: # %entry
2153 ; CHECK-NEXT: zextb16 a1, a1
2154 ; CHECK-NEXT: zextb16 a0, a0
2155 ; CHECK-NEXT: cmphs16 a0, a1
2156 ; CHECK-NEXT: movf32 a2, a3
2157 ; CHECK-NEXT: mov16 a0, a2
2158 ; CHECK-NEXT: rts16
2159 ;
2160 ; GENERIC-LABEL: selectRR_ugt_i8:
2161 ; GENERIC: # %bb.0: # %entry
2162 ; GENERIC-NEXT: subi16 sp, sp, 4
2163 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2164 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2165 ; GENERIC-NEXT: .cfi_offset l0, -4
2166 ; GENERIC-NEXT: subi16 sp, sp, 4
2167 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2168 ; GENERIC-NEXT: movi16 l0, 255
2169 ; GENERIC-NEXT: and16 a1, l0
2170 ; GENERIC-NEXT: and16 a0, l0
2171 ; GENERIC-NEXT: cmphs16 a0, a1
2172 ; GENERIC-NEXT: mvcv16 a0
2173 ; GENERIC-NEXT: btsti16 a0, 0
2174 ; GENERIC-NEXT: bt16 .LBB54_2
2175 ; GENERIC-NEXT: # %bb.1: # %entry
2176 ; GENERIC-NEXT: mov16 a3, a2
2177 ; GENERIC-NEXT: .LBB54_2: # %entry
2178 ; GENERIC-NEXT: mov16 a0, a3
2179 ; GENERIC-NEXT: addi16 sp, sp, 4
2180 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2181 ; GENERIC-NEXT: addi16 sp, sp, 4
2182 ; GENERIC-NEXT: rts16
2183 entry:
2184 %icmp = icmp ugt i8 %y, %x
2185 %ret = select i1 %icmp, i8 %m, i8 %n
2186 ret i8 %ret
2187 }
2189 define i8 @selectRI_ugt_i8(i8 %x, i8 %n, i8 %m) {
2190 ; CHECK-LABEL: selectRI_ugt_i8:
2191 ; CHECK: # %bb.0: # %entry
2192 ; CHECK-NEXT: zextb16 a0, a0
2193 ; CHECK-NEXT: movi16 a3, 10
2194 ; CHECK-NEXT: cmphs16 a3, a0
2195 ; CHECK-NEXT: movf32 a1, a2
2196 ; CHECK-NEXT: mov16 a0, a1
2197 ; CHECK-NEXT: rts16
2198 ;
2199 ; GENERIC-LABEL: selectRI_ugt_i8:
2200 ; GENERIC: # %bb.0: # %entry
2201 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2202 ; GENERIC-NEXT: subi16 sp, sp, 4
2203 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2204 ; GENERIC-NEXT: movi16 a3, 255
2205 ; GENERIC-NEXT: and16 a3, a0
2206 ; GENERIC-NEXT: movi16 a0, 10
2207 ; GENERIC-NEXT: cmphs16 a0, a3
2208 ; GENERIC-NEXT: mvcv16 a0
2209 ; GENERIC-NEXT: btsti16 a0, 0
2210 ; GENERIC-NEXT: bt16 .LBB55_2
2211 ; GENERIC-NEXT: # %bb.1: # %entry
2212 ; GENERIC-NEXT: mov16 a2, a1
2213 ; GENERIC-NEXT: .LBB55_2: # %entry
2214 ; GENERIC-NEXT: mov16 a0, a2
2215 ; GENERIC-NEXT: addi16 sp, sp, 4
2216 ; GENERIC-NEXT: rts16
2217 entry:
2218 %icmp = icmp ugt i8 %x, 10
2219 %ret = select i1 %icmp, i8 %m, i8 %n
2220 ret i8 %ret
2221 }
2223 define i8 @selectRX_ugt_i8(i8 %x, i8 %n, i8 %m) {
2224 ; CHECK-LABEL: selectRX_ugt_i8:
2225 ; CHECK: # %bb.0: # %entry
2226 ; CHECK-NEXT: zextb16 a0, a0
2227 ; CHECK-NEXT: movi16 a3, 241
2228 ; CHECK-NEXT: cmphs16 a3, a0
2229 ; CHECK-NEXT: movf32 a1, a2
2230 ; CHECK-NEXT: mov16 a0, a1
2231 ; CHECK-NEXT: rts16
2232 ;
2233 ; GENERIC-LABEL: selectRX_ugt_i8:
2234 ; GENERIC: # %bb.0: # %entry
2235 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2236 ; GENERIC-NEXT: subi16 sp, sp, 4
2237 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2238 ; GENERIC-NEXT: movi16 a3, 255
2239 ; GENERIC-NEXT: and16 a3, a0
2240 ; GENERIC-NEXT: movi16 a0, 241
2241 ; GENERIC-NEXT: cmphs16 a0, a3
2242 ; GENERIC-NEXT: mvcv16 a0
2243 ; GENERIC-NEXT: btsti16 a0, 0
2244 ; GENERIC-NEXT: bt16 .LBB56_2
2245 ; GENERIC-NEXT: # %bb.1: # %entry
2246 ; GENERIC-NEXT: mov16 a2, a1
2247 ; GENERIC-NEXT: .LBB56_2: # %entry
2248 ; GENERIC-NEXT: mov16 a0, a2
2249 ; GENERIC-NEXT: addi16 sp, sp, 4
2250 ; GENERIC-NEXT: rts16
2251 entry:
2252 %icmp = icmp ugt i8 %x, 47777777
2253 %ret = select i1 %icmp, i8 %m, i8 %n
2254 ret i8 %ret
2255 }
2257 define i8 @selectC_ugt_i8(i1 %c, i8 %n, i8 %m) {
2258 ; CHECK-LABEL: selectC_ugt_i8:
2259 ; CHECK: # %bb.0: # %entry
2260 ; CHECK-NEXT: btsti16 a0, 0
2261 ; CHECK-NEXT: movt32 a1, a2
2262 ; CHECK-NEXT: mov16 a0, a1
2263 ; CHECK-NEXT: rts16
2264 ;
2265 ; GENERIC-LABEL: selectC_ugt_i8:
2266 ; GENERIC: # %bb.0: # %entry
2267 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2268 ; GENERIC-NEXT: subi16 sp, sp, 4
2269 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2270 ; GENERIC-NEXT: btsti16 a0, 0
2271 ; GENERIC-NEXT: bt16 .LBB57_2
2272 ; GENERIC-NEXT: # %bb.1: # %entry
2273 ; GENERIC-NEXT: mov16 a2, a1
2274 ; GENERIC-NEXT: .LBB57_2: # %entry
2275 ; GENERIC-NEXT: mov16 a0, a2
2276 ; GENERIC-NEXT: addi16 sp, sp, 4
2277 ; GENERIC-NEXT: rts16
2278 entry:
2279 %ret = select i1 %c, i8 %m, i8 %n
2280 ret i8 %ret
2281 }
2284 define i1 @selectRR_ugt_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
2285 ; CHECK-LABEL: selectRR_ugt_i1:
2286 ; CHECK: # %bb.0: # %entry
2287 ; CHECK-NEXT: btsti16 a0, 0
2288 ; CHECK-NEXT: movt32 a3, a2
2289 ; CHECK-NEXT: btsti16 a1, 0
2290 ; CHECK-NEXT: movt32 a2, a3
2291 ; CHECK-NEXT: mov16 a0, a2
2292 ; CHECK-NEXT: rts16
2293 ;
2294 ; GENERIC-LABEL: selectRR_ugt_i1:
2295 ; GENERIC: # %bb.0: # %entry
2296 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2297 ; GENERIC-NEXT: subi16 sp, sp, 4
2298 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2299 ; GENERIC-NEXT: btsti16 a0, 0
2300 ; GENERIC-NEXT: mov16 a0, a2
2301 ; GENERIC-NEXT: bf16 .LBB58_3
2302 ; GENERIC-NEXT: # %bb.1: # %entry
2303 ; GENERIC-NEXT: btsti16 a1, 0
2304 ; GENERIC-NEXT: bf16 .LBB58_4
2305 ; GENERIC-NEXT: .LBB58_2: # %entry
2306 ; GENERIC-NEXT: addi16 sp, sp, 4
2307 ; GENERIC-NEXT: rts16
2308 ; GENERIC-NEXT: .LBB58_3: # %entry
2309 ; GENERIC-NEXT: mov16 a0, a3
2310 ; GENERIC-NEXT: btsti16 a1, 0
2311 ; GENERIC-NEXT: bt16 .LBB58_2
2312 ; GENERIC-NEXT: .LBB58_4: # %entry
2313 ; GENERIC-NEXT: mov16 a0, a2
2314 ; GENERIC-NEXT: addi16 sp, sp, 4
2315 ; GENERIC-NEXT: rts16
2316 entry:
2317 %icmp = icmp ugt i1 %y, %x
2318 %ret = select i1 %icmp, i1 %m, i1 %n
2319 ret i1 %ret
2320 }
2322 define i1 @selectRI_ugt_i1(i1 %x, i1 %n, i1 %m) {
2323 ; CHECK-LABEL: selectRI_ugt_i1:
2324 ; CHECK: # %bb.0: # %entry
2325 ; CHECK-NEXT: btsti16 a0, 0
2326 ; CHECK-NEXT: movt32 a1, a2
2327 ; CHECK-NEXT: mov16 a0, a1
2328 ; CHECK-NEXT: rts16
2329 ;
2330 ; GENERIC-LABEL: selectRI_ugt_i1:
2331 ; GENERIC: # %bb.0: # %entry
2332 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2333 ; GENERIC-NEXT: subi16 sp, sp, 4
2334 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2335 ; GENERIC-NEXT: btsti16 a0, 0
2336 ; GENERIC-NEXT: bt16 .LBB59_2
2337 ; GENERIC-NEXT: # %bb.1: # %entry
2338 ; GENERIC-NEXT: mov16 a2, a1
2339 ; GENERIC-NEXT: .LBB59_2: # %entry
2340 ; GENERIC-NEXT: mov16 a0, a2
2341 ; GENERIC-NEXT: addi16 sp, sp, 4
2342 ; GENERIC-NEXT: rts16
2343 entry:
2344 %icmp = icmp ugt i1 %x, 10
2345 %ret = select i1 %icmp, i1 %m, i1 %n
2346 ret i1 %ret
2347 }
2349 define i1 @selectRX_ugt_i1(i1 %x, i1 %n, i1 %m) {
2350 ; CHECK-LABEL: selectRX_ugt_i1:
2351 ; CHECK: # %bb.0: # %entry
2352 ; CHECK-NEXT: mov16 a0, a1
2353 ; CHECK-NEXT: rts16
2354 ;
2355 ; GENERIC-LABEL: selectRX_ugt_i1:
2356 ; GENERIC: # %bb.0: # %entry
2357 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2358 ; GENERIC-NEXT: subi16 sp, sp, 4
2359 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2360 ; GENERIC-NEXT: mov16 a0, a1
2361 ; GENERIC-NEXT: addi16 sp, sp, 4
2362 ; GENERIC-NEXT: rts16
2363 entry:
2364 %icmp = icmp ugt i1 %x, 47777777
2365 %ret = select i1 %icmp, i1 %m, i1 %n
2366 ret i1 %ret
2367 }
2369 define i1 @selectC_ugt_i1(i1 %c, i1 %n, i1 %m) {
2370 ; CHECK-LABEL: selectC_ugt_i1:
2371 ; CHECK: # %bb.0: # %entry
2372 ; CHECK-NEXT: btsti16 a0, 0
2373 ; CHECK-NEXT: movt32 a1, a2
2374 ; CHECK-NEXT: mov16 a0, a1
2375 ; CHECK-NEXT: rts16
2376 ;
2377 ; GENERIC-LABEL: selectC_ugt_i1:
2378 ; GENERIC: # %bb.0: # %entry
2379 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2380 ; GENERIC-NEXT: subi16 sp, sp, 4
2381 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2382 ; GENERIC-NEXT: btsti16 a0, 0
2383 ; GENERIC-NEXT: bt16 .LBB61_2
2384 ; GENERIC-NEXT: # %bb.1: # %entry
2385 ; GENERIC-NEXT: mov16 a2, a1
2386 ; GENERIC-NEXT: .LBB61_2: # %entry
2387 ; GENERIC-NEXT: mov16 a0, a2
2388 ; GENERIC-NEXT: addi16 sp, sp, 4
2389 ; GENERIC-NEXT: rts16
2390 entry:
2391 %ret = select i1 %c, i1 %m, i1 %n
2392 ret i1 %ret
2393 }
2396 define i32 @selectRR_uge_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
2397 ; CHECK-LABEL: selectRR_uge_i32:
2398 ; CHECK: # %bb.0: # %entry
2399 ; CHECK-NEXT: cmphs16 a1, a0
2400 ; CHECK-NEXT: movt32 a2, a3
2401 ; CHECK-NEXT: mov16 a0, a2
2402 ; CHECK-NEXT: rts16
2403 ;
2404 ; GENERIC-LABEL: selectRR_uge_i32:
2405 ; GENERIC: # %bb.0: # %entry
2406 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2407 ; GENERIC-NEXT: subi16 sp, sp, 4
2408 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2409 ; GENERIC-NEXT: cmphs16 a1, a0
2410 ; GENERIC-NEXT: mvcv16 a0
2411 ; GENERIC-NEXT: movi16 a1, 1
2412 ; GENERIC-NEXT: subu16 a1, a0
2413 ; GENERIC-NEXT: btsti16 a1, 0
2414 ; GENERIC-NEXT: bt16 .LBB62_2
2415 ; GENERIC-NEXT: # %bb.1: # %entry
2416 ; GENERIC-NEXT: mov16 a3, a2
2417 ; GENERIC-NEXT: .LBB62_2: # %entry
2418 ; GENERIC-NEXT: mov16 a0, a3
2419 ; GENERIC-NEXT: addi16 sp, sp, 4
2420 ; GENERIC-NEXT: rts16
2421 entry:
2422 %icmp = icmp uge i32 %y, %x
2423 %ret = select i1 %icmp, i32 %m, i32 %n
2424 ret i32 %ret
2425 }
2427 define i32 @selectRI_uge_i32(i32 %x, i32 %n, i32 %m) {
2428 ; CHECK-LABEL: selectRI_uge_i32:
2429 ; CHECK: # %bb.0: # %entry
2430 ; CHECK-NEXT: movi16 a3, 9
2431 ; CHECK-NEXT: cmphs16 a3, a0
2432 ; CHECK-NEXT: movf32 a1, a2
2433 ; CHECK-NEXT: mov16 a0, a1
2434 ; CHECK-NEXT: rts16
2435 ;
2436 ; GENERIC-LABEL: selectRI_uge_i32:
2437 ; GENERIC: # %bb.0: # %entry
2438 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2439 ; GENERIC-NEXT: subi16 sp, sp, 4
2440 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2441 ; GENERIC-NEXT: movi16 a3, 9
2442 ; GENERIC-NEXT: cmphs16 a3, a0
2443 ; GENERIC-NEXT: mvcv16 a0
2444 ; GENERIC-NEXT: btsti16 a0, 0
2445 ; GENERIC-NEXT: bt16 .LBB63_2
2446 ; GENERIC-NEXT: # %bb.1: # %entry
2447 ; GENERIC-NEXT: mov16 a2, a1
2448 ; GENERIC-NEXT: .LBB63_2: # %entry
2449 ; GENERIC-NEXT: mov16 a0, a2
2450 ; GENERIC-NEXT: addi16 sp, sp, 4
2451 ; GENERIC-NEXT: rts16
2452 entry:
2453 %icmp = icmp uge i32 %x, 10
2454 %ret = select i1 %icmp, i32 %m, i32 %n
2455 ret i32 %ret
2456 }
2458 define i32 @selectRX_uge_i32(i32 %x, i32 %n, i32 %m) {
2459 ; CHECK-LABEL: selectRX_uge_i32:
2460 ; CHECK: # %bb.0: # %entry
2461 ; CHECK-NEXT: movih32 a3, 729
2462 ; CHECK-NEXT: ori32 a3, a3, 2032
2463 ; CHECK-NEXT: cmphs16 a3, a0
2464 ; CHECK-NEXT: movf32 a1, a2
2465 ; CHECK-NEXT: mov16 a0, a1
2466 ; CHECK-NEXT: rts16
2467 ;
2468 ; GENERIC-LABEL: selectRX_uge_i32:
2469 ; GENERIC: # %bb.0: # %entry
2470 ; GENERIC-NEXT: subi16 sp, sp, 4
2471 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2472 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2473 ; GENERIC-NEXT: .cfi_offset l0, -4
2474 ; GENERIC-NEXT: subi16 sp, sp, 4
2475 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2476 ; GENERIC-NEXT: movi16 a3, 2
2477 ; GENERIC-NEXT: lsli16 a3, a3, 24
2478 ; GENERIC-NEXT: movi16 l0, 217
2479 ; GENERIC-NEXT: lsli16 l0, l0, 16
2480 ; GENERIC-NEXT: or16 l0, a3
2481 ; GENERIC-NEXT: movi16 a3, 7
2482 ; GENERIC-NEXT: lsli16 a3, a3, 8
2483 ; GENERIC-NEXT: or16 a3, l0
2484 ; GENERIC-NEXT: movi16 l0, 240
2485 ; GENERIC-NEXT: or16 l0, a3
2486 ; GENERIC-NEXT: cmphs16 l0, a0
2487 ; GENERIC-NEXT: mvcv16 a0
2488 ; GENERIC-NEXT: btsti16 a0, 0
2489 ; GENERIC-NEXT: bt16 .LBB64_2
2490 ; GENERIC-NEXT: # %bb.1: # %entry
2491 ; GENERIC-NEXT: mov16 a2, a1
2492 ; GENERIC-NEXT: .LBB64_2: # %entry
2493 ; GENERIC-NEXT: mov16 a0, a2
2494 ; GENERIC-NEXT: addi16 sp, sp, 4
2495 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2496 ; GENERIC-NEXT: addi16 sp, sp, 4
2497 ; GENERIC-NEXT: rts16
2498 entry:
2499 %icmp = icmp uge i32 %x, 47777777
2500 %ret = select i1 %icmp, i32 %m, i32 %n
2501 ret i32 %ret
2502 }
2504 define i32 @selectC_uge_i32(i1 %c, i32 %n, i32 %m) {
2505 ; CHECK-LABEL: selectC_uge_i32:
2506 ; CHECK: # %bb.0: # %entry
2507 ; CHECK-NEXT: btsti16 a0, 0
2508 ; CHECK-NEXT: movt32 a1, a2
2509 ; CHECK-NEXT: mov16 a0, a1
2510 ; CHECK-NEXT: rts16
2511 ;
2512 ; GENERIC-LABEL: selectC_uge_i32:
2513 ; GENERIC: # %bb.0: # %entry
2514 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2515 ; GENERIC-NEXT: subi16 sp, sp, 4
2516 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2517 ; GENERIC-NEXT: btsti16 a0, 0
2518 ; GENERIC-NEXT: bt16 .LBB65_2
2519 ; GENERIC-NEXT: # %bb.1: # %entry
2520 ; GENERIC-NEXT: mov16 a2, a1
2521 ; GENERIC-NEXT: .LBB65_2: # %entry
2522 ; GENERIC-NEXT: mov16 a0, a2
2523 ; GENERIC-NEXT: addi16 sp, sp, 4
2524 ; GENERIC-NEXT: rts16
2525 entry:
2526 %ret = select i1 %c, i32 %m, i32 %n
2527 ret i32 %ret
2528 }
2530 define i64 @selectRR_uge_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
2531 ; CHECK-LABEL: selectRR_uge_i64:
2532 ; CHECK: # %bb.0: # %entry
2533 ; CHECK-NEXT: .cfi_def_cfa_offset 0
2534 ; CHECK-NEXT: subi16 sp, sp, 16
2535 ; CHECK-NEXT: .cfi_def_cfa_offset 16
2536 ; CHECK-NEXT: cmphs16 a3, a1
2537 ; CHECK-NEXT: mvc32 t0
2538 ; CHECK-NEXT: st32.w t0, (sp, 12)
2539 ; CHECK-NEXT: cmphs16 a2, a0
2540 ; CHECK-NEXT: mvc32 a0
2541 ; CHECK-NEXT: st16.w a0, (sp, 4)
2542 ; CHECK-NEXT: cmpne16 a3, a1
2543 ; CHECK-NEXT: mvc32 a0
2544 ; CHECK-NEXT: st16.w a0, (sp, 8)
2545 ; CHECK-NEXT: ld16.w a0, (sp, 4)
2546 ; CHECK-NEXT: btsti16 a0, 0
2547 ; CHECK-NEXT: mvc32 a0
2548 ; CHECK-NEXT: ld16.w a1, (sp, 12)
2549 ; CHECK-NEXT: btsti16 a1, 0
2550 ; CHECK-NEXT: mvc32 a1
2551 ; CHECK-NEXT: ld16.w a2, (sp, 8)
2552 ; CHECK-NEXT: btsti16 a2, 0
2553 ; CHECK-NEXT: movf32 a1, a0
2554 ; CHECK-NEXT: addi16 a2, sp, 16
2555 ; CHECK-NEXT: addi16 a0, sp, 24
2556 ; CHECK-NEXT: btsti16 a1, 0
2557 ; CHECK-NEXT: movt32 a2, a0
2558 ; CHECK-NEXT: ld16.w a0, (a2, 0)
2559 ; CHECK-NEXT: ld16.w a1, (a2, 4)
2560 ; CHECK-NEXT: addi16 sp, sp, 16
2561 ; CHECK-NEXT: rts16
2562 ;
2563 ; GENERIC-LABEL: selectRR_uge_i64:
2564 ; GENERIC: # %bb.0: # %entry
2565 ; GENERIC-NEXT: subi16 sp, sp, 8
2566 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2567 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
2568 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2569 ; GENERIC-NEXT: .cfi_offset l1, -4
2570 ; GENERIC-NEXT: .cfi_offset l0, -8
2571 ; GENERIC-NEXT: subi16 sp, sp, 4
2572 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
2573 ; GENERIC-NEXT: cmphs16 a3, a1
2574 ; GENERIC-NEXT: mvcv16 l1
2575 ; GENERIC-NEXT: movi16 l0, 1
2576 ; GENERIC-NEXT: cmphs16 a2, a0
2577 ; GENERIC-NEXT: mvcv16 a0
2578 ; GENERIC-NEXT: cmpne16 a3, a1
2579 ; GENERIC-NEXT: mvcv16 a1
2580 ; GENERIC-NEXT: btsti16 a1, 0
2581 ; GENERIC-NEXT: bt16 .LBB66_3
2582 ; GENERIC-NEXT: # %bb.1: # %entry
2583 ; GENERIC-NEXT: subu16 l0, l1
2584 ; GENERIC-NEXT: btsti16 l0, 0
2585 ; GENERIC-NEXT: bf16 .LBB66_4
2586 ; GENERIC-NEXT: .LBB66_2:
2587 ; GENERIC-NEXT: movi16 a0, 20
2588 ; GENERIC-NEXT: br32 .LBB66_5
2589 ; GENERIC-NEXT: .LBB66_3:
2590 ; GENERIC-NEXT: subu16 l0, a0
2591 ; GENERIC-NEXT: btsti16 l0, 0
2592 ; GENERIC-NEXT: bt16 .LBB66_2
2593 ; GENERIC-NEXT: .LBB66_4: # %entry
2594 ; GENERIC-NEXT: movi16 a0, 12
2595 ; GENERIC-NEXT: .LBB66_5: # %entry
2596 ; GENERIC-NEXT: addu16 a0, sp
2597 ; GENERIC-NEXT: mov16 a1, a0
2598 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
2599 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
2600 ; GENERIC-NEXT: addi16 sp, sp, 4
2601 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2602 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2603 ; GENERIC-NEXT: addi16 sp, sp, 8
2604 ; GENERIC-NEXT: rts16
2605 entry:
2606 %icmp = icmp uge i64 %y, %x
2607 %ret = select i1 %icmp, i64 %m, i64 %n
2608 ret i64 %ret
2609 }
2611 define i64 @selectRI_uge_i64(i64 %x, i64 %n, i64 %m) {
2612 ; CHECK-LABEL: selectRI_uge_i64:
2613 ; CHECK: # %bb.0: # %entry
2614 ; CHECK-NEXT: subi16 sp, sp, 4
2615 ; CHECK-NEXT: .cfi_def_cfa_offset 4
2616 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2617 ; CHECK-NEXT: .cfi_offset l0, -4
2618 ; CHECK-NEXT: .cfi_def_cfa_offset 4
2619 ; CHECK-NEXT: ld32.w t0, (sp, 8)
2620 ; CHECK-NEXT: ld32.w t1, (sp, 4)
2621 ; CHECK-NEXT: movi16 l0, 9
2622 ; CHECK-NEXT: cmphs16 l0, a0
2623 ; CHECK-NEXT: mvcv16 a0
2624 ; CHECK-NEXT: cmpnei16 a1, 0
2625 ; CHECK-NEXT: mvc32 a1
2626 ; CHECK-NEXT: movf32 a1, a0
2627 ; CHECK-NEXT: btsti16 a1, 0
2628 ; CHECK-NEXT: movt32 a2, t1
2629 ; CHECK-NEXT: movt32 a3, t0
2630 ; CHECK-NEXT: mov16 a0, a2
2631 ; CHECK-NEXT: mov16 a1, a3
2632 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2633 ; CHECK-NEXT: addi16 sp, sp, 4
2634 ; CHECK-NEXT: rts16
2635 ;
2636 ; GENERIC-LABEL: selectRI_uge_i64:
2637 ; GENERIC: # %bb.0: # %entry
2638 ; GENERIC-NEXT: subi16 sp, sp, 4
2639 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2640 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2641 ; GENERIC-NEXT: .cfi_offset l0, -4
2642 ; GENERIC-NEXT: subi16 sp, sp, 4
2643 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2644 ; GENERIC-NEXT: cmpnei16 a1, 0
2645 ; GENERIC-NEXT: mvcv16 a1
2646 ; GENERIC-NEXT: movi16 l0, 9
2647 ; GENERIC-NEXT: cmphs16 l0, a0
2648 ; GENERIC-NEXT: mvcv16 a0
2649 ; GENERIC-NEXT: btsti16 a1, 0
2650 ; GENERIC-NEXT: bf16 .LBB67_5
2651 ; GENERIC-NEXT: # %bb.1: # %entry
2652 ; GENERIC-NEXT: btsti16 a0, 0
2653 ; GENERIC-NEXT: bt16 .LBB67_6
2654 ; GENERIC-NEXT: .LBB67_2: # %entry
2655 ; GENERIC-NEXT: btsti16 a0, 0
2656 ; GENERIC-NEXT: bf16 .LBB67_4
2657 ; GENERIC-NEXT: .LBB67_3:
2658 ; GENERIC-NEXT: ld16.w a3, (sp, 12)
2659 ; GENERIC-NEXT: .LBB67_4: # %entry
2660 ; GENERIC-NEXT: mov16 a0, a2
2661 ; GENERIC-NEXT: mov16 a1, a3
2662 ; GENERIC-NEXT: addi16 sp, sp, 4
2663 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2664 ; GENERIC-NEXT: addi16 sp, sp, 4
2665 ; GENERIC-NEXT: rts16
2666 ; GENERIC-NEXT: .LBB67_5: # %entry
2667 ; GENERIC-NEXT: movi16 a0, 1
2668 ; GENERIC-NEXT: subu16 a0, a1
2669 ; GENERIC-NEXT: btsti16 a0, 0
2670 ; GENERIC-NEXT: bf16 .LBB67_2
2671 ; GENERIC-NEXT: .LBB67_6:
2672 ; GENERIC-NEXT: ld16.w a2, (sp, 8)
2673 ; GENERIC-NEXT: btsti16 a0, 0
2674 ; GENERIC-NEXT: bt16 .LBB67_3
2675 ; GENERIC-NEXT: br32 .LBB67_4
2676 entry:
2677 %icmp = icmp uge i64 %x, 10
2678 %ret = select i1 %icmp, i64 %m, i64 %n
2679 ret i64 %ret
2680 }
2682 define i64 @selectRX_uge_i64(i64 %x, i64 %n, i64 %m) {
2683 ; CHECK-LABEL: selectRX_uge_i64:
2684 ; CHECK: # %bb.0: # %entry
2685 ; CHECK-NEXT: subi16 sp, sp, 4
2686 ; CHECK-NEXT: .cfi_def_cfa_offset 4
2687 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2688 ; CHECK-NEXT: .cfi_offset l0, -4
2689 ; CHECK-NEXT: .cfi_def_cfa_offset 4
2690 ; CHECK-NEXT: ld32.w t0, (sp, 8)
2691 ; CHECK-NEXT: ld32.w t1, (sp, 4)
2692 ; CHECK-NEXT: movih32 l0, 729
2693 ; CHECK-NEXT: ori32 l0, l0, 2032
2694 ; CHECK-NEXT: cmphs16 l0, a0
2695 ; CHECK-NEXT: mvcv16 a0
2696 ; CHECK-NEXT: cmpnei16 a1, 0
2697 ; CHECK-NEXT: mvc32 a1
2698 ; CHECK-NEXT: movf32 a1, a0
2699 ; CHECK-NEXT: btsti16 a1, 0
2700 ; CHECK-NEXT: movt32 a2, t1
2701 ; CHECK-NEXT: movt32 a3, t0
2702 ; CHECK-NEXT: mov16 a0, a2
2703 ; CHECK-NEXT: mov16 a1, a3
2704 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2705 ; CHECK-NEXT: addi16 sp, sp, 4
2706 ; CHECK-NEXT: rts16
2707 ;
2708 ; GENERIC-LABEL: selectRX_uge_i64:
2709 ; GENERIC: # %bb.0: # %entry
2710 ; GENERIC-NEXT: subi16 sp, sp, 8
2711 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2712 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
2713 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2714 ; GENERIC-NEXT: .cfi_offset l1, -4
2715 ; GENERIC-NEXT: .cfi_offset l0, -8
2716 ; GENERIC-NEXT: subi16 sp, sp, 4
2717 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
2718 ; GENERIC-NEXT: cmpnei16 a1, 0
2719 ; GENERIC-NEXT: mvcv16 a1
2720 ; GENERIC-NEXT: movi16 l0, 2
2721 ; GENERIC-NEXT: lsli16 l0, l0, 24
2722 ; GENERIC-NEXT: movi16 l1, 217
2723 ; GENERIC-NEXT: lsli16 l1, l1, 16
2724 ; GENERIC-NEXT: or16 l1, l0
2725 ; GENERIC-NEXT: movi16 l0, 7
2726 ; GENERIC-NEXT: lsli16 l0, l0, 8
2727 ; GENERIC-NEXT: or16 l0, l1
2728 ; GENERIC-NEXT: movi16 l1, 240
2729 ; GENERIC-NEXT: or16 l1, l0
2730 ; GENERIC-NEXT: cmphs16 l1, a0
2731 ; GENERIC-NEXT: mvcv16 a0
2732 ; GENERIC-NEXT: btsti16 a1, 0
2733 ; GENERIC-NEXT: bf16 .LBB68_5
2734 ; GENERIC-NEXT: # %bb.1: # %entry
2735 ; GENERIC-NEXT: btsti16 a0, 0
2736 ; GENERIC-NEXT: bt16 .LBB68_6
2737 ; GENERIC-NEXT: .LBB68_2: # %entry
2738 ; GENERIC-NEXT: btsti16 a0, 0
2739 ; GENERIC-NEXT: bf16 .LBB68_4
2740 ; GENERIC-NEXT: .LBB68_3:
2741 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
2742 ; GENERIC-NEXT: .LBB68_4: # %entry
2743 ; GENERIC-NEXT: mov16 a0, a2
2744 ; GENERIC-NEXT: mov16 a1, a3
2745 ; GENERIC-NEXT: addi16 sp, sp, 4
2746 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2747 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2748 ; GENERIC-NEXT: addi16 sp, sp, 8
2749 ; GENERIC-NEXT: rts16
2750 ; GENERIC-NEXT: .LBB68_5: # %entry
2751 ; GENERIC-NEXT: movi16 a0, 1
2752 ; GENERIC-NEXT: subu16 a0, a1
2753 ; GENERIC-NEXT: btsti16 a0, 0
2754 ; GENERIC-NEXT: bf16 .LBB68_2
2755 ; GENERIC-NEXT: .LBB68_6:
2756 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
2757 ; GENERIC-NEXT: btsti16 a0, 0
2758 ; GENERIC-NEXT: bt16 .LBB68_3
2759 ; GENERIC-NEXT: br32 .LBB68_4
2760 entry:
2761 %icmp = icmp uge i64 %x, 47777777
2762 %ret = select i1 %icmp, i64 %m, i64 %n
2763 ret i64 %ret
2764 }
2766 define i64 @selectC_uge_i64(i1 %c, i64 %n, i64 %m) {
2767 ; CHECK-LABEL: selectC_uge_i64:
2768 ; CHECK: # %bb.0: # %entry
2769 ; CHECK-NEXT: ld32.w t0, (sp, 0)
2770 ; CHECK-NEXT: btsti16 a0, 0
2771 ; CHECK-NEXT: movt32 a1, a3
2772 ; CHECK-NEXT: movt32 a2, t0
2773 ; CHECK-NEXT: mov16 a0, a1
2774 ; CHECK-NEXT: mov16 a1, a2
2775 ; CHECK-NEXT: rts16
2776 ;
2777 ; GENERIC-LABEL: selectC_uge_i64:
2778 ; GENERIC: # %bb.0: # %entry
2779 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2780 ; GENERIC-NEXT: subi16 sp, sp, 4
2781 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2782 ; GENERIC-NEXT: btsti16 a0, 0
2783 ; GENERIC-NEXT: bt16 .LBB69_2
2784 ; GENERIC-NEXT: # %bb.1: # %entry
2785 ; GENERIC-NEXT: mov16 a3, a1
2786 ; GENERIC-NEXT: .LBB69_2: # %entry
2787 ; GENERIC-NEXT: btsti16 a0, 0
2788 ; GENERIC-NEXT: bf16 .LBB69_4
2789 ; GENERIC-NEXT: # %bb.3:
2790 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
2791 ; GENERIC-NEXT: .LBB69_4: # %entry
2792 ; GENERIC-NEXT: mov16 a0, a3
2793 ; GENERIC-NEXT: mov16 a1, a2
2794 ; GENERIC-NEXT: addi16 sp, sp, 4
2795 ; GENERIC-NEXT: rts16
2796 entry:
2797 %ret = select i1 %c, i64 %m, i64 %n
2798 ret i64 %ret
2799 }
2802 define i16 @selectRR_uge_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
2803 ; CHECK-LABEL: selectRR_uge_i16:
2804 ; CHECK: # %bb.0: # %entry
2805 ; CHECK-NEXT: zexth16 a0, a0
2806 ; CHECK-NEXT: zexth16 a1, a1
2807 ; CHECK-NEXT: cmphs16 a1, a0
2808 ; CHECK-NEXT: movt32 a2, a3
2809 ; CHECK-NEXT: mov16 a0, a2
2810 ; CHECK-NEXT: rts16
2811 ;
2812 ; GENERIC-LABEL: selectRR_uge_i16:
2813 ; GENERIC: # %bb.0: # %entry
2814 ; GENERIC-NEXT: subi16 sp, sp, 12
2815 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
2816 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
2817 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
2818 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2819 ; GENERIC-NEXT: .cfi_offset l2, -4
2820 ; GENERIC-NEXT: .cfi_offset l1, -8
2821 ; GENERIC-NEXT: .cfi_offset l0, -12
2822 ; GENERIC-NEXT: subi16 sp, sp, 4
2823 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
2824 ; GENERIC-NEXT: movi16 l0, 0
2825 ; GENERIC-NEXT: lsli16 l1, l0, 24
2826 ; GENERIC-NEXT: lsli16 l0, l0, 16
2827 ; GENERIC-NEXT: or16 l0, l1
2828 ; GENERIC-NEXT: movi16 l1, 255
2829 ; GENERIC-NEXT: lsli16 l2, l1, 8
2830 ; GENERIC-NEXT: or16 l2, l0
2831 ; GENERIC-NEXT: or16 l2, l1
2832 ; GENERIC-NEXT: and16 a0, l2
2833 ; GENERIC-NEXT: and16 l2, a1
2834 ; GENERIC-NEXT: cmphs16 l2, a0
2835 ; GENERIC-NEXT: mvcv16 a0
2836 ; GENERIC-NEXT: movi16 a1, 1
2837 ; GENERIC-NEXT: subu16 a1, a0
2838 ; GENERIC-NEXT: btsti16 a1, 0
2839 ; GENERIC-NEXT: bt16 .LBB70_2
2840 ; GENERIC-NEXT: # %bb.1: # %entry
2841 ; GENERIC-NEXT: mov16 a3, a2
2842 ; GENERIC-NEXT: .LBB70_2: # %entry
2843 ; GENERIC-NEXT: mov16 a0, a3
2844 ; GENERIC-NEXT: addi16 sp, sp, 4
2845 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2846 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2847 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
2848 ; GENERIC-NEXT: addi16 sp, sp, 12
2849 ; GENERIC-NEXT: rts16
2850 entry:
2851 %icmp = icmp uge i16 %y, %x
2852 %ret = select i1 %icmp, i16 %m, i16 %n
2853 ret i16 %ret
2854 }
2856 define i16 @selectRI_uge_i16(i16 %x, i16 %n, i16 %m) {
2857 ; CHECK-LABEL: selectRI_uge_i16:
2858 ; CHECK: # %bb.0: # %entry
2859 ; CHECK-NEXT: zexth16 a0, a0
2860 ; CHECK-NEXT: movi16 a3, 9
2861 ; CHECK-NEXT: cmphs16 a3, a0
2862 ; CHECK-NEXT: movf32 a1, a2
2863 ; CHECK-NEXT: mov16 a0, a1
2864 ; CHECK-NEXT: rts16
2865 ;
2866 ; GENERIC-LABEL: selectRI_uge_i16:
2867 ; GENERIC: # %bb.0: # %entry
2868 ; GENERIC-NEXT: subi16 sp, sp, 8
2869 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2870 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
2871 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2872 ; GENERIC-NEXT: .cfi_offset l1, -4
2873 ; GENERIC-NEXT: .cfi_offset l0, -8
2874 ; GENERIC-NEXT: subi16 sp, sp, 4
2875 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
2876 ; GENERIC-NEXT: movi16 a3, 0
2877 ; GENERIC-NEXT: lsli16 l0, a3, 24
2878 ; GENERIC-NEXT: lsli16 a3, a3, 16
2879 ; GENERIC-NEXT: or16 a3, l0
2880 ; GENERIC-NEXT: movi16 l0, 255
2881 ; GENERIC-NEXT: lsli16 l1, l0, 8
2882 ; GENERIC-NEXT: or16 l1, a3
2883 ; GENERIC-NEXT: or16 l1, l0
2884 ; GENERIC-NEXT: and16 l1, a0
2885 ; GENERIC-NEXT: movi16 a0, 9
2886 ; GENERIC-NEXT: cmphs16 a0, l1
2887 ; GENERIC-NEXT: mvcv16 a0
2888 ; GENERIC-NEXT: btsti16 a0, 0
2889 ; GENERIC-NEXT: bt16 .LBB71_2
2890 ; GENERIC-NEXT: # %bb.1: # %entry
2891 ; GENERIC-NEXT: mov16 a2, a1
2892 ; GENERIC-NEXT: .LBB71_2: # %entry
2893 ; GENERIC-NEXT: mov16 a0, a2
2894 ; GENERIC-NEXT: addi16 sp, sp, 4
2895 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2896 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2897 ; GENERIC-NEXT: addi16 sp, sp, 8
2898 ; GENERIC-NEXT: rts16
2899 entry:
2900 %icmp = icmp uge i16 %x, 10
2901 %ret = select i1 %icmp, i16 %m, i16 %n
2902 ret i16 %ret
2903 }
2905 define i16 @selectRX_uge_i16(i16 %x, i16 %n, i16 %m) {
2906 ; CHECK-LABEL: selectRX_uge_i16:
2907 ; CHECK: # %bb.0: # %entry
2908 ; CHECK-NEXT: zexth16 a0, a0
2909 ; CHECK-NEXT: movi32 a3, 2032
2910 ; CHECK-NEXT: cmphs16 a3, a0
2911 ; CHECK-NEXT: movf32 a1, a2
2912 ; CHECK-NEXT: mov16 a0, a1
2913 ; CHECK-NEXT: rts16
2914 ;
2915 ; GENERIC-LABEL: selectRX_uge_i16:
2916 ; GENERIC: # %bb.0: # %entry
2917 ; GENERIC-NEXT: subi16 sp, sp, 8
2918 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
2919 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
2920 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
2921 ; GENERIC-NEXT: .cfi_offset l1, -4
2922 ; GENERIC-NEXT: .cfi_offset l0, -8
2923 ; GENERIC-NEXT: subi16 sp, sp, 4
2924 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
2925 ; GENERIC-NEXT: movi16 a3, 0
2926 ; GENERIC-NEXT: lsli16 l0, a3, 24
2927 ; GENERIC-NEXT: lsli16 a3, a3, 16
2928 ; GENERIC-NEXT: or16 a3, l0
2929 ; GENERIC-NEXT: movi16 l0, 255
2930 ; GENERIC-NEXT: lsli16 l1, l0, 8
2931 ; GENERIC-NEXT: or16 l1, a3
2932 ; GENERIC-NEXT: or16 l1, l0
2933 ; GENERIC-NEXT: and16 l1, a0
2934 ; GENERIC-NEXT: movi16 a0, 7
2935 ; GENERIC-NEXT: lsli16 a0, a0, 8
2936 ; GENERIC-NEXT: or16 a0, a3
2937 ; GENERIC-NEXT: movi16 a3, 240
2938 ; GENERIC-NEXT: or16 a3, a0
2939 ; GENERIC-NEXT: cmphs16 a3, l1
2940 ; GENERIC-NEXT: mvcv16 a0
2941 ; GENERIC-NEXT: btsti16 a0, 0
2942 ; GENERIC-NEXT: bt16 .LBB72_2
2943 ; GENERIC-NEXT: # %bb.1: # %entry
2944 ; GENERIC-NEXT: mov16 a2, a1
2945 ; GENERIC-NEXT: .LBB72_2: # %entry
2946 ; GENERIC-NEXT: mov16 a0, a2
2947 ; GENERIC-NEXT: addi16 sp, sp, 4
2948 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
2949 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
2950 ; GENERIC-NEXT: addi16 sp, sp, 8
2951 ; GENERIC-NEXT: rts16
2952 entry:
2953 %icmp = icmp uge i16 %x, 47777777
2954 %ret = select i1 %icmp, i16 %m, i16 %n
2955 ret i16 %ret
2956 }
2958 define i16 @selectC_uge_i16(i1 %c, i16 %n, i16 %m) {
2959 ; CHECK-LABEL: selectC_uge_i16:
2960 ; CHECK: # %bb.0: # %entry
2961 ; CHECK-NEXT: btsti16 a0, 0
2962 ; CHECK-NEXT: movt32 a1, a2
2963 ; CHECK-NEXT: mov16 a0, a1
2964 ; CHECK-NEXT: rts16
2965 ;
2966 ; GENERIC-LABEL: selectC_uge_i16:
2967 ; GENERIC: # %bb.0: # %entry
2968 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
2969 ; GENERIC-NEXT: subi16 sp, sp, 4
2970 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2971 ; GENERIC-NEXT: btsti16 a0, 0
2972 ; GENERIC-NEXT: bt16 .LBB73_2
2973 ; GENERIC-NEXT: # %bb.1: # %entry
2974 ; GENERIC-NEXT: mov16 a2, a1
2975 ; GENERIC-NEXT: .LBB73_2: # %entry
2976 ; GENERIC-NEXT: mov16 a0, a2
2977 ; GENERIC-NEXT: addi16 sp, sp, 4
2978 ; GENERIC-NEXT: rts16
2979 entry:
2980 %ret = select i1 %c, i16 %m, i16 %n
2981 ret i16 %ret
2982 }
2985 define i8 @selectRR_uge_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
2986 ; CHECK-LABEL: selectRR_uge_i8:
2987 ; CHECK: # %bb.0: # %entry
2988 ; CHECK-NEXT: zextb16 a0, a0
2989 ; CHECK-NEXT: zextb16 a1, a1
2990 ; CHECK-NEXT: cmphs16 a1, a0
2991 ; CHECK-NEXT: movt32 a2, a3
2992 ; CHECK-NEXT: mov16 a0, a2
2993 ; CHECK-NEXT: rts16
2994 ;
2995 ; GENERIC-LABEL: selectRR_uge_i8:
2996 ; GENERIC: # %bb.0: # %entry
2997 ; GENERIC-NEXT: subi16 sp, sp, 4
2998 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
2999 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3000 ; GENERIC-NEXT: .cfi_offset l0, -4
3001 ; GENERIC-NEXT: subi16 sp, sp, 4
3002 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3003 ; GENERIC-NEXT: movi16 l0, 255
3004 ; GENERIC-NEXT: and16 a0, l0
3005 ; GENERIC-NEXT: and16 a1, l0
3006 ; GENERIC-NEXT: cmphs16 a1, a0
3007 ; GENERIC-NEXT: mvcv16 a0
3008 ; GENERIC-NEXT: movi16 a1, 1
3009 ; GENERIC-NEXT: subu16 a1, a0
3010 ; GENERIC-NEXT: btsti16 a1, 0
3011 ; GENERIC-NEXT: bt16 .LBB74_2
3012 ; GENERIC-NEXT: # %bb.1: # %entry
3013 ; GENERIC-NEXT: mov16 a3, a2
3014 ; GENERIC-NEXT: .LBB74_2: # %entry
3015 ; GENERIC-NEXT: mov16 a0, a3
3016 ; GENERIC-NEXT: addi16 sp, sp, 4
3017 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3018 ; GENERIC-NEXT: addi16 sp, sp, 4
3019 ; GENERIC-NEXT: rts16
3020 entry:
3021 %icmp = icmp uge i8 %y, %x
3022 %ret = select i1 %icmp, i8 %m, i8 %n
3023 ret i8 %ret
3024 }
3026 define i8 @selectRI_uge_i8(i8 %x, i8 %n, i8 %m) {
3027 ; CHECK-LABEL: selectRI_uge_i8:
3028 ; CHECK: # %bb.0: # %entry
3029 ; CHECK-NEXT: zextb16 a0, a0
3030 ; CHECK-NEXT: movi16 a3, 9
3031 ; CHECK-NEXT: cmphs16 a3, a0
3032 ; CHECK-NEXT: movf32 a1, a2
3033 ; CHECK-NEXT: mov16 a0, a1
3034 ; CHECK-NEXT: rts16
3035 ;
3036 ; GENERIC-LABEL: selectRI_uge_i8:
3037 ; GENERIC: # %bb.0: # %entry
3038 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3039 ; GENERIC-NEXT: subi16 sp, sp, 4
3040 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3041 ; GENERIC-NEXT: movi16 a3, 255
3042 ; GENERIC-NEXT: and16 a3, a0
3043 ; GENERIC-NEXT: movi16 a0, 9
3044 ; GENERIC-NEXT: cmphs16 a0, a3
3045 ; GENERIC-NEXT: mvcv16 a0
3046 ; GENERIC-NEXT: btsti16 a0, 0
3047 ; GENERIC-NEXT: bt16 .LBB75_2
3048 ; GENERIC-NEXT: # %bb.1: # %entry
3049 ; GENERIC-NEXT: mov16 a2, a1
3050 ; GENERIC-NEXT: .LBB75_2: # %entry
3051 ; GENERIC-NEXT: mov16 a0, a2
3052 ; GENERIC-NEXT: addi16 sp, sp, 4
3053 ; GENERIC-NEXT: rts16
3054 entry:
3055 %icmp = icmp uge i8 %x, 10
3056 %ret = select i1 %icmp, i8 %m, i8 %n
3057 ret i8 %ret
3058 }
3060 define i8 @selectRX_uge_i8(i8 %x, i8 %n, i8 %m) {
3061 ; CHECK-LABEL: selectRX_uge_i8:
3062 ; CHECK: # %bb.0: # %entry
3063 ; CHECK-NEXT: zextb16 a0, a0
3064 ; CHECK-NEXT: movi16 a3, 240
3065 ; CHECK-NEXT: cmphs16 a3, a0
3066 ; CHECK-NEXT: movf32 a1, a2
3067 ; CHECK-NEXT: mov16 a0, a1
3068 ; CHECK-NEXT: rts16
3069 ;
3070 ; GENERIC-LABEL: selectRX_uge_i8:
3071 ; GENERIC: # %bb.0: # %entry
3072 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3073 ; GENERIC-NEXT: subi16 sp, sp, 4
3074 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3075 ; GENERIC-NEXT: movi16 a3, 255
3076 ; GENERIC-NEXT: and16 a3, a0
3077 ; GENERIC-NEXT: movi16 a0, 240
3078 ; GENERIC-NEXT: cmphs16 a0, a3
3079 ; GENERIC-NEXT: mvcv16 a0
3080 ; GENERIC-NEXT: btsti16 a0, 0
3081 ; GENERIC-NEXT: bt16 .LBB76_2
3082 ; GENERIC-NEXT: # %bb.1: # %entry
3083 ; GENERIC-NEXT: mov16 a2, a1
3084 ; GENERIC-NEXT: .LBB76_2: # %entry
3085 ; GENERIC-NEXT: mov16 a0, a2
3086 ; GENERIC-NEXT: addi16 sp, sp, 4
3087 ; GENERIC-NEXT: rts16
3088 entry:
3089 %icmp = icmp uge i8 %x, 47777777
3090 %ret = select i1 %icmp, i8 %m, i8 %n
3091 ret i8 %ret
3092 }
3094 define i8 @selectC_uge_i8(i1 %c, i8 %n, i8 %m) {
3095 ; CHECK-LABEL: selectC_uge_i8:
3096 ; CHECK: # %bb.0: # %entry
3097 ; CHECK-NEXT: btsti16 a0, 0
3098 ; CHECK-NEXT: movt32 a1, a2
3099 ; CHECK-NEXT: mov16 a0, a1
3100 ; CHECK-NEXT: rts16
3101 ;
3102 ; GENERIC-LABEL: selectC_uge_i8:
3103 ; GENERIC: # %bb.0: # %entry
3104 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3105 ; GENERIC-NEXT: subi16 sp, sp, 4
3106 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3107 ; GENERIC-NEXT: btsti16 a0, 0
3108 ; GENERIC-NEXT: bt16 .LBB77_2
3109 ; GENERIC-NEXT: # %bb.1: # %entry
3110 ; GENERIC-NEXT: mov16 a2, a1
3111 ; GENERIC-NEXT: .LBB77_2: # %entry
3112 ; GENERIC-NEXT: mov16 a0, a2
3113 ; GENERIC-NEXT: addi16 sp, sp, 4
3114 ; GENERIC-NEXT: rts16
3115 entry:
3116 %ret = select i1 %c, i8 %m, i8 %n
3117 ret i8 %ret
3118 }
3121 define i1 @selectRR_uge_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
3122 ; CHECK-LABEL: selectRR_uge_i1:
3123 ; CHECK: # %bb.0: # %entry
3124 ; CHECK-NEXT: btsti16 a0, 0
3125 ; CHECK-NEXT: mov16 a0, a3
3126 ; CHECK-NEXT: movt32 a0, a2
3127 ; CHECK-NEXT: btsti16 a1, 0
3128 ; CHECK-NEXT: movt32 a0, a3
3129 ; CHECK-NEXT: rts16
3130 ;
3131 ; GENERIC-LABEL: selectRR_uge_i1:
3132 ; GENERIC: # %bb.0: # %entry
3133 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3134 ; GENERIC-NEXT: subi16 sp, sp, 4
3135 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3136 ; GENERIC-NEXT: btsti16 a0, 0
3137 ; GENERIC-NEXT: bt16 .LBB78_2
3138 ; GENERIC-NEXT: # %bb.1: # %entry
3139 ; GENERIC-NEXT: mov16 a2, a3
3140 ; GENERIC-NEXT: .LBB78_2: # %entry
3141 ; GENERIC-NEXT: btsti16 a1, 0
3142 ; GENERIC-NEXT: bt16 .LBB78_4
3143 ; GENERIC-NEXT: # %bb.3: # %entry
3144 ; GENERIC-NEXT: mov16 a3, a2
3145 ; GENERIC-NEXT: .LBB78_4: # %entry
3146 ; GENERIC-NEXT: mov16 a0, a3
3147 ; GENERIC-NEXT: addi16 sp, sp, 4
3148 ; GENERIC-NEXT: rts16
3149 entry:
3150 %icmp = icmp uge i1 %y, %x
3151 %ret = select i1 %icmp, i1 %m, i1 %n
3152 ret i1 %ret
3153 }
3155 define i1 @selectRI_uge_i1(i1 %x, i1 %n, i1 %m) {
3156 ; CHECK-LABEL: selectRI_uge_i1:
3157 ; CHECK: # %bb.0: # %entry
3158 ; CHECK-NEXT: mov16 a0, a2
3159 ; CHECK-NEXT: rts16
3160 ;
3161 ; GENERIC-LABEL: selectRI_uge_i1:
3162 ; GENERIC: # %bb.0: # %entry
3163 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3164 ; GENERIC-NEXT: subi16 sp, sp, 4
3165 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3166 ; GENERIC-NEXT: mov16 a0, a2
3167 ; GENERIC-NEXT: addi16 sp, sp, 4
3168 ; GENERIC-NEXT: rts16
3169 entry:
3170 %icmp = icmp uge i1 %x, 10
3171 %ret = select i1 %icmp, i1 %m, i1 %n
3172 ret i1 %ret
3173 }
3175 define i1 @selectRX_uge_i1(i1 %x, i1 %n, i1 %m) {
3176 ; CHECK-LABEL: selectRX_uge_i1:
3177 ; CHECK: # %bb.0: # %entry
3178 ; CHECK-NEXT: btsti16 a0, 0
3179 ; CHECK-NEXT: movt32 a1, a2
3180 ; CHECK-NEXT: mov16 a0, a1
3181 ; CHECK-NEXT: rts16
3182 ;
3183 ; GENERIC-LABEL: selectRX_uge_i1:
3184 ; GENERIC: # %bb.0: # %entry
3185 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3186 ; GENERIC-NEXT: subi16 sp, sp, 4
3187 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3188 ; GENERIC-NEXT: btsti16 a0, 0
3189 ; GENERIC-NEXT: bt16 .LBB80_2
3190 ; GENERIC-NEXT: # %bb.1: # %entry
3191 ; GENERIC-NEXT: mov16 a2, a1
3192 ; GENERIC-NEXT: .LBB80_2: # %entry
3193 ; GENERIC-NEXT: mov16 a0, a2
3194 ; GENERIC-NEXT: addi16 sp, sp, 4
3195 ; GENERIC-NEXT: rts16
3196 entry:
3197 %icmp = icmp uge i1 %x, 47777777
3198 %ret = select i1 %icmp, i1 %m, i1 %n
3199 ret i1 %ret
3200 }
3202 define i1 @selectC_uge_i1(i1 %c, i1 %n, i1 %m) {
3203 ; CHECK-LABEL: selectC_uge_i1:
3204 ; CHECK: # %bb.0: # %entry
3205 ; CHECK-NEXT: btsti16 a0, 0
3206 ; CHECK-NEXT: movt32 a1, a2
3207 ; CHECK-NEXT: mov16 a0, a1
3208 ; CHECK-NEXT: rts16
3209 ;
3210 ; GENERIC-LABEL: selectC_uge_i1:
3211 ; GENERIC: # %bb.0: # %entry
3212 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3213 ; GENERIC-NEXT: subi16 sp, sp, 4
3214 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3215 ; GENERIC-NEXT: btsti16 a0, 0
3216 ; GENERIC-NEXT: bt16 .LBB81_2
3217 ; GENERIC-NEXT: # %bb.1: # %entry
3218 ; GENERIC-NEXT: mov16 a2, a1
3219 ; GENERIC-NEXT: .LBB81_2: # %entry
3220 ; GENERIC-NEXT: mov16 a0, a2
3221 ; GENERIC-NEXT: addi16 sp, sp, 4
3222 ; GENERIC-NEXT: rts16
3223 entry:
3224 %ret = select i1 %c, i1 %m, i1 %n
3225 ret i1 %ret
3226 }
3229 define i32 @selectRR_ult_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
3230 ; CHECK-LABEL: selectRR_ult_i32:
3231 ; CHECK: # %bb.0: # %entry
3232 ; CHECK-NEXT: cmphs16 a1, a0
3233 ; CHECK-NEXT: movf32 a2, a3
3234 ; CHECK-NEXT: mov16 a0, a2
3235 ; CHECK-NEXT: rts16
3236 ;
3237 ; GENERIC-LABEL: selectRR_ult_i32:
3238 ; GENERIC: # %bb.0: # %entry
3239 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3240 ; GENERIC-NEXT: subi16 sp, sp, 4
3241 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3242 ; GENERIC-NEXT: cmphs16 a1, a0
3243 ; GENERIC-NEXT: mvcv16 a0
3244 ; GENERIC-NEXT: btsti16 a0, 0
3245 ; GENERIC-NEXT: bt16 .LBB82_2
3246 ; GENERIC-NEXT: # %bb.1: # %entry
3247 ; GENERIC-NEXT: mov16 a3, a2
3248 ; GENERIC-NEXT: .LBB82_2: # %entry
3249 ; GENERIC-NEXT: mov16 a0, a3
3250 ; GENERIC-NEXT: addi16 sp, sp, 4
3251 ; GENERIC-NEXT: rts16
3252 entry:
3253 %icmp = icmp ult i32 %y, %x
3254 %ret = select i1 %icmp, i32 %m, i32 %n
3255 ret i32 %ret
3256 }
3258 define i32 @selectRI_ult_i32(i32 %x, i32 %n, i32 %m) {
3259 ; CHECK-LABEL: selectRI_ult_i32:
3260 ; CHECK: # %bb.0: # %entry
3261 ; CHECK-NEXT: cmphsi16 a0, 10
3262 ; CHECK-NEXT: movf32 a1, a2
3263 ; CHECK-NEXT: mov16 a0, a1
3264 ; CHECK-NEXT: rts16
3265 ;
3266 ; GENERIC-LABEL: selectRI_ult_i32:
3267 ; GENERIC: # %bb.0: # %entry
3268 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3269 ; GENERIC-NEXT: subi16 sp, sp, 4
3270 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3271 ; GENERIC-NEXT: cmphsi16 a0, 10
3272 ; GENERIC-NEXT: mvcv16 a0
3273 ; GENERIC-NEXT: btsti16 a0, 0
3274 ; GENERIC-NEXT: bt16 .LBB83_2
3275 ; GENERIC-NEXT: # %bb.1: # %entry
3276 ; GENERIC-NEXT: mov16 a2, a1
3277 ; GENERIC-NEXT: .LBB83_2: # %entry
3278 ; GENERIC-NEXT: mov16 a0, a2
3279 ; GENERIC-NEXT: addi16 sp, sp, 4
3280 ; GENERIC-NEXT: rts16
3281 entry:
3282 %icmp = icmp ult i32 %x, 10
3283 %ret = select i1 %icmp, i32 %m, i32 %n
3284 ret i32 %ret
3285 }
3287 define i32 @selectRX_ult_i32(i32 %x, i32 %n, i32 %m) {
3288 ; CHECK-LABEL: selectRX_ult_i32:
3289 ; CHECK: # %bb.0: # %entry
3290 ; CHECK-NEXT: movih32 a3, 729
3291 ; CHECK-NEXT: ori32 a3, a3, 2033
3292 ; CHECK-NEXT: cmphs16 a0, a3
3293 ; CHECK-NEXT: movf32 a1, a2
3294 ; CHECK-NEXT: mov16 a0, a1
3295 ; CHECK-NEXT: rts16
3296 ;
3297 ; GENERIC-LABEL: selectRX_ult_i32:
3298 ; GENERIC: # %bb.0: # %entry
3299 ; GENERIC-NEXT: subi16 sp, sp, 4
3300 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3301 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3302 ; GENERIC-NEXT: .cfi_offset l0, -4
3303 ; GENERIC-NEXT: subi16 sp, sp, 4
3304 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3305 ; GENERIC-NEXT: movi16 a3, 2
3306 ; GENERIC-NEXT: lsli16 a3, a3, 24
3307 ; GENERIC-NEXT: movi16 l0, 217
3308 ; GENERIC-NEXT: lsli16 l0, l0, 16
3309 ; GENERIC-NEXT: or16 l0, a3
3310 ; GENERIC-NEXT: movi16 a3, 7
3311 ; GENERIC-NEXT: lsli16 a3, a3, 8
3312 ; GENERIC-NEXT: or16 a3, l0
3313 ; GENERIC-NEXT: movi16 l0, 241
3314 ; GENERIC-NEXT: or16 l0, a3
3315 ; GENERIC-NEXT: cmphs16 a0, l0
3316 ; GENERIC-NEXT: mvcv16 a0
3317 ; GENERIC-NEXT: btsti16 a0, 0
3318 ; GENERIC-NEXT: bt16 .LBB84_2
3319 ; GENERIC-NEXT: # %bb.1: # %entry
3320 ; GENERIC-NEXT: mov16 a2, a1
3321 ; GENERIC-NEXT: .LBB84_2: # %entry
3322 ; GENERIC-NEXT: mov16 a0, a2
3323 ; GENERIC-NEXT: addi16 sp, sp, 4
3324 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3325 ; GENERIC-NEXT: addi16 sp, sp, 4
3326 ; GENERIC-NEXT: rts16
3327 entry:
3328 %icmp = icmp ult i32 %x, 47777777
3329 %ret = select i1 %icmp, i32 %m, i32 %n
3330 ret i32 %ret
3331 }
3333 define i32 @selectC_ult_i32(i1 %c, i32 %n, i32 %m) {
3334 ; CHECK-LABEL: selectC_ult_i32:
3335 ; CHECK: # %bb.0: # %entry
3336 ; CHECK-NEXT: btsti16 a0, 0
3337 ; CHECK-NEXT: movt32 a1, a2
3338 ; CHECK-NEXT: mov16 a0, a1
3339 ; CHECK-NEXT: rts16
3340 ;
3341 ; GENERIC-LABEL: selectC_ult_i32:
3342 ; GENERIC: # %bb.0: # %entry
3343 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3344 ; GENERIC-NEXT: subi16 sp, sp, 4
3345 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3346 ; GENERIC-NEXT: btsti16 a0, 0
3347 ; GENERIC-NEXT: bt16 .LBB85_2
3348 ; GENERIC-NEXT: # %bb.1: # %entry
3349 ; GENERIC-NEXT: mov16 a2, a1
3350 ; GENERIC-NEXT: .LBB85_2: # %entry
3351 ; GENERIC-NEXT: mov16 a0, a2
3352 ; GENERIC-NEXT: addi16 sp, sp, 4
3353 ; GENERIC-NEXT: rts16
3354 entry:
3355 %ret = select i1 %c, i32 %m, i32 %n
3356 ret i32 %ret
3357 }
3359 define i64 @selectRR_ult_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
3360 ; CHECK-LABEL: selectRR_ult_i64:
3361 ; CHECK: # %bb.0: # %entry
3362 ; CHECK-NEXT: .cfi_def_cfa_offset 0
3363 ; CHECK-NEXT: subi16 sp, sp, 8
3364 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3365 ; CHECK-NEXT: cmpne16 a3, a1
3366 ; CHECK-NEXT: mvc32 t0
3367 ; CHECK-NEXT: st32.w t0, (sp, 4)
3368 ; CHECK-NEXT: cmphs16 a3, a1
3369 ; CHECK-NEXT: mvcv16 a1
3370 ; CHECK-NEXT: cmphs16 a2, a0
3371 ; CHECK-NEXT: mvcv16 a0
3372 ; CHECK-NEXT: ld16.w a2, (sp, 4)
3373 ; CHECK-NEXT: btsti16 a2, 0
3374 ; CHECK-NEXT: movf32 a1, a0
3375 ; CHECK-NEXT: addi16 a2, sp, 8
3376 ; CHECK-NEXT: addi16 a0, sp, 16
3377 ; CHECK-NEXT: btsti16 a1, 0
3378 ; CHECK-NEXT: movt32 a2, a0
3379 ; CHECK-NEXT: ld16.w a0, (a2, 0)
3380 ; CHECK-NEXT: ld16.w a1, (a2, 4)
3381 ; CHECK-NEXT: addi16 sp, sp, 8
3382 ; CHECK-NEXT: rts16
3383 ;
3384 ; GENERIC-LABEL: selectRR_ult_i64:
3385 ; GENERIC: # %bb.0: # %entry
3386 ; GENERIC-NEXT: subi16 sp, sp, 4
3387 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3388 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3389 ; GENERIC-NEXT: .cfi_offset l0, -4
3390 ; GENERIC-NEXT: subi16 sp, sp, 4
3391 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3392 ; GENERIC-NEXT: cmphs16 a3, a1
3393 ; GENERIC-NEXT: mvcv16 l0
3394 ; GENERIC-NEXT: cmphs16 a2, a0
3395 ; GENERIC-NEXT: mvcv16 a0
3396 ; GENERIC-NEXT: cmpne16 a3, a1
3397 ; GENERIC-NEXT: mvcv16 a1
3398 ; GENERIC-NEXT: btsti16 a1, 0
3399 ; GENERIC-NEXT: bt16 .LBB86_2
3400 ; GENERIC-NEXT: # %bb.1: # %entry
3401 ; GENERIC-NEXT: mov16 a0, l0
3402 ; GENERIC-NEXT: .LBB86_2: # %entry
3403 ; GENERIC-NEXT: btsti16 a0, 0
3404 ; GENERIC-NEXT: bt16 .LBB86_4
3405 ; GENERIC-NEXT: # %bb.3: # %entry
3406 ; GENERIC-NEXT: movi16 a0, 8
3407 ; GENERIC-NEXT: br32 .LBB86_5
3408 ; GENERIC-NEXT: .LBB86_4:
3409 ; GENERIC-NEXT: movi16 a0, 16
3410 ; GENERIC-NEXT: .LBB86_5: # %entry
3411 ; GENERIC-NEXT: addu16 a0, sp
3412 ; GENERIC-NEXT: mov16 a1, a0
3413 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
3414 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
3415 ; GENERIC-NEXT: addi16 sp, sp, 4
3416 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3417 ; GENERIC-NEXT: addi16 sp, sp, 4
3418 ; GENERIC-NEXT: rts16
3419 entry:
3420 %icmp = icmp ult i64 %y, %x
3421 %ret = select i1 %icmp, i64 %m, i64 %n
3422 ret i64 %ret
3423 }
3425 define i64 @selectRI_ult_i64(i64 %x, i64 %n, i64 %m) {
3426 ; CHECK-LABEL: selectRI_ult_i64:
3427 ; CHECK: # %bb.0: # %entry
3428 ; CHECK-NEXT: .cfi_def_cfa_offset 0
3429 ; CHECK-NEXT: subi16 sp, sp, 8
3430 ; CHECK-NEXT: .cfi_def_cfa_offset 8
3431 ; CHECK-NEXT: ld32.w t0, (sp, 12)
3432 ; CHECK-NEXT: ld32.w t1, (sp, 8)
3433 ; CHECK-NEXT: cmpnei16 a1, 0
3434 ; CHECK-NEXT: st16.w a2, (sp, 0)
3435 ; CHECK-NEXT: mvc32 a1
3436 ; CHECK-NEXT: st16.w a1, (sp, 4)
3437 ; CHECK-NEXT: cmphsi16 a0, 10
3438 ; CHECK-NEXT: mvcv16 a0
3439 ; CHECK-NEXT: movi16 a1, 0
3440 ; CHECK-NEXT: ld16.w a2, (sp, 4)
3441 ; CHECK-NEXT: btsti16 a2, 0
3442 ; CHECK-NEXT: ld16.w a2, (sp, 0)
3443 ; CHECK-NEXT: movf32 a1, a0
3444 ; CHECK-NEXT: btsti16 a1, 0
3445 ; CHECK-NEXT: movt32 a2, t1
3446 ; CHECK-NEXT: movt32 a3, t0
3447 ; CHECK-NEXT: mov16 a0, a2
3448 ; CHECK-NEXT: mov16 a1, a3
3449 ; CHECK-NEXT: addi16 sp, sp, 8
3450 ; CHECK-NEXT: rts16
3451 ;
3452 ; GENERIC-LABEL: selectRI_ult_i64:
3453 ; GENERIC: # %bb.0: # %entry
3454 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3455 ; GENERIC-NEXT: subi16 sp, sp, 4
3456 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3457 ; GENERIC-NEXT: cmphsi16 a0, 10
3458 ; GENERIC-NEXT: mvcv16 a0
3459 ; GENERIC-NEXT: cmpnei16 a1, 0
3460 ; GENERIC-NEXT: mvcv16 a1
3461 ; GENERIC-NEXT: btsti16 a1, 0
3462 ; GENERIC-NEXT: bf16 .LBB87_5
3463 ; GENERIC-NEXT: # %bb.1: # %entry
3464 ; GENERIC-NEXT: btsti16 a0, 0
3465 ; GENERIC-NEXT: bt16 .LBB87_6
3466 ; GENERIC-NEXT: .LBB87_2: # %entry
3467 ; GENERIC-NEXT: btsti16 a0, 0
3468 ; GENERIC-NEXT: bf16 .LBB87_4
3469 ; GENERIC-NEXT: .LBB87_3:
3470 ; GENERIC-NEXT: ld16.w a3, (sp, 8)
3471 ; GENERIC-NEXT: .LBB87_4: # %entry
3472 ; GENERIC-NEXT: mov16 a0, a2
3473 ; GENERIC-NEXT: mov16 a1, a3
3474 ; GENERIC-NEXT: addi16 sp, sp, 4
3475 ; GENERIC-NEXT: rts16
3476 ; GENERIC-NEXT: .LBB87_5: # %entry
3477 ; GENERIC-NEXT: movi16 a0, 0
3478 ; GENERIC-NEXT: btsti16 a0, 0
3479 ; GENERIC-NEXT: bf16 .LBB87_2
3480 ; GENERIC-NEXT: .LBB87_6:
3481 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
3482 ; GENERIC-NEXT: btsti16 a0, 0
3483 ; GENERIC-NEXT: bt16 .LBB87_3
3484 ; GENERIC-NEXT: br32 .LBB87_4
3485 entry:
3486 %icmp = icmp ult i64 %x, 10
3487 %ret = select i1 %icmp, i64 %m, i64 %n
3488 ret i64 %ret
3489 }
3491 define i64 @selectRX_ult_i64(i64 %x, i64 %n, i64 %m) {
3492 ; CHECK-LABEL: selectRX_ult_i64:
3493 ; CHECK: # %bb.0: # %entry
3494 ; CHECK-NEXT: subi16 sp, sp, 4
3495 ; CHECK-NEXT: .cfi_def_cfa_offset 4
3496 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3497 ; CHECK-NEXT: .cfi_offset l0, -4
3498 ; CHECK-NEXT: .cfi_def_cfa_offset 4
3499 ; CHECK-NEXT: ld32.w t0, (sp, 8)
3500 ; CHECK-NEXT: ld32.w t1, (sp, 4)
3501 ; CHECK-NEXT: movih32 l0, 729
3502 ; CHECK-NEXT: ori32 l0, l0, 2033
3503 ; CHECK-NEXT: cmphs16 a0, l0
3504 ; CHECK-NEXT: mvcv16 a0
3505 ; CHECK-NEXT: cmpnei16 a1, 0
3506 ; CHECK-NEXT: movi16 a1, 0
3507 ; CHECK-NEXT: movf32 a1, a0
3508 ; CHECK-NEXT: btsti16 a1, 0
3509 ; CHECK-NEXT: movt32 a2, t1
3510 ; CHECK-NEXT: movt32 a3, t0
3511 ; CHECK-NEXT: mov16 a0, a2
3512 ; CHECK-NEXT: mov16 a1, a3
3513 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3514 ; CHECK-NEXT: addi16 sp, sp, 4
3515 ; CHECK-NEXT: rts16
3516 ;
3517 ; GENERIC-LABEL: selectRX_ult_i64:
3518 ; GENERIC: # %bb.0: # %entry
3519 ; GENERIC-NEXT: subi16 sp, sp, 8
3520 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3521 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
3522 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3523 ; GENERIC-NEXT: .cfi_offset l1, -4
3524 ; GENERIC-NEXT: .cfi_offset l0, -8
3525 ; GENERIC-NEXT: subi16 sp, sp, 4
3526 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
3527 ; GENERIC-NEXT: movi16 l0, 2
3528 ; GENERIC-NEXT: lsli16 l0, l0, 24
3529 ; GENERIC-NEXT: movi16 l1, 217
3530 ; GENERIC-NEXT: lsli16 l1, l1, 16
3531 ; GENERIC-NEXT: or16 l1, l0
3532 ; GENERIC-NEXT: movi16 l0, 7
3533 ; GENERIC-NEXT: lsli16 l0, l0, 8
3534 ; GENERIC-NEXT: or16 l0, l1
3535 ; GENERIC-NEXT: movi16 l1, 241
3536 ; GENERIC-NEXT: or16 l1, l0
3537 ; GENERIC-NEXT: cmphs16 a0, l1
3538 ; GENERIC-NEXT: mvcv16 a0
3539 ; GENERIC-NEXT: cmpnei16 a1, 0
3540 ; GENERIC-NEXT: mvcv16 a1
3541 ; GENERIC-NEXT: btsti16 a1, 0
3542 ; GENERIC-NEXT: bf16 .LBB88_5
3543 ; GENERIC-NEXT: # %bb.1: # %entry
3544 ; GENERIC-NEXT: btsti16 a0, 0
3545 ; GENERIC-NEXT: bt16 .LBB88_6
3546 ; GENERIC-NEXT: .LBB88_2: # %entry
3547 ; GENERIC-NEXT: btsti16 a0, 0
3548 ; GENERIC-NEXT: bf16 .LBB88_4
3549 ; GENERIC-NEXT: .LBB88_3:
3550 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
3551 ; GENERIC-NEXT: .LBB88_4: # %entry
3552 ; GENERIC-NEXT: mov16 a0, a2
3553 ; GENERIC-NEXT: mov16 a1, a3
3554 ; GENERIC-NEXT: addi16 sp, sp, 4
3555 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3556 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
3557 ; GENERIC-NEXT: addi16 sp, sp, 8
3558 ; GENERIC-NEXT: rts16
3559 ; GENERIC-NEXT: .LBB88_5: # %entry
3560 ; GENERIC-NEXT: movi16 a0, 0
3561 ; GENERIC-NEXT: btsti16 a0, 0
3562 ; GENERIC-NEXT: bf16 .LBB88_2
3563 ; GENERIC-NEXT: .LBB88_6:
3564 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
3565 ; GENERIC-NEXT: btsti16 a0, 0
3566 ; GENERIC-NEXT: bt16 .LBB88_3
3567 ; GENERIC-NEXT: br32 .LBB88_4
3568 entry:
3569 %icmp = icmp ult i64 %x, 47777777
3570 %ret = select i1 %icmp, i64 %m, i64 %n
3571 ret i64 %ret
3572 }
3574 define i64 @selectC_ult_i64(i1 %c, i64 %n, i64 %m) {
3575 ; CHECK-LABEL: selectC_ult_i64:
3576 ; CHECK: # %bb.0: # %entry
3577 ; CHECK-NEXT: ld32.w t0, (sp, 0)
3578 ; CHECK-NEXT: btsti16 a0, 0
3579 ; CHECK-NEXT: movt32 a1, a3
3580 ; CHECK-NEXT: movt32 a2, t0
3581 ; CHECK-NEXT: mov16 a0, a1
3582 ; CHECK-NEXT: mov16 a1, a2
3583 ; CHECK-NEXT: rts16
3584 ;
3585 ; GENERIC-LABEL: selectC_ult_i64:
3586 ; GENERIC: # %bb.0: # %entry
3587 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3588 ; GENERIC-NEXT: subi16 sp, sp, 4
3589 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3590 ; GENERIC-NEXT: btsti16 a0, 0
3591 ; GENERIC-NEXT: bt16 .LBB89_2
3592 ; GENERIC-NEXT: # %bb.1: # %entry
3593 ; GENERIC-NEXT: mov16 a3, a1
3594 ; GENERIC-NEXT: .LBB89_2: # %entry
3595 ; GENERIC-NEXT: btsti16 a0, 0
3596 ; GENERIC-NEXT: bf16 .LBB89_4
3597 ; GENERIC-NEXT: # %bb.3:
3598 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
3599 ; GENERIC-NEXT: .LBB89_4: # %entry
3600 ; GENERIC-NEXT: mov16 a0, a3
3601 ; GENERIC-NEXT: mov16 a1, a2
3602 ; GENERIC-NEXT: addi16 sp, sp, 4
3603 ; GENERIC-NEXT: rts16
3604 entry:
3605 %ret = select i1 %c, i64 %m, i64 %n
3606 ret i64 %ret
3607 }
3610 define i16 @selectRR_ult_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
3611 ; CHECK-LABEL: selectRR_ult_i16:
3612 ; CHECK: # %bb.0: # %entry
3613 ; CHECK-NEXT: zexth16 a0, a0
3614 ; CHECK-NEXT: zexth16 a1, a1
3615 ; CHECK-NEXT: cmphs16 a1, a0
3616 ; CHECK-NEXT: movf32 a2, a3
3617 ; CHECK-NEXT: mov16 a0, a2
3618 ; CHECK-NEXT: rts16
3619 ;
3620 ; GENERIC-LABEL: selectRR_ult_i16:
3621 ; GENERIC: # %bb.0: # %entry
3622 ; GENERIC-NEXT: subi16 sp, sp, 12
3623 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
3624 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
3625 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
3626 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3627 ; GENERIC-NEXT: .cfi_offset l2, -4
3628 ; GENERIC-NEXT: .cfi_offset l1, -8
3629 ; GENERIC-NEXT: .cfi_offset l0, -12
3630 ; GENERIC-NEXT: subi16 sp, sp, 4
3631 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
3632 ; GENERIC-NEXT: movi16 l0, 0
3633 ; GENERIC-NEXT: lsli16 l1, l0, 24
3634 ; GENERIC-NEXT: lsli16 l0, l0, 16
3635 ; GENERIC-NEXT: or16 l0, l1
3636 ; GENERIC-NEXT: movi16 l1, 255
3637 ; GENERIC-NEXT: lsli16 l2, l1, 8
3638 ; GENERIC-NEXT: or16 l2, l0
3639 ; GENERIC-NEXT: or16 l2, l1
3640 ; GENERIC-NEXT: and16 a0, l2
3641 ; GENERIC-NEXT: and16 l2, a1
3642 ; GENERIC-NEXT: cmphs16 l2, a0
3643 ; GENERIC-NEXT: mvcv16 a0
3644 ; GENERIC-NEXT: btsti16 a0, 0
3645 ; GENERIC-NEXT: bt16 .LBB90_2
3646 ; GENERIC-NEXT: # %bb.1: # %entry
3647 ; GENERIC-NEXT: mov16 a3, a2
3648 ; GENERIC-NEXT: .LBB90_2: # %entry
3649 ; GENERIC-NEXT: mov16 a0, a3
3650 ; GENERIC-NEXT: addi16 sp, sp, 4
3651 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3652 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
3653 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
3654 ; GENERIC-NEXT: addi16 sp, sp, 12
3655 ; GENERIC-NEXT: rts16
3656 entry:
3657 %icmp = icmp ult i16 %y, %x
3658 %ret = select i1 %icmp, i16 %m, i16 %n
3659 ret i16 %ret
3660 }
3662 define i16 @selectRI_ult_i16(i16 %x, i16 %n, i16 %m) {
3663 ; CHECK-LABEL: selectRI_ult_i16:
3664 ; CHECK: # %bb.0: # %entry
3665 ; CHECK-NEXT: zexth16 a0, a0
3666 ; CHECK-NEXT: cmphsi16 a0, 10
3667 ; CHECK-NEXT: movf32 a1, a2
3668 ; CHECK-NEXT: mov16 a0, a1
3669 ; CHECK-NEXT: rts16
3670 ;
3671 ; GENERIC-LABEL: selectRI_ult_i16:
3672 ; GENERIC: # %bb.0: # %entry
3673 ; GENERIC-NEXT: subi16 sp, sp, 8
3674 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3675 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
3676 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3677 ; GENERIC-NEXT: .cfi_offset l1, -4
3678 ; GENERIC-NEXT: .cfi_offset l0, -8
3679 ; GENERIC-NEXT: subi16 sp, sp, 4
3680 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
3681 ; GENERIC-NEXT: movi16 a3, 0
3682 ; GENERIC-NEXT: lsli16 l0, a3, 24
3683 ; GENERIC-NEXT: lsli16 a3, a3, 16
3684 ; GENERIC-NEXT: or16 a3, l0
3685 ; GENERIC-NEXT: movi16 l0, 255
3686 ; GENERIC-NEXT: lsli16 l1, l0, 8
3687 ; GENERIC-NEXT: or16 l1, a3
3688 ; GENERIC-NEXT: or16 l1, l0
3689 ; GENERIC-NEXT: and16 l1, a0
3690 ; GENERIC-NEXT: cmphsi16 l1, 10
3691 ; GENERIC-NEXT: mvcv16 a0
3692 ; GENERIC-NEXT: btsti16 a0, 0
3693 ; GENERIC-NEXT: bt16 .LBB91_2
3694 ; GENERIC-NEXT: # %bb.1: # %entry
3695 ; GENERIC-NEXT: mov16 a2, a1
3696 ; GENERIC-NEXT: .LBB91_2: # %entry
3697 ; GENERIC-NEXT: mov16 a0, a2
3698 ; GENERIC-NEXT: addi16 sp, sp, 4
3699 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3700 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
3701 ; GENERIC-NEXT: addi16 sp, sp, 8
3702 ; GENERIC-NEXT: rts16
3703 entry:
3704 %icmp = icmp ult i16 %x, 10
3705 %ret = select i1 %icmp, i16 %m, i16 %n
3706 ret i16 %ret
3707 }
3709 define i16 @selectRX_ult_i16(i16 %x, i16 %n, i16 %m) {
3710 ; CHECK-LABEL: selectRX_ult_i16:
3711 ; CHECK: # %bb.0: # %entry
3712 ; CHECK-NEXT: zexth16 a0, a0
3713 ; CHECK-NEXT: cmphsi32 a0, 2033
3714 ; CHECK-NEXT: movf32 a1, a2
3715 ; CHECK-NEXT: mov16 a0, a1
3716 ; CHECK-NEXT: rts16
3717 ;
3718 ; GENERIC-LABEL: selectRX_ult_i16:
3719 ; GENERIC: # %bb.0: # %entry
3720 ; GENERIC-NEXT: subi16 sp, sp, 8
3721 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3722 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
3723 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3724 ; GENERIC-NEXT: .cfi_offset l1, -4
3725 ; GENERIC-NEXT: .cfi_offset l0, -8
3726 ; GENERIC-NEXT: subi16 sp, sp, 4
3727 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
3728 ; GENERIC-NEXT: movi16 a3, 0
3729 ; GENERIC-NEXT: lsli16 l0, a3, 24
3730 ; GENERIC-NEXT: lsli16 a3, a3, 16
3731 ; GENERIC-NEXT: or16 a3, l0
3732 ; GENERIC-NEXT: movi16 l0, 255
3733 ; GENERIC-NEXT: lsli16 l1, l0, 8
3734 ; GENERIC-NEXT: or16 l1, a3
3735 ; GENERIC-NEXT: or16 l1, l0
3736 ; GENERIC-NEXT: and16 l1, a0
3737 ; GENERIC-NEXT: movi16 a0, 7
3738 ; GENERIC-NEXT: lsli16 a0, a0, 8
3739 ; GENERIC-NEXT: or16 a0, a3
3740 ; GENERIC-NEXT: movi16 a3, 241
3741 ; GENERIC-NEXT: or16 a3, a0
3742 ; GENERIC-NEXT: cmphs16 l1, a3
3743 ; GENERIC-NEXT: mvcv16 a0
3744 ; GENERIC-NEXT: btsti16 a0, 0
3745 ; GENERIC-NEXT: bt16 .LBB92_2
3746 ; GENERIC-NEXT: # %bb.1: # %entry
3747 ; GENERIC-NEXT: mov16 a2, a1
3748 ; GENERIC-NEXT: .LBB92_2: # %entry
3749 ; GENERIC-NEXT: mov16 a0, a2
3750 ; GENERIC-NEXT: addi16 sp, sp, 4
3751 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3752 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
3753 ; GENERIC-NEXT: addi16 sp, sp, 8
3754 ; GENERIC-NEXT: rts16
3755 entry:
3756 %icmp = icmp ult i16 %x, 47777777
3757 %ret = select i1 %icmp, i16 %m, i16 %n
3758 ret i16 %ret
3759 }
3761 define i16 @selectC_ult_i16(i1 %c, i16 %n, i16 %m) {
3762 ; CHECK-LABEL: selectC_ult_i16:
3763 ; CHECK: # %bb.0: # %entry
3764 ; CHECK-NEXT: btsti16 a0, 0
3765 ; CHECK-NEXT: movt32 a1, a2
3766 ; CHECK-NEXT: mov16 a0, a1
3767 ; CHECK-NEXT: rts16
3768 ;
3769 ; GENERIC-LABEL: selectC_ult_i16:
3770 ; GENERIC: # %bb.0: # %entry
3771 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3772 ; GENERIC-NEXT: subi16 sp, sp, 4
3773 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3774 ; GENERIC-NEXT: btsti16 a0, 0
3775 ; GENERIC-NEXT: bt16 .LBB93_2
3776 ; GENERIC-NEXT: # %bb.1: # %entry
3777 ; GENERIC-NEXT: mov16 a2, a1
3778 ; GENERIC-NEXT: .LBB93_2: # %entry
3779 ; GENERIC-NEXT: mov16 a0, a2
3780 ; GENERIC-NEXT: addi16 sp, sp, 4
3781 ; GENERIC-NEXT: rts16
3782 entry:
3783 %ret = select i1 %c, i16 %m, i16 %n
3784 ret i16 %ret
3785 }
3788 define i8 @selectRR_ult_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
3789 ; CHECK-LABEL: selectRR_ult_i8:
3790 ; CHECK: # %bb.0: # %entry
3791 ; CHECK-NEXT: zextb16 a0, a0
3792 ; CHECK-NEXT: zextb16 a1, a1
3793 ; CHECK-NEXT: cmphs16 a1, a0
3794 ; CHECK-NEXT: movf32 a2, a3
3795 ; CHECK-NEXT: mov16 a0, a2
3796 ; CHECK-NEXT: rts16
3797 ;
3798 ; GENERIC-LABEL: selectRR_ult_i8:
3799 ; GENERIC: # %bb.0: # %entry
3800 ; GENERIC-NEXT: subi16 sp, sp, 4
3801 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3802 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3803 ; GENERIC-NEXT: .cfi_offset l0, -4
3804 ; GENERIC-NEXT: subi16 sp, sp, 4
3805 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3806 ; GENERIC-NEXT: movi16 l0, 255
3807 ; GENERIC-NEXT: and16 a0, l0
3808 ; GENERIC-NEXT: and16 a1, l0
3809 ; GENERIC-NEXT: cmphs16 a1, a0
3810 ; GENERIC-NEXT: mvcv16 a0
3811 ; GENERIC-NEXT: btsti16 a0, 0
3812 ; GENERIC-NEXT: bt16 .LBB94_2
3813 ; GENERIC-NEXT: # %bb.1: # %entry
3814 ; GENERIC-NEXT: mov16 a3, a2
3815 ; GENERIC-NEXT: .LBB94_2: # %entry
3816 ; GENERIC-NEXT: mov16 a0, a3
3817 ; GENERIC-NEXT: addi16 sp, sp, 4
3818 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3819 ; GENERIC-NEXT: addi16 sp, sp, 4
3820 ; GENERIC-NEXT: rts16
3821 entry:
3822 %icmp = icmp ult i8 %y, %x
3823 %ret = select i1 %icmp, i8 %m, i8 %n
3824 ret i8 %ret
3825 }
3827 define i8 @selectRI_ult_i8(i8 %x, i8 %n, i8 %m) {
3828 ; CHECK-LABEL: selectRI_ult_i8:
3829 ; CHECK: # %bb.0: # %entry
3830 ; CHECK-NEXT: zextb16 a0, a0
3831 ; CHECK-NEXT: cmphsi16 a0, 10
3832 ; CHECK-NEXT: movf32 a1, a2
3833 ; CHECK-NEXT: mov16 a0, a1
3834 ; CHECK-NEXT: rts16
3835 ;
3836 ; GENERIC-LABEL: selectRI_ult_i8:
3837 ; GENERIC: # %bb.0: # %entry
3838 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3839 ; GENERIC-NEXT: subi16 sp, sp, 4
3840 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3841 ; GENERIC-NEXT: movi16 a3, 255
3842 ; GENERIC-NEXT: and16 a3, a0
3843 ; GENERIC-NEXT: cmphsi16 a3, 10
3844 ; GENERIC-NEXT: mvcv16 a0
3845 ; GENERIC-NEXT: btsti16 a0, 0
3846 ; GENERIC-NEXT: bt16 .LBB95_2
3847 ; GENERIC-NEXT: # %bb.1: # %entry
3848 ; GENERIC-NEXT: mov16 a2, a1
3849 ; GENERIC-NEXT: .LBB95_2: # %entry
3850 ; GENERIC-NEXT: mov16 a0, a2
3851 ; GENERIC-NEXT: addi16 sp, sp, 4
3852 ; GENERIC-NEXT: rts16
3853 entry:
3854 %icmp = icmp ult i8 %x, 10
3855 %ret = select i1 %icmp, i8 %m, i8 %n
3856 ret i8 %ret
3857 }
3859 define i8 @selectRX_ult_i8(i8 %x, i8 %n, i8 %m) {
3860 ; CHECK-LABEL: selectRX_ult_i8:
3861 ; CHECK: # %bb.0: # %entry
3862 ; CHECK-NEXT: zextb16 a0, a0
3863 ; CHECK-NEXT: cmphsi32 a0, 241
3864 ; CHECK-NEXT: movf32 a1, a2
3865 ; CHECK-NEXT: mov16 a0, a1
3866 ; CHECK-NEXT: rts16
3867 ;
3868 ; GENERIC-LABEL: selectRX_ult_i8:
3869 ; GENERIC: # %bb.0: # %entry
3870 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3871 ; GENERIC-NEXT: subi16 sp, sp, 4
3872 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3873 ; GENERIC-NEXT: movi16 a3, 255
3874 ; GENERIC-NEXT: and16 a3, a0
3875 ; GENERIC-NEXT: movi16 a0, 241
3876 ; GENERIC-NEXT: cmphs16 a3, a0
3877 ; GENERIC-NEXT: mvcv16 a0
3878 ; GENERIC-NEXT: btsti16 a0, 0
3879 ; GENERIC-NEXT: bt16 .LBB96_2
3880 ; GENERIC-NEXT: # %bb.1: # %entry
3881 ; GENERIC-NEXT: mov16 a2, a1
3882 ; GENERIC-NEXT: .LBB96_2: # %entry
3883 ; GENERIC-NEXT: mov16 a0, a2
3884 ; GENERIC-NEXT: addi16 sp, sp, 4
3885 ; GENERIC-NEXT: rts16
3886 entry:
3887 %icmp = icmp ult i8 %x, 47777777
3888 %ret = select i1 %icmp, i8 %m, i8 %n
3889 ret i8 %ret
3890 }
3892 define i8 @selectC_ult_i8(i1 %c, i8 %n, i8 %m) {
3893 ; CHECK-LABEL: selectC_ult_i8:
3894 ; CHECK: # %bb.0: # %entry
3895 ; CHECK-NEXT: btsti16 a0, 0
3896 ; CHECK-NEXT: movt32 a1, a2
3897 ; CHECK-NEXT: mov16 a0, a1
3898 ; CHECK-NEXT: rts16
3899 ;
3900 ; GENERIC-LABEL: selectC_ult_i8:
3901 ; GENERIC: # %bb.0: # %entry
3902 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3903 ; GENERIC-NEXT: subi16 sp, sp, 4
3904 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3905 ; GENERIC-NEXT: btsti16 a0, 0
3906 ; GENERIC-NEXT: bt16 .LBB97_2
3907 ; GENERIC-NEXT: # %bb.1: # %entry
3908 ; GENERIC-NEXT: mov16 a2, a1
3909 ; GENERIC-NEXT: .LBB97_2: # %entry
3910 ; GENERIC-NEXT: mov16 a0, a2
3911 ; GENERIC-NEXT: addi16 sp, sp, 4
3912 ; GENERIC-NEXT: rts16
3913 entry:
3914 %ret = select i1 %c, i8 %m, i8 %n
3915 ret i8 %ret
3916 }
3919 define i1 @selectRR_ult_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
3920 ; CHECK-LABEL: selectRR_ult_i1:
3921 ; CHECK: # %bb.0: # %entry
3922 ; CHECK-NEXT: btsti16 a1, 0
3923 ; CHECK-NEXT: movt32 a3, a2
3924 ; CHECK-NEXT: btsti16 a0, 0
3925 ; CHECK-NEXT: movt32 a2, a3
3926 ; CHECK-NEXT: mov16 a0, a2
3927 ; CHECK-NEXT: rts16
3928 ;
3929 ; GENERIC-LABEL: selectRR_ult_i1:
3930 ; GENERIC: # %bb.0: # %entry
3931 ; GENERIC-NEXT: subi16 sp, sp, 4
3932 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3933 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
3934 ; GENERIC-NEXT: .cfi_offset l0, -4
3935 ; GENERIC-NEXT: subi16 sp, sp, 4
3936 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
3937 ; GENERIC-NEXT: mov16 l0, a0
3938 ; GENERIC-NEXT: btsti16 a1, 0
3939 ; GENERIC-NEXT: mov16 a0, a2
3940 ; GENERIC-NEXT: bt16 .LBB98_2
3941 ; GENERIC-NEXT: # %bb.1: # %entry
3942 ; GENERIC-NEXT: mov16 a0, a3
3943 ; GENERIC-NEXT: .LBB98_2: # %entry
3944 ; GENERIC-NEXT: btsti16 l0, 0
3945 ; GENERIC-NEXT: bt16 .LBB98_4
3946 ; GENERIC-NEXT: # %bb.3: # %entry
3947 ; GENERIC-NEXT: mov16 a0, a2
3948 ; GENERIC-NEXT: .LBB98_4: # %entry
3949 ; GENERIC-NEXT: addi16 sp, sp, 4
3950 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
3951 ; GENERIC-NEXT: addi16 sp, sp, 4
3952 ; GENERIC-NEXT: rts16
3953 entry:
3954 %icmp = icmp ult i1 %y, %x
3955 %ret = select i1 %icmp, i1 %m, i1 %n
3956 ret i1 %ret
3957 }
3959 define i1 @selectRI_ult_i1(i1 %x, i1 %n, i1 %m) {
3960 ; CHECK-LABEL: selectRI_ult_i1:
3961 ; CHECK: # %bb.0: # %entry
3962 ; CHECK-NEXT: mov16 a0, a1
3963 ; CHECK-NEXT: rts16
3964 ;
3965 ; GENERIC-LABEL: selectRI_ult_i1:
3966 ; GENERIC: # %bb.0: # %entry
3967 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3968 ; GENERIC-NEXT: subi16 sp, sp, 4
3969 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3970 ; GENERIC-NEXT: mov16 a0, a1
3971 ; GENERIC-NEXT: addi16 sp, sp, 4
3972 ; GENERIC-NEXT: rts16
3973 entry:
3974 %icmp = icmp ult i1 %x, 10
3975 %ret = select i1 %icmp, i1 %m, i1 %n
3976 ret i1 %ret
3977 }
3979 define i1 @selectRX_ult_i1(i1 %x, i1 %n, i1 %m) {
3980 ; CHECK-LABEL: selectRX_ult_i1:
3981 ; CHECK: # %bb.0: # %entry
3982 ; CHECK-NEXT: btsti16 a0, 0
3983 ; CHECK-NEXT: movt32 a2, a1
3984 ; CHECK-NEXT: mov16 a0, a2
3985 ; CHECK-NEXT: rts16
3986 ;
3987 ; GENERIC-LABEL: selectRX_ult_i1:
3988 ; GENERIC: # %bb.0: # %entry
3989 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
3990 ; GENERIC-NEXT: subi16 sp, sp, 4
3991 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
3992 ; GENERIC-NEXT: btsti16 a0, 0
3993 ; GENERIC-NEXT: bt16 .LBB100_2
3994 ; GENERIC-NEXT: # %bb.1: # %entry
3995 ; GENERIC-NEXT: mov16 a1, a2
3996 ; GENERIC-NEXT: .LBB100_2: # %entry
3997 ; GENERIC-NEXT: mov16 a0, a1
3998 ; GENERIC-NEXT: addi16 sp, sp, 4
3999 ; GENERIC-NEXT: rts16
4000 entry:
4001 %icmp = icmp ult i1 %x, 47777777
4002 %ret = select i1 %icmp, i1 %m, i1 %n
4003 ret i1 %ret
4004 }
4006 define i1 @selectC_ult_i1(i1 %c, i1 %n, i1 %m) {
4007 ; CHECK-LABEL: selectC_ult_i1:
4008 ; CHECK: # %bb.0: # %entry
4009 ; CHECK-NEXT: btsti16 a0, 0
4010 ; CHECK-NEXT: movt32 a1, a2
4011 ; CHECK-NEXT: mov16 a0, a1
4012 ; CHECK-NEXT: rts16
4013 ;
4014 ; GENERIC-LABEL: selectC_ult_i1:
4015 ; GENERIC: # %bb.0: # %entry
4016 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4017 ; GENERIC-NEXT: subi16 sp, sp, 4
4018 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4019 ; GENERIC-NEXT: btsti16 a0, 0
4020 ; GENERIC-NEXT: bt16 .LBB101_2
4021 ; GENERIC-NEXT: # %bb.1: # %entry
4022 ; GENERIC-NEXT: mov16 a2, a1
4023 ; GENERIC-NEXT: .LBB101_2: # %entry
4024 ; GENERIC-NEXT: mov16 a0, a2
4025 ; GENERIC-NEXT: addi16 sp, sp, 4
4026 ; GENERIC-NEXT: rts16
4027 entry:
4028 %ret = select i1 %c, i1 %m, i1 %n
4029 ret i1 %ret
4030 }
4032 define i32 @selectRR_ule_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
4033 ; CHECK-LABEL: selectRR_ule_i32:
4034 ; CHECK: # %bb.0: # %entry
4035 ; CHECK-NEXT: cmphs16 a0, a1
4036 ; CHECK-NEXT: movt32 a2, a3
4037 ; CHECK-NEXT: mov16 a0, a2
4038 ; CHECK-NEXT: rts16
4039 ;
4040 ; GENERIC-LABEL: selectRR_ule_i32:
4041 ; GENERIC: # %bb.0: # %entry
4042 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4043 ; GENERIC-NEXT: subi16 sp, sp, 4
4044 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4045 ; GENERIC-NEXT: cmphs16 a0, a1
4046 ; GENERIC-NEXT: mvcv16 a0
4047 ; GENERIC-NEXT: movi16 a1, 1
4048 ; GENERIC-NEXT: subu16 a1, a0
4049 ; GENERIC-NEXT: btsti16 a1, 0
4050 ; GENERIC-NEXT: bt16 .LBB102_2
4051 ; GENERIC-NEXT: # %bb.1: # %entry
4052 ; GENERIC-NEXT: mov16 a3, a2
4053 ; GENERIC-NEXT: .LBB102_2: # %entry
4054 ; GENERIC-NEXT: mov16 a0, a3
4055 ; GENERIC-NEXT: addi16 sp, sp, 4
4056 ; GENERIC-NEXT: rts16
4057 entry:
4058 %icmp = icmp ule i32 %y, %x
4059 %ret = select i1 %icmp, i32 %m, i32 %n
4060 ret i32 %ret
4061 }
4063 define i32 @selectRI_ule_i32(i32 %x, i32 %n, i32 %m) {
4064 ; CHECK-LABEL: selectRI_ule_i32:
4065 ; CHECK: # %bb.0: # %entry
4066 ; CHECK-NEXT: cmphsi16 a0, 11
4067 ; CHECK-NEXT: movf32 a1, a2
4068 ; CHECK-NEXT: mov16 a0, a1
4069 ; CHECK-NEXT: rts16
4070 ;
4071 ; GENERIC-LABEL: selectRI_ule_i32:
4072 ; GENERIC: # %bb.0: # %entry
4073 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4074 ; GENERIC-NEXT: subi16 sp, sp, 4
4075 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4076 ; GENERIC-NEXT: cmphsi16 a0, 11
4077 ; GENERIC-NEXT: mvcv16 a0
4078 ; GENERIC-NEXT: btsti16 a0, 0
4079 ; GENERIC-NEXT: bt16 .LBB103_2
4080 ; GENERIC-NEXT: # %bb.1: # %entry
4081 ; GENERIC-NEXT: mov16 a2, a1
4082 ; GENERIC-NEXT: .LBB103_2: # %entry
4083 ; GENERIC-NEXT: mov16 a0, a2
4084 ; GENERIC-NEXT: addi16 sp, sp, 4
4085 ; GENERIC-NEXT: rts16
4086 entry:
4087 %icmp = icmp ule i32 %x, 10
4088 %ret = select i1 %icmp, i32 %m, i32 %n
4089 ret i32 %ret
4090 }
4092 define i32 @selectRX_ule_i32(i32 %x, i32 %n, i32 %m) {
4093 ; CHECK-LABEL: selectRX_ule_i32:
4094 ; CHECK: # %bb.0: # %entry
4095 ; CHECK-NEXT: movih32 a3, 729
4096 ; CHECK-NEXT: ori32 a3, a3, 2034
4097 ; CHECK-NEXT: cmphs16 a0, a3
4098 ; CHECK-NEXT: movf32 a1, a2
4099 ; CHECK-NEXT: mov16 a0, a1
4100 ; CHECK-NEXT: rts16
4101 ;
4102 ; GENERIC-LABEL: selectRX_ule_i32:
4103 ; GENERIC: # %bb.0: # %entry
4104 ; GENERIC-NEXT: subi16 sp, sp, 4
4105 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4106 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4107 ; GENERIC-NEXT: .cfi_offset l0, -4
4108 ; GENERIC-NEXT: subi16 sp, sp, 4
4109 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
4110 ; GENERIC-NEXT: movi16 a3, 2
4111 ; GENERIC-NEXT: lsli16 a3, a3, 24
4112 ; GENERIC-NEXT: movi16 l0, 217
4113 ; GENERIC-NEXT: lsli16 l0, l0, 16
4114 ; GENERIC-NEXT: or16 l0, a3
4115 ; GENERIC-NEXT: movi16 a3, 7
4116 ; GENERIC-NEXT: lsli16 a3, a3, 8
4117 ; GENERIC-NEXT: or16 a3, l0
4118 ; GENERIC-NEXT: movi16 l0, 242
4119 ; GENERIC-NEXT: or16 l0, a3
4120 ; GENERIC-NEXT: cmphs16 a0, l0
4121 ; GENERIC-NEXT: mvcv16 a0
4122 ; GENERIC-NEXT: btsti16 a0, 0
4123 ; GENERIC-NEXT: bt16 .LBB104_2
4124 ; GENERIC-NEXT: # %bb.1: # %entry
4125 ; GENERIC-NEXT: mov16 a2, a1
4126 ; GENERIC-NEXT: .LBB104_2: # %entry
4127 ; GENERIC-NEXT: mov16 a0, a2
4128 ; GENERIC-NEXT: addi16 sp, sp, 4
4129 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4130 ; GENERIC-NEXT: addi16 sp, sp, 4
4131 ; GENERIC-NEXT: rts16
4132 entry:
4133 %icmp = icmp ule i32 %x, 47777777
4134 %ret = select i1 %icmp, i32 %m, i32 %n
4135 ret i32 %ret
4136 }
4138 define i32 @selectC_ule_i32(i1 %c, i32 %n, i32 %m) {
4139 ; CHECK-LABEL: selectC_ule_i32:
4140 ; CHECK: # %bb.0: # %entry
4141 ; CHECK-NEXT: btsti16 a0, 0
4142 ; CHECK-NEXT: movt32 a1, a2
4143 ; CHECK-NEXT: mov16 a0, a1
4144 ; CHECK-NEXT: rts16
4145 ;
4146 ; GENERIC-LABEL: selectC_ule_i32:
4147 ; GENERIC: # %bb.0: # %entry
4148 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4149 ; GENERIC-NEXT: subi16 sp, sp, 4
4150 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4151 ; GENERIC-NEXT: btsti16 a0, 0
4152 ; GENERIC-NEXT: bt16 .LBB105_2
4153 ; GENERIC-NEXT: # %bb.1: # %entry
4154 ; GENERIC-NEXT: mov16 a2, a1
4155 ; GENERIC-NEXT: .LBB105_2: # %entry
4156 ; GENERIC-NEXT: mov16 a0, a2
4157 ; GENERIC-NEXT: addi16 sp, sp, 4
4158 ; GENERIC-NEXT: rts16
4159 entry:
4160 %ret = select i1 %c, i32 %m, i32 %n
4161 ret i32 %ret
4162 }
4164 define i64 @selectRR_ule_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
4165 ; CHECK-LABEL: selectRR_ule_i64:
4166 ; CHECK: # %bb.0: # %entry
4167 ; CHECK-NEXT: .cfi_def_cfa_offset 0
4168 ; CHECK-NEXT: subi16 sp, sp, 16
4169 ; CHECK-NEXT: .cfi_def_cfa_offset 16
4170 ; CHECK-NEXT: cmphs16 a1, a3
4171 ; CHECK-NEXT: mvc32 t0
4172 ; CHECK-NEXT: st32.w t0, (sp, 12)
4173 ; CHECK-NEXT: cmphs16 a0, a2
4174 ; CHECK-NEXT: mvc32 a0
4175 ; CHECK-NEXT: st16.w a0, (sp, 4)
4176 ; CHECK-NEXT: cmpne16 a3, a1
4177 ; CHECK-NEXT: mvc32 a0
4178 ; CHECK-NEXT: st16.w a0, (sp, 8)
4179 ; CHECK-NEXT: ld16.w a0, (sp, 4)
4180 ; CHECK-NEXT: btsti16 a0, 0
4181 ; CHECK-NEXT: mvc32 a0
4182 ; CHECK-NEXT: ld16.w a1, (sp, 12)
4183 ; CHECK-NEXT: btsti16 a1, 0
4184 ; CHECK-NEXT: mvc32 a1
4185 ; CHECK-NEXT: ld16.w a2, (sp, 8)
4186 ; CHECK-NEXT: btsti16 a2, 0
4187 ; CHECK-NEXT: movf32 a1, a0
4188 ; CHECK-NEXT: addi16 a2, sp, 16
4189 ; CHECK-NEXT: addi16 a0, sp, 24
4190 ; CHECK-NEXT: btsti16 a1, 0
4191 ; CHECK-NEXT: movt32 a2, a0
4192 ; CHECK-NEXT: ld16.w a0, (a2, 0)
4193 ; CHECK-NEXT: ld16.w a1, (a2, 4)
4194 ; CHECK-NEXT: addi16 sp, sp, 16
4195 ; CHECK-NEXT: rts16
4196 ;
4197 ; GENERIC-LABEL: selectRR_ule_i64:
4198 ; GENERIC: # %bb.0: # %entry
4199 ; GENERIC-NEXT: subi16 sp, sp, 8
4200 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
4201 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
4202 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4203 ; GENERIC-NEXT: .cfi_offset l1, -4
4204 ; GENERIC-NEXT: .cfi_offset l0, -8
4205 ; GENERIC-NEXT: subi16 sp, sp, 4
4206 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
4207 ; GENERIC-NEXT: cmphs16 a1, a3
4208 ; GENERIC-NEXT: mvcv16 l1
4209 ; GENERIC-NEXT: movi16 l0, 1
4210 ; GENERIC-NEXT: cmphs16 a0, a2
4211 ; GENERIC-NEXT: mvcv16 a0
4212 ; GENERIC-NEXT: cmpne16 a3, a1
4213 ; GENERIC-NEXT: mvcv16 a1
4214 ; GENERIC-NEXT: btsti16 a1, 0
4215 ; GENERIC-NEXT: bt16 .LBB106_3
4216 ; GENERIC-NEXT: # %bb.1: # %entry
4217 ; GENERIC-NEXT: subu16 l0, l1
4218 ; GENERIC-NEXT: btsti16 l0, 0
4219 ; GENERIC-NEXT: bf16 .LBB106_4
4220 ; GENERIC-NEXT: .LBB106_2:
4221 ; GENERIC-NEXT: movi16 a0, 20
4222 ; GENERIC-NEXT: br32 .LBB106_5
4223 ; GENERIC-NEXT: .LBB106_3:
4224 ; GENERIC-NEXT: subu16 l0, a0
4225 ; GENERIC-NEXT: btsti16 l0, 0
4226 ; GENERIC-NEXT: bt16 .LBB106_2
4227 ; GENERIC-NEXT: .LBB106_4: # %entry
4228 ; GENERIC-NEXT: movi16 a0, 12
4229 ; GENERIC-NEXT: .LBB106_5: # %entry
4230 ; GENERIC-NEXT: addu16 a0, sp
4231 ; GENERIC-NEXT: mov16 a1, a0
4232 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
4233 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
4234 ; GENERIC-NEXT: addi16 sp, sp, 4
4235 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4236 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
4237 ; GENERIC-NEXT: addi16 sp, sp, 8
4238 ; GENERIC-NEXT: rts16
4239 entry:
4240 %icmp = icmp ule i64 %y, %x
4241 %ret = select i1 %icmp, i64 %m, i64 %n
4242 ret i64 %ret
4243 }
4245 define i64 @selectRI_ule_i64(i64 %x, i64 %n, i64 %m) {
4246 ; CHECK-LABEL: selectRI_ule_i64:
4247 ; CHECK: # %bb.0: # %entry
4248 ; CHECK-NEXT: .cfi_def_cfa_offset 0
4249 ; CHECK-NEXT: subi16 sp, sp, 8
4250 ; CHECK-NEXT: .cfi_def_cfa_offset 8
4251 ; CHECK-NEXT: ld32.w t0, (sp, 12)
4252 ; CHECK-NEXT: ld32.w t1, (sp, 8)
4253 ; CHECK-NEXT: cmpnei16 a1, 0
4254 ; CHECK-NEXT: st16.w a2, (sp, 0)
4255 ; CHECK-NEXT: mvc32 a1
4256 ; CHECK-NEXT: st16.w a1, (sp, 4)
4257 ; CHECK-NEXT: cmphsi16 a0, 11
4258 ; CHECK-NEXT: mvcv16 a0
4259 ; CHECK-NEXT: movi16 a1, 0
4260 ; CHECK-NEXT: ld16.w a2, (sp, 4)
4261 ; CHECK-NEXT: btsti16 a2, 0
4262 ; CHECK-NEXT: ld16.w a2, (sp, 0)
4263 ; CHECK-NEXT: movf32 a1, a0
4264 ; CHECK-NEXT: btsti16 a1, 0
4265 ; CHECK-NEXT: movt32 a2, t1
4266 ; CHECK-NEXT: movt32 a3, t0
4267 ; CHECK-NEXT: mov16 a0, a2
4268 ; CHECK-NEXT: mov16 a1, a3
4269 ; CHECK-NEXT: addi16 sp, sp, 8
4270 ; CHECK-NEXT: rts16
4271 ;
4272 ; GENERIC-LABEL: selectRI_ule_i64:
4273 ; GENERIC: # %bb.0: # %entry
4274 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4275 ; GENERIC-NEXT: subi16 sp, sp, 4
4276 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4277 ; GENERIC-NEXT: cmphsi16 a0, 11
4278 ; GENERIC-NEXT: mvcv16 a0
4279 ; GENERIC-NEXT: cmpnei16 a1, 0
4280 ; GENERIC-NEXT: mvcv16 a1
4281 ; GENERIC-NEXT: btsti16 a1, 0
4282 ; GENERIC-NEXT: bf16 .LBB107_5
4283 ; GENERIC-NEXT: # %bb.1: # %entry
4284 ; GENERIC-NEXT: btsti16 a0, 0
4285 ; GENERIC-NEXT: bt16 .LBB107_6
4286 ; GENERIC-NEXT: .LBB107_2: # %entry
4287 ; GENERIC-NEXT: btsti16 a0, 0
4288 ; GENERIC-NEXT: bf16 .LBB107_4
4289 ; GENERIC-NEXT: .LBB107_3:
4290 ; GENERIC-NEXT: ld16.w a3, (sp, 8)
4291 ; GENERIC-NEXT: .LBB107_4: # %entry
4292 ; GENERIC-NEXT: mov16 a0, a2
4293 ; GENERIC-NEXT: mov16 a1, a3
4294 ; GENERIC-NEXT: addi16 sp, sp, 4
4295 ; GENERIC-NEXT: rts16
4296 ; GENERIC-NEXT: .LBB107_5: # %entry
4297 ; GENERIC-NEXT: movi16 a0, 0
4298 ; GENERIC-NEXT: btsti16 a0, 0
4299 ; GENERIC-NEXT: bf16 .LBB107_2
4300 ; GENERIC-NEXT: .LBB107_6:
4301 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
4302 ; GENERIC-NEXT: btsti16 a0, 0
4303 ; GENERIC-NEXT: bt16 .LBB107_3
4304 ; GENERIC-NEXT: br32 .LBB107_4
4305 entry:
4306 %icmp = icmp ule i64 %x, 10
4307 %ret = select i1 %icmp, i64 %m, i64 %n
4308 ret i64 %ret
4309 }
4311 define i64 @selectRX_ule_i64(i64 %x, i64 %n, i64 %m) {
4312 ; CHECK-LABEL: selectRX_ule_i64:
4313 ; CHECK: # %bb.0: # %entry
4314 ; CHECK-NEXT: subi16 sp, sp, 4
4315 ; CHECK-NEXT: .cfi_def_cfa_offset 4
4316 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4317 ; CHECK-NEXT: .cfi_offset l0, -4
4318 ; CHECK-NEXT: .cfi_def_cfa_offset 4
4319 ; CHECK-NEXT: ld32.w t0, (sp, 8)
4320 ; CHECK-NEXT: ld32.w t1, (sp, 4)
4321 ; CHECK-NEXT: movih32 l0, 729
4322 ; CHECK-NEXT: ori32 l0, l0, 2034
4323 ; CHECK-NEXT: cmphs16 a0, l0
4324 ; CHECK-NEXT: mvcv16 a0
4325 ; CHECK-NEXT: cmpnei16 a1, 0
4326 ; CHECK-NEXT: movi16 a1, 0
4327 ; CHECK-NEXT: movf32 a1, a0
4328 ; CHECK-NEXT: btsti16 a1, 0
4329 ; CHECK-NEXT: movt32 a2, t1
4330 ; CHECK-NEXT: movt32 a3, t0
4331 ; CHECK-NEXT: mov16 a0, a2
4332 ; CHECK-NEXT: mov16 a1, a3
4333 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4334 ; CHECK-NEXT: addi16 sp, sp, 4
4335 ; CHECK-NEXT: rts16
4336 ;
4337 ; GENERIC-LABEL: selectRX_ule_i64:
4338 ; GENERIC: # %bb.0: # %entry
4339 ; GENERIC-NEXT: subi16 sp, sp, 8
4340 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
4341 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
4342 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4343 ; GENERIC-NEXT: .cfi_offset l1, -4
4344 ; GENERIC-NEXT: .cfi_offset l0, -8
4345 ; GENERIC-NEXT: subi16 sp, sp, 4
4346 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
4347 ; GENERIC-NEXT: movi16 l0, 2
4348 ; GENERIC-NEXT: lsli16 l0, l0, 24
4349 ; GENERIC-NEXT: movi16 l1, 217
4350 ; GENERIC-NEXT: lsli16 l1, l1, 16
4351 ; GENERIC-NEXT: or16 l1, l0
4352 ; GENERIC-NEXT: movi16 l0, 7
4353 ; GENERIC-NEXT: lsli16 l0, l0, 8
4354 ; GENERIC-NEXT: or16 l0, l1
4355 ; GENERIC-NEXT: movi16 l1, 242
4356 ; GENERIC-NEXT: or16 l1, l0
4357 ; GENERIC-NEXT: cmphs16 a0, l1
4358 ; GENERIC-NEXT: mvcv16 a0
4359 ; GENERIC-NEXT: cmpnei16 a1, 0
4360 ; GENERIC-NEXT: mvcv16 a1
4361 ; GENERIC-NEXT: btsti16 a1, 0
4362 ; GENERIC-NEXT: bf16 .LBB108_5
4363 ; GENERIC-NEXT: # %bb.1: # %entry
4364 ; GENERIC-NEXT: btsti16 a0, 0
4365 ; GENERIC-NEXT: bt16 .LBB108_6
4366 ; GENERIC-NEXT: .LBB108_2: # %entry
4367 ; GENERIC-NEXT: btsti16 a0, 0
4368 ; GENERIC-NEXT: bf16 .LBB108_4
4369 ; GENERIC-NEXT: .LBB108_3:
4370 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
4371 ; GENERIC-NEXT: .LBB108_4: # %entry
4372 ; GENERIC-NEXT: mov16 a0, a2
4373 ; GENERIC-NEXT: mov16 a1, a3
4374 ; GENERIC-NEXT: addi16 sp, sp, 4
4375 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4376 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
4377 ; GENERIC-NEXT: addi16 sp, sp, 8
4378 ; GENERIC-NEXT: rts16
4379 ; GENERIC-NEXT: .LBB108_5: # %entry
4380 ; GENERIC-NEXT: movi16 a0, 0
4381 ; GENERIC-NEXT: btsti16 a0, 0
4382 ; GENERIC-NEXT: bf16 .LBB108_2
4383 ; GENERIC-NEXT: .LBB108_6:
4384 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
4385 ; GENERIC-NEXT: btsti16 a0, 0
4386 ; GENERIC-NEXT: bt16 .LBB108_3
4387 ; GENERIC-NEXT: br32 .LBB108_4
4388 entry:
4389 %icmp = icmp ule i64 %x, 47777777
4390 %ret = select i1 %icmp, i64 %m, i64 %n
4391 ret i64 %ret
4392 }
4394 define i64 @selectC_ule_i64(i1 %c, i64 %n, i64 %m) {
4395 ; CHECK-LABEL: selectC_ule_i64:
4396 ; CHECK: # %bb.0: # %entry
4397 ; CHECK-NEXT: ld32.w t0, (sp, 0)
4398 ; CHECK-NEXT: btsti16 a0, 0
4399 ; CHECK-NEXT: movt32 a1, a3
4400 ; CHECK-NEXT: movt32 a2, t0
4401 ; CHECK-NEXT: mov16 a0, a1
4402 ; CHECK-NEXT: mov16 a1, a2
4403 ; CHECK-NEXT: rts16
4404 ;
4405 ; GENERIC-LABEL: selectC_ule_i64:
4406 ; GENERIC: # %bb.0: # %entry
4407 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4408 ; GENERIC-NEXT: subi16 sp, sp, 4
4409 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4410 ; GENERIC-NEXT: btsti16 a0, 0
4411 ; GENERIC-NEXT: bt16 .LBB109_2
4412 ; GENERIC-NEXT: # %bb.1: # %entry
4413 ; GENERIC-NEXT: mov16 a3, a1
4414 ; GENERIC-NEXT: .LBB109_2: # %entry
4415 ; GENERIC-NEXT: btsti16 a0, 0
4416 ; GENERIC-NEXT: bf16 .LBB109_4
4417 ; GENERIC-NEXT: # %bb.3:
4418 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
4419 ; GENERIC-NEXT: .LBB109_4: # %entry
4420 ; GENERIC-NEXT: mov16 a0, a3
4421 ; GENERIC-NEXT: mov16 a1, a2
4422 ; GENERIC-NEXT: addi16 sp, sp, 4
4423 ; GENERIC-NEXT: rts16
4424 entry:
4425 %ret = select i1 %c, i64 %m, i64 %n
4426 ret i64 %ret
4427 }
4430 define i16 @selectRR_ule_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
4431 ; CHECK-LABEL: selectRR_ule_i16:
4432 ; CHECK: # %bb.0: # %entry
4433 ; CHECK-NEXT: zexth16 a1, a1
4434 ; CHECK-NEXT: zexth16 a0, a0
4435 ; CHECK-NEXT: cmphs16 a0, a1
4436 ; CHECK-NEXT: movt32 a2, a3
4437 ; CHECK-NEXT: mov16 a0, a2
4438 ; CHECK-NEXT: rts16
4439 ;
4440 ; GENERIC-LABEL: selectRR_ule_i16:
4441 ; GENERIC: # %bb.0: # %entry
4442 ; GENERIC-NEXT: subi16 sp, sp, 12
4443 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
4444 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
4445 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
4446 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4447 ; GENERIC-NEXT: .cfi_offset l2, -4
4448 ; GENERIC-NEXT: .cfi_offset l1, -8
4449 ; GENERIC-NEXT: .cfi_offset l0, -12
4450 ; GENERIC-NEXT: subi16 sp, sp, 4
4451 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
4452 ; GENERIC-NEXT: movi16 l0, 0
4453 ; GENERIC-NEXT: lsli16 l1, l0, 24
4454 ; GENERIC-NEXT: lsli16 l0, l0, 16
4455 ; GENERIC-NEXT: or16 l0, l1
4456 ; GENERIC-NEXT: movi16 l1, 255
4457 ; GENERIC-NEXT: lsli16 l2, l1, 8
4458 ; GENERIC-NEXT: or16 l2, l0
4459 ; GENERIC-NEXT: or16 l2, l1
4460 ; GENERIC-NEXT: and16 a1, l2
4461 ; GENERIC-NEXT: and16 l2, a0
4462 ; GENERIC-NEXT: cmphs16 l2, a1
4463 ; GENERIC-NEXT: mvcv16 a0
4464 ; GENERIC-NEXT: movi16 a1, 1
4465 ; GENERIC-NEXT: subu16 a1, a0
4466 ; GENERIC-NEXT: btsti16 a1, 0
4467 ; GENERIC-NEXT: bt16 .LBB110_2
4468 ; GENERIC-NEXT: # %bb.1: # %entry
4469 ; GENERIC-NEXT: mov16 a3, a2
4470 ; GENERIC-NEXT: .LBB110_2: # %entry
4471 ; GENERIC-NEXT: mov16 a0, a3
4472 ; GENERIC-NEXT: addi16 sp, sp, 4
4473 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4474 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
4475 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
4476 ; GENERIC-NEXT: addi16 sp, sp, 12
4477 ; GENERIC-NEXT: rts16
4478 entry:
4479 %icmp = icmp ule i16 %y, %x
4480 %ret = select i1 %icmp, i16 %m, i16 %n
4481 ret i16 %ret
4482 }
4484 define i16 @selectRI_ule_i16(i16 %x, i16 %n, i16 %m) {
4485 ; CHECK-LABEL: selectRI_ule_i16:
4486 ; CHECK: # %bb.0: # %entry
4487 ; CHECK-NEXT: zexth16 a0, a0
4488 ; CHECK-NEXT: cmphsi16 a0, 11
4489 ; CHECK-NEXT: movf32 a1, a2
4490 ; CHECK-NEXT: mov16 a0, a1
4491 ; CHECK-NEXT: rts16
4492 ;
4493 ; GENERIC-LABEL: selectRI_ule_i16:
4494 ; GENERIC: # %bb.0: # %entry
4495 ; GENERIC-NEXT: subi16 sp, sp, 8
4496 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
4497 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
4498 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4499 ; GENERIC-NEXT: .cfi_offset l1, -4
4500 ; GENERIC-NEXT: .cfi_offset l0, -8
4501 ; GENERIC-NEXT: subi16 sp, sp, 4
4502 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
4503 ; GENERIC-NEXT: movi16 a3, 0
4504 ; GENERIC-NEXT: lsli16 l0, a3, 24
4505 ; GENERIC-NEXT: lsli16 a3, a3, 16
4506 ; GENERIC-NEXT: or16 a3, l0
4507 ; GENERIC-NEXT: movi16 l0, 255
4508 ; GENERIC-NEXT: lsli16 l1, l0, 8
4509 ; GENERIC-NEXT: or16 l1, a3
4510 ; GENERIC-NEXT: or16 l1, l0
4511 ; GENERIC-NEXT: and16 l1, a0
4512 ; GENERIC-NEXT: cmphsi16 l1, 11
4513 ; GENERIC-NEXT: mvcv16 a0
4514 ; GENERIC-NEXT: btsti16 a0, 0
4515 ; GENERIC-NEXT: bt16 .LBB111_2
4516 ; GENERIC-NEXT: # %bb.1: # %entry
4517 ; GENERIC-NEXT: mov16 a2, a1
4518 ; GENERIC-NEXT: .LBB111_2: # %entry
4519 ; GENERIC-NEXT: mov16 a0, a2
4520 ; GENERIC-NEXT: addi16 sp, sp, 4
4521 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4522 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
4523 ; GENERIC-NEXT: addi16 sp, sp, 8
4524 ; GENERIC-NEXT: rts16
4525 entry:
4526 %icmp = icmp ule i16 %x, 10
4527 %ret = select i1 %icmp, i16 %m, i16 %n
4528 ret i16 %ret
4529 }
4531 define i16 @selectRX_ule_i16(i16 %x, i16 %n, i16 %m) {
4532 ; CHECK-LABEL: selectRX_ule_i16:
4533 ; CHECK: # %bb.0: # %entry
4534 ; CHECK-NEXT: zexth16 a0, a0
4535 ; CHECK-NEXT: cmphsi32 a0, 2034
4536 ; CHECK-NEXT: movf32 a1, a2
4537 ; CHECK-NEXT: mov16 a0, a1
4538 ; CHECK-NEXT: rts16
4539 ;
4540 ; GENERIC-LABEL: selectRX_ule_i16:
4541 ; GENERIC: # %bb.0: # %entry
4542 ; GENERIC-NEXT: subi16 sp, sp, 8
4543 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
4544 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
4545 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4546 ; GENERIC-NEXT: .cfi_offset l1, -4
4547 ; GENERIC-NEXT: .cfi_offset l0, -8
4548 ; GENERIC-NEXT: subi16 sp, sp, 4
4549 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
4550 ; GENERIC-NEXT: movi16 a3, 0
4551 ; GENERIC-NEXT: lsli16 l0, a3, 24
4552 ; GENERIC-NEXT: lsli16 a3, a3, 16
4553 ; GENERIC-NEXT: or16 a3, l0
4554 ; GENERIC-NEXT: movi16 l0, 255
4555 ; GENERIC-NEXT: lsli16 l1, l0, 8
4556 ; GENERIC-NEXT: or16 l1, a3
4557 ; GENERIC-NEXT: or16 l1, l0
4558 ; GENERIC-NEXT: and16 l1, a0
4559 ; GENERIC-NEXT: movi16 a0, 7
4560 ; GENERIC-NEXT: lsli16 a0, a0, 8
4561 ; GENERIC-NEXT: or16 a0, a3
4562 ; GENERIC-NEXT: movi16 a3, 242
4563 ; GENERIC-NEXT: or16 a3, a0
4564 ; GENERIC-NEXT: cmphs16 l1, a3
4565 ; GENERIC-NEXT: mvcv16 a0
4566 ; GENERIC-NEXT: btsti16 a0, 0
4567 ; GENERIC-NEXT: bt16 .LBB112_2
4568 ; GENERIC-NEXT: # %bb.1: # %entry
4569 ; GENERIC-NEXT: mov16 a2, a1
4570 ; GENERIC-NEXT: .LBB112_2: # %entry
4571 ; GENERIC-NEXT: mov16 a0, a2
4572 ; GENERIC-NEXT: addi16 sp, sp, 4
4573 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4574 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
4575 ; GENERIC-NEXT: addi16 sp, sp, 8
4576 ; GENERIC-NEXT: rts16
4577 entry:
4578 %icmp = icmp ule i16 %x, 47777777
4579 %ret = select i1 %icmp, i16 %m, i16 %n
4580 ret i16 %ret
4581 }
4583 define i16 @selectC_ule_i16(i1 %c, i16 %n, i16 %m) {
4584 ; CHECK-LABEL: selectC_ule_i16:
4585 ; CHECK: # %bb.0: # %entry
4586 ; CHECK-NEXT: btsti16 a0, 0
4587 ; CHECK-NEXT: movt32 a1, a2
4588 ; CHECK-NEXT: mov16 a0, a1
4589 ; CHECK-NEXT: rts16
4590 ;
4591 ; GENERIC-LABEL: selectC_ule_i16:
4592 ; GENERIC: # %bb.0: # %entry
4593 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4594 ; GENERIC-NEXT: subi16 sp, sp, 4
4595 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4596 ; GENERIC-NEXT: btsti16 a0, 0
4597 ; GENERIC-NEXT: bt16 .LBB113_2
4598 ; GENERIC-NEXT: # %bb.1: # %entry
4599 ; GENERIC-NEXT: mov16 a2, a1
4600 ; GENERIC-NEXT: .LBB113_2: # %entry
4601 ; GENERIC-NEXT: mov16 a0, a2
4602 ; GENERIC-NEXT: addi16 sp, sp, 4
4603 ; GENERIC-NEXT: rts16
4604 entry:
4605 %ret = select i1 %c, i16 %m, i16 %n
4606 ret i16 %ret
4607 }
4610 define i8 @selectRR_ule_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
4611 ; CHECK-LABEL: selectRR_ule_i8:
4612 ; CHECK: # %bb.0: # %entry
4613 ; CHECK-NEXT: zextb16 a1, a1
4614 ; CHECK-NEXT: zextb16 a0, a0
4615 ; CHECK-NEXT: cmphs16 a0, a1
4616 ; CHECK-NEXT: movt32 a2, a3
4617 ; CHECK-NEXT: mov16 a0, a2
4618 ; CHECK-NEXT: rts16
4619 ;
4620 ; GENERIC-LABEL: selectRR_ule_i8:
4621 ; GENERIC: # %bb.0: # %entry
4622 ; GENERIC-NEXT: subi16 sp, sp, 4
4623 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4624 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4625 ; GENERIC-NEXT: .cfi_offset l0, -4
4626 ; GENERIC-NEXT: subi16 sp, sp, 4
4627 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
4628 ; GENERIC-NEXT: movi16 l0, 255
4629 ; GENERIC-NEXT: and16 a1, l0
4630 ; GENERIC-NEXT: and16 a0, l0
4631 ; GENERIC-NEXT: cmphs16 a0, a1
4632 ; GENERIC-NEXT: mvcv16 a0
4633 ; GENERIC-NEXT: movi16 a1, 1
4634 ; GENERIC-NEXT: subu16 a1, a0
4635 ; GENERIC-NEXT: btsti16 a1, 0
4636 ; GENERIC-NEXT: bt16 .LBB114_2
4637 ; GENERIC-NEXT: # %bb.1: # %entry
4638 ; GENERIC-NEXT: mov16 a3, a2
4639 ; GENERIC-NEXT: .LBB114_2: # %entry
4640 ; GENERIC-NEXT: mov16 a0, a3
4641 ; GENERIC-NEXT: addi16 sp, sp, 4
4642 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4643 ; GENERIC-NEXT: addi16 sp, sp, 4
4644 ; GENERIC-NEXT: rts16
4645 entry:
4646 %icmp = icmp ule i8 %y, %x
4647 %ret = select i1 %icmp, i8 %m, i8 %n
4648 ret i8 %ret
4649 }
4651 define i8 @selectRI_ule_i8(i8 %x, i8 %n, i8 %m) {
4652 ; CHECK-LABEL: selectRI_ule_i8:
4653 ; CHECK: # %bb.0: # %entry
4654 ; CHECK-NEXT: zextb16 a0, a0
4655 ; CHECK-NEXT: cmphsi16 a0, 11
4656 ; CHECK-NEXT: movf32 a1, a2
4657 ; CHECK-NEXT: mov16 a0, a1
4658 ; CHECK-NEXT: rts16
4659 ;
4660 ; GENERIC-LABEL: selectRI_ule_i8:
4661 ; GENERIC: # %bb.0: # %entry
4662 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4663 ; GENERIC-NEXT: subi16 sp, sp, 4
4664 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4665 ; GENERIC-NEXT: movi16 a3, 255
4666 ; GENERIC-NEXT: and16 a3, a0
4667 ; GENERIC-NEXT: cmphsi16 a3, 11
4668 ; GENERIC-NEXT: mvcv16 a0
4669 ; GENERIC-NEXT: btsti16 a0, 0
4670 ; GENERIC-NEXT: bt16 .LBB115_2
4671 ; GENERIC-NEXT: # %bb.1: # %entry
4672 ; GENERIC-NEXT: mov16 a2, a1
4673 ; GENERIC-NEXT: .LBB115_2: # %entry
4674 ; GENERIC-NEXT: mov16 a0, a2
4675 ; GENERIC-NEXT: addi16 sp, sp, 4
4676 ; GENERIC-NEXT: rts16
4677 entry:
4678 %icmp = icmp ule i8 %x, 10
4679 %ret = select i1 %icmp, i8 %m, i8 %n
4680 ret i8 %ret
4681 }
4683 define i8 @selectRX_ule_i8(i8 %x, i8 %n, i8 %m) {
4684 ; CHECK-LABEL: selectRX_ule_i8:
4685 ; CHECK: # %bb.0: # %entry
4686 ; CHECK-NEXT: zextb16 a0, a0
4687 ; CHECK-NEXT: cmphsi32 a0, 242
4688 ; CHECK-NEXT: movf32 a1, a2
4689 ; CHECK-NEXT: mov16 a0, a1
4690 ; CHECK-NEXT: rts16
4691 ;
4692 ; GENERIC-LABEL: selectRX_ule_i8:
4693 ; GENERIC: # %bb.0: # %entry
4694 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4695 ; GENERIC-NEXT: subi16 sp, sp, 4
4696 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4697 ; GENERIC-NEXT: movi16 a3, 255
4698 ; GENERIC-NEXT: and16 a3, a0
4699 ; GENERIC-NEXT: movi16 a0, 242
4700 ; GENERIC-NEXT: cmphs16 a3, a0
4701 ; GENERIC-NEXT: mvcv16 a0
4702 ; GENERIC-NEXT: btsti16 a0, 0
4703 ; GENERIC-NEXT: bt16 .LBB116_2
4704 ; GENERIC-NEXT: # %bb.1: # %entry
4705 ; GENERIC-NEXT: mov16 a2, a1
4706 ; GENERIC-NEXT: .LBB116_2: # %entry
4707 ; GENERIC-NEXT: mov16 a0, a2
4708 ; GENERIC-NEXT: addi16 sp, sp, 4
4709 ; GENERIC-NEXT: rts16
4710 entry:
4711 %icmp = icmp ule i8 %x, 47777777
4712 %ret = select i1 %icmp, i8 %m, i8 %n
4713 ret i8 %ret
4714 }
4716 define i8 @selectC_ule_i8(i1 %c, i8 %n, i8 %m) {
4717 ; CHECK-LABEL: selectC_ule_i8:
4718 ; CHECK: # %bb.0: # %entry
4719 ; CHECK-NEXT: btsti16 a0, 0
4720 ; CHECK-NEXT: movt32 a1, a2
4721 ; CHECK-NEXT: mov16 a0, a1
4722 ; CHECK-NEXT: rts16
4723 ;
4724 ; GENERIC-LABEL: selectC_ule_i8:
4725 ; GENERIC: # %bb.0: # %entry
4726 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4727 ; GENERIC-NEXT: subi16 sp, sp, 4
4728 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4729 ; GENERIC-NEXT: btsti16 a0, 0
4730 ; GENERIC-NEXT: bt16 .LBB117_2
4731 ; GENERIC-NEXT: # %bb.1: # %entry
4732 ; GENERIC-NEXT: mov16 a2, a1
4733 ; GENERIC-NEXT: .LBB117_2: # %entry
4734 ; GENERIC-NEXT: mov16 a0, a2
4735 ; GENERIC-NEXT: addi16 sp, sp, 4
4736 ; GENERIC-NEXT: rts16
4737 entry:
4738 %ret = select i1 %c, i8 %m, i8 %n
4739 ret i8 %ret
4740 }
4743 define i1 @selectRR_ule_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
4744 ; CHECK-LABEL: selectRR_ule_i1:
4745 ; CHECK: # %bb.0: # %entry
4746 ; CHECK-NEXT: btsti16 a1, 0
4747 ; CHECK-NEXT: mov16 a1, a3
4748 ; CHECK-NEXT: movt32 a1, a2
4749 ; CHECK-NEXT: btsti16 a0, 0
4750 ; CHECK-NEXT: movt32 a1, a3
4751 ; CHECK-NEXT: mov16 a0, a1
4752 ; CHECK-NEXT: rts16
4753 ;
4754 ; GENERIC-LABEL: selectRR_ule_i1:
4755 ; GENERIC: # %bb.0: # %entry
4756 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4757 ; GENERIC-NEXT: subi16 sp, sp, 4
4758 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4759 ; GENERIC-NEXT: btsti16 a1, 0
4760 ; GENERIC-NEXT: bt16 .LBB118_2
4761 ; GENERIC-NEXT: # %bb.1: # %entry
4762 ; GENERIC-NEXT: mov16 a2, a3
4763 ; GENERIC-NEXT: .LBB118_2: # %entry
4764 ; GENERIC-NEXT: btsti16 a0, 0
4765 ; GENERIC-NEXT: bt16 .LBB118_4
4766 ; GENERIC-NEXT: # %bb.3: # %entry
4767 ; GENERIC-NEXT: mov16 a3, a2
4768 ; GENERIC-NEXT: .LBB118_4: # %entry
4769 ; GENERIC-NEXT: mov16 a0, a3
4770 ; GENERIC-NEXT: addi16 sp, sp, 4
4771 ; GENERIC-NEXT: rts16
4772 entry:
4773 %icmp = icmp ule i1 %y, %x
4774 %ret = select i1 %icmp, i1 %m, i1 %n
4775 ret i1 %ret
4776 }
4778 define i1 @selectRI_ule_i1(i1 %x, i1 %n, i1 %m) {
4779 ; CHECK-LABEL: selectRI_ule_i1:
4780 ; CHECK: # %bb.0: # %entry
4781 ; CHECK-NEXT: btsti16 a0, 0
4782 ; CHECK-NEXT: movt32 a2, a1
4783 ; CHECK-NEXT: mov16 a0, a2
4784 ; CHECK-NEXT: rts16
4785 ;
4786 ; GENERIC-LABEL: selectRI_ule_i1:
4787 ; GENERIC: # %bb.0: # %entry
4788 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4789 ; GENERIC-NEXT: subi16 sp, sp, 4
4790 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4791 ; GENERIC-NEXT: btsti16 a0, 0
4792 ; GENERIC-NEXT: bt16 .LBB119_2
4793 ; GENERIC-NEXT: # %bb.1: # %entry
4794 ; GENERIC-NEXT: mov16 a1, a2
4795 ; GENERIC-NEXT: .LBB119_2: # %entry
4796 ; GENERIC-NEXT: mov16 a0, a1
4797 ; GENERIC-NEXT: addi16 sp, sp, 4
4798 ; GENERIC-NEXT: rts16
4799 entry:
4800 %icmp = icmp ule i1 %x, 10
4801 %ret = select i1 %icmp, i1 %m, i1 %n
4802 ret i1 %ret
4803 }
4805 define i1 @selectRX_ule_i1(i1 %x, i1 %n, i1 %m) {
4806 ; CHECK-LABEL: selectRX_ule_i1:
4807 ; CHECK: # %bb.0: # %entry
4808 ; CHECK-NEXT: mov16 a0, a2
4809 ; CHECK-NEXT: rts16
4810 ;
4811 ; GENERIC-LABEL: selectRX_ule_i1:
4812 ; GENERIC: # %bb.0: # %entry
4813 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4814 ; GENERIC-NEXT: subi16 sp, sp, 4
4815 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4816 ; GENERIC-NEXT: mov16 a0, a2
4817 ; GENERIC-NEXT: addi16 sp, sp, 4
4818 ; GENERIC-NEXT: rts16
4819 entry:
4820 %icmp = icmp ule i1 %x, 47777777
4821 %ret = select i1 %icmp, i1 %m, i1 %n
4822 ret i1 %ret
4823 }
4825 define i1 @selectC_ule_i1(i1 %c, i1 %n, i1 %m) {
4826 ; CHECK-LABEL: selectC_ule_i1:
4827 ; CHECK: # %bb.0: # %entry
4828 ; CHECK-NEXT: btsti16 a0, 0
4829 ; CHECK-NEXT: movt32 a1, a2
4830 ; CHECK-NEXT: mov16 a0, a1
4831 ; CHECK-NEXT: rts16
4832 ;
4833 ; GENERIC-LABEL: selectC_ule_i1:
4834 ; GENERIC: # %bb.0: # %entry
4835 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4836 ; GENERIC-NEXT: subi16 sp, sp, 4
4837 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4838 ; GENERIC-NEXT: btsti16 a0, 0
4839 ; GENERIC-NEXT: bt16 .LBB121_2
4840 ; GENERIC-NEXT: # %bb.1: # %entry
4841 ; GENERIC-NEXT: mov16 a2, a1
4842 ; GENERIC-NEXT: .LBB121_2: # %entry
4843 ; GENERIC-NEXT: mov16 a0, a2
4844 ; GENERIC-NEXT: addi16 sp, sp, 4
4845 ; GENERIC-NEXT: rts16
4846 entry:
4847 %ret = select i1 %c, i1 %m, i1 %n
4848 ret i1 %ret
4849 }
4852 define i32 @selectRR_sgt_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
4853 ; CHECK-LABEL: selectRR_sgt_i32:
4854 ; CHECK: # %bb.0: # %entry
4855 ; CHECK-NEXT: cmplt16 a0, a1
4856 ; CHECK-NEXT: movt32 a2, a3
4857 ; CHECK-NEXT: mov16 a0, a2
4858 ; CHECK-NEXT: rts16
4859 ;
4860 ; GENERIC-LABEL: selectRR_sgt_i32:
4861 ; GENERIC: # %bb.0: # %entry
4862 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4863 ; GENERIC-NEXT: subi16 sp, sp, 4
4864 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4865 ; GENERIC-NEXT: cmplt16 a0, a1
4866 ; GENERIC-NEXT: mvcv16 a0
4867 ; GENERIC-NEXT: movi16 a1, 1
4868 ; GENERIC-NEXT: subu16 a1, a0
4869 ; GENERIC-NEXT: btsti16 a1, 0
4870 ; GENERIC-NEXT: bt16 .LBB122_2
4871 ; GENERIC-NEXT: # %bb.1: # %entry
4872 ; GENERIC-NEXT: mov16 a3, a2
4873 ; GENERIC-NEXT: .LBB122_2: # %entry
4874 ; GENERIC-NEXT: mov16 a0, a3
4875 ; GENERIC-NEXT: addi16 sp, sp, 4
4876 ; GENERIC-NEXT: rts16
4877 entry:
4878 %icmp = icmp sgt i32 %y, %x
4879 %ret = select i1 %icmp, i32 %m, i32 %n
4880 ret i32 %ret
4881 }
4883 define i32 @selectRI_sgt_i32(i32 %x, i32 %n, i32 %m) {
4884 ; CHECK-LABEL: selectRI_sgt_i32:
4885 ; CHECK: # %bb.0: # %entry
4886 ; CHECK-NEXT: movi16 a3, 10
4887 ; CHECK-NEXT: cmplt16 a3, a0
4888 ; CHECK-NEXT: movt32 a1, a2
4889 ; CHECK-NEXT: mov16 a0, a1
4890 ; CHECK-NEXT: rts16
4891 ;
4892 ; GENERIC-LABEL: selectRI_sgt_i32:
4893 ; GENERIC: # %bb.0: # %entry
4894 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4895 ; GENERIC-NEXT: subi16 sp, sp, 4
4896 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4897 ; GENERIC-NEXT: movi16 a3, 10
4898 ; GENERIC-NEXT: cmplt16 a3, a0
4899 ; GENERIC-NEXT: mvcv16 a0
4900 ; GENERIC-NEXT: movi16 a3, 1
4901 ; GENERIC-NEXT: subu16 a3, a0
4902 ; GENERIC-NEXT: btsti16 a3, 0
4903 ; GENERIC-NEXT: bt16 .LBB123_2
4904 ; GENERIC-NEXT: # %bb.1: # %entry
4905 ; GENERIC-NEXT: mov16 a2, a1
4906 ; GENERIC-NEXT: .LBB123_2: # %entry
4907 ; GENERIC-NEXT: mov16 a0, a2
4908 ; GENERIC-NEXT: addi16 sp, sp, 4
4909 ; GENERIC-NEXT: rts16
4910 entry:
4911 %icmp = icmp sgt i32 %x, 10
4912 %ret = select i1 %icmp, i32 %m, i32 %n
4913 ret i32 %ret
4914 }
4916 define i32 @selectRX_sgt_i32(i32 %x, i32 %n, i32 %m) {
4917 ; CHECK-LABEL: selectRX_sgt_i32:
4918 ; CHECK: # %bb.0: # %entry
4919 ; CHECK-NEXT: movih32 a3, 729
4920 ; CHECK-NEXT: ori32 a3, a3, 2033
4921 ; CHECK-NEXT: cmplt16 a3, a0
4922 ; CHECK-NEXT: movt32 a1, a2
4923 ; CHECK-NEXT: mov16 a0, a1
4924 ; CHECK-NEXT: rts16
4925 ;
4926 ; GENERIC-LABEL: selectRX_sgt_i32:
4927 ; GENERIC: # %bb.0: # %entry
4928 ; GENERIC-NEXT: subi16 sp, sp, 4
4929 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4930 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
4931 ; GENERIC-NEXT: .cfi_offset l0, -4
4932 ; GENERIC-NEXT: subi16 sp, sp, 4
4933 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
4934 ; GENERIC-NEXT: movi16 a3, 2
4935 ; GENERIC-NEXT: lsli16 a3, a3, 24
4936 ; GENERIC-NEXT: movi16 l0, 217
4937 ; GENERIC-NEXT: lsli16 l0, l0, 16
4938 ; GENERIC-NEXT: or16 l0, a3
4939 ; GENERIC-NEXT: movi16 a3, 7
4940 ; GENERIC-NEXT: lsli16 a3, a3, 8
4941 ; GENERIC-NEXT: or16 a3, l0
4942 ; GENERIC-NEXT: movi16 l0, 241
4943 ; GENERIC-NEXT: or16 l0, a3
4944 ; GENERIC-NEXT: cmplt16 l0, a0
4945 ; GENERIC-NEXT: mvcv16 a0
4946 ; GENERIC-NEXT: movi16 a3, 1
4947 ; GENERIC-NEXT: subu16 a3, a0
4948 ; GENERIC-NEXT: btsti16 a3, 0
4949 ; GENERIC-NEXT: bt16 .LBB124_2
4950 ; GENERIC-NEXT: # %bb.1: # %entry
4951 ; GENERIC-NEXT: mov16 a2, a1
4952 ; GENERIC-NEXT: .LBB124_2: # %entry
4953 ; GENERIC-NEXT: mov16 a0, a2
4954 ; GENERIC-NEXT: addi16 sp, sp, 4
4955 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
4956 ; GENERIC-NEXT: addi16 sp, sp, 4
4957 ; GENERIC-NEXT: rts16
4958 entry:
4959 %icmp = icmp sgt i32 %x, 47777777
4960 %ret = select i1 %icmp, i32 %m, i32 %n
4961 ret i32 %ret
4962 }
4964 define i32 @selectC_sgt_i32(i1 %c, i32 %n, i32 %m) {
4965 ; CHECK-LABEL: selectC_sgt_i32:
4966 ; CHECK: # %bb.0: # %entry
4967 ; CHECK-NEXT: btsti16 a0, 0
4968 ; CHECK-NEXT: movt32 a1, a2
4969 ; CHECK-NEXT: mov16 a0, a1
4970 ; CHECK-NEXT: rts16
4971 ;
4972 ; GENERIC-LABEL: selectC_sgt_i32:
4973 ; GENERIC: # %bb.0: # %entry
4974 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
4975 ; GENERIC-NEXT: subi16 sp, sp, 4
4976 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
4977 ; GENERIC-NEXT: btsti16 a0, 0
4978 ; GENERIC-NEXT: bt16 .LBB125_2
4979 ; GENERIC-NEXT: # %bb.1: # %entry
4980 ; GENERIC-NEXT: mov16 a2, a1
4981 ; GENERIC-NEXT: .LBB125_2: # %entry
4982 ; GENERIC-NEXT: mov16 a0, a2
4983 ; GENERIC-NEXT: addi16 sp, sp, 4
4984 ; GENERIC-NEXT: rts16
4985 entry:
4986 %ret = select i1 %c, i32 %m, i32 %n
4987 ret i32 %ret
4988 }
4990 define i64 @selectRR_sgt_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
4991 ; CHECK-LABEL: selectRR_sgt_i64:
4992 ; CHECK: # %bb.0: # %entry
4993 ; CHECK-NEXT: .cfi_def_cfa_offset 0
4994 ; CHECK-NEXT: subi16 sp, sp, 12
4995 ; CHECK-NEXT: .cfi_def_cfa_offset 12
4996 ; CHECK-NEXT: cmplt16 a1, a3
4997 ; CHECK-NEXT: mvc32 t0
4998 ; CHECK-NEXT: st32.w t0, (sp, 4)
4999 ; CHECK-NEXT: cmpne16 a3, a1
5000 ; CHECK-NEXT: mvc32 a1
5001 ; CHECK-NEXT: st16.w a1, (sp, 8)
5002 ; CHECK-NEXT: cmphs16 a0, a2
5003 ; CHECK-NEXT: mvcv16 a0
5004 ; CHECK-NEXT: ld16.w a1, (sp, 4)
5005 ; CHECK-NEXT: btsti16 a1, 0
5006 ; CHECK-NEXT: mvc32 a1
5007 ; CHECK-NEXT: ld16.w a2, (sp, 8)
5008 ; CHECK-NEXT: btsti16 a2, 0
5009 ; CHECK-NEXT: movf32 a1, a0
5010 ; CHECK-NEXT: addi16 a2, sp, 12
5011 ; CHECK-NEXT: addi16 a0, sp, 20
5012 ; CHECK-NEXT: btsti16 a1, 0
5013 ; CHECK-NEXT: movt32 a2, a0
5014 ; CHECK-NEXT: ld16.w a0, (a2, 0)
5015 ; CHECK-NEXT: ld16.w a1, (a2, 4)
5016 ; CHECK-NEXT: addi16 sp, sp, 12
5017 ; CHECK-NEXT: rts16
5018 ;
5019 ; GENERIC-LABEL: selectRR_sgt_i64:
5020 ; GENERIC: # %bb.0: # %entry
5021 ; GENERIC-NEXT: subi16 sp, sp, 4
5022 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5023 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5024 ; GENERIC-NEXT: .cfi_offset l0, -4
5025 ; GENERIC-NEXT: subi16 sp, sp, 4
5026 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
5027 ; GENERIC-NEXT: cmplt16 a1, a3
5028 ; GENERIC-NEXT: mvcv16 l0
5029 ; GENERIC-NEXT: cmphs16 a0, a2
5030 ; GENERIC-NEXT: mvcv16 a0
5031 ; GENERIC-NEXT: cmpne16 a3, a1
5032 ; GENERIC-NEXT: mvcv16 a1
5033 ; GENERIC-NEXT: btsti16 a1, 0
5034 ; GENERIC-NEXT: bt16 .LBB126_2
5035 ; GENERIC-NEXT: # %bb.1: # %entry
5036 ; GENERIC-NEXT: movi16 a0, 1
5037 ; GENERIC-NEXT: subu16 a0, l0
5038 ; GENERIC-NEXT: .LBB126_2: # %entry
5039 ; GENERIC-NEXT: btsti16 a0, 0
5040 ; GENERIC-NEXT: bt16 .LBB126_4
5041 ; GENERIC-NEXT: # %bb.3: # %entry
5042 ; GENERIC-NEXT: movi16 a0, 8
5043 ; GENERIC-NEXT: br32 .LBB126_5
5044 ; GENERIC-NEXT: .LBB126_4:
5045 ; GENERIC-NEXT: movi16 a0, 16
5046 ; GENERIC-NEXT: .LBB126_5: # %entry
5047 ; GENERIC-NEXT: addu16 a0, sp
5048 ; GENERIC-NEXT: mov16 a1, a0
5049 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
5050 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
5051 ; GENERIC-NEXT: addi16 sp, sp, 4
5052 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5053 ; GENERIC-NEXT: addi16 sp, sp, 4
5054 ; GENERIC-NEXT: rts16
5055 entry:
5056 %icmp = icmp sgt i64 %y, %x
5057 %ret = select i1 %icmp, i64 %m, i64 %n
5058 ret i64 %ret
5059 }
5061 define i64 @selectRI_sgt_i64(i64 %x, i64 %n, i64 %m) {
5062 ; CHECK-LABEL: selectRI_sgt_i64:
5063 ; CHECK: # %bb.0: # %entry
5064 ; CHECK-NEXT: subi16 sp, sp, 4
5065 ; CHECK-NEXT: .cfi_def_cfa_offset 4
5066 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5067 ; CHECK-NEXT: .cfi_offset l0, -4
5068 ; CHECK-NEXT: subi16 sp, sp, 12
5069 ; CHECK-NEXT: .cfi_def_cfa_offset 16
5070 ; CHECK-NEXT: ld32.w t0, (sp, 20)
5071 ; CHECK-NEXT: ld32.w t1, (sp, 16)
5072 ; CHECK-NEXT: movi16 l0, 0
5073 ; CHECK-NEXT: cmplt16 l0, a1
5074 ; CHECK-NEXT: mvc32 l0
5075 ; CHECK-NEXT: st16.w l0, (sp, 8)
5076 ; CHECK-NEXT: movi16 l0, 10
5077 ; CHECK-NEXT: cmphs16 l0, a0
5078 ; CHECK-NEXT: mvcv16 a0
5079 ; CHECK-NEXT: cmpnei16 a1, 0
5080 ; CHECK-NEXT: mvc32 a1
5081 ; CHECK-NEXT: st16.w a1, (sp, 4)
5082 ; CHECK-NEXT: ld16.w a1, (sp, 8)
5083 ; CHECK-NEXT: btsti16 a1, 0
5084 ; CHECK-NEXT: mvc32 a1
5085 ; CHECK-NEXT: ld16.w l0, (sp, 4)
5086 ; CHECK-NEXT: btsti16 l0, 0
5087 ; CHECK-NEXT: movf32 a1, a0
5088 ; CHECK-NEXT: btsti16 a1, 0
5089 ; CHECK-NEXT: movt32 a2, t1
5090 ; CHECK-NEXT: movt32 a3, t0
5091 ; CHECK-NEXT: mov16 a0, a2
5092 ; CHECK-NEXT: mov16 a1, a3
5093 ; CHECK-NEXT: addi16 sp, sp, 12
5094 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5095 ; CHECK-NEXT: addi16 sp, sp, 4
5096 ; CHECK-NEXT: rts16
5097 ;
5098 ; GENERIC-LABEL: selectRI_sgt_i64:
5099 ; GENERIC: # %bb.0: # %entry
5100 ; GENERIC-NEXT: subi16 sp, sp, 8
5101 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
5102 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
5103 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5104 ; GENERIC-NEXT: .cfi_offset l1, -4
5105 ; GENERIC-NEXT: .cfi_offset l0, -8
5106 ; GENERIC-NEXT: subi16 sp, sp, 4
5107 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
5108 ; GENERIC-NEXT: movi16 l0, 0
5109 ; GENERIC-NEXT: cmplt16 l0, a1
5110 ; GENERIC-NEXT: mvcv16 l0
5111 ; GENERIC-NEXT: movi16 l1, 10
5112 ; GENERIC-NEXT: cmphs16 l1, a0
5113 ; GENERIC-NEXT: mvcv16 a0
5114 ; GENERIC-NEXT: cmpnei16 a1, 0
5115 ; GENERIC-NEXT: mvcv16 a1
5116 ; GENERIC-NEXT: btsti16 a1, 0
5117 ; GENERIC-NEXT: bf16 .LBB127_5
5118 ; GENERIC-NEXT: # %bb.1: # %entry
5119 ; GENERIC-NEXT: btsti16 a0, 0
5120 ; GENERIC-NEXT: bt16 .LBB127_6
5121 ; GENERIC-NEXT: .LBB127_2: # %entry
5122 ; GENERIC-NEXT: btsti16 a0, 0
5123 ; GENERIC-NEXT: bf16 .LBB127_4
5124 ; GENERIC-NEXT: .LBB127_3:
5125 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
5126 ; GENERIC-NEXT: .LBB127_4: # %entry
5127 ; GENERIC-NEXT: mov16 a0, a2
5128 ; GENERIC-NEXT: mov16 a1, a3
5129 ; GENERIC-NEXT: addi16 sp, sp, 4
5130 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5131 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
5132 ; GENERIC-NEXT: addi16 sp, sp, 8
5133 ; GENERIC-NEXT: rts16
5134 ; GENERIC-NEXT: .LBB127_5: # %entry
5135 ; GENERIC-NEXT: movi16 a0, 1
5136 ; GENERIC-NEXT: subu16 a0, l0
5137 ; GENERIC-NEXT: btsti16 a0, 0
5138 ; GENERIC-NEXT: bf16 .LBB127_2
5139 ; GENERIC-NEXT: .LBB127_6:
5140 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
5141 ; GENERIC-NEXT: btsti16 a0, 0
5142 ; GENERIC-NEXT: bt16 .LBB127_3
5143 ; GENERIC-NEXT: br32 .LBB127_4
5144 entry:
5145 %icmp = icmp sgt i64 %x, 10
5146 %ret = select i1 %icmp, i64 %m, i64 %n
5147 ret i64 %ret
5148 }
5150 define i64 @selectRX_sgt_i64(i64 %x, i64 %n, i64 %m) {
5151 ; CHECK-LABEL: selectRX_sgt_i64:
5152 ; CHECK: # %bb.0: # %entry
5153 ; CHECK-NEXT: subi16 sp, sp, 4
5154 ; CHECK-NEXT: .cfi_def_cfa_offset 4
5155 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5156 ; CHECK-NEXT: .cfi_offset l0, -4
5157 ; CHECK-NEXT: subi16 sp, sp, 12
5158 ; CHECK-NEXT: .cfi_def_cfa_offset 16
5159 ; CHECK-NEXT: ld32.w t0, (sp, 20)
5160 ; CHECK-NEXT: ld32.w t1, (sp, 16)
5161 ; CHECK-NEXT: movi16 l0, 0
5162 ; CHECK-NEXT: cmplt16 l0, a1
5163 ; CHECK-NEXT: mvc32 l0
5164 ; CHECK-NEXT: st16.w l0, (sp, 8)
5165 ; CHECK-NEXT: movih32 l0, 729
5166 ; CHECK-NEXT: ori32 l0, l0, 2033
5167 ; CHECK-NEXT: cmphs16 l0, a0
5168 ; CHECK-NEXT: mvcv16 a0
5169 ; CHECK-NEXT: cmpnei16 a1, 0
5170 ; CHECK-NEXT: mvc32 a1
5171 ; CHECK-NEXT: st16.w a1, (sp, 4)
5172 ; CHECK-NEXT: ld16.w a1, (sp, 8)
5173 ; CHECK-NEXT: btsti16 a1, 0
5174 ; CHECK-NEXT: mvc32 a1
5175 ; CHECK-NEXT: ld16.w l0, (sp, 4)
5176 ; CHECK-NEXT: btsti16 l0, 0
5177 ; CHECK-NEXT: movf32 a1, a0
5178 ; CHECK-NEXT: btsti16 a1, 0
5179 ; CHECK-NEXT: movt32 a2, t1
5180 ; CHECK-NEXT: movt32 a3, t0
5181 ; CHECK-NEXT: mov16 a0, a2
5182 ; CHECK-NEXT: mov16 a1, a3
5183 ; CHECK-NEXT: addi16 sp, sp, 12
5184 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5185 ; CHECK-NEXT: addi16 sp, sp, 4
5186 ; CHECK-NEXT: rts16
5187 ;
5188 ; GENERIC-LABEL: selectRX_sgt_i64:
5189 ; GENERIC: # %bb.0: # %entry
5190 ; GENERIC-NEXT: subi16 sp, sp, 12
5191 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
5192 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
5193 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
5194 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5195 ; GENERIC-NEXT: .cfi_offset l2, -4
5196 ; GENERIC-NEXT: .cfi_offset l1, -8
5197 ; GENERIC-NEXT: .cfi_offset l0, -12
5198 ; GENERIC-NEXT: subi16 sp, sp, 4
5199 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
5200 ; GENERIC-NEXT: movi16 l0, 0
5201 ; GENERIC-NEXT: cmplt16 l0, a1
5202 ; GENERIC-NEXT: mvcv16 l0
5203 ; GENERIC-NEXT: movi16 l1, 2
5204 ; GENERIC-NEXT: lsli16 l1, l1, 24
5205 ; GENERIC-NEXT: movi16 l2, 217
5206 ; GENERIC-NEXT: lsli16 l2, l2, 16
5207 ; GENERIC-NEXT: or16 l2, l1
5208 ; GENERIC-NEXT: movi16 l1, 7
5209 ; GENERIC-NEXT: lsli16 l1, l1, 8
5210 ; GENERIC-NEXT: or16 l1, l2
5211 ; GENERIC-NEXT: movi16 l2, 241
5212 ; GENERIC-NEXT: or16 l2, l1
5213 ; GENERIC-NEXT: cmphs16 l2, a0
5214 ; GENERIC-NEXT: mvcv16 a0
5215 ; GENERIC-NEXT: cmpnei16 a1, 0
5216 ; GENERIC-NEXT: mvcv16 a1
5217 ; GENERIC-NEXT: btsti16 a1, 0
5218 ; GENERIC-NEXT: bf16 .LBB128_5
5219 ; GENERIC-NEXT: # %bb.1: # %entry
5220 ; GENERIC-NEXT: btsti16 a0, 0
5221 ; GENERIC-NEXT: bt16 .LBB128_6
5222 ; GENERIC-NEXT: .LBB128_2: # %entry
5223 ; GENERIC-NEXT: btsti16 a0, 0
5224 ; GENERIC-NEXT: bf16 .LBB128_4
5225 ; GENERIC-NEXT: .LBB128_3:
5226 ; GENERIC-NEXT: ld16.w a3, (sp, 20)
5227 ; GENERIC-NEXT: .LBB128_4: # %entry
5228 ; GENERIC-NEXT: mov16 a0, a2
5229 ; GENERIC-NEXT: mov16 a1, a3
5230 ; GENERIC-NEXT: addi16 sp, sp, 4
5231 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5232 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
5233 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
5234 ; GENERIC-NEXT: addi16 sp, sp, 12
5235 ; GENERIC-NEXT: rts16
5236 ; GENERIC-NEXT: .LBB128_5: # %entry
5237 ; GENERIC-NEXT: movi16 a0, 1
5238 ; GENERIC-NEXT: subu16 a0, l0
5239 ; GENERIC-NEXT: btsti16 a0, 0
5240 ; GENERIC-NEXT: bf16 .LBB128_2
5241 ; GENERIC-NEXT: .LBB128_6:
5242 ; GENERIC-NEXT: ld16.w a2, (sp, 16)
5243 ; GENERIC-NEXT: btsti16 a0, 0
5244 ; GENERIC-NEXT: bt16 .LBB128_3
5245 ; GENERIC-NEXT: br32 .LBB128_4
5246 entry:
5247 %icmp = icmp sgt i64 %x, 47777777
5248 %ret = select i1 %icmp, i64 %m, i64 %n
5249 ret i64 %ret
5250 }
5252 define i64 @selectC_sgt_i64(i1 %c, i64 %n, i64 %m) {
5253 ; CHECK-LABEL: selectC_sgt_i64:
5254 ; CHECK: # %bb.0: # %entry
5255 ; CHECK-NEXT: ld32.w t0, (sp, 0)
5256 ; CHECK-NEXT: btsti16 a0, 0
5257 ; CHECK-NEXT: movt32 a1, a3
5258 ; CHECK-NEXT: movt32 a2, t0
5259 ; CHECK-NEXT: mov16 a0, a1
5260 ; CHECK-NEXT: mov16 a1, a2
5261 ; CHECK-NEXT: rts16
5262 ;
5263 ; GENERIC-LABEL: selectC_sgt_i64:
5264 ; GENERIC: # %bb.0: # %entry
5265 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5266 ; GENERIC-NEXT: subi16 sp, sp, 4
5267 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5268 ; GENERIC-NEXT: btsti16 a0, 0
5269 ; GENERIC-NEXT: bt16 .LBB129_2
5270 ; GENERIC-NEXT: # %bb.1: # %entry
5271 ; GENERIC-NEXT: mov16 a3, a1
5272 ; GENERIC-NEXT: .LBB129_2: # %entry
5273 ; GENERIC-NEXT: btsti16 a0, 0
5274 ; GENERIC-NEXT: bf16 .LBB129_4
5275 ; GENERIC-NEXT: # %bb.3:
5276 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
5277 ; GENERIC-NEXT: .LBB129_4: # %entry
5278 ; GENERIC-NEXT: mov16 a0, a3
5279 ; GENERIC-NEXT: mov16 a1, a2
5280 ; GENERIC-NEXT: addi16 sp, sp, 4
5281 ; GENERIC-NEXT: rts16
5282 entry:
5283 %ret = select i1 %c, i64 %m, i64 %n
5284 ret i64 %ret
5285 }
5288 define i16 @selectRR_sgt_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
5289 ; CHECK-LABEL: selectRR_sgt_i16:
5290 ; CHECK: # %bb.0: # %entry
5291 ; CHECK-NEXT: sexth16 a1, a1
5292 ; CHECK-NEXT: sexth16 a0, a0
5293 ; CHECK-NEXT: cmplt16 a0, a1
5294 ; CHECK-NEXT: movt32 a2, a3
5295 ; CHECK-NEXT: mov16 a0, a2
5296 ; CHECK-NEXT: rts16
5297 ;
5298 ; GENERIC-LABEL: selectRR_sgt_i16:
5299 ; GENERIC: # %bb.0: # %entry
5300 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5301 ; GENERIC-NEXT: subi16 sp, sp, 4
5302 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5303 ; GENERIC-NEXT: sexth16 a1, a1
5304 ; GENERIC-NEXT: sexth16 a0, a0
5305 ; GENERIC-NEXT: cmplt16 a0, a1
5306 ; GENERIC-NEXT: mvcv16 a0
5307 ; GENERIC-NEXT: movi16 a1, 1
5308 ; GENERIC-NEXT: subu16 a1, a0
5309 ; GENERIC-NEXT: btsti16 a1, 0
5310 ; GENERIC-NEXT: bt16 .LBB130_2
5311 ; GENERIC-NEXT: # %bb.1: # %entry
5312 ; GENERIC-NEXT: mov16 a3, a2
5313 ; GENERIC-NEXT: .LBB130_2: # %entry
5314 ; GENERIC-NEXT: mov16 a0, a3
5315 ; GENERIC-NEXT: addi16 sp, sp, 4
5316 ; GENERIC-NEXT: rts16
5317 entry:
5318 %icmp = icmp sgt i16 %y, %x
5319 %ret = select i1 %icmp, i16 %m, i16 %n
5320 ret i16 %ret
5321 }
5323 define i16 @selectRI_sgt_i16(i16 %x, i16 %n, i16 %m) {
5324 ; CHECK-LABEL: selectRI_sgt_i16:
5325 ; CHECK: # %bb.0: # %entry
5326 ; CHECK-NEXT: sexth16 a0, a0
5327 ; CHECK-NEXT: movi16 a3, 10
5328 ; CHECK-NEXT: cmplt16 a3, a0
5329 ; CHECK-NEXT: movt32 a1, a2
5330 ; CHECK-NEXT: mov16 a0, a1
5331 ; CHECK-NEXT: rts16
5332 ;
5333 ; GENERIC-LABEL: selectRI_sgt_i16:
5334 ; GENERIC: # %bb.0: # %entry
5335 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5336 ; GENERIC-NEXT: subi16 sp, sp, 4
5337 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5338 ; GENERIC-NEXT: sexth16 a0, a0
5339 ; GENERIC-NEXT: movi16 a3, 10
5340 ; GENERIC-NEXT: cmplt16 a3, a0
5341 ; GENERIC-NEXT: mvcv16 a0
5342 ; GENERIC-NEXT: movi16 a3, 1
5343 ; GENERIC-NEXT: subu16 a3, a0
5344 ; GENERIC-NEXT: btsti16 a3, 0
5345 ; GENERIC-NEXT: bt16 .LBB131_2
5346 ; GENERIC-NEXT: # %bb.1: # %entry
5347 ; GENERIC-NEXT: mov16 a2, a1
5348 ; GENERIC-NEXT: .LBB131_2: # %entry
5349 ; GENERIC-NEXT: mov16 a0, a2
5350 ; GENERIC-NEXT: addi16 sp, sp, 4
5351 ; GENERIC-NEXT: rts16
5352 entry:
5353 %icmp = icmp sgt i16 %x, 10
5354 %ret = select i1 %icmp, i16 %m, i16 %n
5355 ret i16 %ret
5356 }
5358 define i16 @selectRX_sgt_i16(i16 %x, i16 %n, i16 %m) {
5359 ; CHECK-LABEL: selectRX_sgt_i16:
5360 ; CHECK: # %bb.0: # %entry
5361 ; CHECK-NEXT: sexth16 a0, a0
5362 ; CHECK-NEXT: movi32 a3, 2033
5363 ; CHECK-NEXT: cmplt16 a3, a0
5364 ; CHECK-NEXT: movt32 a1, a2
5365 ; CHECK-NEXT: mov16 a0, a1
5366 ; CHECK-NEXT: rts16
5367 ;
5368 ; GENERIC-LABEL: selectRX_sgt_i16:
5369 ; GENERIC: # %bb.0: # %entry
5370 ; GENERIC-NEXT: subi16 sp, sp, 4
5371 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5372 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5373 ; GENERIC-NEXT: .cfi_offset l0, -4
5374 ; GENERIC-NEXT: subi16 sp, sp, 4
5375 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
5376 ; GENERIC-NEXT: sexth16 a0, a0
5377 ; GENERIC-NEXT: movi16 a3, 0
5378 ; GENERIC-NEXT: lsli16 l0, a3, 24
5379 ; GENERIC-NEXT: lsli16 a3, a3, 16
5380 ; GENERIC-NEXT: or16 a3, l0
5381 ; GENERIC-NEXT: movi16 l0, 7
5382 ; GENERIC-NEXT: lsli16 l0, l0, 8
5383 ; GENERIC-NEXT: or16 l0, a3
5384 ; GENERIC-NEXT: movi16 a3, 241
5385 ; GENERIC-NEXT: or16 a3, l0
5386 ; GENERIC-NEXT: cmplt16 a3, a0
5387 ; GENERIC-NEXT: mvcv16 a0
5388 ; GENERIC-NEXT: movi16 a3, 1
5389 ; GENERIC-NEXT: subu16 a3, a0
5390 ; GENERIC-NEXT: btsti16 a3, 0
5391 ; GENERIC-NEXT: bt16 .LBB132_2
5392 ; GENERIC-NEXT: # %bb.1: # %entry
5393 ; GENERIC-NEXT: mov16 a2, a1
5394 ; GENERIC-NEXT: .LBB132_2: # %entry
5395 ; GENERIC-NEXT: mov16 a0, a2
5396 ; GENERIC-NEXT: addi16 sp, sp, 4
5397 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5398 ; GENERIC-NEXT: addi16 sp, sp, 4
5399 ; GENERIC-NEXT: rts16
5400 entry:
5401 %icmp = icmp sgt i16 %x, 47777777
5402 %ret = select i1 %icmp, i16 %m, i16 %n
5403 ret i16 %ret
5404 }
5406 define i16 @selectC_sgt_i16(i1 %c, i16 %n, i16 %m) {
5407 ; CHECK-LABEL: selectC_sgt_i16:
5408 ; CHECK: # %bb.0: # %entry
5409 ; CHECK-NEXT: btsti16 a0, 0
5410 ; CHECK-NEXT: movt32 a1, a2
5411 ; CHECK-NEXT: mov16 a0, a1
5412 ; CHECK-NEXT: rts16
5413 ;
5414 ; GENERIC-LABEL: selectC_sgt_i16:
5415 ; GENERIC: # %bb.0: # %entry
5416 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5417 ; GENERIC-NEXT: subi16 sp, sp, 4
5418 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5419 ; GENERIC-NEXT: btsti16 a0, 0
5420 ; GENERIC-NEXT: bt16 .LBB133_2
5421 ; GENERIC-NEXT: # %bb.1: # %entry
5422 ; GENERIC-NEXT: mov16 a2, a1
5423 ; GENERIC-NEXT: .LBB133_2: # %entry
5424 ; GENERIC-NEXT: mov16 a0, a2
5425 ; GENERIC-NEXT: addi16 sp, sp, 4
5426 ; GENERIC-NEXT: rts16
5427 entry:
5428 %ret = select i1 %c, i16 %m, i16 %n
5429 ret i16 %ret
5430 }
5433 define i8 @selectRR_sgt_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
5434 ; CHECK-LABEL: selectRR_sgt_i8:
5435 ; CHECK: # %bb.0: # %entry
5436 ; CHECK-NEXT: sextb16 a1, a1
5437 ; CHECK-NEXT: sextb16 a0, a0
5438 ; CHECK-NEXT: cmplt16 a0, a1
5439 ; CHECK-NEXT: movt32 a2, a3
5440 ; CHECK-NEXT: mov16 a0, a2
5441 ; CHECK-NEXT: rts16
5442 ;
5443 ; GENERIC-LABEL: selectRR_sgt_i8:
5444 ; GENERIC: # %bb.0: # %entry
5445 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5446 ; GENERIC-NEXT: subi16 sp, sp, 4
5447 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5448 ; GENERIC-NEXT: sextb16 a1, a1
5449 ; GENERIC-NEXT: sextb16 a0, a0
5450 ; GENERIC-NEXT: cmplt16 a0, a1
5451 ; GENERIC-NEXT: mvcv16 a0
5452 ; GENERIC-NEXT: movi16 a1, 1
5453 ; GENERIC-NEXT: subu16 a1, a0
5454 ; GENERIC-NEXT: btsti16 a1, 0
5455 ; GENERIC-NEXT: bt16 .LBB134_2
5456 ; GENERIC-NEXT: # %bb.1: # %entry
5457 ; GENERIC-NEXT: mov16 a3, a2
5458 ; GENERIC-NEXT: .LBB134_2: # %entry
5459 ; GENERIC-NEXT: mov16 a0, a3
5460 ; GENERIC-NEXT: addi16 sp, sp, 4
5461 ; GENERIC-NEXT: rts16
5462 entry:
5463 %icmp = icmp sgt i8 %y, %x
5464 %ret = select i1 %icmp, i8 %m, i8 %n
5465 ret i8 %ret
5466 }
5468 define i8 @selectRI_sgt_i8(i8 %x, i8 %n, i8 %m) {
5469 ; CHECK-LABEL: selectRI_sgt_i8:
5470 ; CHECK: # %bb.0: # %entry
5471 ; CHECK-NEXT: sextb16 a0, a0
5472 ; CHECK-NEXT: movi16 a3, 10
5473 ; CHECK-NEXT: cmplt16 a3, a0
5474 ; CHECK-NEXT: movt32 a1, a2
5475 ; CHECK-NEXT: mov16 a0, a1
5476 ; CHECK-NEXT: rts16
5477 ;
5478 ; GENERIC-LABEL: selectRI_sgt_i8:
5479 ; GENERIC: # %bb.0: # %entry
5480 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5481 ; GENERIC-NEXT: subi16 sp, sp, 4
5482 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5483 ; GENERIC-NEXT: sextb16 a0, a0
5484 ; GENERIC-NEXT: movi16 a3, 10
5485 ; GENERIC-NEXT: cmplt16 a3, a0
5486 ; GENERIC-NEXT: mvcv16 a0
5487 ; GENERIC-NEXT: movi16 a3, 1
5488 ; GENERIC-NEXT: subu16 a3, a0
5489 ; GENERIC-NEXT: btsti16 a3, 0
5490 ; GENERIC-NEXT: bt16 .LBB135_2
5491 ; GENERIC-NEXT: # %bb.1: # %entry
5492 ; GENERIC-NEXT: mov16 a2, a1
5493 ; GENERIC-NEXT: .LBB135_2: # %entry
5494 ; GENERIC-NEXT: mov16 a0, a2
5495 ; GENERIC-NEXT: addi16 sp, sp, 4
5496 ; GENERIC-NEXT: rts16
5497 entry:
5498 %icmp = icmp sgt i8 %x, 10
5499 %ret = select i1 %icmp, i8 %m, i8 %n
5500 ret i8 %ret
5501 }
5503 define i8 @selectRX_sgt_i8(i8 %x, i8 %n, i8 %m) {
5504 ; CHECK-LABEL: selectRX_sgt_i8:
5505 ; CHECK: # %bb.0: # %entry
5506 ; CHECK-NEXT: sextb16 a0, a0
5507 ; CHECK-NEXT: movih32 a3, 65535
5508 ; CHECK-NEXT: ori32 a3, a3, 65521
5509 ; CHECK-NEXT: cmplt16 a3, a0
5510 ; CHECK-NEXT: movt32 a1, a2
5511 ; CHECK-NEXT: mov16 a0, a1
5512 ; CHECK-NEXT: rts16
5513 ;
5514 ; GENERIC-LABEL: selectRX_sgt_i8:
5515 ; GENERIC: # %bb.0: # %entry
5516 ; GENERIC-NEXT: subi16 sp, sp, 8
5517 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
5518 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
5519 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5520 ; GENERIC-NEXT: .cfi_offset l1, -4
5521 ; GENERIC-NEXT: .cfi_offset l0, -8
5522 ; GENERIC-NEXT: subi16 sp, sp, 4
5523 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
5524 ; GENERIC-NEXT: sextb16 a0, a0
5525 ; GENERIC-NEXT: movi16 a3, 255
5526 ; GENERIC-NEXT: lsli16 l0, a3, 24
5527 ; GENERIC-NEXT: lsli16 l1, a3, 16
5528 ; GENERIC-NEXT: or16 l1, l0
5529 ; GENERIC-NEXT: lsli16 a3, a3, 8
5530 ; GENERIC-NEXT: or16 a3, l1
5531 ; GENERIC-NEXT: movi16 l0, 241
5532 ; GENERIC-NEXT: or16 l0, a3
5533 ; GENERIC-NEXT: cmplt16 l0, a0
5534 ; GENERIC-NEXT: mvcv16 a0
5535 ; GENERIC-NEXT: movi16 a3, 1
5536 ; GENERIC-NEXT: subu16 a3, a0
5537 ; GENERIC-NEXT: btsti16 a3, 0
5538 ; GENERIC-NEXT: bt16 .LBB136_2
5539 ; GENERIC-NEXT: # %bb.1: # %entry
5540 ; GENERIC-NEXT: mov16 a2, a1
5541 ; GENERIC-NEXT: .LBB136_2: # %entry
5542 ; GENERIC-NEXT: mov16 a0, a2
5543 ; GENERIC-NEXT: addi16 sp, sp, 4
5544 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5545 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
5546 ; GENERIC-NEXT: addi16 sp, sp, 8
5547 ; GENERIC-NEXT: rts16
5548 entry:
5549 %icmp = icmp sgt i8 %x, 47777777
5550 %ret = select i1 %icmp, i8 %m, i8 %n
5551 ret i8 %ret
5552 }
5554 define i8 @selectC_sgt_i8(i1 %c, i8 %n, i8 %m) {
5555 ; CHECK-LABEL: selectC_sgt_i8:
5556 ; CHECK: # %bb.0: # %entry
5557 ; CHECK-NEXT: btsti16 a0, 0
5558 ; CHECK-NEXT: movt32 a1, a2
5559 ; CHECK-NEXT: mov16 a0, a1
5560 ; CHECK-NEXT: rts16
5561 ;
5562 ; GENERIC-LABEL: selectC_sgt_i8:
5563 ; GENERIC: # %bb.0: # %entry
5564 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5565 ; GENERIC-NEXT: subi16 sp, sp, 4
5566 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5567 ; GENERIC-NEXT: btsti16 a0, 0
5568 ; GENERIC-NEXT: bt16 .LBB137_2
5569 ; GENERIC-NEXT: # %bb.1: # %entry
5570 ; GENERIC-NEXT: mov16 a2, a1
5571 ; GENERIC-NEXT: .LBB137_2: # %entry
5572 ; GENERIC-NEXT: mov16 a0, a2
5573 ; GENERIC-NEXT: addi16 sp, sp, 4
5574 ; GENERIC-NEXT: rts16
5575 entry:
5576 %ret = select i1 %c, i8 %m, i8 %n
5577 ret i8 %ret
5578 }
5581 define i1 @selectRR_sgt_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
5582 ; CHECK-LABEL: selectRR_sgt_i1:
5583 ; CHECK: # %bb.0: # %entry
5584 ; CHECK-NEXT: btsti16 a1, 0
5585 ; CHECK-NEXT: movt32 a3, a2
5586 ; CHECK-NEXT: btsti16 a0, 0
5587 ; CHECK-NEXT: movt32 a2, a3
5588 ; CHECK-NEXT: mov16 a0, a2
5589 ; CHECK-NEXT: rts16
5590 ;
5591 ; GENERIC-LABEL: selectRR_sgt_i1:
5592 ; GENERIC: # %bb.0: # %entry
5593 ; GENERIC-NEXT: subi16 sp, sp, 4
5594 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5595 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5596 ; GENERIC-NEXT: .cfi_offset l0, -4
5597 ; GENERIC-NEXT: subi16 sp, sp, 4
5598 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
5599 ; GENERIC-NEXT: mov16 l0, a0
5600 ; GENERIC-NEXT: btsti16 a1, 0
5601 ; GENERIC-NEXT: mov16 a0, a2
5602 ; GENERIC-NEXT: bt16 .LBB138_2
5603 ; GENERIC-NEXT: # %bb.1: # %entry
5604 ; GENERIC-NEXT: mov16 a0, a3
5605 ; GENERIC-NEXT: .LBB138_2: # %entry
5606 ; GENERIC-NEXT: btsti16 l0, 0
5607 ; GENERIC-NEXT: bt16 .LBB138_4
5608 ; GENERIC-NEXT: # %bb.3: # %entry
5609 ; GENERIC-NEXT: mov16 a0, a2
5610 ; GENERIC-NEXT: .LBB138_4: # %entry
5611 ; GENERIC-NEXT: addi16 sp, sp, 4
5612 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5613 ; GENERIC-NEXT: addi16 sp, sp, 4
5614 ; GENERIC-NEXT: rts16
5615 entry:
5616 %icmp = icmp sgt i1 %y, %x
5617 %ret = select i1 %icmp, i1 %m, i1 %n
5618 ret i1 %ret
5619 }
5621 define i1 @selectRI_sgt_i1(i1 %x, i1 %n, i1 %m) {
5622 ; CHECK-LABEL: selectRI_sgt_i1:
5623 ; CHECK: # %bb.0: # %entry
5624 ; CHECK-NEXT: mov16 a0, a1
5625 ; CHECK-NEXT: rts16
5626 ;
5627 ; GENERIC-LABEL: selectRI_sgt_i1:
5628 ; GENERIC: # %bb.0: # %entry
5629 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5630 ; GENERIC-NEXT: subi16 sp, sp, 4
5631 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5632 ; GENERIC-NEXT: mov16 a0, a1
5633 ; GENERIC-NEXT: addi16 sp, sp, 4
5634 ; GENERIC-NEXT: rts16
5635 entry:
5636 %icmp = icmp sgt i1 %x, 10
5637 %ret = select i1 %icmp, i1 %m, i1 %n
5638 ret i1 %ret
5639 }
5641 define i1 @selectRX_sgt_i1(i1 %x, i1 %n, i1 %m) {
5642 ; CHECK-LABEL: selectRX_sgt_i1:
5643 ; CHECK: # %bb.0: # %entry
5644 ; CHECK-NEXT: btsti16 a0, 0
5645 ; CHECK-NEXT: movt32 a2, a1
5646 ; CHECK-NEXT: mov16 a0, a2
5647 ; CHECK-NEXT: rts16
5648 ;
5649 ; GENERIC-LABEL: selectRX_sgt_i1:
5650 ; GENERIC: # %bb.0: # %entry
5651 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5652 ; GENERIC-NEXT: subi16 sp, sp, 4
5653 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5654 ; GENERIC-NEXT: btsti16 a0, 0
5655 ; GENERIC-NEXT: bt16 .LBB140_2
5656 ; GENERIC-NEXT: # %bb.1: # %entry
5657 ; GENERIC-NEXT: mov16 a1, a2
5658 ; GENERIC-NEXT: .LBB140_2: # %entry
5659 ; GENERIC-NEXT: mov16 a0, a1
5660 ; GENERIC-NEXT: addi16 sp, sp, 4
5661 ; GENERIC-NEXT: rts16
5662 entry:
5663 %icmp = icmp sgt i1 %x, 47777777
5664 %ret = select i1 %icmp, i1 %m, i1 %n
5665 ret i1 %ret
5666 }
5668 define i1 @selectC_sgt_i1(i1 %c, i1 %n, i1 %m) {
5669 ; CHECK-LABEL: selectC_sgt_i1:
5670 ; CHECK: # %bb.0: # %entry
5671 ; CHECK-NEXT: btsti16 a0, 0
5672 ; CHECK-NEXT: movt32 a1, a2
5673 ; CHECK-NEXT: mov16 a0, a1
5674 ; CHECK-NEXT: rts16
5675 ;
5676 ; GENERIC-LABEL: selectC_sgt_i1:
5677 ; GENERIC: # %bb.0: # %entry
5678 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5679 ; GENERIC-NEXT: subi16 sp, sp, 4
5680 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5681 ; GENERIC-NEXT: btsti16 a0, 0
5682 ; GENERIC-NEXT: bt16 .LBB141_2
5683 ; GENERIC-NEXT: # %bb.1: # %entry
5684 ; GENERIC-NEXT: mov16 a2, a1
5685 ; GENERIC-NEXT: .LBB141_2: # %entry
5686 ; GENERIC-NEXT: mov16 a0, a2
5687 ; GENERIC-NEXT: addi16 sp, sp, 4
5688 ; GENERIC-NEXT: rts16
5689 entry:
5690 %ret = select i1 %c, i1 %m, i1 %n
5691 ret i1 %ret
5692 }
5695 define i32 @selectRR_sge_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
5696 ; CHECK-LABEL: selectRR_sge_i32:
5697 ; CHECK: # %bb.0: # %entry
5698 ; CHECK-NEXT: cmplt16 a1, a0
5699 ; CHECK-NEXT: movf32 a2, a3
5700 ; CHECK-NEXT: mov16 a0, a2
5701 ; CHECK-NEXT: rts16
5702 ;
5703 ; GENERIC-LABEL: selectRR_sge_i32:
5704 ; GENERIC: # %bb.0: # %entry
5705 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5706 ; GENERIC-NEXT: subi16 sp, sp, 4
5707 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5708 ; GENERIC-NEXT: cmplt16 a1, a0
5709 ; GENERIC-NEXT: mvcv16 a0
5710 ; GENERIC-NEXT: btsti16 a0, 0
5711 ; GENERIC-NEXT: bt16 .LBB142_2
5712 ; GENERIC-NEXT: # %bb.1: # %entry
5713 ; GENERIC-NEXT: mov16 a3, a2
5714 ; GENERIC-NEXT: .LBB142_2: # %entry
5715 ; GENERIC-NEXT: mov16 a0, a3
5716 ; GENERIC-NEXT: addi16 sp, sp, 4
5717 ; GENERIC-NEXT: rts16
5718 entry:
5719 %icmp = icmp sge i32 %y, %x
5720 %ret = select i1 %icmp, i32 %m, i32 %n
5721 ret i32 %ret
5722 }
5724 define i32 @selectRI_sge_i32(i32 %x, i32 %n, i32 %m) {
5725 ; CHECK-LABEL: selectRI_sge_i32:
5726 ; CHECK: # %bb.0: # %entry
5727 ; CHECK-NEXT: movi16 a3, 9
5728 ; CHECK-NEXT: cmplt16 a3, a0
5729 ; CHECK-NEXT: movt32 a1, a2
5730 ; CHECK-NEXT: mov16 a0, a1
5731 ; CHECK-NEXT: rts16
5732 ;
5733 ; GENERIC-LABEL: selectRI_sge_i32:
5734 ; GENERIC: # %bb.0: # %entry
5735 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5736 ; GENERIC-NEXT: subi16 sp, sp, 4
5737 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5738 ; GENERIC-NEXT: movi16 a3, 9
5739 ; GENERIC-NEXT: cmplt16 a3, a0
5740 ; GENERIC-NEXT: mvcv16 a0
5741 ; GENERIC-NEXT: movi16 a3, 1
5742 ; GENERIC-NEXT: subu16 a3, a0
5743 ; GENERIC-NEXT: btsti16 a3, 0
5744 ; GENERIC-NEXT: bt16 .LBB143_2
5745 ; GENERIC-NEXT: # %bb.1: # %entry
5746 ; GENERIC-NEXT: mov16 a2, a1
5747 ; GENERIC-NEXT: .LBB143_2: # %entry
5748 ; GENERIC-NEXT: mov16 a0, a2
5749 ; GENERIC-NEXT: addi16 sp, sp, 4
5750 ; GENERIC-NEXT: rts16
5751 entry:
5752 %icmp = icmp sge i32 %x, 10
5753 %ret = select i1 %icmp, i32 %m, i32 %n
5754 ret i32 %ret
5755 }
5757 define i32 @selectRX_sge_i32(i32 %x, i32 %n, i32 %m) {
5758 ; CHECK-LABEL: selectRX_sge_i32:
5759 ; CHECK: # %bb.0: # %entry
5760 ; CHECK-NEXT: movih32 a3, 729
5761 ; CHECK-NEXT: ori32 a3, a3, 2032
5762 ; CHECK-NEXT: cmplt16 a3, a0
5763 ; CHECK-NEXT: movt32 a1, a2
5764 ; CHECK-NEXT: mov16 a0, a1
5765 ; CHECK-NEXT: rts16
5766 ;
5767 ; GENERIC-LABEL: selectRX_sge_i32:
5768 ; GENERIC: # %bb.0: # %entry
5769 ; GENERIC-NEXT: subi16 sp, sp, 4
5770 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5771 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5772 ; GENERIC-NEXT: .cfi_offset l0, -4
5773 ; GENERIC-NEXT: subi16 sp, sp, 4
5774 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
5775 ; GENERIC-NEXT: movi16 a3, 2
5776 ; GENERIC-NEXT: lsli16 a3, a3, 24
5777 ; GENERIC-NEXT: movi16 l0, 217
5778 ; GENERIC-NEXT: lsli16 l0, l0, 16
5779 ; GENERIC-NEXT: or16 l0, a3
5780 ; GENERIC-NEXT: movi16 a3, 7
5781 ; GENERIC-NEXT: lsli16 a3, a3, 8
5782 ; GENERIC-NEXT: or16 a3, l0
5783 ; GENERIC-NEXT: movi16 l0, 240
5784 ; GENERIC-NEXT: or16 l0, a3
5785 ; GENERIC-NEXT: cmplt16 l0, a0
5786 ; GENERIC-NEXT: mvcv16 a0
5787 ; GENERIC-NEXT: movi16 a3, 1
5788 ; GENERIC-NEXT: subu16 a3, a0
5789 ; GENERIC-NEXT: btsti16 a3, 0
5790 ; GENERIC-NEXT: bt16 .LBB144_2
5791 ; GENERIC-NEXT: # %bb.1: # %entry
5792 ; GENERIC-NEXT: mov16 a2, a1
5793 ; GENERIC-NEXT: .LBB144_2: # %entry
5794 ; GENERIC-NEXT: mov16 a0, a2
5795 ; GENERIC-NEXT: addi16 sp, sp, 4
5796 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5797 ; GENERIC-NEXT: addi16 sp, sp, 4
5798 ; GENERIC-NEXT: rts16
5799 entry:
5800 %icmp = icmp sge i32 %x, 47777777
5801 %ret = select i1 %icmp, i32 %m, i32 %n
5802 ret i32 %ret
5803 }
5805 define i32 @selectC_sge_i32(i1 %c, i32 %n, i32 %m) {
5806 ; CHECK-LABEL: selectC_sge_i32:
5807 ; CHECK: # %bb.0: # %entry
5808 ; CHECK-NEXT: btsti16 a0, 0
5809 ; CHECK-NEXT: movt32 a1, a2
5810 ; CHECK-NEXT: mov16 a0, a1
5811 ; CHECK-NEXT: rts16
5812 ;
5813 ; GENERIC-LABEL: selectC_sge_i32:
5814 ; GENERIC: # %bb.0: # %entry
5815 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5816 ; GENERIC-NEXT: subi16 sp, sp, 4
5817 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5818 ; GENERIC-NEXT: btsti16 a0, 0
5819 ; GENERIC-NEXT: bt16 .LBB145_2
5820 ; GENERIC-NEXT: # %bb.1: # %entry
5821 ; GENERIC-NEXT: mov16 a2, a1
5822 ; GENERIC-NEXT: .LBB145_2: # %entry
5823 ; GENERIC-NEXT: mov16 a0, a2
5824 ; GENERIC-NEXT: addi16 sp, sp, 4
5825 ; GENERIC-NEXT: rts16
5826 entry:
5827 %ret = select i1 %c, i32 %m, i32 %n
5828 ret i32 %ret
5829 }
5831 define i64 @selectRR_sge_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
5832 ; CHECK-LABEL: selectRR_sge_i64:
5833 ; CHECK: # %bb.0: # %entry
5834 ; CHECK-NEXT: .cfi_def_cfa_offset 0
5835 ; CHECK-NEXT: subi16 sp, sp, 12
5836 ; CHECK-NEXT: .cfi_def_cfa_offset 12
5837 ; CHECK-NEXT: cmphs16 a2, a0
5838 ; CHECK-NEXT: mvc32 a0
5839 ; CHECK-NEXT: st16.w a0, (sp, 4)
5840 ; CHECK-NEXT: cmpne16 a3, a1
5841 ; CHECK-NEXT: mvc32 a0
5842 ; CHECK-NEXT: st16.w a0, (sp, 8)
5843 ; CHECK-NEXT: cmplt16 a3, a1
5844 ; CHECK-NEXT: mvcv16 a0
5845 ; CHECK-NEXT: ld16.w a1, (sp, 4)
5846 ; CHECK-NEXT: btsti16 a1, 0
5847 ; CHECK-NEXT: mvc32 a1
5848 ; CHECK-NEXT: ld16.w a2, (sp, 8)
5849 ; CHECK-NEXT: btsti16 a2, 0
5850 ; CHECK-NEXT: movf32 a0, a1
5851 ; CHECK-NEXT: addi16 a1, sp, 12
5852 ; CHECK-NEXT: addi16 a2, sp, 20
5853 ; CHECK-NEXT: btsti16 a0, 0
5854 ; CHECK-NEXT: movt32 a1, a2
5855 ; CHECK-NEXT: ld16.w a0, (a1, 0)
5856 ; CHECK-NEXT: ld16.w a1, (a1, 4)
5857 ; CHECK-NEXT: addi16 sp, sp, 12
5858 ; CHECK-NEXT: rts16
5859 ;
5860 ; GENERIC-LABEL: selectRR_sge_i64:
5861 ; GENERIC: # %bb.0: # %entry
5862 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
5863 ; GENERIC-NEXT: subi16 sp, sp, 4
5864 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
5865 ; GENERIC-NEXT: cmphs16 a2, a0
5866 ; GENERIC-NEXT: mvcv16 a2
5867 ; GENERIC-NEXT: cmplt16 a3, a1
5868 ; GENERIC-NEXT: mvcv16 a0
5869 ; GENERIC-NEXT: cmpne16 a3, a1
5870 ; GENERIC-NEXT: mvcv16 a1
5871 ; GENERIC-NEXT: btsti16 a1, 0
5872 ; GENERIC-NEXT: bf16 .LBB146_2
5873 ; GENERIC-NEXT: # %bb.1:
5874 ; GENERIC-NEXT: movi16 a0, 1
5875 ; GENERIC-NEXT: subu16 a0, a2
5876 ; GENERIC-NEXT: .LBB146_2: # %entry
5877 ; GENERIC-NEXT: btsti16 a0, 0
5878 ; GENERIC-NEXT: bt16 .LBB146_4
5879 ; GENERIC-NEXT: # %bb.3: # %entry
5880 ; GENERIC-NEXT: movi16 a0, 4
5881 ; GENERIC-NEXT: br32 .LBB146_5
5882 ; GENERIC-NEXT: .LBB146_4:
5883 ; GENERIC-NEXT: movi16 a0, 12
5884 ; GENERIC-NEXT: .LBB146_5: # %entry
5885 ; GENERIC-NEXT: addu16 a0, sp
5886 ; GENERIC-NEXT: mov16 a1, a0
5887 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
5888 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
5889 ; GENERIC-NEXT: addi16 sp, sp, 4
5890 ; GENERIC-NEXT: rts16
5891 entry:
5892 %icmp = icmp sge i64 %y, %x
5893 %ret = select i1 %icmp, i64 %m, i64 %n
5894 ret i64 %ret
5895 }
5897 define i64 @selectRI_sge_i64(i64 %x, i64 %n, i64 %m) {
5898 ; CHECK-LABEL: selectRI_sge_i64:
5899 ; CHECK: # %bb.0: # %entry
5900 ; CHECK-NEXT: subi16 sp, sp, 4
5901 ; CHECK-NEXT: .cfi_def_cfa_offset 4
5902 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5903 ; CHECK-NEXT: .cfi_offset l0, -4
5904 ; CHECK-NEXT: subi16 sp, sp, 12
5905 ; CHECK-NEXT: .cfi_def_cfa_offset 16
5906 ; CHECK-NEXT: ld32.w t0, (sp, 20)
5907 ; CHECK-NEXT: ld32.w t1, (sp, 16)
5908 ; CHECK-NEXT: movi16 l0, 0
5909 ; CHECK-NEXT: cmplt16 l0, a1
5910 ; CHECK-NEXT: mvc32 l0
5911 ; CHECK-NEXT: st16.w l0, (sp, 8)
5912 ; CHECK-NEXT: movi16 l0, 9
5913 ; CHECK-NEXT: cmphs16 l0, a0
5914 ; CHECK-NEXT: mvcv16 a0
5915 ; CHECK-NEXT: cmpnei16 a1, 0
5916 ; CHECK-NEXT: mvc32 a1
5917 ; CHECK-NEXT: st16.w a1, (sp, 4)
5918 ; CHECK-NEXT: ld16.w a1, (sp, 8)
5919 ; CHECK-NEXT: btsti16 a1, 0
5920 ; CHECK-NEXT: mvc32 a1
5921 ; CHECK-NEXT: ld16.w l0, (sp, 4)
5922 ; CHECK-NEXT: btsti16 l0, 0
5923 ; CHECK-NEXT: movf32 a1, a0
5924 ; CHECK-NEXT: btsti16 a1, 0
5925 ; CHECK-NEXT: movt32 a2, t1
5926 ; CHECK-NEXT: movt32 a3, t0
5927 ; CHECK-NEXT: mov16 a0, a2
5928 ; CHECK-NEXT: mov16 a1, a3
5929 ; CHECK-NEXT: addi16 sp, sp, 12
5930 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5931 ; CHECK-NEXT: addi16 sp, sp, 4
5932 ; CHECK-NEXT: rts16
5933 ;
5934 ; GENERIC-LABEL: selectRI_sge_i64:
5935 ; GENERIC: # %bb.0: # %entry
5936 ; GENERIC-NEXT: subi16 sp, sp, 8
5937 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
5938 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
5939 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5940 ; GENERIC-NEXT: .cfi_offset l1, -4
5941 ; GENERIC-NEXT: .cfi_offset l0, -8
5942 ; GENERIC-NEXT: subi16 sp, sp, 4
5943 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
5944 ; GENERIC-NEXT: movi16 l0, 0
5945 ; GENERIC-NEXT: cmplt16 l0, a1
5946 ; GENERIC-NEXT: mvcv16 l0
5947 ; GENERIC-NEXT: movi16 l1, 9
5948 ; GENERIC-NEXT: cmphs16 l1, a0
5949 ; GENERIC-NEXT: mvcv16 a0
5950 ; GENERIC-NEXT: cmpnei16 a1, 0
5951 ; GENERIC-NEXT: mvcv16 a1
5952 ; GENERIC-NEXT: btsti16 a1, 0
5953 ; GENERIC-NEXT: bf16 .LBB147_5
5954 ; GENERIC-NEXT: # %bb.1: # %entry
5955 ; GENERIC-NEXT: btsti16 a0, 0
5956 ; GENERIC-NEXT: bt16 .LBB147_6
5957 ; GENERIC-NEXT: .LBB147_2: # %entry
5958 ; GENERIC-NEXT: btsti16 a0, 0
5959 ; GENERIC-NEXT: bf16 .LBB147_4
5960 ; GENERIC-NEXT: .LBB147_3:
5961 ; GENERIC-NEXT: ld16.w a3, (sp, 16)
5962 ; GENERIC-NEXT: .LBB147_4: # %entry
5963 ; GENERIC-NEXT: mov16 a0, a2
5964 ; GENERIC-NEXT: mov16 a1, a3
5965 ; GENERIC-NEXT: addi16 sp, sp, 4
5966 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
5967 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
5968 ; GENERIC-NEXT: addi16 sp, sp, 8
5969 ; GENERIC-NEXT: rts16
5970 ; GENERIC-NEXT: .LBB147_5: # %entry
5971 ; GENERIC-NEXT: movi16 a0, 1
5972 ; GENERIC-NEXT: subu16 a0, l0
5973 ; GENERIC-NEXT: btsti16 a0, 0
5974 ; GENERIC-NEXT: bf16 .LBB147_2
5975 ; GENERIC-NEXT: .LBB147_6:
5976 ; GENERIC-NEXT: ld16.w a2, (sp, 12)
5977 ; GENERIC-NEXT: btsti16 a0, 0
5978 ; GENERIC-NEXT: bt16 .LBB147_3
5979 ; GENERIC-NEXT: br32 .LBB147_4
5980 entry:
5981 %icmp = icmp sge i64 %x, 10
5982 %ret = select i1 %icmp, i64 %m, i64 %n
5983 ret i64 %ret
5984 }
5986 define i64 @selectRX_sge_i64(i64 %x, i64 %n, i64 %m) {
5987 ; CHECK-LABEL: selectRX_sge_i64:
5988 ; CHECK: # %bb.0: # %entry
5989 ; CHECK-NEXT: subi16 sp, sp, 4
5990 ; CHECK-NEXT: .cfi_def_cfa_offset 4
5991 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
5992 ; CHECK-NEXT: .cfi_offset l0, -4
5993 ; CHECK-NEXT: subi16 sp, sp, 12
5994 ; CHECK-NEXT: .cfi_def_cfa_offset 16
5995 ; CHECK-NEXT: ld32.w t0, (sp, 20)
5996 ; CHECK-NEXT: ld32.w t1, (sp, 16)
5997 ; CHECK-NEXT: movi16 l0, 0
5998 ; CHECK-NEXT: cmplt16 l0, a1
5999 ; CHECK-NEXT: mvc32 l0
6000 ; CHECK-NEXT: st16.w l0, (sp, 8)
6001 ; CHECK-NEXT: movih32 l0, 729
6002 ; CHECK-NEXT: ori32 l0, l0, 2032
6003 ; CHECK-NEXT: cmphs16 l0, a0
6004 ; CHECK-NEXT: mvcv16 a0
6005 ; CHECK-NEXT: cmpnei16 a1, 0
6006 ; CHECK-NEXT: mvc32 a1
6007 ; CHECK-NEXT: st16.w a1, (sp, 4)
6008 ; CHECK-NEXT: ld16.w a1, (sp, 8)
6009 ; CHECK-NEXT: btsti16 a1, 0
6010 ; CHECK-NEXT: mvc32 a1
6011 ; CHECK-NEXT: ld16.w l0, (sp, 4)
6012 ; CHECK-NEXT: btsti16 l0, 0
6013 ; CHECK-NEXT: movf32 a1, a0
6014 ; CHECK-NEXT: btsti16 a1, 0
6015 ; CHECK-NEXT: movt32 a2, t1
6016 ; CHECK-NEXT: movt32 a3, t0
6017 ; CHECK-NEXT: mov16 a0, a2
6018 ; CHECK-NEXT: mov16 a1, a3
6019 ; CHECK-NEXT: addi16 sp, sp, 12
6020 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6021 ; CHECK-NEXT: addi16 sp, sp, 4
6022 ; CHECK-NEXT: rts16
6023 ;
6024 ; GENERIC-LABEL: selectRX_sge_i64:
6025 ; GENERIC: # %bb.0: # %entry
6026 ; GENERIC-NEXT: subi16 sp, sp, 12
6027 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
6028 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
6029 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
6030 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6031 ; GENERIC-NEXT: .cfi_offset l2, -4
6032 ; GENERIC-NEXT: .cfi_offset l1, -8
6033 ; GENERIC-NEXT: .cfi_offset l0, -12
6034 ; GENERIC-NEXT: subi16 sp, sp, 4
6035 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
6036 ; GENERIC-NEXT: movi16 l0, 0
6037 ; GENERIC-NEXT: cmplt16 l0, a1
6038 ; GENERIC-NEXT: mvcv16 l0
6039 ; GENERIC-NEXT: movi16 l1, 2
6040 ; GENERIC-NEXT: lsli16 l1, l1, 24
6041 ; GENERIC-NEXT: movi16 l2, 217
6042 ; GENERIC-NEXT: lsli16 l2, l2, 16
6043 ; GENERIC-NEXT: or16 l2, l1
6044 ; GENERIC-NEXT: movi16 l1, 7
6045 ; GENERIC-NEXT: lsli16 l1, l1, 8
6046 ; GENERIC-NEXT: or16 l1, l2
6047 ; GENERIC-NEXT: movi16 l2, 240
6048 ; GENERIC-NEXT: or16 l2, l1
6049 ; GENERIC-NEXT: cmphs16 l2, a0
6050 ; GENERIC-NEXT: mvcv16 a0
6051 ; GENERIC-NEXT: cmpnei16 a1, 0
6052 ; GENERIC-NEXT: mvcv16 a1
6053 ; GENERIC-NEXT: btsti16 a1, 0
6054 ; GENERIC-NEXT: bf16 .LBB148_5
6055 ; GENERIC-NEXT: # %bb.1: # %entry
6056 ; GENERIC-NEXT: btsti16 a0, 0
6057 ; GENERIC-NEXT: bt16 .LBB148_6
6058 ; GENERIC-NEXT: .LBB148_2: # %entry
6059 ; GENERIC-NEXT: btsti16 a0, 0
6060 ; GENERIC-NEXT: bf16 .LBB148_4
6061 ; GENERIC-NEXT: .LBB148_3:
6062 ; GENERIC-NEXT: ld16.w a3, (sp, 20)
6063 ; GENERIC-NEXT: .LBB148_4: # %entry
6064 ; GENERIC-NEXT: mov16 a0, a2
6065 ; GENERIC-NEXT: mov16 a1, a3
6066 ; GENERIC-NEXT: addi16 sp, sp, 4
6067 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6068 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
6069 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
6070 ; GENERIC-NEXT: addi16 sp, sp, 12
6071 ; GENERIC-NEXT: rts16
6072 ; GENERIC-NEXT: .LBB148_5: # %entry
6073 ; GENERIC-NEXT: movi16 a0, 1
6074 ; GENERIC-NEXT: subu16 a0, l0
6075 ; GENERIC-NEXT: btsti16 a0, 0
6076 ; GENERIC-NEXT: bf16 .LBB148_2
6077 ; GENERIC-NEXT: .LBB148_6:
6078 ; GENERIC-NEXT: ld16.w a2, (sp, 16)
6079 ; GENERIC-NEXT: btsti16 a0, 0
6080 ; GENERIC-NEXT: bt16 .LBB148_3
6081 ; GENERIC-NEXT: br32 .LBB148_4
6082 entry:
6083 %icmp = icmp sge i64 %x, 47777777
6084 %ret = select i1 %icmp, i64 %m, i64 %n
6085 ret i64 %ret
6086 }
6088 define i64 @selectC_sge_i64(i1 %c, i64 %n, i64 %m) {
6089 ; CHECK-LABEL: selectC_sge_i64:
6090 ; CHECK: # %bb.0: # %entry
6091 ; CHECK-NEXT: ld32.w t0, (sp, 0)
6092 ; CHECK-NEXT: btsti16 a0, 0
6093 ; CHECK-NEXT: movt32 a1, a3
6094 ; CHECK-NEXT: movt32 a2, t0
6095 ; CHECK-NEXT: mov16 a0, a1
6096 ; CHECK-NEXT: mov16 a1, a2
6097 ; CHECK-NEXT: rts16
6098 ;
6099 ; GENERIC-LABEL: selectC_sge_i64:
6100 ; GENERIC: # %bb.0: # %entry
6101 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6102 ; GENERIC-NEXT: subi16 sp, sp, 4
6103 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6104 ; GENERIC-NEXT: btsti16 a0, 0
6105 ; GENERIC-NEXT: bt16 .LBB149_2
6106 ; GENERIC-NEXT: # %bb.1: # %entry
6107 ; GENERIC-NEXT: mov16 a3, a1
6108 ; GENERIC-NEXT: .LBB149_2: # %entry
6109 ; GENERIC-NEXT: btsti16 a0, 0
6110 ; GENERIC-NEXT: bf16 .LBB149_4
6111 ; GENERIC-NEXT: # %bb.3:
6112 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
6113 ; GENERIC-NEXT: .LBB149_4: # %entry
6114 ; GENERIC-NEXT: mov16 a0, a3
6115 ; GENERIC-NEXT: mov16 a1, a2
6116 ; GENERIC-NEXT: addi16 sp, sp, 4
6117 ; GENERIC-NEXT: rts16
6118 entry:
6119 %ret = select i1 %c, i64 %m, i64 %n
6120 ret i64 %ret
6121 }
6124 define i16 @selectRR_sge_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
6125 ; CHECK-LABEL: selectRR_sge_i16:
6126 ; CHECK: # %bb.0: # %entry
6127 ; CHECK-NEXT: sexth16 a0, a0
6128 ; CHECK-NEXT: sexth16 a1, a1
6129 ; CHECK-NEXT: cmplt16 a1, a0
6130 ; CHECK-NEXT: movf32 a2, a3
6131 ; CHECK-NEXT: mov16 a0, a2
6132 ; CHECK-NEXT: rts16
6133 ;
6134 ; GENERIC-LABEL: selectRR_sge_i16:
6135 ; GENERIC: # %bb.0: # %entry
6136 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6137 ; GENERIC-NEXT: subi16 sp, sp, 4
6138 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6139 ; GENERIC-NEXT: sexth16 a0, a0
6140 ; GENERIC-NEXT: sexth16 a1, a1
6141 ; GENERIC-NEXT: cmplt16 a1, a0
6142 ; GENERIC-NEXT: mvcv16 a0
6143 ; GENERIC-NEXT: btsti16 a0, 0
6144 ; GENERIC-NEXT: bt16 .LBB150_2
6145 ; GENERIC-NEXT: # %bb.1: # %entry
6146 ; GENERIC-NEXT: mov16 a3, a2
6147 ; GENERIC-NEXT: .LBB150_2: # %entry
6148 ; GENERIC-NEXT: mov16 a0, a3
6149 ; GENERIC-NEXT: addi16 sp, sp, 4
6150 ; GENERIC-NEXT: rts16
6151 entry:
6152 %icmp = icmp sge i16 %y, %x
6153 %ret = select i1 %icmp, i16 %m, i16 %n
6154 ret i16 %ret
6155 }
6157 define i16 @selectRI_sge_i16(i16 %x, i16 %n, i16 %m) {
6158 ; CHECK-LABEL: selectRI_sge_i16:
6159 ; CHECK: # %bb.0: # %entry
6160 ; CHECK-NEXT: sexth16 a0, a0
6161 ; CHECK-NEXT: movi16 a3, 9
6162 ; CHECK-NEXT: cmplt16 a3, a0
6163 ; CHECK-NEXT: movt32 a1, a2
6164 ; CHECK-NEXT: mov16 a0, a1
6165 ; CHECK-NEXT: rts16
6166 ;
6167 ; GENERIC-LABEL: selectRI_sge_i16:
6168 ; GENERIC: # %bb.0: # %entry
6169 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6170 ; GENERIC-NEXT: subi16 sp, sp, 4
6171 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6172 ; GENERIC-NEXT: sexth16 a0, a0
6173 ; GENERIC-NEXT: movi16 a3, 9
6174 ; GENERIC-NEXT: cmplt16 a3, a0
6175 ; GENERIC-NEXT: mvcv16 a0
6176 ; GENERIC-NEXT: movi16 a3, 1
6177 ; GENERIC-NEXT: subu16 a3, a0
6178 ; GENERIC-NEXT: btsti16 a3, 0
6179 ; GENERIC-NEXT: bt16 .LBB151_2
6180 ; GENERIC-NEXT: # %bb.1: # %entry
6181 ; GENERIC-NEXT: mov16 a2, a1
6182 ; GENERIC-NEXT: .LBB151_2: # %entry
6183 ; GENERIC-NEXT: mov16 a0, a2
6184 ; GENERIC-NEXT: addi16 sp, sp, 4
6185 ; GENERIC-NEXT: rts16
6186 entry:
6187 %icmp = icmp sge i16 %x, 10
6188 %ret = select i1 %icmp, i16 %m, i16 %n
6189 ret i16 %ret
6190 }
6192 define i16 @selectRX_sge_i16(i16 %x, i16 %n, i16 %m) {
6193 ; CHECK-LABEL: selectRX_sge_i16:
6194 ; CHECK: # %bb.0: # %entry
6195 ; CHECK-NEXT: sexth16 a0, a0
6196 ; CHECK-NEXT: movi32 a3, 2032
6197 ; CHECK-NEXT: cmplt16 a3, a0
6198 ; CHECK-NEXT: movt32 a1, a2
6199 ; CHECK-NEXT: mov16 a0, a1
6200 ; CHECK-NEXT: rts16
6201 ;
6202 ; GENERIC-LABEL: selectRX_sge_i16:
6203 ; GENERIC: # %bb.0: # %entry
6204 ; GENERIC-NEXT: subi16 sp, sp, 4
6205 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6206 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6207 ; GENERIC-NEXT: .cfi_offset l0, -4
6208 ; GENERIC-NEXT: subi16 sp, sp, 4
6209 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
6210 ; GENERIC-NEXT: sexth16 a0, a0
6211 ; GENERIC-NEXT: movi16 a3, 0
6212 ; GENERIC-NEXT: lsli16 l0, a3, 24
6213 ; GENERIC-NEXT: lsli16 a3, a3, 16
6214 ; GENERIC-NEXT: or16 a3, l0
6215 ; GENERIC-NEXT: movi16 l0, 7
6216 ; GENERIC-NEXT: lsli16 l0, l0, 8
6217 ; GENERIC-NEXT: or16 l0, a3
6218 ; GENERIC-NEXT: movi16 a3, 240
6219 ; GENERIC-NEXT: or16 a3, l0
6220 ; GENERIC-NEXT: cmplt16 a3, a0
6221 ; GENERIC-NEXT: mvcv16 a0
6222 ; GENERIC-NEXT: movi16 a3, 1
6223 ; GENERIC-NEXT: subu16 a3, a0
6224 ; GENERIC-NEXT: btsti16 a3, 0
6225 ; GENERIC-NEXT: bt16 .LBB152_2
6226 ; GENERIC-NEXT: # %bb.1: # %entry
6227 ; GENERIC-NEXT: mov16 a2, a1
6228 ; GENERIC-NEXT: .LBB152_2: # %entry
6229 ; GENERIC-NEXT: mov16 a0, a2
6230 ; GENERIC-NEXT: addi16 sp, sp, 4
6231 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6232 ; GENERIC-NEXT: addi16 sp, sp, 4
6233 ; GENERIC-NEXT: rts16
6234 entry:
6235 %icmp = icmp sge i16 %x, 47777777
6236 %ret = select i1 %icmp, i16 %m, i16 %n
6237 ret i16 %ret
6238 }
6240 define i16 @selectC_sge_i16(i1 %c, i16 %n, i16 %m) {
6241 ; CHECK-LABEL: selectC_sge_i16:
6242 ; CHECK: # %bb.0: # %entry
6243 ; CHECK-NEXT: btsti16 a0, 0
6244 ; CHECK-NEXT: movt32 a1, a2
6245 ; CHECK-NEXT: mov16 a0, a1
6246 ; CHECK-NEXT: rts16
6247 ;
6248 ; GENERIC-LABEL: selectC_sge_i16:
6249 ; GENERIC: # %bb.0: # %entry
6250 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6251 ; GENERIC-NEXT: subi16 sp, sp, 4
6252 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6253 ; GENERIC-NEXT: btsti16 a0, 0
6254 ; GENERIC-NEXT: bt16 .LBB153_2
6255 ; GENERIC-NEXT: # %bb.1: # %entry
6256 ; GENERIC-NEXT: mov16 a2, a1
6257 ; GENERIC-NEXT: .LBB153_2: # %entry
6258 ; GENERIC-NEXT: mov16 a0, a2
6259 ; GENERIC-NEXT: addi16 sp, sp, 4
6260 ; GENERIC-NEXT: rts16
6261 entry:
6262 %ret = select i1 %c, i16 %m, i16 %n
6263 ret i16 %ret
6264 }
6267 define i8 @selectRR_sge_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
6268 ; CHECK-LABEL: selectRR_sge_i8:
6269 ; CHECK: # %bb.0: # %entry
6270 ; CHECK-NEXT: sextb16 a0, a0
6271 ; CHECK-NEXT: sextb16 a1, a1
6272 ; CHECK-NEXT: cmplt16 a1, a0
6273 ; CHECK-NEXT: movf32 a2, a3
6274 ; CHECK-NEXT: mov16 a0, a2
6275 ; CHECK-NEXT: rts16
6276 ;
6277 ; GENERIC-LABEL: selectRR_sge_i8:
6278 ; GENERIC: # %bb.0: # %entry
6279 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6280 ; GENERIC-NEXT: subi16 sp, sp, 4
6281 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6282 ; GENERIC-NEXT: sextb16 a0, a0
6283 ; GENERIC-NEXT: sextb16 a1, a1
6284 ; GENERIC-NEXT: cmplt16 a1, a0
6285 ; GENERIC-NEXT: mvcv16 a0
6286 ; GENERIC-NEXT: btsti16 a0, 0
6287 ; GENERIC-NEXT: bt16 .LBB154_2
6288 ; GENERIC-NEXT: # %bb.1: # %entry
6289 ; GENERIC-NEXT: mov16 a3, a2
6290 ; GENERIC-NEXT: .LBB154_2: # %entry
6291 ; GENERIC-NEXT: mov16 a0, a3
6292 ; GENERIC-NEXT: addi16 sp, sp, 4
6293 ; GENERIC-NEXT: rts16
6294 entry:
6295 %icmp = icmp sge i8 %y, %x
6296 %ret = select i1 %icmp, i8 %m, i8 %n
6297 ret i8 %ret
6298 }
6300 define i8 @selectRI_sge_i8(i8 %x, i8 %n, i8 %m) {
6301 ; CHECK-LABEL: selectRI_sge_i8:
6302 ; CHECK: # %bb.0: # %entry
6303 ; CHECK-NEXT: sextb16 a0, a0
6304 ; CHECK-NEXT: movi16 a3, 9
6305 ; CHECK-NEXT: cmplt16 a3, a0
6306 ; CHECK-NEXT: movt32 a1, a2
6307 ; CHECK-NEXT: mov16 a0, a1
6308 ; CHECK-NEXT: rts16
6309 ;
6310 ; GENERIC-LABEL: selectRI_sge_i8:
6311 ; GENERIC: # %bb.0: # %entry
6312 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6313 ; GENERIC-NEXT: subi16 sp, sp, 4
6314 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6315 ; GENERIC-NEXT: sextb16 a0, a0
6316 ; GENERIC-NEXT: movi16 a3, 9
6317 ; GENERIC-NEXT: cmplt16 a3, a0
6318 ; GENERIC-NEXT: mvcv16 a0
6319 ; GENERIC-NEXT: movi16 a3, 1
6320 ; GENERIC-NEXT: subu16 a3, a0
6321 ; GENERIC-NEXT: btsti16 a3, 0
6322 ; GENERIC-NEXT: bt16 .LBB155_2
6323 ; GENERIC-NEXT: # %bb.1: # %entry
6324 ; GENERIC-NEXT: mov16 a2, a1
6325 ; GENERIC-NEXT: .LBB155_2: # %entry
6326 ; GENERIC-NEXT: mov16 a0, a2
6327 ; GENERIC-NEXT: addi16 sp, sp, 4
6328 ; GENERIC-NEXT: rts16
6329 entry:
6330 %icmp = icmp sge i8 %x, 10
6331 %ret = select i1 %icmp, i8 %m, i8 %n
6332 ret i8 %ret
6333 }
6335 define i8 @selectRX_sge_i8(i8 %x, i8 %n, i8 %m) {
6336 ; CHECK-LABEL: selectRX_sge_i8:
6337 ; CHECK: # %bb.0: # %entry
6338 ; CHECK-NEXT: sextb16 a0, a0
6339 ; CHECK-NEXT: movih32 a3, 65535
6340 ; CHECK-NEXT: ori32 a3, a3, 65520
6341 ; CHECK-NEXT: cmplt16 a3, a0
6342 ; CHECK-NEXT: movt32 a1, a2
6343 ; CHECK-NEXT: mov16 a0, a1
6344 ; CHECK-NEXT: rts16
6345 ;
6346 ; GENERIC-LABEL: selectRX_sge_i8:
6347 ; GENERIC: # %bb.0: # %entry
6348 ; GENERIC-NEXT: subi16 sp, sp, 8
6349 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
6350 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
6351 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6352 ; GENERIC-NEXT: .cfi_offset l1, -4
6353 ; GENERIC-NEXT: .cfi_offset l0, -8
6354 ; GENERIC-NEXT: subi16 sp, sp, 4
6355 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
6356 ; GENERIC-NEXT: sextb16 a0, a0
6357 ; GENERIC-NEXT: movi16 a3, 255
6358 ; GENERIC-NEXT: lsli16 l0, a3, 24
6359 ; GENERIC-NEXT: lsli16 l1, a3, 16
6360 ; GENERIC-NEXT: or16 l1, l0
6361 ; GENERIC-NEXT: lsli16 a3, a3, 8
6362 ; GENERIC-NEXT: or16 a3, l1
6363 ; GENERIC-NEXT: movi16 l0, 240
6364 ; GENERIC-NEXT: or16 l0, a3
6365 ; GENERIC-NEXT: cmplt16 l0, a0
6366 ; GENERIC-NEXT: mvcv16 a0
6367 ; GENERIC-NEXT: movi16 a3, 1
6368 ; GENERIC-NEXT: subu16 a3, a0
6369 ; GENERIC-NEXT: btsti16 a3, 0
6370 ; GENERIC-NEXT: bt16 .LBB156_2
6371 ; GENERIC-NEXT: # %bb.1: # %entry
6372 ; GENERIC-NEXT: mov16 a2, a1
6373 ; GENERIC-NEXT: .LBB156_2: # %entry
6374 ; GENERIC-NEXT: mov16 a0, a2
6375 ; GENERIC-NEXT: addi16 sp, sp, 4
6376 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6377 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
6378 ; GENERIC-NEXT: addi16 sp, sp, 8
6379 ; GENERIC-NEXT: rts16
6380 entry:
6381 %icmp = icmp sge i8 %x, 47777777
6382 %ret = select i1 %icmp, i8 %m, i8 %n
6383 ret i8 %ret
6384 }
6386 define i8 @selectC_sge_i8(i1 %c, i8 %n, i8 %m) {
6387 ; CHECK-LABEL: selectC_sge_i8:
6388 ; CHECK: # %bb.0: # %entry
6389 ; CHECK-NEXT: btsti16 a0, 0
6390 ; CHECK-NEXT: movt32 a1, a2
6391 ; CHECK-NEXT: mov16 a0, a1
6392 ; CHECK-NEXT: rts16
6393 ;
6394 ; GENERIC-LABEL: selectC_sge_i8:
6395 ; GENERIC: # %bb.0: # %entry
6396 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6397 ; GENERIC-NEXT: subi16 sp, sp, 4
6398 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6399 ; GENERIC-NEXT: btsti16 a0, 0
6400 ; GENERIC-NEXT: bt16 .LBB157_2
6401 ; GENERIC-NEXT: # %bb.1: # %entry
6402 ; GENERIC-NEXT: mov16 a2, a1
6403 ; GENERIC-NEXT: .LBB157_2: # %entry
6404 ; GENERIC-NEXT: mov16 a0, a2
6405 ; GENERIC-NEXT: addi16 sp, sp, 4
6406 ; GENERIC-NEXT: rts16
6407 entry:
6408 %ret = select i1 %c, i8 %m, i8 %n
6409 ret i8 %ret
6410 }
6413 define i1 @selectRR_sge_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
6414 ; CHECK-LABEL: selectRR_sge_i1:
6415 ; CHECK: # %bb.0: # %entry
6416 ; CHECK-NEXT: btsti16 a1, 0
6417 ; CHECK-NEXT: mov16 a1, a3
6418 ; CHECK-NEXT: movt32 a1, a2
6419 ; CHECK-NEXT: btsti16 a0, 0
6420 ; CHECK-NEXT: movt32 a1, a3
6421 ; CHECK-NEXT: mov16 a0, a1
6422 ; CHECK-NEXT: rts16
6423 ;
6424 ; GENERIC-LABEL: selectRR_sge_i1:
6425 ; GENERIC: # %bb.0: # %entry
6426 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6427 ; GENERIC-NEXT: subi16 sp, sp, 4
6428 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6429 ; GENERIC-NEXT: btsti16 a1, 0
6430 ; GENERIC-NEXT: bt16 .LBB158_2
6431 ; GENERIC-NEXT: # %bb.1: # %entry
6432 ; GENERIC-NEXT: mov16 a2, a3
6433 ; GENERIC-NEXT: .LBB158_2: # %entry
6434 ; GENERIC-NEXT: btsti16 a0, 0
6435 ; GENERIC-NEXT: bt16 .LBB158_4
6436 ; GENERIC-NEXT: # %bb.3: # %entry
6437 ; GENERIC-NEXT: mov16 a3, a2
6438 ; GENERIC-NEXT: .LBB158_4: # %entry
6439 ; GENERIC-NEXT: mov16 a0, a3
6440 ; GENERIC-NEXT: addi16 sp, sp, 4
6441 ; GENERIC-NEXT: rts16
6442 entry:
6443 %icmp = icmp sge i1 %y, %x
6444 %ret = select i1 %icmp, i1 %m, i1 %n
6445 ret i1 %ret
6446 }
6448 define i1 @selectRI_sge_i1(i1 %x, i1 %n, i1 %m) {
6449 ; CHECK-LABEL: selectRI_sge_i1:
6450 ; CHECK: # %bb.0: # %entry
6451 ; CHECK-NEXT: btsti16 a0, 0
6452 ; CHECK-NEXT: movt32 a2, a1
6453 ; CHECK-NEXT: mov16 a0, a2
6454 ; CHECK-NEXT: rts16
6455 ;
6456 ; GENERIC-LABEL: selectRI_sge_i1:
6457 ; GENERIC: # %bb.0: # %entry
6458 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6459 ; GENERIC-NEXT: subi16 sp, sp, 4
6460 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6461 ; GENERIC-NEXT: btsti16 a0, 0
6462 ; GENERIC-NEXT: bt16 .LBB159_2
6463 ; GENERIC-NEXT: # %bb.1: # %entry
6464 ; GENERIC-NEXT: mov16 a1, a2
6465 ; GENERIC-NEXT: .LBB159_2: # %entry
6466 ; GENERIC-NEXT: mov16 a0, a1
6467 ; GENERIC-NEXT: addi16 sp, sp, 4
6468 ; GENERIC-NEXT: rts16
6469 entry:
6470 %icmp = icmp sge i1 %x, 10
6471 %ret = select i1 %icmp, i1 %m, i1 %n
6472 ret i1 %ret
6473 }
6475 define i1 @selectRX_sge_i1(i1 %x, i1 %n, i1 %m) {
6476 ; CHECK-LABEL: selectRX_sge_i1:
6477 ; CHECK: # %bb.0: # %entry
6478 ; CHECK-NEXT: mov16 a0, a2
6479 ; CHECK-NEXT: rts16
6480 ;
6481 ; GENERIC-LABEL: selectRX_sge_i1:
6482 ; GENERIC: # %bb.0: # %entry
6483 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6484 ; GENERIC-NEXT: subi16 sp, sp, 4
6485 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6486 ; GENERIC-NEXT: mov16 a0, a2
6487 ; GENERIC-NEXT: addi16 sp, sp, 4
6488 ; GENERIC-NEXT: rts16
6489 entry:
6490 %icmp = icmp sge i1 %x, 47777777
6491 %ret = select i1 %icmp, i1 %m, i1 %n
6492 ret i1 %ret
6493 }
6495 define i1 @selectC_sge_i1(i1 %c, i1 %n, i1 %m) {
6496 ; CHECK-LABEL: selectC_sge_i1:
6497 ; CHECK: # %bb.0: # %entry
6498 ; CHECK-NEXT: btsti16 a0, 0
6499 ; CHECK-NEXT: movt32 a1, a2
6500 ; CHECK-NEXT: mov16 a0, a1
6501 ; CHECK-NEXT: rts16
6502 ;
6503 ; GENERIC-LABEL: selectC_sge_i1:
6504 ; GENERIC: # %bb.0: # %entry
6505 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6506 ; GENERIC-NEXT: subi16 sp, sp, 4
6507 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6508 ; GENERIC-NEXT: btsti16 a0, 0
6509 ; GENERIC-NEXT: bt16 .LBB161_2
6510 ; GENERIC-NEXT: # %bb.1: # %entry
6511 ; GENERIC-NEXT: mov16 a2, a1
6512 ; GENERIC-NEXT: .LBB161_2: # %entry
6513 ; GENERIC-NEXT: mov16 a0, a2
6514 ; GENERIC-NEXT: addi16 sp, sp, 4
6515 ; GENERIC-NEXT: rts16
6516 entry:
6517 %ret = select i1 %c, i1 %m, i1 %n
6518 ret i1 %ret
6519 }
6522 define i32 @selectRR_slt_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
6523 ; CHECK-LABEL: selectRR_slt_i32:
6524 ; CHECK: # %bb.0: # %entry
6525 ; CHECK-NEXT: cmplt16 a1, a0
6526 ; CHECK-NEXT: movt32 a2, a3
6527 ; CHECK-NEXT: mov16 a0, a2
6528 ; CHECK-NEXT: rts16
6529 ;
6530 ; GENERIC-LABEL: selectRR_slt_i32:
6531 ; GENERIC: # %bb.0: # %entry
6532 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6533 ; GENERIC-NEXT: subi16 sp, sp, 4
6534 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6535 ; GENERIC-NEXT: cmplt16 a1, a0
6536 ; GENERIC-NEXT: mvcv16 a0
6537 ; GENERIC-NEXT: movi16 a1, 1
6538 ; GENERIC-NEXT: subu16 a1, a0
6539 ; GENERIC-NEXT: btsti16 a1, 0
6540 ; GENERIC-NEXT: bt16 .LBB162_2
6541 ; GENERIC-NEXT: # %bb.1: # %entry
6542 ; GENERIC-NEXT: mov16 a3, a2
6543 ; GENERIC-NEXT: .LBB162_2: # %entry
6544 ; GENERIC-NEXT: mov16 a0, a3
6545 ; GENERIC-NEXT: addi16 sp, sp, 4
6546 ; GENERIC-NEXT: rts16
6547 entry:
6548 %icmp = icmp slt i32 %y, %x
6549 %ret = select i1 %icmp, i32 %m, i32 %n
6550 ret i32 %ret
6551 }
6553 define i32 @selectRI_slt_i32(i32 %x, i32 %n, i32 %m) {
6554 ; CHECK-LABEL: selectRI_slt_i32:
6555 ; CHECK: # %bb.0: # %entry
6556 ; CHECK-NEXT: cmplti16 a0, 10
6557 ; CHECK-NEXT: movt32 a1, a2
6558 ; CHECK-NEXT: mov16 a0, a1
6559 ; CHECK-NEXT: rts16
6560 ;
6561 ; GENERIC-LABEL: selectRI_slt_i32:
6562 ; GENERIC: # %bb.0: # %entry
6563 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6564 ; GENERIC-NEXT: subi16 sp, sp, 4
6565 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6566 ; GENERIC-NEXT: cmplti16 a0, 10
6567 ; GENERIC-NEXT: mvcv16 a0
6568 ; GENERIC-NEXT: movi16 a3, 1
6569 ; GENERIC-NEXT: subu16 a3, a0
6570 ; GENERIC-NEXT: btsti16 a3, 0
6571 ; GENERIC-NEXT: bt16 .LBB163_2
6572 ; GENERIC-NEXT: # %bb.1: # %entry
6573 ; GENERIC-NEXT: mov16 a2, a1
6574 ; GENERIC-NEXT: .LBB163_2: # %entry
6575 ; GENERIC-NEXT: mov16 a0, a2
6576 ; GENERIC-NEXT: addi16 sp, sp, 4
6577 ; GENERIC-NEXT: rts16
6578 entry:
6579 %icmp = icmp slt i32 %x, 10
6580 %ret = select i1 %icmp, i32 %m, i32 %n
6581 ret i32 %ret
6582 }
6584 define i32 @selectRX_slt_i32(i32 %x, i32 %n, i32 %m) {
6585 ; CHECK-LABEL: selectRX_slt_i32:
6586 ; CHECK: # %bb.0: # %entry
6587 ; CHECK-NEXT: movih32 a3, 729
6588 ; CHECK-NEXT: ori32 a3, a3, 2033
6589 ; CHECK-NEXT: cmplt16 a0, a3
6590 ; CHECK-NEXT: movt32 a1, a2
6591 ; CHECK-NEXT: mov16 a0, a1
6592 ; CHECK-NEXT: rts16
6593 ;
6594 ; GENERIC-LABEL: selectRX_slt_i32:
6595 ; GENERIC: # %bb.0: # %entry
6596 ; GENERIC-NEXT: subi16 sp, sp, 4
6597 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6598 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6599 ; GENERIC-NEXT: .cfi_offset l0, -4
6600 ; GENERIC-NEXT: subi16 sp, sp, 4
6601 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
6602 ; GENERIC-NEXT: movi16 a3, 2
6603 ; GENERIC-NEXT: lsli16 a3, a3, 24
6604 ; GENERIC-NEXT: movi16 l0, 217
6605 ; GENERIC-NEXT: lsli16 l0, l0, 16
6606 ; GENERIC-NEXT: or16 l0, a3
6607 ; GENERIC-NEXT: movi16 a3, 7
6608 ; GENERIC-NEXT: lsli16 a3, a3, 8
6609 ; GENERIC-NEXT: or16 a3, l0
6610 ; GENERIC-NEXT: movi16 l0, 241
6611 ; GENERIC-NEXT: or16 l0, a3
6612 ; GENERIC-NEXT: cmplt16 a0, l0
6613 ; GENERIC-NEXT: mvcv16 a0
6614 ; GENERIC-NEXT: movi16 a3, 1
6615 ; GENERIC-NEXT: subu16 a3, a0
6616 ; GENERIC-NEXT: btsti16 a3, 0
6617 ; GENERIC-NEXT: bt16 .LBB164_2
6618 ; GENERIC-NEXT: # %bb.1: # %entry
6619 ; GENERIC-NEXT: mov16 a2, a1
6620 ; GENERIC-NEXT: .LBB164_2: # %entry
6621 ; GENERIC-NEXT: mov16 a0, a2
6622 ; GENERIC-NEXT: addi16 sp, sp, 4
6623 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6624 ; GENERIC-NEXT: addi16 sp, sp, 4
6625 ; GENERIC-NEXT: rts16
6626 entry:
6627 %icmp = icmp slt i32 %x, 47777777
6628 %ret = select i1 %icmp, i32 %m, i32 %n
6629 ret i32 %ret
6630 }
6632 define i32 @selectC_slt_i32(i1 %c, i32 %n, i32 %m) {
6633 ; CHECK-LABEL: selectC_slt_i32:
6634 ; CHECK: # %bb.0: # %entry
6635 ; CHECK-NEXT: btsti16 a0, 0
6636 ; CHECK-NEXT: movt32 a1, a2
6637 ; CHECK-NEXT: mov16 a0, a1
6638 ; CHECK-NEXT: rts16
6639 ;
6640 ; GENERIC-LABEL: selectC_slt_i32:
6641 ; GENERIC: # %bb.0: # %entry
6642 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6643 ; GENERIC-NEXT: subi16 sp, sp, 4
6644 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6645 ; GENERIC-NEXT: btsti16 a0, 0
6646 ; GENERIC-NEXT: bt16 .LBB165_2
6647 ; GENERIC-NEXT: # %bb.1: # %entry
6648 ; GENERIC-NEXT: mov16 a2, a1
6649 ; GENERIC-NEXT: .LBB165_2: # %entry
6650 ; GENERIC-NEXT: mov16 a0, a2
6651 ; GENERIC-NEXT: addi16 sp, sp, 4
6652 ; GENERIC-NEXT: rts16
6653 entry:
6654 %ret = select i1 %c, i32 %m, i32 %n
6655 ret i32 %ret
6656 }
6658 define i64 @selectRR_slt_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
6659 ; CHECK-LABEL: selectRR_slt_i64:
6660 ; CHECK: # %bb.0: # %entry
6661 ; CHECK-NEXT: .cfi_def_cfa_offset 0
6662 ; CHECK-NEXT: subi16 sp, sp, 12
6663 ; CHECK-NEXT: .cfi_def_cfa_offset 12
6664 ; CHECK-NEXT: cmplt16 a3, a1
6665 ; CHECK-NEXT: mvc32 t0
6666 ; CHECK-NEXT: st32.w t0, (sp, 4)
6667 ; CHECK-NEXT: cmpne16 a3, a1
6668 ; CHECK-NEXT: mvc32 a1
6669 ; CHECK-NEXT: st16.w a1, (sp, 8)
6670 ; CHECK-NEXT: cmphs16 a2, a0
6671 ; CHECK-NEXT: mvcv16 a0
6672 ; CHECK-NEXT: ld16.w a1, (sp, 4)
6673 ; CHECK-NEXT: btsti16 a1, 0
6674 ; CHECK-NEXT: mvc32 a1
6675 ; CHECK-NEXT: ld16.w a2, (sp, 8)
6676 ; CHECK-NEXT: btsti16 a2, 0
6677 ; CHECK-NEXT: movf32 a1, a0
6678 ; CHECK-NEXT: addi16 a2, sp, 12
6679 ; CHECK-NEXT: addi16 a0, sp, 20
6680 ; CHECK-NEXT: btsti16 a1, 0
6681 ; CHECK-NEXT: movt32 a2, a0
6682 ; CHECK-NEXT: ld16.w a0, (a2, 0)
6683 ; CHECK-NEXT: ld16.w a1, (a2, 4)
6684 ; CHECK-NEXT: addi16 sp, sp, 12
6685 ; CHECK-NEXT: rts16
6686 ;
6687 ; GENERIC-LABEL: selectRR_slt_i64:
6688 ; GENERIC: # %bb.0: # %entry
6689 ; GENERIC-NEXT: subi16 sp, sp, 4
6690 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6691 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6692 ; GENERIC-NEXT: .cfi_offset l0, -4
6693 ; GENERIC-NEXT: subi16 sp, sp, 4
6694 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
6695 ; GENERIC-NEXT: cmplt16 a3, a1
6696 ; GENERIC-NEXT: mvcv16 l0
6697 ; GENERIC-NEXT: cmphs16 a2, a0
6698 ; GENERIC-NEXT: mvcv16 a0
6699 ; GENERIC-NEXT: cmpne16 a3, a1
6700 ; GENERIC-NEXT: mvcv16 a1
6701 ; GENERIC-NEXT: btsti16 a1, 0
6702 ; GENERIC-NEXT: bt16 .LBB166_2
6703 ; GENERIC-NEXT: # %bb.1: # %entry
6704 ; GENERIC-NEXT: movi16 a0, 1
6705 ; GENERIC-NEXT: subu16 a0, l0
6706 ; GENERIC-NEXT: .LBB166_2: # %entry
6707 ; GENERIC-NEXT: btsti16 a0, 0
6708 ; GENERIC-NEXT: bt16 .LBB166_4
6709 ; GENERIC-NEXT: # %bb.3: # %entry
6710 ; GENERIC-NEXT: movi16 a0, 8
6711 ; GENERIC-NEXT: br32 .LBB166_5
6712 ; GENERIC-NEXT: .LBB166_4:
6713 ; GENERIC-NEXT: movi16 a0, 16
6714 ; GENERIC-NEXT: .LBB166_5: # %entry
6715 ; GENERIC-NEXT: addu16 a0, sp
6716 ; GENERIC-NEXT: mov16 a1, a0
6717 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
6718 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
6719 ; GENERIC-NEXT: addi16 sp, sp, 4
6720 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6721 ; GENERIC-NEXT: addi16 sp, sp, 4
6722 ; GENERIC-NEXT: rts16
6723 entry:
6724 %icmp = icmp slt i64 %y, %x
6725 %ret = select i1 %icmp, i64 %m, i64 %n
6726 ret i64 %ret
6727 }
6729 define i64 @selectRI_slt_i64(i64 %x, i64 %n, i64 %m) {
6730 ; CHECK-LABEL: selectRI_slt_i64:
6731 ; CHECK: # %bb.0: # %entry
6732 ; CHECK-NEXT: subi16 sp, sp, 4
6733 ; CHECK-NEXT: .cfi_def_cfa_offset 4
6734 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6735 ; CHECK-NEXT: .cfi_offset l0, -4
6736 ; CHECK-NEXT: subi16 sp, sp, 12
6737 ; CHECK-NEXT: .cfi_def_cfa_offset 16
6738 ; CHECK-NEXT: ld32.w t0, (sp, 20)
6739 ; CHECK-NEXT: ld32.w t1, (sp, 16)
6740 ; CHECK-NEXT: movi16 l0, 0
6741 ; CHECK-NEXT: cmplt16 a1, l0
6742 ; CHECK-NEXT: mvc32 l0
6743 ; CHECK-NEXT: st16.w l0, (sp, 4)
6744 ; CHECK-NEXT: cmpnei16 a1, 0
6745 ; CHECK-NEXT: mvc32 a1
6746 ; CHECK-NEXT: st16.w a1, (sp, 8)
6747 ; CHECK-NEXT: cmphsi16 a0, 10
6748 ; CHECK-NEXT: mvcv16 a0
6749 ; CHECK-NEXT: ld16.w a1, (sp, 4)
6750 ; CHECK-NEXT: btsti16 a1, 0
6751 ; CHECK-NEXT: mvc32 a1
6752 ; CHECK-NEXT: ld16.w l0, (sp, 8)
6753 ; CHECK-NEXT: btsti16 l0, 0
6754 ; CHECK-NEXT: movf32 a1, a0
6755 ; CHECK-NEXT: btsti16 a1, 0
6756 ; CHECK-NEXT: movt32 a2, t1
6757 ; CHECK-NEXT: movt32 a3, t0
6758 ; CHECK-NEXT: mov16 a0, a2
6759 ; CHECK-NEXT: mov16 a1, a3
6760 ; CHECK-NEXT: addi16 sp, sp, 12
6761 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6762 ; CHECK-NEXT: addi16 sp, sp, 4
6763 ; CHECK-NEXT: rts16
6764 ;
6765 ; GENERIC-LABEL: selectRI_slt_i64:
6766 ; GENERIC: # %bb.0: # %entry
6767 ; GENERIC-NEXT: subi16 sp, sp, 4
6768 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6769 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6770 ; GENERIC-NEXT: .cfi_offset l0, -4
6771 ; GENERIC-NEXT: subi16 sp, sp, 4
6772 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
6773 ; GENERIC-NEXT: movi16 l0, 0
6774 ; GENERIC-NEXT: cmplt16 a1, l0
6775 ; GENERIC-NEXT: mvcv16 l0
6776 ; GENERIC-NEXT: cmphsi16 a0, 10
6777 ; GENERIC-NEXT: mvcv16 a0
6778 ; GENERIC-NEXT: cmpnei16 a1, 0
6779 ; GENERIC-NEXT: mvcv16 a1
6780 ; GENERIC-NEXT: btsti16 a1, 0
6781 ; GENERIC-NEXT: bf16 .LBB167_5
6782 ; GENERIC-NEXT: # %bb.1: # %entry
6783 ; GENERIC-NEXT: btsti16 a0, 0
6784 ; GENERIC-NEXT: bt16 .LBB167_6
6785 ; GENERIC-NEXT: .LBB167_2: # %entry
6786 ; GENERIC-NEXT: btsti16 a0, 0
6787 ; GENERIC-NEXT: bf16 .LBB167_4
6788 ; GENERIC-NEXT: .LBB167_3:
6789 ; GENERIC-NEXT: ld16.w a3, (sp, 12)
6790 ; GENERIC-NEXT: .LBB167_4: # %entry
6791 ; GENERIC-NEXT: mov16 a0, a2
6792 ; GENERIC-NEXT: mov16 a1, a3
6793 ; GENERIC-NEXT: addi16 sp, sp, 4
6794 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6795 ; GENERIC-NEXT: addi16 sp, sp, 4
6796 ; GENERIC-NEXT: rts16
6797 ; GENERIC-NEXT: .LBB167_5: # %entry
6798 ; GENERIC-NEXT: movi16 a0, 1
6799 ; GENERIC-NEXT: subu16 a0, l0
6800 ; GENERIC-NEXT: btsti16 a0, 0
6801 ; GENERIC-NEXT: bf16 .LBB167_2
6802 ; GENERIC-NEXT: .LBB167_6:
6803 ; GENERIC-NEXT: ld16.w a2, (sp, 8)
6804 ; GENERIC-NEXT: btsti16 a0, 0
6805 ; GENERIC-NEXT: bt16 .LBB167_3
6806 ; GENERIC-NEXT: br32 .LBB167_4
6807 entry:
6808 %icmp = icmp slt i64 %x, 10
6809 %ret = select i1 %icmp, i64 %m, i64 %n
6810 ret i64 %ret
6811 }
6813 define i64 @selectRX_slt_i64(i64 %x, i64 %n, i64 %m) {
6814 ; CHECK-LABEL: selectRX_slt_i64:
6815 ; CHECK: # %bb.0: # %entry
6816 ; CHECK-NEXT: subi16 sp, sp, 4
6817 ; CHECK-NEXT: .cfi_def_cfa_offset 4
6818 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6819 ; CHECK-NEXT: .cfi_offset l0, -4
6820 ; CHECK-NEXT: subi16 sp, sp, 12
6821 ; CHECK-NEXT: .cfi_def_cfa_offset 16
6822 ; CHECK-NEXT: ld32.w t0, (sp, 20)
6823 ; CHECK-NEXT: ld32.w t1, (sp, 16)
6824 ; CHECK-NEXT: movi16 l0, 0
6825 ; CHECK-NEXT: cmplt16 a1, l0
6826 ; CHECK-NEXT: mvc32 l0
6827 ; CHECK-NEXT: st16.w l0, (sp, 8)
6828 ; CHECK-NEXT: movih32 l0, 729
6829 ; CHECK-NEXT: ori32 l0, l0, 2033
6830 ; CHECK-NEXT: cmphs16 a0, l0
6831 ; CHECK-NEXT: mvcv16 a0
6832 ; CHECK-NEXT: cmpnei16 a1, 0
6833 ; CHECK-NEXT: mvc32 a1
6834 ; CHECK-NEXT: st16.w a1, (sp, 4)
6835 ; CHECK-NEXT: ld16.w a1, (sp, 8)
6836 ; CHECK-NEXT: btsti16 a1, 0
6837 ; CHECK-NEXT: mvc32 a1
6838 ; CHECK-NEXT: ld16.w l0, (sp, 4)
6839 ; CHECK-NEXT: btsti16 l0, 0
6840 ; CHECK-NEXT: movf32 a1, a0
6841 ; CHECK-NEXT: btsti16 a1, 0
6842 ; CHECK-NEXT: movt32 a2, t1
6843 ; CHECK-NEXT: movt32 a3, t0
6844 ; CHECK-NEXT: mov16 a0, a2
6845 ; CHECK-NEXT: mov16 a1, a3
6846 ; CHECK-NEXT: addi16 sp, sp, 12
6847 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6848 ; CHECK-NEXT: addi16 sp, sp, 4
6849 ; CHECK-NEXT: rts16
6850 ;
6851 ; GENERIC-LABEL: selectRX_slt_i64:
6852 ; GENERIC: # %bb.0: # %entry
6853 ; GENERIC-NEXT: subi16 sp, sp, 12
6854 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
6855 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
6856 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
6857 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
6858 ; GENERIC-NEXT: .cfi_offset l2, -4
6859 ; GENERIC-NEXT: .cfi_offset l1, -8
6860 ; GENERIC-NEXT: .cfi_offset l0, -12
6861 ; GENERIC-NEXT: subi16 sp, sp, 4
6862 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
6863 ; GENERIC-NEXT: movi16 l0, 0
6864 ; GENERIC-NEXT: cmplt16 a1, l0
6865 ; GENERIC-NEXT: mvcv16 l0
6866 ; GENERIC-NEXT: movi16 l1, 2
6867 ; GENERIC-NEXT: lsli16 l1, l1, 24
6868 ; GENERIC-NEXT: movi16 l2, 217
6869 ; GENERIC-NEXT: lsli16 l2, l2, 16
6870 ; GENERIC-NEXT: or16 l2, l1
6871 ; GENERIC-NEXT: movi16 l1, 7
6872 ; GENERIC-NEXT: lsli16 l1, l1, 8
6873 ; GENERIC-NEXT: or16 l1, l2
6874 ; GENERIC-NEXT: movi16 l2, 241
6875 ; GENERIC-NEXT: or16 l2, l1
6876 ; GENERIC-NEXT: cmphs16 a0, l2
6877 ; GENERIC-NEXT: mvcv16 a0
6878 ; GENERIC-NEXT: cmpnei16 a1, 0
6879 ; GENERIC-NEXT: mvcv16 a1
6880 ; GENERIC-NEXT: btsti16 a1, 0
6881 ; GENERIC-NEXT: bf16 .LBB168_5
6882 ; GENERIC-NEXT: # %bb.1: # %entry
6883 ; GENERIC-NEXT: btsti16 a0, 0
6884 ; GENERIC-NEXT: bt16 .LBB168_6
6885 ; GENERIC-NEXT: .LBB168_2: # %entry
6886 ; GENERIC-NEXT: btsti16 a0, 0
6887 ; GENERIC-NEXT: bf16 .LBB168_4
6888 ; GENERIC-NEXT: .LBB168_3:
6889 ; GENERIC-NEXT: ld16.w a3, (sp, 20)
6890 ; GENERIC-NEXT: .LBB168_4: # %entry
6891 ; GENERIC-NEXT: mov16 a0, a2
6892 ; GENERIC-NEXT: mov16 a1, a3
6893 ; GENERIC-NEXT: addi16 sp, sp, 4
6894 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
6895 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
6896 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
6897 ; GENERIC-NEXT: addi16 sp, sp, 12
6898 ; GENERIC-NEXT: rts16
6899 ; GENERIC-NEXT: .LBB168_5: # %entry
6900 ; GENERIC-NEXT: movi16 a0, 1
6901 ; GENERIC-NEXT: subu16 a0, l0
6902 ; GENERIC-NEXT: btsti16 a0, 0
6903 ; GENERIC-NEXT: bf16 .LBB168_2
6904 ; GENERIC-NEXT: .LBB168_6:
6905 ; GENERIC-NEXT: ld16.w a2, (sp, 16)
6906 ; GENERIC-NEXT: btsti16 a0, 0
6907 ; GENERIC-NEXT: bt16 .LBB168_3
6908 ; GENERIC-NEXT: br32 .LBB168_4
6909 entry:
6910 %icmp = icmp slt i64 %x, 47777777
6911 %ret = select i1 %icmp, i64 %m, i64 %n
6912 ret i64 %ret
6913 }
6915 define i64 @selectC_slt_i64(i1 %c, i64 %n, i64 %m) {
6916 ; CHECK-LABEL: selectC_slt_i64:
6917 ; CHECK: # %bb.0: # %entry
6918 ; CHECK-NEXT: ld32.w t0, (sp, 0)
6919 ; CHECK-NEXT: btsti16 a0, 0
6920 ; CHECK-NEXT: movt32 a1, a3
6921 ; CHECK-NEXT: movt32 a2, t0
6922 ; CHECK-NEXT: mov16 a0, a1
6923 ; CHECK-NEXT: mov16 a1, a2
6924 ; CHECK-NEXT: rts16
6925 ;
6926 ; GENERIC-LABEL: selectC_slt_i64:
6927 ; GENERIC: # %bb.0: # %entry
6928 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6929 ; GENERIC-NEXT: subi16 sp, sp, 4
6930 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6931 ; GENERIC-NEXT: btsti16 a0, 0
6932 ; GENERIC-NEXT: bt16 .LBB169_2
6933 ; GENERIC-NEXT: # %bb.1: # %entry
6934 ; GENERIC-NEXT: mov16 a3, a1
6935 ; GENERIC-NEXT: .LBB169_2: # %entry
6936 ; GENERIC-NEXT: btsti16 a0, 0
6937 ; GENERIC-NEXT: bf16 .LBB169_4
6938 ; GENERIC-NEXT: # %bb.3:
6939 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
6940 ; GENERIC-NEXT: .LBB169_4: # %entry
6941 ; GENERIC-NEXT: mov16 a0, a3
6942 ; GENERIC-NEXT: mov16 a1, a2
6943 ; GENERIC-NEXT: addi16 sp, sp, 4
6944 ; GENERIC-NEXT: rts16
6945 entry:
6946 %ret = select i1 %c, i64 %m, i64 %n
6947 ret i64 %ret
6948 }
6951 define i16 @selectRR_slt_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
6952 ; CHECK-LABEL: selectRR_slt_i16:
6953 ; CHECK: # %bb.0: # %entry
6954 ; CHECK-NEXT: sexth16 a0, a0
6955 ; CHECK-NEXT: sexth16 a1, a1
6956 ; CHECK-NEXT: cmplt16 a1, a0
6957 ; CHECK-NEXT: movt32 a2, a3
6958 ; CHECK-NEXT: mov16 a0, a2
6959 ; CHECK-NEXT: rts16
6960 ;
6961 ; GENERIC-LABEL: selectRR_slt_i16:
6962 ; GENERIC: # %bb.0: # %entry
6963 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6964 ; GENERIC-NEXT: subi16 sp, sp, 4
6965 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
6966 ; GENERIC-NEXT: sexth16 a0, a0
6967 ; GENERIC-NEXT: sexth16 a1, a1
6968 ; GENERIC-NEXT: cmplt16 a1, a0
6969 ; GENERIC-NEXT: mvcv16 a0
6970 ; GENERIC-NEXT: movi16 a1, 1
6971 ; GENERIC-NEXT: subu16 a1, a0
6972 ; GENERIC-NEXT: btsti16 a1, 0
6973 ; GENERIC-NEXT: bt16 .LBB170_2
6974 ; GENERIC-NEXT: # %bb.1: # %entry
6975 ; GENERIC-NEXT: mov16 a3, a2
6976 ; GENERIC-NEXT: .LBB170_2: # %entry
6977 ; GENERIC-NEXT: mov16 a0, a3
6978 ; GENERIC-NEXT: addi16 sp, sp, 4
6979 ; GENERIC-NEXT: rts16
6980 entry:
6981 %icmp = icmp slt i16 %y, %x
6982 %ret = select i1 %icmp, i16 %m, i16 %n
6983 ret i16 %ret
6984 }
6986 define i16 @selectRI_slt_i16(i16 %x, i16 %n, i16 %m) {
6987 ; CHECK-LABEL: selectRI_slt_i16:
6988 ; CHECK: # %bb.0: # %entry
6989 ; CHECK-NEXT: sexth16 a0, a0
6990 ; CHECK-NEXT: cmplti16 a0, 10
6991 ; CHECK-NEXT: movt32 a1, a2
6992 ; CHECK-NEXT: mov16 a0, a1
6993 ; CHECK-NEXT: rts16
6994 ;
6995 ; GENERIC-LABEL: selectRI_slt_i16:
6996 ; GENERIC: # %bb.0: # %entry
6997 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
6998 ; GENERIC-NEXT: subi16 sp, sp, 4
6999 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7000 ; GENERIC-NEXT: sexth16 a0, a0
7001 ; GENERIC-NEXT: cmplti16 a0, 10
7002 ; GENERIC-NEXT: mvcv16 a0
7003 ; GENERIC-NEXT: movi16 a3, 1
7004 ; GENERIC-NEXT: subu16 a3, a0
7005 ; GENERIC-NEXT: btsti16 a3, 0
7006 ; GENERIC-NEXT: bt16 .LBB171_2
7007 ; GENERIC-NEXT: # %bb.1: # %entry
7008 ; GENERIC-NEXT: mov16 a2, a1
7009 ; GENERIC-NEXT: .LBB171_2: # %entry
7010 ; GENERIC-NEXT: mov16 a0, a2
7011 ; GENERIC-NEXT: addi16 sp, sp, 4
7012 ; GENERIC-NEXT: rts16
7013 entry:
7014 %icmp = icmp slt i16 %x, 10
7015 %ret = select i1 %icmp, i16 %m, i16 %n
7016 ret i16 %ret
7017 }
7019 define i16 @selectRX_slt_i16(i16 %x, i16 %n, i16 %m) {
7020 ; CHECK-LABEL: selectRX_slt_i16:
7021 ; CHECK: # %bb.0: # %entry
7022 ; CHECK-NEXT: sexth16 a0, a0
7023 ; CHECK-NEXT: cmplti32 a0, 2033
7024 ; CHECK-NEXT: movt32 a1, a2
7025 ; CHECK-NEXT: mov16 a0, a1
7026 ; CHECK-NEXT: rts16
7027 ;
7028 ; GENERIC-LABEL: selectRX_slt_i16:
7029 ; GENERIC: # %bb.0: # %entry
7030 ; GENERIC-NEXT: subi16 sp, sp, 4
7031 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7032 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7033 ; GENERIC-NEXT: .cfi_offset l0, -4
7034 ; GENERIC-NEXT: subi16 sp, sp, 4
7035 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
7036 ; GENERIC-NEXT: sexth16 a0, a0
7037 ; GENERIC-NEXT: movi16 a3, 0
7038 ; GENERIC-NEXT: lsli16 l0, a3, 24
7039 ; GENERIC-NEXT: lsli16 a3, a3, 16
7040 ; GENERIC-NEXT: or16 a3, l0
7041 ; GENERIC-NEXT: movi16 l0, 7
7042 ; GENERIC-NEXT: lsli16 l0, l0, 8
7043 ; GENERIC-NEXT: or16 l0, a3
7044 ; GENERIC-NEXT: movi16 a3, 241
7045 ; GENERIC-NEXT: or16 a3, l0
7046 ; GENERIC-NEXT: cmplt16 a0, a3
7047 ; GENERIC-NEXT: mvcv16 a0
7048 ; GENERIC-NEXT: movi16 a3, 1
7049 ; GENERIC-NEXT: subu16 a3, a0
7050 ; GENERIC-NEXT: btsti16 a3, 0
7051 ; GENERIC-NEXT: bt16 .LBB172_2
7052 ; GENERIC-NEXT: # %bb.1: # %entry
7053 ; GENERIC-NEXT: mov16 a2, a1
7054 ; GENERIC-NEXT: .LBB172_2: # %entry
7055 ; GENERIC-NEXT: mov16 a0, a2
7056 ; GENERIC-NEXT: addi16 sp, sp, 4
7057 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7058 ; GENERIC-NEXT: addi16 sp, sp, 4
7059 ; GENERIC-NEXT: rts16
7060 entry:
7061 %icmp = icmp slt i16 %x, 47777777
7062 %ret = select i1 %icmp, i16 %m, i16 %n
7063 ret i16 %ret
7064 }
7066 define i16 @selectC_slt_i16(i1 %c, i16 %n, i16 %m) {
7067 ; CHECK-LABEL: selectC_slt_i16:
7068 ; CHECK: # %bb.0: # %entry
7069 ; CHECK-NEXT: btsti16 a0, 0
7070 ; CHECK-NEXT: movt32 a1, a2
7071 ; CHECK-NEXT: mov16 a0, a1
7072 ; CHECK-NEXT: rts16
7073 ;
7074 ; GENERIC-LABEL: selectC_slt_i16:
7075 ; GENERIC: # %bb.0: # %entry
7076 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7077 ; GENERIC-NEXT: subi16 sp, sp, 4
7078 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7079 ; GENERIC-NEXT: btsti16 a0, 0
7080 ; GENERIC-NEXT: bt16 .LBB173_2
7081 ; GENERIC-NEXT: # %bb.1: # %entry
7082 ; GENERIC-NEXT: mov16 a2, a1
7083 ; GENERIC-NEXT: .LBB173_2: # %entry
7084 ; GENERIC-NEXT: mov16 a0, a2
7085 ; GENERIC-NEXT: addi16 sp, sp, 4
7086 ; GENERIC-NEXT: rts16
7087 entry:
7088 %ret = select i1 %c, i16 %m, i16 %n
7089 ret i16 %ret
7090 }
7093 define i8 @selectRR_slt_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
7094 ; CHECK-LABEL: selectRR_slt_i8:
7095 ; CHECK: # %bb.0: # %entry
7096 ; CHECK-NEXT: sextb16 a0, a0
7097 ; CHECK-NEXT: sextb16 a1, a1
7098 ; CHECK-NEXT: cmplt16 a1, a0
7099 ; CHECK-NEXT: movt32 a2, a3
7100 ; CHECK-NEXT: mov16 a0, a2
7101 ; CHECK-NEXT: rts16
7102 ;
7103 ; GENERIC-LABEL: selectRR_slt_i8:
7104 ; GENERIC: # %bb.0: # %entry
7105 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7106 ; GENERIC-NEXT: subi16 sp, sp, 4
7107 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7108 ; GENERIC-NEXT: sextb16 a0, a0
7109 ; GENERIC-NEXT: sextb16 a1, a1
7110 ; GENERIC-NEXT: cmplt16 a1, a0
7111 ; GENERIC-NEXT: mvcv16 a0
7112 ; GENERIC-NEXT: movi16 a1, 1
7113 ; GENERIC-NEXT: subu16 a1, a0
7114 ; GENERIC-NEXT: btsti16 a1, 0
7115 ; GENERIC-NEXT: bt16 .LBB174_2
7116 ; GENERIC-NEXT: # %bb.1: # %entry
7117 ; GENERIC-NEXT: mov16 a3, a2
7118 ; GENERIC-NEXT: .LBB174_2: # %entry
7119 ; GENERIC-NEXT: mov16 a0, a3
7120 ; GENERIC-NEXT: addi16 sp, sp, 4
7121 ; GENERIC-NEXT: rts16
7122 entry:
7123 %icmp = icmp slt i8 %y, %x
7124 %ret = select i1 %icmp, i8 %m, i8 %n
7125 ret i8 %ret
7126 }
7128 define i8 @selectRI_slt_i8(i8 %x, i8 %n, i8 %m) {
7129 ; CHECK-LABEL: selectRI_slt_i8:
7130 ; CHECK: # %bb.0: # %entry
7131 ; CHECK-NEXT: sextb16 a0, a0
7132 ; CHECK-NEXT: cmplti16 a0, 10
7133 ; CHECK-NEXT: movt32 a1, a2
7134 ; CHECK-NEXT: mov16 a0, a1
7135 ; CHECK-NEXT: rts16
7136 ;
7137 ; GENERIC-LABEL: selectRI_slt_i8:
7138 ; GENERIC: # %bb.0: # %entry
7139 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7140 ; GENERIC-NEXT: subi16 sp, sp, 4
7141 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7142 ; GENERIC-NEXT: sextb16 a0, a0
7143 ; GENERIC-NEXT: cmplti16 a0, 10
7144 ; GENERIC-NEXT: mvcv16 a0
7145 ; GENERIC-NEXT: movi16 a3, 1
7146 ; GENERIC-NEXT: subu16 a3, a0
7147 ; GENERIC-NEXT: btsti16 a3, 0
7148 ; GENERIC-NEXT: bt16 .LBB175_2
7149 ; GENERIC-NEXT: # %bb.1: # %entry
7150 ; GENERIC-NEXT: mov16 a2, a1
7151 ; GENERIC-NEXT: .LBB175_2: # %entry
7152 ; GENERIC-NEXT: mov16 a0, a2
7153 ; GENERIC-NEXT: addi16 sp, sp, 4
7154 ; GENERIC-NEXT: rts16
7155 entry:
7156 %icmp = icmp slt i8 %x, 10
7157 %ret = select i1 %icmp, i8 %m, i8 %n
7158 ret i8 %ret
7159 }
7161 define i8 @selectRX_slt_i8(i8 %x, i8 %n, i8 %m) {
7162 ; CHECK-LABEL: selectRX_slt_i8:
7163 ; CHECK: # %bb.0: # %entry
7164 ; CHECK-NEXT: sextb16 a0, a0
7165 ; CHECK-NEXT: movih32 a3, 65535
7166 ; CHECK-NEXT: ori32 a3, a3, 65521
7167 ; CHECK-NEXT: cmplt16 a0, a3
7168 ; CHECK-NEXT: movt32 a1, a2
7169 ; CHECK-NEXT: mov16 a0, a1
7170 ; CHECK-NEXT: rts16
7171 ;
7172 ; GENERIC-LABEL: selectRX_slt_i8:
7173 ; GENERIC: # %bb.0: # %entry
7174 ; GENERIC-NEXT: subi16 sp, sp, 8
7175 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
7176 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
7177 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7178 ; GENERIC-NEXT: .cfi_offset l1, -4
7179 ; GENERIC-NEXT: .cfi_offset l0, -8
7180 ; GENERIC-NEXT: subi16 sp, sp, 4
7181 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
7182 ; GENERIC-NEXT: sextb16 a0, a0
7183 ; GENERIC-NEXT: movi16 a3, 255
7184 ; GENERIC-NEXT: lsli16 l0, a3, 24
7185 ; GENERIC-NEXT: lsli16 l1, a3, 16
7186 ; GENERIC-NEXT: or16 l1, l0
7187 ; GENERIC-NEXT: lsli16 a3, a3, 8
7188 ; GENERIC-NEXT: or16 a3, l1
7189 ; GENERIC-NEXT: movi16 l0, 241
7190 ; GENERIC-NEXT: or16 l0, a3
7191 ; GENERIC-NEXT: cmplt16 a0, l0
7192 ; GENERIC-NEXT: mvcv16 a0
7193 ; GENERIC-NEXT: movi16 a3, 1
7194 ; GENERIC-NEXT: subu16 a3, a0
7195 ; GENERIC-NEXT: btsti16 a3, 0
7196 ; GENERIC-NEXT: bt16 .LBB176_2
7197 ; GENERIC-NEXT: # %bb.1: # %entry
7198 ; GENERIC-NEXT: mov16 a2, a1
7199 ; GENERIC-NEXT: .LBB176_2: # %entry
7200 ; GENERIC-NEXT: mov16 a0, a2
7201 ; GENERIC-NEXT: addi16 sp, sp, 4
7202 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7203 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
7204 ; GENERIC-NEXT: addi16 sp, sp, 8
7205 ; GENERIC-NEXT: rts16
7206 entry:
7207 %icmp = icmp slt i8 %x, 47777777
7208 %ret = select i1 %icmp, i8 %m, i8 %n
7209 ret i8 %ret
7210 }
7212 define i8 @selectC_slt_i8(i1 %c, i8 %n, i8 %m) {
7213 ; CHECK-LABEL: selectC_slt_i8:
7214 ; CHECK: # %bb.0: # %entry
7215 ; CHECK-NEXT: btsti16 a0, 0
7216 ; CHECK-NEXT: movt32 a1, a2
7217 ; CHECK-NEXT: mov16 a0, a1
7218 ; CHECK-NEXT: rts16
7219 ;
7220 ; GENERIC-LABEL: selectC_slt_i8:
7221 ; GENERIC: # %bb.0: # %entry
7222 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7223 ; GENERIC-NEXT: subi16 sp, sp, 4
7224 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7225 ; GENERIC-NEXT: btsti16 a0, 0
7226 ; GENERIC-NEXT: bt16 .LBB177_2
7227 ; GENERIC-NEXT: # %bb.1: # %entry
7228 ; GENERIC-NEXT: mov16 a2, a1
7229 ; GENERIC-NEXT: .LBB177_2: # %entry
7230 ; GENERIC-NEXT: mov16 a0, a2
7231 ; GENERIC-NEXT: addi16 sp, sp, 4
7232 ; GENERIC-NEXT: rts16
7233 entry:
7234 %ret = select i1 %c, i8 %m, i8 %n
7235 ret i8 %ret
7236 }
7239 define i1 @selectRR_slt_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
7240 ; CHECK-LABEL: selectRR_slt_i1:
7241 ; CHECK: # %bb.0: # %entry
7242 ; CHECK-NEXT: btsti16 a0, 0
7243 ; CHECK-NEXT: movt32 a3, a2
7244 ; CHECK-NEXT: btsti16 a1, 0
7245 ; CHECK-NEXT: movt32 a2, a3
7246 ; CHECK-NEXT: mov16 a0, a2
7247 ; CHECK-NEXT: rts16
7248 ;
7249 ; GENERIC-LABEL: selectRR_slt_i1:
7250 ; GENERIC: # %bb.0: # %entry
7251 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7252 ; GENERIC-NEXT: subi16 sp, sp, 4
7253 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7254 ; GENERIC-NEXT: btsti16 a0, 0
7255 ; GENERIC-NEXT: mov16 a0, a2
7256 ; GENERIC-NEXT: bf16 .LBB178_3
7257 ; GENERIC-NEXT: # %bb.1: # %entry
7258 ; GENERIC-NEXT: btsti16 a1, 0
7259 ; GENERIC-NEXT: bf16 .LBB178_4
7260 ; GENERIC-NEXT: .LBB178_2: # %entry
7261 ; GENERIC-NEXT: addi16 sp, sp, 4
7262 ; GENERIC-NEXT: rts16
7263 ; GENERIC-NEXT: .LBB178_3: # %entry
7264 ; GENERIC-NEXT: mov16 a0, a3
7265 ; GENERIC-NEXT: btsti16 a1, 0
7266 ; GENERIC-NEXT: bt16 .LBB178_2
7267 ; GENERIC-NEXT: .LBB178_4: # %entry
7268 ; GENERIC-NEXT: mov16 a0, a2
7269 ; GENERIC-NEXT: addi16 sp, sp, 4
7270 ; GENERIC-NEXT: rts16
7271 entry:
7272 %icmp = icmp slt i1 %y, %x
7273 %ret = select i1 %icmp, i1 %m, i1 %n
7274 ret i1 %ret
7275 }
7277 define i1 @selectRI_slt_i1(i1 %x, i1 %n, i1 %m) {
7278 ; CHECK-LABEL: selectRI_slt_i1:
7279 ; CHECK: # %bb.0: # %entry
7280 ; CHECK-NEXT: btsti16 a0, 0
7281 ; CHECK-NEXT: movt32 a1, a2
7282 ; CHECK-NEXT: mov16 a0, a1
7283 ; CHECK-NEXT: rts16
7284 ;
7285 ; GENERIC-LABEL: selectRI_slt_i1:
7286 ; GENERIC: # %bb.0: # %entry
7287 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7288 ; GENERIC-NEXT: subi16 sp, sp, 4
7289 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7290 ; GENERIC-NEXT: btsti16 a0, 0
7291 ; GENERIC-NEXT: bt16 .LBB179_2
7292 ; GENERIC-NEXT: # %bb.1: # %entry
7293 ; GENERIC-NEXT: mov16 a2, a1
7294 ; GENERIC-NEXT: .LBB179_2: # %entry
7295 ; GENERIC-NEXT: mov16 a0, a2
7296 ; GENERIC-NEXT: addi16 sp, sp, 4
7297 ; GENERIC-NEXT: rts16
7298 entry:
7299 %icmp = icmp slt i1 %x, 10
7300 %ret = select i1 %icmp, i1 %m, i1 %n
7301 ret i1 %ret
7302 }
7304 define i1 @selectRX_slt_i1(i1 %x, i1 %n, i1 %m) {
7305 ; CHECK-LABEL: selectRX_slt_i1:
7306 ; CHECK: # %bb.0: # %entry
7307 ; CHECK-NEXT: mov16 a0, a1
7308 ; CHECK-NEXT: rts16
7309 ;
7310 ; GENERIC-LABEL: selectRX_slt_i1:
7311 ; GENERIC: # %bb.0: # %entry
7312 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7313 ; GENERIC-NEXT: subi16 sp, sp, 4
7314 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7315 ; GENERIC-NEXT: mov16 a0, a1
7316 ; GENERIC-NEXT: addi16 sp, sp, 4
7317 ; GENERIC-NEXT: rts16
7318 entry:
7319 %icmp = icmp slt i1 %x, 47777777
7320 %ret = select i1 %icmp, i1 %m, i1 %n
7321 ret i1 %ret
7322 }
7324 define i1 @selectC_slt_i1(i1 %c, i1 %n, i1 %m) {
7325 ; CHECK-LABEL: selectC_slt_i1:
7326 ; CHECK: # %bb.0: # %entry
7327 ; CHECK-NEXT: btsti16 a0, 0
7328 ; CHECK-NEXT: movt32 a1, a2
7329 ; CHECK-NEXT: mov16 a0, a1
7330 ; CHECK-NEXT: rts16
7331 ;
7332 ; GENERIC-LABEL: selectC_slt_i1:
7333 ; GENERIC: # %bb.0: # %entry
7334 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7335 ; GENERIC-NEXT: subi16 sp, sp, 4
7336 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7337 ; GENERIC-NEXT: btsti16 a0, 0
7338 ; GENERIC-NEXT: bt16 .LBB181_2
7339 ; GENERIC-NEXT: # %bb.1: # %entry
7340 ; GENERIC-NEXT: mov16 a2, a1
7341 ; GENERIC-NEXT: .LBB181_2: # %entry
7342 ; GENERIC-NEXT: mov16 a0, a2
7343 ; GENERIC-NEXT: addi16 sp, sp, 4
7344 ; GENERIC-NEXT: rts16
7345 entry:
7346 %ret = select i1 %c, i1 %m, i1 %n
7347 ret i1 %ret
7348 }
7350 define i32 @selectRR_sle_i32(i32 %x, i32 %y, i32 %n, i32 %m) {
7351 ; CHECK-LABEL: selectRR_sle_i32:
7352 ; CHECK: # %bb.0: # %entry
7353 ; CHECK-NEXT: cmplt16 a0, a1
7354 ; CHECK-NEXT: movf32 a2, a3
7355 ; CHECK-NEXT: mov16 a0, a2
7356 ; CHECK-NEXT: rts16
7357 ;
7358 ; GENERIC-LABEL: selectRR_sle_i32:
7359 ; GENERIC: # %bb.0: # %entry
7360 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7361 ; GENERIC-NEXT: subi16 sp, sp, 4
7362 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7363 ; GENERIC-NEXT: cmplt16 a0, a1
7364 ; GENERIC-NEXT: mvcv16 a0
7365 ; GENERIC-NEXT: btsti16 a0, 0
7366 ; GENERIC-NEXT: bt16 .LBB182_2
7367 ; GENERIC-NEXT: # %bb.1: # %entry
7368 ; GENERIC-NEXT: mov16 a3, a2
7369 ; GENERIC-NEXT: .LBB182_2: # %entry
7370 ; GENERIC-NEXT: mov16 a0, a3
7371 ; GENERIC-NEXT: addi16 sp, sp, 4
7372 ; GENERIC-NEXT: rts16
7373 entry:
7374 %icmp = icmp sle i32 %y, %x
7375 %ret = select i1 %icmp, i32 %m, i32 %n
7376 ret i32 %ret
7377 }
7379 define i32 @selectRI_sle_i32(i32 %x, i32 %n, i32 %m) {
7380 ; CHECK-LABEL: selectRI_sle_i32:
7381 ; CHECK: # %bb.0: # %entry
7382 ; CHECK-NEXT: cmplti16 a0, 11
7383 ; CHECK-NEXT: movt32 a1, a2
7384 ; CHECK-NEXT: mov16 a0, a1
7385 ; CHECK-NEXT: rts16
7386 ;
7387 ; GENERIC-LABEL: selectRI_sle_i32:
7388 ; GENERIC: # %bb.0: # %entry
7389 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7390 ; GENERIC-NEXT: subi16 sp, sp, 4
7391 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7392 ; GENERIC-NEXT: cmplti16 a0, 11
7393 ; GENERIC-NEXT: mvcv16 a0
7394 ; GENERIC-NEXT: movi16 a3, 1
7395 ; GENERIC-NEXT: subu16 a3, a0
7396 ; GENERIC-NEXT: btsti16 a3, 0
7397 ; GENERIC-NEXT: bt16 .LBB183_2
7398 ; GENERIC-NEXT: # %bb.1: # %entry
7399 ; GENERIC-NEXT: mov16 a2, a1
7400 ; GENERIC-NEXT: .LBB183_2: # %entry
7401 ; GENERIC-NEXT: mov16 a0, a2
7402 ; GENERIC-NEXT: addi16 sp, sp, 4
7403 ; GENERIC-NEXT: rts16
7404 entry:
7405 %icmp = icmp sle i32 %x, 10
7406 %ret = select i1 %icmp, i32 %m, i32 %n
7407 ret i32 %ret
7408 }
7410 define i32 @selectRX_sle_i32(i32 %x, i32 %n, i32 %m) {
7411 ; CHECK-LABEL: selectRX_sle_i32:
7412 ; CHECK: # %bb.0: # %entry
7413 ; CHECK-NEXT: movih32 a3, 729
7414 ; CHECK-NEXT: ori32 a3, a3, 2034
7415 ; CHECK-NEXT: cmplt16 a0, a3
7416 ; CHECK-NEXT: movt32 a1, a2
7417 ; CHECK-NEXT: mov16 a0, a1
7418 ; CHECK-NEXT: rts16
7419 ;
7420 ; GENERIC-LABEL: selectRX_sle_i32:
7421 ; GENERIC: # %bb.0: # %entry
7422 ; GENERIC-NEXT: subi16 sp, sp, 4
7423 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7424 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7425 ; GENERIC-NEXT: .cfi_offset l0, -4
7426 ; GENERIC-NEXT: subi16 sp, sp, 4
7427 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
7428 ; GENERIC-NEXT: movi16 a3, 2
7429 ; GENERIC-NEXT: lsli16 a3, a3, 24
7430 ; GENERIC-NEXT: movi16 l0, 217
7431 ; GENERIC-NEXT: lsli16 l0, l0, 16
7432 ; GENERIC-NEXT: or16 l0, a3
7433 ; GENERIC-NEXT: movi16 a3, 7
7434 ; GENERIC-NEXT: lsli16 a3, a3, 8
7435 ; GENERIC-NEXT: or16 a3, l0
7436 ; GENERIC-NEXT: movi16 l0, 242
7437 ; GENERIC-NEXT: or16 l0, a3
7438 ; GENERIC-NEXT: cmplt16 a0, l0
7439 ; GENERIC-NEXT: mvcv16 a0
7440 ; GENERIC-NEXT: movi16 a3, 1
7441 ; GENERIC-NEXT: subu16 a3, a0
7442 ; GENERIC-NEXT: btsti16 a3, 0
7443 ; GENERIC-NEXT: bt16 .LBB184_2
7444 ; GENERIC-NEXT: # %bb.1: # %entry
7445 ; GENERIC-NEXT: mov16 a2, a1
7446 ; GENERIC-NEXT: .LBB184_2: # %entry
7447 ; GENERIC-NEXT: mov16 a0, a2
7448 ; GENERIC-NEXT: addi16 sp, sp, 4
7449 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7450 ; GENERIC-NEXT: addi16 sp, sp, 4
7451 ; GENERIC-NEXT: rts16
7452 entry:
7453 %icmp = icmp sle i32 %x, 47777777
7454 %ret = select i1 %icmp, i32 %m, i32 %n
7455 ret i32 %ret
7456 }
7458 define i32 @selectC_sle_i32(i1 %c, i32 %n, i32 %m) {
7459 ; CHECK-LABEL: selectC_sle_i32:
7460 ; CHECK: # %bb.0: # %entry
7461 ; CHECK-NEXT: btsti16 a0, 0
7462 ; CHECK-NEXT: movt32 a1, a2
7463 ; CHECK-NEXT: mov16 a0, a1
7464 ; CHECK-NEXT: rts16
7465 ;
7466 ; GENERIC-LABEL: selectC_sle_i32:
7467 ; GENERIC: # %bb.0: # %entry
7468 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7469 ; GENERIC-NEXT: subi16 sp, sp, 4
7470 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7471 ; GENERIC-NEXT: btsti16 a0, 0
7472 ; GENERIC-NEXT: bt16 .LBB185_2
7473 ; GENERIC-NEXT: # %bb.1: # %entry
7474 ; GENERIC-NEXT: mov16 a2, a1
7475 ; GENERIC-NEXT: .LBB185_2: # %entry
7476 ; GENERIC-NEXT: mov16 a0, a2
7477 ; GENERIC-NEXT: addi16 sp, sp, 4
7478 ; GENERIC-NEXT: rts16
7479 entry:
7480 %ret = select i1 %c, i32 %m, i32 %n
7481 ret i32 %ret
7482 }
7484 define i64 @selectRR_sle_i64(i64 %x, i64 %y, i64 %n, i64 %m) {
7485 ; CHECK-LABEL: selectRR_sle_i64:
7486 ; CHECK: # %bb.0: # %entry
7487 ; CHECK-NEXT: .cfi_def_cfa_offset 0
7488 ; CHECK-NEXT: subi16 sp, sp, 12
7489 ; CHECK-NEXT: .cfi_def_cfa_offset 12
7490 ; CHECK-NEXT: cmphs16 a0, a2
7491 ; CHECK-NEXT: mvc32 a0
7492 ; CHECK-NEXT: st16.w a0, (sp, 4)
7493 ; CHECK-NEXT: cmpne16 a3, a1
7494 ; CHECK-NEXT: mvc32 a0
7495 ; CHECK-NEXT: st16.w a0, (sp, 8)
7496 ; CHECK-NEXT: cmplt16 a1, a3
7497 ; CHECK-NEXT: mvcv16 a0
7498 ; CHECK-NEXT: ld16.w a1, (sp, 4)
7499 ; CHECK-NEXT: btsti16 a1, 0
7500 ; CHECK-NEXT: mvc32 a1
7501 ; CHECK-NEXT: ld16.w a2, (sp, 8)
7502 ; CHECK-NEXT: btsti16 a2, 0
7503 ; CHECK-NEXT: movf32 a0, a1
7504 ; CHECK-NEXT: addi16 a1, sp, 12
7505 ; CHECK-NEXT: addi16 a2, sp, 20
7506 ; CHECK-NEXT: btsti16 a0, 0
7507 ; CHECK-NEXT: movt32 a1, a2
7508 ; CHECK-NEXT: ld16.w a0, (a1, 0)
7509 ; CHECK-NEXT: ld16.w a1, (a1, 4)
7510 ; CHECK-NEXT: addi16 sp, sp, 12
7511 ; CHECK-NEXT: rts16
7512 ;
7513 ; GENERIC-LABEL: selectRR_sle_i64:
7514 ; GENERIC: # %bb.0: # %entry
7515 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7516 ; GENERIC-NEXT: subi16 sp, sp, 4
7517 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7518 ; GENERIC-NEXT: cmphs16 a0, a2
7519 ; GENERIC-NEXT: mvcv16 a2
7520 ; GENERIC-NEXT: cmplt16 a1, a3
7521 ; GENERIC-NEXT: mvcv16 a0
7522 ; GENERIC-NEXT: cmpne16 a3, a1
7523 ; GENERIC-NEXT: mvcv16 a1
7524 ; GENERIC-NEXT: btsti16 a1, 0
7525 ; GENERIC-NEXT: bf16 .LBB186_2
7526 ; GENERIC-NEXT: # %bb.1:
7527 ; GENERIC-NEXT: movi16 a0, 1
7528 ; GENERIC-NEXT: subu16 a0, a2
7529 ; GENERIC-NEXT: .LBB186_2: # %entry
7530 ; GENERIC-NEXT: btsti16 a0, 0
7531 ; GENERIC-NEXT: bt16 .LBB186_4
7532 ; GENERIC-NEXT: # %bb.3: # %entry
7533 ; GENERIC-NEXT: movi16 a0, 4
7534 ; GENERIC-NEXT: br32 .LBB186_5
7535 ; GENERIC-NEXT: .LBB186_4:
7536 ; GENERIC-NEXT: movi16 a0, 12
7537 ; GENERIC-NEXT: .LBB186_5: # %entry
7538 ; GENERIC-NEXT: addu16 a0, sp
7539 ; GENERIC-NEXT: mov16 a1, a0
7540 ; GENERIC-NEXT: ld16.w a0, (a0, 0)
7541 ; GENERIC-NEXT: ld16.w a1, (a1, 4)
7542 ; GENERIC-NEXT: addi16 sp, sp, 4
7543 ; GENERIC-NEXT: rts16
7544 entry:
7545 %icmp = icmp sle i64 %y, %x
7546 %ret = select i1 %icmp, i64 %m, i64 %n
7547 ret i64 %ret
7548 }
7550 define i64 @selectRI_sle_i64(i64 %x, i64 %n, i64 %m) {
7551 ; CHECK-LABEL: selectRI_sle_i64:
7552 ; CHECK: # %bb.0: # %entry
7553 ; CHECK-NEXT: subi16 sp, sp, 4
7554 ; CHECK-NEXT: .cfi_def_cfa_offset 4
7555 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7556 ; CHECK-NEXT: .cfi_offset l0, -4
7557 ; CHECK-NEXT: subi16 sp, sp, 12
7558 ; CHECK-NEXT: .cfi_def_cfa_offset 16
7559 ; CHECK-NEXT: ld32.w t0, (sp, 20)
7560 ; CHECK-NEXT: ld32.w t1, (sp, 16)
7561 ; CHECK-NEXT: movi16 l0, 0
7562 ; CHECK-NEXT: cmplt16 a1, l0
7563 ; CHECK-NEXT: mvc32 l0
7564 ; CHECK-NEXT: st16.w l0, (sp, 4)
7565 ; CHECK-NEXT: cmpnei16 a1, 0
7566 ; CHECK-NEXT: mvc32 a1
7567 ; CHECK-NEXT: st16.w a1, (sp, 8)
7568 ; CHECK-NEXT: cmphsi16 a0, 11
7569 ; CHECK-NEXT: mvcv16 a0
7570 ; CHECK-NEXT: ld16.w a1, (sp, 4)
7571 ; CHECK-NEXT: btsti16 a1, 0
7572 ; CHECK-NEXT: mvc32 a1
7573 ; CHECK-NEXT: ld16.w l0, (sp, 8)
7574 ; CHECK-NEXT: btsti16 l0, 0
7575 ; CHECK-NEXT: movf32 a1, a0
7576 ; CHECK-NEXT: btsti16 a1, 0
7577 ; CHECK-NEXT: movt32 a2, t1
7578 ; CHECK-NEXT: movt32 a3, t0
7579 ; CHECK-NEXT: mov16 a0, a2
7580 ; CHECK-NEXT: mov16 a1, a3
7581 ; CHECK-NEXT: addi16 sp, sp, 12
7582 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7583 ; CHECK-NEXT: addi16 sp, sp, 4
7584 ; CHECK-NEXT: rts16
7585 ;
7586 ; GENERIC-LABEL: selectRI_sle_i64:
7587 ; GENERIC: # %bb.0: # %entry
7588 ; GENERIC-NEXT: subi16 sp, sp, 4
7589 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7590 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7591 ; GENERIC-NEXT: .cfi_offset l0, -4
7592 ; GENERIC-NEXT: subi16 sp, sp, 4
7593 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
7594 ; GENERIC-NEXT: movi16 l0, 0
7595 ; GENERIC-NEXT: cmplt16 a1, l0
7596 ; GENERIC-NEXT: mvcv16 l0
7597 ; GENERIC-NEXT: cmphsi16 a0, 11
7598 ; GENERIC-NEXT: mvcv16 a0
7599 ; GENERIC-NEXT: cmpnei16 a1, 0
7600 ; GENERIC-NEXT: mvcv16 a1
7601 ; GENERIC-NEXT: btsti16 a1, 0
7602 ; GENERIC-NEXT: bf16 .LBB187_5
7603 ; GENERIC-NEXT: # %bb.1: # %entry
7604 ; GENERIC-NEXT: btsti16 a0, 0
7605 ; GENERIC-NEXT: bt16 .LBB187_6
7606 ; GENERIC-NEXT: .LBB187_2: # %entry
7607 ; GENERIC-NEXT: btsti16 a0, 0
7608 ; GENERIC-NEXT: bf16 .LBB187_4
7609 ; GENERIC-NEXT: .LBB187_3:
7610 ; GENERIC-NEXT: ld16.w a3, (sp, 12)
7611 ; GENERIC-NEXT: .LBB187_4: # %entry
7612 ; GENERIC-NEXT: mov16 a0, a2
7613 ; GENERIC-NEXT: mov16 a1, a3
7614 ; GENERIC-NEXT: addi16 sp, sp, 4
7615 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7616 ; GENERIC-NEXT: addi16 sp, sp, 4
7617 ; GENERIC-NEXT: rts16
7618 ; GENERIC-NEXT: .LBB187_5: # %entry
7619 ; GENERIC-NEXT: movi16 a0, 1
7620 ; GENERIC-NEXT: subu16 a0, l0
7621 ; GENERIC-NEXT: btsti16 a0, 0
7622 ; GENERIC-NEXT: bf16 .LBB187_2
7623 ; GENERIC-NEXT: .LBB187_6:
7624 ; GENERIC-NEXT: ld16.w a2, (sp, 8)
7625 ; GENERIC-NEXT: btsti16 a0, 0
7626 ; GENERIC-NEXT: bt16 .LBB187_3
7627 ; GENERIC-NEXT: br32 .LBB187_4
7628 entry:
7629 %icmp = icmp sle i64 %x, 10
7630 %ret = select i1 %icmp, i64 %m, i64 %n
7631 ret i64 %ret
7632 }
7634 define i64 @selectRX_sle_i64(i64 %x, i64 %n, i64 %m) {
7635 ; CHECK-LABEL: selectRX_sle_i64:
7636 ; CHECK: # %bb.0: # %entry
7637 ; CHECK-NEXT: subi16 sp, sp, 4
7638 ; CHECK-NEXT: .cfi_def_cfa_offset 4
7639 ; CHECK-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7640 ; CHECK-NEXT: .cfi_offset l0, -4
7641 ; CHECK-NEXT: subi16 sp, sp, 12
7642 ; CHECK-NEXT: .cfi_def_cfa_offset 16
7643 ; CHECK-NEXT: ld32.w t0, (sp, 20)
7644 ; CHECK-NEXT: ld32.w t1, (sp, 16)
7645 ; CHECK-NEXT: movi16 l0, 0
7646 ; CHECK-NEXT: cmplt16 a1, l0
7647 ; CHECK-NEXT: mvc32 l0
7648 ; CHECK-NEXT: st16.w l0, (sp, 8)
7649 ; CHECK-NEXT: movih32 l0, 729
7650 ; CHECK-NEXT: ori32 l0, l0, 2034
7651 ; CHECK-NEXT: cmphs16 a0, l0
7652 ; CHECK-NEXT: mvcv16 a0
7653 ; CHECK-NEXT: cmpnei16 a1, 0
7654 ; CHECK-NEXT: mvc32 a1
7655 ; CHECK-NEXT: st16.w a1, (sp, 4)
7656 ; CHECK-NEXT: ld16.w a1, (sp, 8)
7657 ; CHECK-NEXT: btsti16 a1, 0
7658 ; CHECK-NEXT: mvc32 a1
7659 ; CHECK-NEXT: ld16.w l0, (sp, 4)
7660 ; CHECK-NEXT: btsti16 l0, 0
7661 ; CHECK-NEXT: movf32 a1, a0
7662 ; CHECK-NEXT: btsti16 a1, 0
7663 ; CHECK-NEXT: movt32 a2, t1
7664 ; CHECK-NEXT: movt32 a3, t0
7665 ; CHECK-NEXT: mov16 a0, a2
7666 ; CHECK-NEXT: mov16 a1, a3
7667 ; CHECK-NEXT: addi16 sp, sp, 12
7668 ; CHECK-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7669 ; CHECK-NEXT: addi16 sp, sp, 4
7670 ; CHECK-NEXT: rts16
7671 ;
7672 ; GENERIC-LABEL: selectRX_sle_i64:
7673 ; GENERIC: # %bb.0: # %entry
7674 ; GENERIC-NEXT: subi16 sp, sp, 12
7675 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
7676 ; GENERIC-NEXT: st16.w l2, (sp, 8) # 4-byte Folded Spill
7677 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
7678 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7679 ; GENERIC-NEXT: .cfi_offset l2, -4
7680 ; GENERIC-NEXT: .cfi_offset l1, -8
7681 ; GENERIC-NEXT: .cfi_offset l0, -12
7682 ; GENERIC-NEXT: subi16 sp, sp, 4
7683 ; GENERIC-NEXT: .cfi_def_cfa_offset 16
7684 ; GENERIC-NEXT: movi16 l0, 0
7685 ; GENERIC-NEXT: cmplt16 a1, l0
7686 ; GENERIC-NEXT: mvcv16 l0
7687 ; GENERIC-NEXT: movi16 l1, 2
7688 ; GENERIC-NEXT: lsli16 l1, l1, 24
7689 ; GENERIC-NEXT: movi16 l2, 217
7690 ; GENERIC-NEXT: lsli16 l2, l2, 16
7691 ; GENERIC-NEXT: or16 l2, l1
7692 ; GENERIC-NEXT: movi16 l1, 7
7693 ; GENERIC-NEXT: lsli16 l1, l1, 8
7694 ; GENERIC-NEXT: or16 l1, l2
7695 ; GENERIC-NEXT: movi16 l2, 242
7696 ; GENERIC-NEXT: or16 l2, l1
7697 ; GENERIC-NEXT: cmphs16 a0, l2
7698 ; GENERIC-NEXT: mvcv16 a0
7699 ; GENERIC-NEXT: cmpnei16 a1, 0
7700 ; GENERIC-NEXT: mvcv16 a1
7701 ; GENERIC-NEXT: btsti16 a1, 0
7702 ; GENERIC-NEXT: bf16 .LBB188_5
7703 ; GENERIC-NEXT: # %bb.1: # %entry
7704 ; GENERIC-NEXT: btsti16 a0, 0
7705 ; GENERIC-NEXT: bt16 .LBB188_6
7706 ; GENERIC-NEXT: .LBB188_2: # %entry
7707 ; GENERIC-NEXT: btsti16 a0, 0
7708 ; GENERIC-NEXT: bf16 .LBB188_4
7709 ; GENERIC-NEXT: .LBB188_3:
7710 ; GENERIC-NEXT: ld16.w a3, (sp, 20)
7711 ; GENERIC-NEXT: .LBB188_4: # %entry
7712 ; GENERIC-NEXT: mov16 a0, a2
7713 ; GENERIC-NEXT: mov16 a1, a3
7714 ; GENERIC-NEXT: addi16 sp, sp, 4
7715 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7716 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
7717 ; GENERIC-NEXT: ld16.w l2, (sp, 8) # 4-byte Folded Reload
7718 ; GENERIC-NEXT: addi16 sp, sp, 12
7719 ; GENERIC-NEXT: rts16
7720 ; GENERIC-NEXT: .LBB188_5: # %entry
7721 ; GENERIC-NEXT: movi16 a0, 1
7722 ; GENERIC-NEXT: subu16 a0, l0
7723 ; GENERIC-NEXT: btsti16 a0, 0
7724 ; GENERIC-NEXT: bf16 .LBB188_2
7725 ; GENERIC-NEXT: .LBB188_6:
7726 ; GENERIC-NEXT: ld16.w a2, (sp, 16)
7727 ; GENERIC-NEXT: btsti16 a0, 0
7728 ; GENERIC-NEXT: bt16 .LBB188_3
7729 ; GENERIC-NEXT: br32 .LBB188_4
7730 entry:
7731 %icmp = icmp sle i64 %x, 47777777
7732 %ret = select i1 %icmp, i64 %m, i64 %n
7733 ret i64 %ret
7734 }
7736 define i64 @selectC_sle_i64(i1 %c, i64 %n, i64 %m) {
7737 ; CHECK-LABEL: selectC_sle_i64:
7738 ; CHECK: # %bb.0: # %entry
7739 ; CHECK-NEXT: ld32.w t0, (sp, 0)
7740 ; CHECK-NEXT: btsti16 a0, 0
7741 ; CHECK-NEXT: movt32 a1, a3
7742 ; CHECK-NEXT: movt32 a2, t0
7743 ; CHECK-NEXT: mov16 a0, a1
7744 ; CHECK-NEXT: mov16 a1, a2
7745 ; CHECK-NEXT: rts16
7746 ;
7747 ; GENERIC-LABEL: selectC_sle_i64:
7748 ; GENERIC: # %bb.0: # %entry
7749 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7750 ; GENERIC-NEXT: subi16 sp, sp, 4
7751 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7752 ; GENERIC-NEXT: btsti16 a0, 0
7753 ; GENERIC-NEXT: bt16 .LBB189_2
7754 ; GENERIC-NEXT: # %bb.1: # %entry
7755 ; GENERIC-NEXT: mov16 a3, a1
7756 ; GENERIC-NEXT: .LBB189_2: # %entry
7757 ; GENERIC-NEXT: btsti16 a0, 0
7758 ; GENERIC-NEXT: bf16 .LBB189_4
7759 ; GENERIC-NEXT: # %bb.3:
7760 ; GENERIC-NEXT: ld16.w a2, (sp, 4)
7761 ; GENERIC-NEXT: .LBB189_4: # %entry
7762 ; GENERIC-NEXT: mov16 a0, a3
7763 ; GENERIC-NEXT: mov16 a1, a2
7764 ; GENERIC-NEXT: addi16 sp, sp, 4
7765 ; GENERIC-NEXT: rts16
7766 entry:
7767 %ret = select i1 %c, i64 %m, i64 %n
7768 ret i64 %ret
7769 }
7772 define i16 @selectRR_sle_i16(i16 %x, i16 %y, i16 %n, i16 %m) {
7773 ; CHECK-LABEL: selectRR_sle_i16:
7774 ; CHECK: # %bb.0: # %entry
7775 ; CHECK-NEXT: sexth16 a1, a1
7776 ; CHECK-NEXT: sexth16 a0, a0
7777 ; CHECK-NEXT: cmplt16 a0, a1
7778 ; CHECK-NEXT: movf32 a2, a3
7779 ; CHECK-NEXT: mov16 a0, a2
7780 ; CHECK-NEXT: rts16
7781 ;
7782 ; GENERIC-LABEL: selectRR_sle_i16:
7783 ; GENERIC: # %bb.0: # %entry
7784 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7785 ; GENERIC-NEXT: subi16 sp, sp, 4
7786 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7787 ; GENERIC-NEXT: sexth16 a1, a1
7788 ; GENERIC-NEXT: sexth16 a0, a0
7789 ; GENERIC-NEXT: cmplt16 a0, a1
7790 ; GENERIC-NEXT: mvcv16 a0
7791 ; GENERIC-NEXT: btsti16 a0, 0
7792 ; GENERIC-NEXT: bt16 .LBB190_2
7793 ; GENERIC-NEXT: # %bb.1: # %entry
7794 ; GENERIC-NEXT: mov16 a3, a2
7795 ; GENERIC-NEXT: .LBB190_2: # %entry
7796 ; GENERIC-NEXT: mov16 a0, a3
7797 ; GENERIC-NEXT: addi16 sp, sp, 4
7798 ; GENERIC-NEXT: rts16
7799 entry:
7800 %icmp = icmp sle i16 %y, %x
7801 %ret = select i1 %icmp, i16 %m, i16 %n
7802 ret i16 %ret
7803 }
7805 define i16 @selectRI_sle_i16(i16 %x, i16 %n, i16 %m) {
7806 ; CHECK-LABEL: selectRI_sle_i16:
7807 ; CHECK: # %bb.0: # %entry
7808 ; CHECK-NEXT: sexth16 a0, a0
7809 ; CHECK-NEXT: cmplti16 a0, 11
7810 ; CHECK-NEXT: movt32 a1, a2
7811 ; CHECK-NEXT: mov16 a0, a1
7812 ; CHECK-NEXT: rts16
7813 ;
7814 ; GENERIC-LABEL: selectRI_sle_i16:
7815 ; GENERIC: # %bb.0: # %entry
7816 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7817 ; GENERIC-NEXT: subi16 sp, sp, 4
7818 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7819 ; GENERIC-NEXT: sexth16 a0, a0
7820 ; GENERIC-NEXT: cmplti16 a0, 11
7821 ; GENERIC-NEXT: mvcv16 a0
7822 ; GENERIC-NEXT: movi16 a3, 1
7823 ; GENERIC-NEXT: subu16 a3, a0
7824 ; GENERIC-NEXT: btsti16 a3, 0
7825 ; GENERIC-NEXT: bt16 .LBB191_2
7826 ; GENERIC-NEXT: # %bb.1: # %entry
7827 ; GENERIC-NEXT: mov16 a2, a1
7828 ; GENERIC-NEXT: .LBB191_2: # %entry
7829 ; GENERIC-NEXT: mov16 a0, a2
7830 ; GENERIC-NEXT: addi16 sp, sp, 4
7831 ; GENERIC-NEXT: rts16
7832 entry:
7833 %icmp = icmp sle i16 %x, 10
7834 %ret = select i1 %icmp, i16 %m, i16 %n
7835 ret i16 %ret
7836 }
7838 define i16 @selectRX_sle_i16(i16 %x, i16 %n, i16 %m) {
7839 ; CHECK-LABEL: selectRX_sle_i16:
7840 ; CHECK: # %bb.0: # %entry
7841 ; CHECK-NEXT: sexth16 a0, a0
7842 ; CHECK-NEXT: cmplti32 a0, 2034
7843 ; CHECK-NEXT: movt32 a1, a2
7844 ; CHECK-NEXT: mov16 a0, a1
7845 ; CHECK-NEXT: rts16
7846 ;
7847 ; GENERIC-LABEL: selectRX_sle_i16:
7848 ; GENERIC: # %bb.0: # %entry
7849 ; GENERIC-NEXT: subi16 sp, sp, 4
7850 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7851 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7852 ; GENERIC-NEXT: .cfi_offset l0, -4
7853 ; GENERIC-NEXT: subi16 sp, sp, 4
7854 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
7855 ; GENERIC-NEXT: sexth16 a0, a0
7856 ; GENERIC-NEXT: movi16 a3, 0
7857 ; GENERIC-NEXT: lsli16 l0, a3, 24
7858 ; GENERIC-NEXT: lsli16 a3, a3, 16
7859 ; GENERIC-NEXT: or16 a3, l0
7860 ; GENERIC-NEXT: movi16 l0, 7
7861 ; GENERIC-NEXT: lsli16 l0, l0, 8
7862 ; GENERIC-NEXT: or16 l0, a3
7863 ; GENERIC-NEXT: movi16 a3, 242
7864 ; GENERIC-NEXT: or16 a3, l0
7865 ; GENERIC-NEXT: cmplt16 a0, a3
7866 ; GENERIC-NEXT: mvcv16 a0
7867 ; GENERIC-NEXT: movi16 a3, 1
7868 ; GENERIC-NEXT: subu16 a3, a0
7869 ; GENERIC-NEXT: btsti16 a3, 0
7870 ; GENERIC-NEXT: bt16 .LBB192_2
7871 ; GENERIC-NEXT: # %bb.1: # %entry
7872 ; GENERIC-NEXT: mov16 a2, a1
7873 ; GENERIC-NEXT: .LBB192_2: # %entry
7874 ; GENERIC-NEXT: mov16 a0, a2
7875 ; GENERIC-NEXT: addi16 sp, sp, 4
7876 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
7877 ; GENERIC-NEXT: addi16 sp, sp, 4
7878 ; GENERIC-NEXT: rts16
7879 entry:
7880 %icmp = icmp sle i16 %x, 47777777
7881 %ret = select i1 %icmp, i16 %m, i16 %n
7882 ret i16 %ret
7883 }
7885 define i16 @selectC_sle_i16(i1 %c, i16 %n, i16 %m) {
7886 ; CHECK-LABEL: selectC_sle_i16:
7887 ; CHECK: # %bb.0: # %entry
7888 ; CHECK-NEXT: btsti16 a0, 0
7889 ; CHECK-NEXT: movt32 a1, a2
7890 ; CHECK-NEXT: mov16 a0, a1
7891 ; CHECK-NEXT: rts16
7892 ;
7893 ; GENERIC-LABEL: selectC_sle_i16:
7894 ; GENERIC: # %bb.0: # %entry
7895 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7896 ; GENERIC-NEXT: subi16 sp, sp, 4
7897 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7898 ; GENERIC-NEXT: btsti16 a0, 0
7899 ; GENERIC-NEXT: bt16 .LBB193_2
7900 ; GENERIC-NEXT: # %bb.1: # %entry
7901 ; GENERIC-NEXT: mov16 a2, a1
7902 ; GENERIC-NEXT: .LBB193_2: # %entry
7903 ; GENERIC-NEXT: mov16 a0, a2
7904 ; GENERIC-NEXT: addi16 sp, sp, 4
7905 ; GENERIC-NEXT: rts16
7906 entry:
7907 %ret = select i1 %c, i16 %m, i16 %n
7908 ret i16 %ret
7909 }
7912 define i8 @selectRR_sle_i8(i8 %x, i8 %y, i8 %n, i8 %m) {
7913 ; CHECK-LABEL: selectRR_sle_i8:
7914 ; CHECK: # %bb.0: # %entry
7915 ; CHECK-NEXT: sextb16 a1, a1
7916 ; CHECK-NEXT: sextb16 a0, a0
7917 ; CHECK-NEXT: cmplt16 a0, a1
7918 ; CHECK-NEXT: movf32 a2, a3
7919 ; CHECK-NEXT: mov16 a0, a2
7920 ; CHECK-NEXT: rts16
7921 ;
7922 ; GENERIC-LABEL: selectRR_sle_i8:
7923 ; GENERIC: # %bb.0: # %entry
7924 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7925 ; GENERIC-NEXT: subi16 sp, sp, 4
7926 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7927 ; GENERIC-NEXT: sextb16 a1, a1
7928 ; GENERIC-NEXT: sextb16 a0, a0
7929 ; GENERIC-NEXT: cmplt16 a0, a1
7930 ; GENERIC-NEXT: mvcv16 a0
7931 ; GENERIC-NEXT: btsti16 a0, 0
7932 ; GENERIC-NEXT: bt16 .LBB194_2
7933 ; GENERIC-NEXT: # %bb.1: # %entry
7934 ; GENERIC-NEXT: mov16 a3, a2
7935 ; GENERIC-NEXT: .LBB194_2: # %entry
7936 ; GENERIC-NEXT: mov16 a0, a3
7937 ; GENERIC-NEXT: addi16 sp, sp, 4
7938 ; GENERIC-NEXT: rts16
7939 entry:
7940 %icmp = icmp sle i8 %y, %x
7941 %ret = select i1 %icmp, i8 %m, i8 %n
7942 ret i8 %ret
7943 }
7945 define i8 @selectRI_sle_i8(i8 %x, i8 %n, i8 %m) {
7946 ; CHECK-LABEL: selectRI_sle_i8:
7947 ; CHECK: # %bb.0: # %entry
7948 ; CHECK-NEXT: sextb16 a0, a0
7949 ; CHECK-NEXT: cmplti16 a0, 11
7950 ; CHECK-NEXT: movt32 a1, a2
7951 ; CHECK-NEXT: mov16 a0, a1
7952 ; CHECK-NEXT: rts16
7953 ;
7954 ; GENERIC-LABEL: selectRI_sle_i8:
7955 ; GENERIC: # %bb.0: # %entry
7956 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
7957 ; GENERIC-NEXT: subi16 sp, sp, 4
7958 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
7959 ; GENERIC-NEXT: sextb16 a0, a0
7960 ; GENERIC-NEXT: cmplti16 a0, 11
7961 ; GENERIC-NEXT: mvcv16 a0
7962 ; GENERIC-NEXT: movi16 a3, 1
7963 ; GENERIC-NEXT: subu16 a3, a0
7964 ; GENERIC-NEXT: btsti16 a3, 0
7965 ; GENERIC-NEXT: bt16 .LBB195_2
7966 ; GENERIC-NEXT: # %bb.1: # %entry
7967 ; GENERIC-NEXT: mov16 a2, a1
7968 ; GENERIC-NEXT: .LBB195_2: # %entry
7969 ; GENERIC-NEXT: mov16 a0, a2
7970 ; GENERIC-NEXT: addi16 sp, sp, 4
7971 ; GENERIC-NEXT: rts16
7972 entry:
7973 %icmp = icmp sle i8 %x, 10
7974 %ret = select i1 %icmp, i8 %m, i8 %n
7975 ret i8 %ret
7976 }
7978 define i8 @selectRX_sle_i8(i8 %x, i8 %n, i8 %m) {
7979 ; CHECK-LABEL: selectRX_sle_i8:
7980 ; CHECK: # %bb.0: # %entry
7981 ; CHECK-NEXT: sextb16 a0, a0
7982 ; CHECK-NEXT: movih32 a3, 65535
7983 ; CHECK-NEXT: ori32 a3, a3, 65522
7984 ; CHECK-NEXT: cmplt16 a0, a3
7985 ; CHECK-NEXT: movt32 a1, a2
7986 ; CHECK-NEXT: mov16 a0, a1
7987 ; CHECK-NEXT: rts16
7988 ;
7989 ; GENERIC-LABEL: selectRX_sle_i8:
7990 ; GENERIC: # %bb.0: # %entry
7991 ; GENERIC-NEXT: subi16 sp, sp, 8
7992 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
7993 ; GENERIC-NEXT: st16.w l1, (sp, 4) # 4-byte Folded Spill
7994 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
7995 ; GENERIC-NEXT: .cfi_offset l1, -4
7996 ; GENERIC-NEXT: .cfi_offset l0, -8
7997 ; GENERIC-NEXT: subi16 sp, sp, 4
7998 ; GENERIC-NEXT: .cfi_def_cfa_offset 12
7999 ; GENERIC-NEXT: sextb16 a0, a0
8000 ; GENERIC-NEXT: movi16 a3, 255
8001 ; GENERIC-NEXT: lsli16 l0, a3, 24
8002 ; GENERIC-NEXT: lsli16 l1, a3, 16
8003 ; GENERIC-NEXT: or16 l1, l0
8004 ; GENERIC-NEXT: lsli16 a3, a3, 8
8005 ; GENERIC-NEXT: or16 a3, l1
8006 ; GENERIC-NEXT: movi16 l0, 242
8007 ; GENERIC-NEXT: or16 l0, a3
8008 ; GENERIC-NEXT: cmplt16 a0, l0
8009 ; GENERIC-NEXT: mvcv16 a0
8010 ; GENERIC-NEXT: movi16 a3, 1
8011 ; GENERIC-NEXT: subu16 a3, a0
8012 ; GENERIC-NEXT: btsti16 a3, 0
8013 ; GENERIC-NEXT: bt16 .LBB196_2
8014 ; GENERIC-NEXT: # %bb.1: # %entry
8015 ; GENERIC-NEXT: mov16 a2, a1
8016 ; GENERIC-NEXT: .LBB196_2: # %entry
8017 ; GENERIC-NEXT: mov16 a0, a2
8018 ; GENERIC-NEXT: addi16 sp, sp, 4
8019 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
8020 ; GENERIC-NEXT: ld16.w l1, (sp, 4) # 4-byte Folded Reload
8021 ; GENERIC-NEXT: addi16 sp, sp, 8
8022 ; GENERIC-NEXT: rts16
8023 entry:
8024 %icmp = icmp sle i8 %x, 47777777
8025 %ret = select i1 %icmp, i8 %m, i8 %n
8026 ret i8 %ret
8027 }
8029 define i8 @selectC_sle_i8(i1 %c, i8 %n, i8 %m) {
8030 ; CHECK-LABEL: selectC_sle_i8:
8031 ; CHECK: # %bb.0: # %entry
8032 ; CHECK-NEXT: btsti16 a0, 0
8033 ; CHECK-NEXT: movt32 a1, a2
8034 ; CHECK-NEXT: mov16 a0, a1
8035 ; CHECK-NEXT: rts16
8036 ;
8037 ; GENERIC-LABEL: selectC_sle_i8:
8038 ; GENERIC: # %bb.0: # %entry
8039 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8040 ; GENERIC-NEXT: subi16 sp, sp, 4
8041 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8042 ; GENERIC-NEXT: btsti16 a0, 0
8043 ; GENERIC-NEXT: bt16 .LBB197_2
8044 ; GENERIC-NEXT: # %bb.1: # %entry
8045 ; GENERIC-NEXT: mov16 a2, a1
8046 ; GENERIC-NEXT: .LBB197_2: # %entry
8047 ; GENERIC-NEXT: mov16 a0, a2
8048 ; GENERIC-NEXT: addi16 sp, sp, 4
8049 ; GENERIC-NEXT: rts16
8050 entry:
8051 %ret = select i1 %c, i8 %m, i8 %n
8052 ret i8 %ret
8053 }
8056 define i1 @selectRR_sle_i1(i1 %x, i1 %y, i1 %n, i1 %m) {
8057 ; CHECK-LABEL: selectRR_sle_i1:
8058 ; CHECK: # %bb.0: # %entry
8059 ; CHECK-NEXT: btsti16 a0, 0
8060 ; CHECK-NEXT: mov16 a0, a3
8061 ; CHECK-NEXT: movt32 a0, a2
8062 ; CHECK-NEXT: btsti16 a1, 0
8063 ; CHECK-NEXT: movt32 a0, a3
8064 ; CHECK-NEXT: rts16
8065 ;
8066 ; GENERIC-LABEL: selectRR_sle_i1:
8067 ; GENERIC: # %bb.0: # %entry
8068 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8069 ; GENERIC-NEXT: subi16 sp, sp, 4
8070 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8071 ; GENERIC-NEXT: btsti16 a0, 0
8072 ; GENERIC-NEXT: bt16 .LBB198_2
8073 ; GENERIC-NEXT: # %bb.1: # %entry
8074 ; GENERIC-NEXT: mov16 a2, a3
8075 ; GENERIC-NEXT: .LBB198_2: # %entry
8076 ; GENERIC-NEXT: btsti16 a1, 0
8077 ; GENERIC-NEXT: bt16 .LBB198_4
8078 ; GENERIC-NEXT: # %bb.3: # %entry
8079 ; GENERIC-NEXT: mov16 a3, a2
8080 ; GENERIC-NEXT: .LBB198_4: # %entry
8081 ; GENERIC-NEXT: mov16 a0, a3
8082 ; GENERIC-NEXT: addi16 sp, sp, 4
8083 ; GENERIC-NEXT: rts16
8084 entry:
8085 %icmp = icmp sle i1 %y, %x
8086 %ret = select i1 %icmp, i1 %m, i1 %n
8087 ret i1 %ret
8088 }
8090 define i1 @selectRI_sle_i1(i1 %x, i1 %n, i1 %m) {
8091 ; CHECK-LABEL: selectRI_sle_i1:
8092 ; CHECK: # %bb.0: # %entry
8093 ; CHECK-NEXT: mov16 a0, a2
8094 ; CHECK-NEXT: rts16
8095 ;
8096 ; GENERIC-LABEL: selectRI_sle_i1:
8097 ; GENERIC: # %bb.0: # %entry
8098 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8099 ; GENERIC-NEXT: subi16 sp, sp, 4
8100 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8101 ; GENERIC-NEXT: mov16 a0, a2
8102 ; GENERIC-NEXT: addi16 sp, sp, 4
8103 ; GENERIC-NEXT: rts16
8104 entry:
8105 %icmp = icmp sle i1 %x, 10
8106 %ret = select i1 %icmp, i1 %m, i1 %n
8107 ret i1 %ret
8108 }
8110 define i1 @selectRX_sle_i1(i1 %x, i1 %n, i1 %m) {
8111 ; CHECK-LABEL: selectRX_sle_i1:
8112 ; CHECK: # %bb.0: # %entry
8113 ; CHECK-NEXT: btsti16 a0, 0
8114 ; CHECK-NEXT: movt32 a1, a2
8115 ; CHECK-NEXT: mov16 a0, a1
8116 ; CHECK-NEXT: rts16
8117 ;
8118 ; GENERIC-LABEL: selectRX_sle_i1:
8119 ; GENERIC: # %bb.0: # %entry
8120 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8121 ; GENERIC-NEXT: subi16 sp, sp, 4
8122 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8123 ; GENERIC-NEXT: btsti16 a0, 0
8124 ; GENERIC-NEXT: bt16 .LBB200_2
8125 ; GENERIC-NEXT: # %bb.1: # %entry
8126 ; GENERIC-NEXT: mov16 a2, a1
8127 ; GENERIC-NEXT: .LBB200_2: # %entry
8128 ; GENERIC-NEXT: mov16 a0, a2
8129 ; GENERIC-NEXT: addi16 sp, sp, 4
8130 ; GENERIC-NEXT: rts16
8131 entry:
8132 %icmp = icmp sle i1 %x, 47777777
8133 %ret = select i1 %icmp, i1 %m, i1 %n
8134 ret i1 %ret
8135 }
8137 define i1 @selectC_sle_i1(i1 %c, i1 %n, i1 %m) {
8138 ; CHECK-LABEL: selectC_sle_i1:
8139 ; CHECK: # %bb.0: # %entry
8140 ; CHECK-NEXT: btsti16 a0, 0
8141 ; CHECK-NEXT: movt32 a1, a2
8142 ; CHECK-NEXT: mov16 a0, a1
8143 ; CHECK-NEXT: rts16
8144 ;
8145 ; GENERIC-LABEL: selectC_sle_i1:
8146 ; GENERIC: # %bb.0: # %entry
8147 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8148 ; GENERIC-NEXT: subi16 sp, sp, 4
8149 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8150 ; GENERIC-NEXT: btsti16 a0, 0
8151 ; GENERIC-NEXT: bt16 .LBB201_2
8152 ; GENERIC-NEXT: # %bb.1: # %entry
8153 ; GENERIC-NEXT: mov16 a2, a1
8154 ; GENERIC-NEXT: .LBB201_2: # %entry
8155 ; GENERIC-NEXT: mov16 a0, a2
8156 ; GENERIC-NEXT: addi16 sp, sp, 4
8157 ; GENERIC-NEXT: rts16
8158 entry:
8159 %ret = select i1 %c, i1 %m, i1 %n
8160 ret i1 %ret
8161 }
8163 define i32 @select_bit_test_eq_0(i32 %0) {
8164 ; CHECK-LABEL: select_bit_test_eq_0:
8165 ; CHECK: # %bb.0:
8166 ; CHECK-NEXT: btsti16 a0, 17
8167 ; CHECK-NEXT: movi16 a0, 23
8168 ; CHECK-NEXT: movi16 a1, 1
8169 ; CHECK-NEXT: movf32 a0, a1
8170 ; CHECK-NEXT: rts16
8171 ;
8172 ; GENERIC-LABEL: select_bit_test_eq_0:
8173 ; GENERIC: # %bb.0:
8174 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8175 ; GENERIC-NEXT: subi16 sp, sp, 4
8176 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8177 ; GENERIC-NEXT: movi16 a1, 0
8178 ; GENERIC-NEXT: lsli16 a2, a1, 24
8179 ; GENERIC-NEXT: movi16 a3, 2
8180 ; GENERIC-NEXT: lsli16 a3, a3, 16
8181 ; GENERIC-NEXT: or16 a3, a2
8182 ; GENERIC-NEXT: lsli16 a2, a1, 8
8183 ; GENERIC-NEXT: or16 a2, a3
8184 ; GENERIC-NEXT: or16 a2, a1
8185 ; GENERIC-NEXT: and16 a2, a0
8186 ; GENERIC-NEXT: cmpnei16 a2, 0
8187 ; GENERIC-NEXT: mvcv16 a1
8188 ; GENERIC-NEXT: movi16 a0, 1
8189 ; GENERIC-NEXT: btsti16 a1, 0
8190 ; GENERIC-NEXT: bt16 .LBB202_2
8191 ; GENERIC-NEXT: # %bb.1:
8192 ; GENERIC-NEXT: movi16 a0, 23
8193 ; GENERIC-NEXT: .LBB202_2:
8194 ; GENERIC-NEXT: addi16 sp, sp, 4
8195 ; GENERIC-NEXT: rts16
8196 %2 = and i32 %0, 131072
8197 %3 = icmp eq i32 %2, 0
8198 %4 = select i1 %3, i32 1, i32 23
8199 ret i32 %4
8200 }
8202 define i32 @select_bit_test_ne_0(i32 %0) {
8203 ; CHECK-LABEL: select_bit_test_ne_0:
8204 ; CHECK: # %bb.0:
8205 ; CHECK-NEXT: btsti16 a0, 17
8206 ; CHECK-NEXT: movi16 a0, 34
8207 ; CHECK-NEXT: movi16 a1, 5
8208 ; CHECK-NEXT: movt32 a0, a1
8209 ; CHECK-NEXT: rts16
8210 ;
8211 ; GENERIC-LABEL: select_bit_test_ne_0:
8212 ; GENERIC: # %bb.0:
8213 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8214 ; GENERIC-NEXT: subi16 sp, sp, 4
8215 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8216 ; GENERIC-NEXT: movi16 a1, 0
8217 ; GENERIC-NEXT: lsli16 a2, a1, 24
8218 ; GENERIC-NEXT: movi16 a3, 2
8219 ; GENERIC-NEXT: lsli16 a3, a3, 16
8220 ; GENERIC-NEXT: or16 a3, a2
8221 ; GENERIC-NEXT: lsli16 a2, a1, 8
8222 ; GENERIC-NEXT: or16 a2, a3
8223 ; GENERIC-NEXT: or16 a2, a1
8224 ; GENERIC-NEXT: and16 a2, a0
8225 ; GENERIC-NEXT: cmpnei16 a2, 0
8226 ; GENERIC-NEXT: mvcv16 a0
8227 ; GENERIC-NEXT: movi16 a1, 1
8228 ; GENERIC-NEXT: subu16 a1, a0
8229 ; GENERIC-NEXT: movi16 a0, 5
8230 ; GENERIC-NEXT: btsti16 a1, 0
8231 ; GENERIC-NEXT: bt16 .LBB203_2
8232 ; GENERIC-NEXT: # %bb.1:
8233 ; GENERIC-NEXT: movi16 a0, 34
8234 ; GENERIC-NEXT: .LBB203_2:
8235 ; GENERIC-NEXT: addi16 sp, sp, 4
8236 ; GENERIC-NEXT: rts16
8237 %2 = and i32 %0, 131072
8238 %3 = icmp ne i32 %2, 0
8239 %4 = select i1 %3, i32 5, i32 34
8240 ret i32 %4
8241 }
8243 define i32 @select_bit_test_eq_mask(i32 %0) {
8244 ; CHECK-LABEL: select_bit_test_eq_mask:
8245 ; CHECK: # %bb.0:
8246 ; CHECK-NEXT: btsti16 a0, 17
8247 ; CHECK-NEXT: movi16 a0, 5
8248 ; CHECK-NEXT: movi16 a1, 34
8249 ; CHECK-NEXT: movt32 a0, a1
8250 ; CHECK-NEXT: rts16
8251 ;
8252 ; GENERIC-LABEL: select_bit_test_eq_mask:
8253 ; GENERIC: # %bb.0:
8254 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8255 ; GENERIC-NEXT: subi16 sp, sp, 4
8256 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8257 ; GENERIC-NEXT: movi16 a1, 0
8258 ; GENERIC-NEXT: lsli16 a2, a1, 24
8259 ; GENERIC-NEXT: movi16 a3, 2
8260 ; GENERIC-NEXT: lsli16 a3, a3, 16
8261 ; GENERIC-NEXT: or16 a3, a2
8262 ; GENERIC-NEXT: lsli16 a2, a1, 8
8263 ; GENERIC-NEXT: or16 a2, a3
8264 ; GENERIC-NEXT: or16 a2, a1
8265 ; GENERIC-NEXT: and16 a2, a0
8266 ; GENERIC-NEXT: cmpnei16 a2, 0
8267 ; GENERIC-NEXT: mvcv16 a0
8268 ; GENERIC-NEXT: movi16 a1, 1
8269 ; GENERIC-NEXT: subu16 a1, a0
8270 ; GENERIC-NEXT: movi16 a0, 34
8271 ; GENERIC-NEXT: btsti16 a1, 0
8272 ; GENERIC-NEXT: bt16 .LBB204_2
8273 ; GENERIC-NEXT: # %bb.1:
8274 ; GENERIC-NEXT: movi16 a0, 5
8275 ; GENERIC-NEXT: .LBB204_2:
8276 ; GENERIC-NEXT: addi16 sp, sp, 4
8277 ; GENERIC-NEXT: rts16
8278 %2 = and i32 %0, 131072
8279 %3 = icmp eq i32 %2, 131072
8280 %4 = select i1 %3, i32 34, i32 5
8281 ret i32 %4
8282 }
8284 define i32 @select_bit_test_ne_mask(i32 %0) {
8285 ; CHECK-LABEL: select_bit_test_ne_mask:
8286 ; CHECK: # %bb.0:
8287 ; CHECK-NEXT: btsti16 a0, 17
8288 ; CHECK-NEXT: movi16 a0, 34
8289 ; CHECK-NEXT: movi16 a1, 5
8290 ; CHECK-NEXT: movt32 a0, a1
8291 ; CHECK-NEXT: rts16
8292 ;
8293 ; GENERIC-LABEL: select_bit_test_ne_mask:
8294 ; GENERIC: # %bb.0:
8295 ; GENERIC-NEXT: .cfi_def_cfa_offset 0
8296 ; GENERIC-NEXT: subi16 sp, sp, 4
8297 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8298 ; GENERIC-NEXT: movi16 a1, 0
8299 ; GENERIC-NEXT: lsli16 a2, a1, 24
8300 ; GENERIC-NEXT: movi16 a3, 2
8301 ; GENERIC-NEXT: lsli16 a3, a3, 16
8302 ; GENERIC-NEXT: or16 a3, a2
8303 ; GENERIC-NEXT: lsli16 a2, a1, 8
8304 ; GENERIC-NEXT: or16 a2, a3
8305 ; GENERIC-NEXT: or16 a2, a1
8306 ; GENERIC-NEXT: and16 a2, a0
8307 ; GENERIC-NEXT: cmpnei16 a2, 0
8308 ; GENERIC-NEXT: mvcv16 a0
8309 ; GENERIC-NEXT: movi16 a1, 1
8310 ; GENERIC-NEXT: subu16 a1, a0
8311 ; GENERIC-NEXT: movi16 a0, 5
8312 ; GENERIC-NEXT: btsti16 a1, 0
8313 ; GENERIC-NEXT: bt16 .LBB205_2
8314 ; GENERIC-NEXT: # %bb.1:
8315 ; GENERIC-NEXT: movi16 a0, 34
8316 ; GENERIC-NEXT: .LBB205_2:
8317 ; GENERIC-NEXT: addi16 sp, sp, 4
8318 ; GENERIC-NEXT: rts16
8319 %2 = and i32 %0, 131072
8320 %3 = icmp eq i32 %2, 131072
8321 %4 = select i1 %3, i32 5, i32 34
8322 ret i32 %4
8323 }
8325 define i32 @select_lowbit_test_ne_0(i32 %0) {
8326 ; CHECK-LABEL: select_lowbit_test_ne_0:
8327 ; CHECK: # %bb.0:
8328 ; CHECK-NEXT: andi32 a0, a0, 256
8329 ; CHECK-NEXT: cmpnei16 a0, 0
8330 ; CHECK-NEXT: movi16 a0, 34
8331 ; CHECK-NEXT: movi16 a1, 5
8332 ; CHECK-NEXT: movt32 a0, a1
8333 ; CHECK-NEXT: rts16
8334 ;
8335 ; GENERIC-LABEL: select_lowbit_test_ne_0:
8336 ; GENERIC: # %bb.0:
8337 ; GENERIC-NEXT: subi16 sp, sp, 4
8338 ; GENERIC-NEXT: .cfi_def_cfa_offset 4
8339 ; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
8340 ; GENERIC-NEXT: .cfi_offset l0, -4
8341 ; GENERIC-NEXT: subi16 sp, sp, 4
8342 ; GENERIC-NEXT: .cfi_def_cfa_offset 8
8343 ; GENERIC-NEXT: movi16 a1, 0
8344 ; GENERIC-NEXT: lsli16 a2, a1, 24
8345 ; GENERIC-NEXT: lsli16 a3, a1, 16
8346 ; GENERIC-NEXT: or16 a3, a2
8347 ; GENERIC-NEXT: movi16 a2, 1
8348 ; GENERIC-NEXT: lsli16 l0, a2, 8
8349 ; GENERIC-NEXT: or16 l0, a3
8350 ; GENERIC-NEXT: or16 l0, a1
8351 ; GENERIC-NEXT: and16 l0, a0
8352 ; GENERIC-NEXT: cmpnei16 l0, 0
8353 ; GENERIC-NEXT: mvcv16 a0
8354 ; GENERIC-NEXT: subu16 a2, a0
8355 ; GENERIC-NEXT: movi16 a0, 5
8356 ; GENERIC-NEXT: btsti16 a2, 0
8357 ; GENERIC-NEXT: bt16 .LBB206_2
8358 ; GENERIC-NEXT: # %bb.1:
8359 ; GENERIC-NEXT: movi16 a0, 34
8360 ; GENERIC-NEXT: .LBB206_2:
8361 ; GENERIC-NEXT: addi16 sp, sp, 4
8362 ; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
8363 ; GENERIC-NEXT: addi16 sp, sp, 4
8364 ; GENERIC-NEXT: rts16
8365 %2 = and i32 %0, 256
8366 %3 = icmp ne i32 %2, 0
8367 %4 = select i1 %3, i32 5, i32 34
8368 ret i32 %4
8369 }