1 ; During lowering of HVX instruction for 64B vector, the rotation
2 ; direction for VROR (as part of concat of vectors lowering) is fixed.
4 ; RUN: llc -mtriple=hexagon -O2 %s -o - | FileCheck %s
7 ; CHECK: r{{.*}} = {{.*}}#48
8 ; CHECK: vec.epilog.vector.body
11 %struct.str = type { i8, i8, i8 }
13 define dso_local void @foo(i16* nocapture noundef writeonly %pOut, i16* nocapture noundef readonly %Coefs, %struct.str* nocapture noundef readonly %pQ, i32 noundef %Intra) local_unnamed_addr #0 {
15 %Coefs13 = ptrtoint i16* %Coefs to i32
16 %pOut12 = ptrtoint i16* %pOut to i32
17 %cmp10 = icmp slt i32 %Intra, 16
18 br i1 %cmp10, label %iter.check, label %for.end
20 iter.check: ; preds = %entry
21 %Q = getelementptr inbounds %struct.str, %struct.str* %pQ, i32 0, i32 0
22 %0 = load i8, i8* %Q, align 1
23 %conv3 = zext i8 %0 to i32
24 %1 = sub nsw i32 0, %conv3
25 %2 = sub i32 16, %Intra
26 %min.iters.check = icmp ult i32 %2, 8
27 br i1 %min.iters.check, label %for.body.preheader, label %vector.memcheck
29 vector.memcheck: ; preds = %iter.check
30 %3 = shl i32 %Intra, 1
31 %4 = add i32 %3, %pOut12
32 %5 = add i32 %3, %Coefs13
34 %diff.check = icmp ult i32 %6, 128
35 br i1 %diff.check, label %for.body.preheader, label %vector.main.loop.iter.check
37 vector.main.loop.iter.check: ; preds = %vector.memcheck
38 %min.iters.check14 = icmp ult i32 %2, 64
39 br i1 %min.iters.check14, label %vec.epilog.ph, label %vector.ph
41 vector.ph: ; preds = %vector.main.loop.iter.check
42 %n.vec = and i32 %2, -64
43 %bd.spinsert = insertelement <32 x i32> poison, i32 %1, i64 0
44 %bd.sp = shufflevector <32 x i32> %bd.spinsert, <32 x i32> poison, <32 x i32> zeroinitializer
45 %bd.spinsert16 = insertelement <32 x i32> poison, i32 %conv3, i64 0
46 %bd.sp17 = shufflevector <32 x i32> %bd.spinsert16, <32 x i32> poison, <32 x i32> zeroinitializer
49 vector.body: ; preds = %vector.body, %vector.ph
50 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
51 %offset.idx = add i32 %index, %Intra
52 %7 = getelementptr inbounds i16, i16* %Coefs, i32 %offset.idx
53 %8 = bitcast i16* %7 to <32 x i16>*
54 %wide.load = load <32 x i16>, <32 x i16>* %8, align 2
55 %9 = getelementptr inbounds i16, i16* %7, i32 32
56 %10 = bitcast i16* %9 to <32 x i16>*
57 %wide.load15 = load <32 x i16>, <32 x i16>* %10, align 2
58 %11 = icmp slt <32 x i16> %wide.load, zeroinitializer
59 %12 = icmp slt <32 x i16> %wide.load15, zeroinitializer
60 %13 = select <32 x i1> %11, <32 x i32> %bd.sp, <32 x i32> %bd.sp17
61 %14 = select <32 x i1> %12, <32 x i32> %bd.sp, <32 x i32> %bd.sp17
62 %15 = trunc <32 x i32> %13 to <32 x i16>
63 %16 = trunc <32 x i32> %14 to <32 x i16>
64 %17 = getelementptr inbounds i16, i16* %pOut, i32 %offset.idx
65 %18 = bitcast i16* %17 to <32 x i16>*
66 store <32 x i16> %15, <32 x i16>* %18, align 2
67 %19 = getelementptr inbounds i16, i16* %17, i32 32
68 %20 = bitcast i16* %19 to <32 x i16>*
69 store <32 x i16> %16, <32 x i16>* %20, align 2
70 %index.next = add nuw i32 %index, 64
71 %21 = icmp eq i32 %index.next, %n.vec
72 br i1 %21, label %middle.block, label %vector.body
74 middle.block: ; preds = %vector.body
75 %cmp.n = icmp eq i32 %2, %n.vec
76 br i1 %cmp.n, label %for.end, label %vec.epilog.iter.check
78 vec.epilog.iter.check: ; preds = %middle.block
79 %ind.end24 = add i32 %n.vec, %Intra
80 %n.vec.remaining = and i32 %2, 56
81 %min.epilog.iters.check = icmp eq i32 %n.vec.remaining, 0
82 br i1 %min.epilog.iters.check, label %for.body.preheader, label %vec.epilog.ph
84 vec.epilog.ph: ; preds = %vector.main.loop.iter.check, %vec.epilog.iter.check
85 %vec.epilog.resume.val = phi i32 [ %n.vec, %vec.epilog.iter.check ], [ 0, %vector.main.loop.iter.check ]
86 %n.vec23 = and i32 %2, -8
87 %ind.end = add i32 %n.vec23, %Intra
88 %bd.spinsert29 = insertelement <8 x i32> poison, i32 %1, i64 0
89 %bd.sp30 = shufflevector <8 x i32> %bd.spinsert29, <8 x i32> poison, <8 x i32> zeroinitializer
90 %bd.spinsert31 = insertelement <8 x i32> poison, i32 %conv3, i64 0
91 %bd.sp32 = shufflevector <8 x i32> %bd.spinsert31, <8 x i32> poison, <8 x i32> zeroinitializer
92 br label %vec.epilog.vector.body
94 vec.epilog.vector.body: ; preds = %vec.epilog.vector.body, %vec.epilog.ph
95 %index26 = phi i32 [ %vec.epilog.resume.val, %vec.epilog.ph ], [ %index.next33, %vec.epilog.vector.body ]
96 %offset.idx27 = add i32 %index26, %Intra
97 %22 = getelementptr inbounds i16, i16* %Coefs, i32 %offset.idx27
98 %23 = bitcast i16* %22 to <8 x i16>*
99 %wide.load28 = load <8 x i16>, <8 x i16>* %23, align 2
100 %24 = icmp slt <8 x i16> %wide.load28, zeroinitializer
101 %25 = select <8 x i1> %24, <8 x i32> %bd.sp30, <8 x i32> %bd.sp32
102 %26 = trunc <8 x i32> %25 to <8 x i16>
103 %27 = getelementptr inbounds i16, i16* %pOut, i32 %offset.idx27
104 %28 = bitcast i16* %27 to <8 x i16>*
105 store <8 x i16> %26, <8 x i16>* %28, align 2
106 %index.next33 = add nuw i32 %index26, 8
107 %29 = icmp eq i32 %index.next33, %n.vec23
108 br i1 %29, label %vec.epilog.middle.block, label %vec.epilog.vector.body
110 vec.epilog.middle.block: ; preds = %vec.epilog.vector.body
111 %cmp.n25 = icmp eq i32 %2, %n.vec23
112 br i1 %cmp.n25, label %for.end, label %for.body.preheader
114 for.body.preheader: ; preds = %vector.memcheck, %iter.check, %vec.epilog.iter.check, %vec.epilog.middle.block
115 %i.011.ph = phi i32 [ %Intra, %iter.check ], [ %Intra, %vector.memcheck ], [ %ind.end24, %vec.epilog.iter.check ], [ %ind.end, %vec.epilog.middle.block ]
118 for.body: ; preds = %for.body.preheader, %for.body
119 %i.011 = phi i32 [ %inc, %for.body ], [ %i.011.ph, %for.body.preheader ]
120 %arrayidx = getelementptr inbounds i16, i16* %Coefs, i32 %i.011
121 %30 = load i16, i16* %arrayidx, align 2
122 %cmp1 = icmp slt i16 %30, 0
123 %31 = select i1 %cmp1, i32 %1, i32 %conv3
124 %conv4 = trunc i32 %31 to i16
125 %arrayidx5 = getelementptr inbounds i16, i16* %pOut, i32 %i.011
126 store i16 %conv4, i16* %arrayidx5, align 2
127 %inc = add i32 %i.011, 1
128 %exitcond.not = icmp eq i32 %inc, 16
129 br i1 %exitcond.not, label %for.end, label %for.body
131 for.end: ; preds = %for.body, %middle.block, %vec.epilog.middle.block, %entry
135 attributes #0 = { argmemonly nofree norecurse nosync nounwind "target-cpu"="hexagonv66" "target-features"="+hvx-length64b,+hvxv66,+v66" }