1 ; RUN: llc -march=hexagon -O3 -verify-machineinstrs -hexagon-initial-cfg-cleanup=0 -hexagon-instsimplify=0 < %s | FileCheck %s
3 ; Check that this testcase compiles successfully and that a new-value jump
5 ; CHECK: if (cmp.gtu(r{{[0-9]+}}.new,r{{[0-9]+}})) jump
7 target triple = "hexagon"
9 @g0 = external hidden unnamed_addr global [182 x i16], align 8
11 define void @fred(i16 signext %a0, i16 signext %a1) #0 {
13 %v1 = sext i16 %a0 to i32
14 %v2 = getelementptr inbounds [182 x i16], ptr @g0, i32 0, i32 %v1
15 %v3 = sext i16 %a1 to i32
16 %v4 = call i32 @llvm.hexagon.A2.asrh(i32 undef)
17 %v5 = trunc i32 %v4 to i16
18 br i1 undef, label %b6, label %b14
21 %v7 = sext i16 %v5 to i32
24 b8: ; preds = %b8, %b6
25 %v9 = phi i32 [ 128, %b6 ], [ %v13, %b8 ]
26 %v10 = sub nsw i32 %v9, %v7
27 %v11 = getelementptr inbounds [182 x i16], ptr @g0, i32 0, i32 %v10
28 %v12 = load i16, ptr %v11, align 2
29 %v13 = add nuw nsw i32 %v9, 1
33 br i1 undef, label %b16, label %b15
39 %v17 = getelementptr [182 x i16], ptr @g0, i32 0, i32 %v3
40 %v18 = icmp ugt ptr %v17, %v2
41 %v19 = or i1 %v18, undef
42 br i1 %v19, label %b20, label %b21
51 declare i32 @llvm.hexagon.A2.asrh(i32) #1
53 attributes #0 = { nounwind "target-cpu"="hexagonv62" }
54 attributes #1 = { nounwind readnone }