llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll

   1 ; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -amdgpu-spill-sgpr-to-vgpr=0 -stop-after prologepilog -verify-machineinstrs %s -o - | FileCheck -check-prefix=AFTER-PEI %s
   2
   3 ; Test that the ScavengeFI is serialized in the SIMachineFunctionInfo.
   4
   5 ; AFTER-PEI-LABEL: {{^}}name: scavenge_fi
   6 ; AFTER-PEI: machineFunctionInfo:
   7 ; AFTER-PEI-NEXT: explicitKernArgSize: 12
   8 ; AFTER-PEI-NEXT: maxKernArgAlign: 8
   9 ; AFTER-PEI-NEXT: ldsSize:         0
  10 ; AFTER-PEI-NEXT: gdsSize:         0
  11 ; AFTER-PEI-NEXT: dynLDSAlign:     1
  12 ; AFTER-PEI-NEXT: isEntryFunction: true
  13 ; AFTER-PEI-NEXT: isChainFunction: false
  14 ; AFTER-PEI-NEXT: noSignedZerosFPMath: false
  15 ; AFTER-PEI-NEXT: memoryBound:     false
  16 ; AFTER-PEI-NEXT: waveLimiter:     false
  17 ; AFTER-PEI-NEXT: hasSpilledSGPRs: true
  18 ; AFTER-PEI-NEXT: hasSpilledVGPRs: false
  19 ; AFTER-PEI-NEXT: scratchRSrcReg:  '$sgpr68_sgpr69_sgpr70_sgpr71'
  20 ; AFTER-PEI-NEXT: frameOffsetReg:  '$fp_reg'
  21 ; AFTER-PEI-NEXT: stackPtrOffsetReg: '$sgpr32'
  22 ; AFTER-PEI-NEXT: bytesInStackArgArea: 0
  23 ; AFTER-PEI-NEXT: returnsVoid: true
  24 ; AFTER-PEI-NEXT: argumentInfo:
  25 ; AFTER-PEI-NEXT:   privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }
  26 ; AFTER-PEI-NEXT:   kernargSegmentPtr: { reg: '$sgpr4_sgpr5' }
  27 ; AFTER-PEI-NEXT:   workGroupIDX:    { reg: '$sgpr6' }
  28 ; AFTER-PEI-NEXT:   privateSegmentWaveByteOffset: { reg: '$sgpr7' }
  29 ; AFTER-PEI-NEXT:   workItemIDX:     { reg: '$vgpr0' }
  30 ; AFTER-PEI-NEXT: psInputAddr:     0
  31 ; AFTER-PEI-NEXT: psInputEnable:   0
  32 ; AFTER-PEI-NEXT: maxMemoryClusterDWords:   8
  33 ; AFTER-PEI-NEXT: mode:
  34 ; AFTER-PEI-NEXT:   ieee:            true
  35 ; AFTER-PEI-NEXT:   dx10-clamp:      true
  36 ; AFTER-PEI-NEXT:   fp32-input-denormals: true
  37 ; AFTER-PEI-NEXT:   fp32-output-denormals: true
  38 ; AFTER-PEI-NEXT:   fp64-fp16-input-denormals: true
  39 ; AFTER-PEI-NEXT:   fp64-fp16-output-denormals: true
  40 ; AFTER-PEI-NEXT: highBitsOf32BitAddress: 0
  41 ; AFTER-PEI-NEXT: occupancy: 5
  42 ; AFTER-PEI-NEXT: scavengeFI: '%stack.3'
  43 ; AFTER-PEI-NEXT: vgprForAGPRCopy: ''
  44 ; AFTER-PEI-NEXT: sgprForEXECCopy: ''
  45 ; AFTER-PEI-NEXT: longBranchReservedReg: ''
  46 ; AFTER-PEI-NEXT: hasInitWholeWave: false
  47 ; AFTER-PEI-NEXT: body:
  48 define amdgpu_kernel void @scavenge_fi(ptr addrspace(1) %out, i32 %in) #0 {
  49   %wide.sgpr0 = call <32 x i32>  asm sideeffect "; def $0", "=s" () #0
  50   %wide.sgpr1 = call <32 x i32>  asm sideeffect "; def $0", "=s" () #0
  51   %wide.sgpr2 = call <32 x i32>  asm sideeffect "; def $0", "=s" () #0
  52   %wide.sgpr3 = call <32 x i32>  asm sideeffect "; def $0", "=s" () #0
  53
  54   call void asm sideeffect "; use $0", "s"(<32 x i32> %wide.sgpr0) #0
  55   call void asm sideeffect "; use $0", "s"(<32 x i32> %wide.sgpr1) #0
  56   call void asm sideeffect "; use $0", "s"(<32 x i32> %wide.sgpr2) #0
  57   call void asm sideeffect "; use $0", "s"(<32 x i32> %wide.sgpr3) #0
  58   ret void
  59 }
  60
  61 attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }