1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P5600
5 define void @sqrt_v4f32(ptr %a, ptr %c) { entry: ret void }
6 define void @sqrt_v2f64(ptr %a, ptr %c) { entry: ret void }
14 tracksRegLiveness: true
19 ; P5600-LABEL: name: sqrt_v4f32
20 ; P5600: liveins: $a0, $a1
21 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
22 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
23 ; P5600: [[LD_W:%[0-9]+]]:msa128w = LD_W [[COPY]], 0 :: (load (<4 x s32>) from %ir.a)
24 ; P5600: [[FSQRT_W:%[0-9]+]]:msa128w = FSQRT_W [[LD_W]]
25 ; P5600: ST_W [[FSQRT_W]], [[COPY1]], 0 :: (store (<4 x s32>) into %ir.c)
27 %0:gprb(p0) = COPY $a0
28 %1:gprb(p0) = COPY $a1
29 %2:fprb(<4 x s32>) = G_LOAD %0(p0) :: (load (<4 x s32>) from %ir.a)
30 %3:fprb(<4 x s32>) = G_FSQRT %2
31 G_STORE %3(<4 x s32>), %1(p0) :: (store (<4 x s32>) into %ir.c)
40 tracksRegLiveness: true
45 ; P5600-LABEL: name: sqrt_v2f64
46 ; P5600: liveins: $a0, $a1
47 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
48 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
49 ; P5600: [[LD_D:%[0-9]+]]:msa128d = LD_D [[COPY]], 0 :: (load (<2 x s64>) from %ir.a)
50 ; P5600: [[FSQRT_D:%[0-9]+]]:msa128d = FSQRT_D [[LD_D]]
51 ; P5600: ST_D [[FSQRT_D]], [[COPY1]], 0 :: (store (<2 x s64>) into %ir.c)
53 %0:gprb(p0) = COPY $a0
54 %1:gprb(p0) = COPY $a1
55 %2:fprb(<2 x s64>) = G_LOAD %0(p0) :: (load (<2 x s64>) from %ir.a)
56 %3:fprb(<2 x s64>) = G_FSQRT %2
57 G_STORE %3(<2 x s64>), %1(p0) :: (store (<2 x s64>) into %ir.c)