1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 | FileCheck %s \
3 ; RUN: -check-prefix=MIPS
4 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 | FileCheck %s \
5 ; RUN: -check-prefix=MIPS
6 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 | FileCheck %s \
7 ; RUN: -check-prefix=MIPS32R2
8 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 | FileCheck %s \
9 ; RUN: -check-prefix=MIPS32R2
10 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 | FileCheck %s \
11 ; RUN: -check-prefix=MIPS32R2
12 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 | FileCheck %s \
13 ; RUN: -check-prefix=MIPS32R6
14 ; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 | FileCheck %s \
15 ; RUN: -check-prefix=MIPS64
16 ; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 | FileCheck %s \
17 ; RUN: -check-prefix=MIPS64
18 ; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \
19 ; RUN: -check-prefix=MIPS64
20 ; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \
21 ; RUN: -check-prefix=MIPS64R2
22 ; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 | FileCheck %s \
23 ; RUN: -check-prefix=MIPS64R2
24 ; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 | FileCheck %s \
25 ; RUN: -check-prefix=MIPS64R2
26 ; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 | FileCheck %s \
27 ; RUN: -check-prefix=MIPS64R6
28 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \
29 ; RUN: -check-prefix=MM32R3
30 ; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \
31 ; RUN: -check-prefix=MM32R6
33 define signext i32 @bittest_10_i32(i32 signext %a) nounwind {
34 ; MIPS-LABEL: bittest_10_i32:
36 ; MIPS-NEXT: andi $1, $4, 1024
38 ; MIPS-NEXT: sltiu $2, $1, 1
40 ; MIPS32R2-LABEL: bittest_10_i32:
42 ; MIPS32R2-NEXT: andi $1, $4, 1024
43 ; MIPS32R2-NEXT: jr $ra
44 ; MIPS32R2-NEXT: sltiu $2, $1, 1
46 ; MIPS32R6-LABEL: bittest_10_i32:
48 ; MIPS32R6-NEXT: andi $1, $4, 1024
49 ; MIPS32R6-NEXT: jr $ra
50 ; MIPS32R6-NEXT: sltiu $2, $1, 1
52 ; MIPS64-LABEL: bittest_10_i32:
54 ; MIPS64-NEXT: andi $1, $4, 1024
55 ; MIPS64-NEXT: sltiu $1, $1, 1
57 ; MIPS64-NEXT: sll $2, $1, 0
59 ; MIPS64R2-LABEL: bittest_10_i32:
61 ; MIPS64R2-NEXT: andi $1, $4, 1024
62 ; MIPS64R2-NEXT: sltiu $1, $1, 1
63 ; MIPS64R2-NEXT: jr $ra
64 ; MIPS64R2-NEXT: sll $2, $1, 0
66 ; MIPS64R6-LABEL: bittest_10_i32:
68 ; MIPS64R6-NEXT: andi $1, $4, 1024
69 ; MIPS64R6-NEXT: sltiu $1, $1, 1
70 ; MIPS64R6-NEXT: jr $ra
71 ; MIPS64R6-NEXT: sll $2, $1, 0
73 ; MM32R3-LABEL: bittest_10_i32:
75 ; MM32R3-NEXT: andi $1, $4, 1024
77 ; MM32R3-NEXT: sltiu $2, $1, 1
79 ; MM32R6-LABEL: bittest_10_i32:
81 ; MM32R6-NEXT: andi $1, $4, 1024
82 ; MM32R6-NEXT: sltiu $2, $1, 1
83 ; MM32R6-NEXT: jrc $ra
84 %shr = lshr i32 %a, 10
85 %not = xor i32 %shr, -1
86 %and = and i32 %not, 1
90 define signext i32 @bittest_15_i32(i32 signext %a) nounwind {
91 ; MIPS-LABEL: bittest_15_i32:
93 ; MIPS-NEXT: andi $1, $4, 32768
95 ; MIPS-NEXT: sltiu $2, $1, 1
97 ; MIPS32R2-LABEL: bittest_15_i32:
99 ; MIPS32R2-NEXT: andi $1, $4, 32768
100 ; MIPS32R2-NEXT: jr $ra
101 ; MIPS32R2-NEXT: sltiu $2, $1, 1
103 ; MIPS32R6-LABEL: bittest_15_i32:
105 ; MIPS32R6-NEXT: andi $1, $4, 32768
106 ; MIPS32R6-NEXT: jr $ra
107 ; MIPS32R6-NEXT: sltiu $2, $1, 1
109 ; MIPS64-LABEL: bittest_15_i32:
111 ; MIPS64-NEXT: andi $1, $4, 32768
112 ; MIPS64-NEXT: sltiu $1, $1, 1
113 ; MIPS64-NEXT: jr $ra
114 ; MIPS64-NEXT: sll $2, $1, 0
116 ; MIPS64R2-LABEL: bittest_15_i32:
118 ; MIPS64R2-NEXT: andi $1, $4, 32768
119 ; MIPS64R2-NEXT: sltiu $1, $1, 1
120 ; MIPS64R2-NEXT: jr $ra
121 ; MIPS64R2-NEXT: sll $2, $1, 0
123 ; MIPS64R6-LABEL: bittest_15_i32:
125 ; MIPS64R6-NEXT: andi $1, $4, 32768
126 ; MIPS64R6-NEXT: sltiu $1, $1, 1
127 ; MIPS64R6-NEXT: jr $ra
128 ; MIPS64R6-NEXT: sll $2, $1, 0
130 ; MM32R3-LABEL: bittest_15_i32:
132 ; MM32R3-NEXT: andi16 $2, $4, 32768
133 ; MM32R3-NEXT: jr $ra
134 ; MM32R3-NEXT: sltiu $2, $2, 1
136 ; MM32R6-LABEL: bittest_15_i32:
138 ; MM32R6-NEXT: andi16 $2, $4, 32768
139 ; MM32R6-NEXT: sltiu $2, $2, 1
140 ; MM32R6-NEXT: jrc $ra
141 %shr = lshr i32 %a, 15
142 %not = xor i32 %shr, -1
143 %and = and i32 %not, 1
147 define signext i32 @bittest_16_i32(i32 signext %a) nounwind {
148 ; MIPS-LABEL: bittest_16_i32:
150 ; MIPS-NEXT: not $1, $4
151 ; MIPS-NEXT: srl $1, $1, 16
153 ; MIPS-NEXT: andi $2, $1, 1
155 ; MIPS32R2-LABEL: bittest_16_i32:
157 ; MIPS32R2-NEXT: not $1, $4
158 ; MIPS32R2-NEXT: jr $ra
159 ; MIPS32R2-NEXT: ext $2, $1, 16, 1
161 ; MIPS32R6-LABEL: bittest_16_i32:
163 ; MIPS32R6-NEXT: not $1, $4
164 ; MIPS32R6-NEXT: jr $ra
165 ; MIPS32R6-NEXT: ext $2, $1, 16, 1
167 ; MIPS64-LABEL: bittest_16_i32:
169 ; MIPS64-NEXT: not $1, $4
170 ; MIPS64-NEXT: srl $1, $1, 16
171 ; MIPS64-NEXT: andi $1, $1, 1
172 ; MIPS64-NEXT: jr $ra
173 ; MIPS64-NEXT: sll $2, $1, 0
175 ; MIPS64R2-LABEL: bittest_16_i32:
177 ; MIPS64R2-NEXT: not $1, $4
178 ; MIPS64R2-NEXT: ext $1, $1, 16, 1
179 ; MIPS64R2-NEXT: jr $ra
180 ; MIPS64R2-NEXT: sll $2, $1, 0
182 ; MIPS64R6-LABEL: bittest_16_i32:
184 ; MIPS64R6-NEXT: not $1, $4
185 ; MIPS64R6-NEXT: ext $1, $1, 16, 1
186 ; MIPS64R6-NEXT: jr $ra
187 ; MIPS64R6-NEXT: sll $2, $1, 0
189 ; MM32R3-LABEL: bittest_16_i32:
191 ; MM32R3-NEXT: not16 $2, $4
192 ; MM32R3-NEXT: jr $ra
193 ; MM32R3-NEXT: ext $2, $2, 16, 1
195 ; MM32R6-LABEL: bittest_16_i32:
197 ; MM32R6-NEXT: not16 $2, $4
198 ; MM32R6-NEXT: ext $2, $2, 16, 1
199 ; MM32R6-NEXT: jrc $ra
200 %shr = lshr i32 %a, 16
201 %not = xor i32 %shr, -1
202 %and = and i32 %not, 1
206 define signext i32 @bittest_31_i32(i32 signext %a) nounwind {
207 ; MIPS-LABEL: bittest_31_i32:
209 ; MIPS-NEXT: not $1, $4
211 ; MIPS-NEXT: srl $2, $1, 31
213 ; MIPS32R2-LABEL: bittest_31_i32:
215 ; MIPS32R2-NEXT: not $1, $4
216 ; MIPS32R2-NEXT: jr $ra
217 ; MIPS32R2-NEXT: srl $2, $1, 31
219 ; MIPS32R6-LABEL: bittest_31_i32:
221 ; MIPS32R6-NEXT: not $1, $4
222 ; MIPS32R6-NEXT: jr $ra
223 ; MIPS32R6-NEXT: srl $2, $1, 31
225 ; MIPS64-LABEL: bittest_31_i32:
227 ; MIPS64-NEXT: not $1, $4
228 ; MIPS64-NEXT: jr $ra
229 ; MIPS64-NEXT: srl $2, $1, 31
231 ; MIPS64R2-LABEL: bittest_31_i32:
233 ; MIPS64R2-NEXT: not $1, $4
234 ; MIPS64R2-NEXT: jr $ra
235 ; MIPS64R2-NEXT: srl $2, $1, 31
237 ; MIPS64R6-LABEL: bittest_31_i32:
239 ; MIPS64R6-NEXT: not $1, $4
240 ; MIPS64R6-NEXT: jr $ra
241 ; MIPS64R6-NEXT: srl $2, $1, 31
243 ; MM32R3-LABEL: bittest_31_i32:
245 ; MM32R3-NEXT: not16 $2, $4
246 ; MM32R3-NEXT: jr $ra
247 ; MM32R3-NEXT: srl $2, $2, 31
249 ; MM32R6-LABEL: bittest_31_i32:
251 ; MM32R6-NEXT: not16 $2, $4
252 ; MM32R6-NEXT: srl $2, $2, 31
253 ; MM32R6-NEXT: jrc $ra
254 %shr = lshr i32 %a, 31
255 %not = xor i32 %shr, -1
256 %and = and i32 %not, 1
260 define i64 @bittest_10_i64(i64 %a) nounwind {
261 ; MIPS-LABEL: bittest_10_i64:
263 ; MIPS-NEXT: andi $1, $5, 1024
264 ; MIPS-NEXT: sltiu $3, $1, 1
266 ; MIPS-NEXT: addiu $2, $zero, 0
268 ; MIPS32R2-LABEL: bittest_10_i64:
270 ; MIPS32R2-NEXT: andi $1, $5, 1024
271 ; MIPS32R2-NEXT: sltiu $3, $1, 1
272 ; MIPS32R2-NEXT: jr $ra
273 ; MIPS32R2-NEXT: addiu $2, $zero, 0
275 ; MIPS32R6-LABEL: bittest_10_i64:
277 ; MIPS32R6-NEXT: andi $1, $5, 1024
278 ; MIPS32R6-NEXT: sltiu $3, $1, 1
279 ; MIPS32R6-NEXT: jr $ra
280 ; MIPS32R6-NEXT: addiu $2, $zero, 0
282 ; MIPS64-LABEL: bittest_10_i64:
284 ; MIPS64-NEXT: andi $1, $4, 1024
285 ; MIPS64-NEXT: sltiu $1, $1, 1
286 ; MIPS64-NEXT: dsll $1, $1, 32
287 ; MIPS64-NEXT: jr $ra
288 ; MIPS64-NEXT: dsrl $2, $1, 32
290 ; MIPS64R2-LABEL: bittest_10_i64:
292 ; MIPS64R2-NEXT: andi $1, $4, 1024
293 ; MIPS64R2-NEXT: sltiu $1, $1, 1
294 ; MIPS64R2-NEXT: jr $ra
295 ; MIPS64R2-NEXT: dext $2, $1, 0, 32
297 ; MIPS64R6-LABEL: bittest_10_i64:
299 ; MIPS64R6-NEXT: andi $1, $4, 1024
300 ; MIPS64R6-NEXT: sltiu $1, $1, 1
301 ; MIPS64R6-NEXT: jr $ra
302 ; MIPS64R6-NEXT: dext $2, $1, 0, 32
304 ; MM32R3-LABEL: bittest_10_i64:
306 ; MM32R3-NEXT: andi $1, $5, 1024
307 ; MM32R3-NEXT: li16 $2, 0
308 ; MM32R3-NEXT: jr $ra
309 ; MM32R3-NEXT: sltiu $3, $1, 1
311 ; MM32R6-LABEL: bittest_10_i64:
313 ; MM32R6-NEXT: andi $1, $5, 1024
314 ; MM32R6-NEXT: sltiu $3, $1, 1
315 ; MM32R6-NEXT: li16 $2, 0
316 ; MM32R6-NEXT: jrc $ra
317 %shr = lshr i64 %a, 10
318 %not = xor i64 %shr, -1
319 %and = and i64 %not, 1
323 define i64 @bittest_15_i64(i64 %a) nounwind {
324 ; MIPS-LABEL: bittest_15_i64:
326 ; MIPS-NEXT: andi $1, $5, 32768
327 ; MIPS-NEXT: sltiu $3, $1, 1
329 ; MIPS-NEXT: addiu $2, $zero, 0
331 ; MIPS32R2-LABEL: bittest_15_i64:
333 ; MIPS32R2-NEXT: andi $1, $5, 32768
334 ; MIPS32R2-NEXT: sltiu $3, $1, 1
335 ; MIPS32R2-NEXT: jr $ra
336 ; MIPS32R2-NEXT: addiu $2, $zero, 0
338 ; MIPS32R6-LABEL: bittest_15_i64:
340 ; MIPS32R6-NEXT: andi $1, $5, 32768
341 ; MIPS32R6-NEXT: sltiu $3, $1, 1
342 ; MIPS32R6-NEXT: jr $ra
343 ; MIPS32R6-NEXT: addiu $2, $zero, 0
345 ; MIPS64-LABEL: bittest_15_i64:
347 ; MIPS64-NEXT: andi $1, $4, 32768
348 ; MIPS64-NEXT: sltiu $1, $1, 1
349 ; MIPS64-NEXT: dsll $1, $1, 32
350 ; MIPS64-NEXT: jr $ra
351 ; MIPS64-NEXT: dsrl $2, $1, 32
353 ; MIPS64R2-LABEL: bittest_15_i64:
355 ; MIPS64R2-NEXT: andi $1, $4, 32768
356 ; MIPS64R2-NEXT: sltiu $1, $1, 1
357 ; MIPS64R2-NEXT: jr $ra
358 ; MIPS64R2-NEXT: dext $2, $1, 0, 32
360 ; MIPS64R6-LABEL: bittest_15_i64:
362 ; MIPS64R6-NEXT: andi $1, $4, 32768
363 ; MIPS64R6-NEXT: sltiu $1, $1, 1
364 ; MIPS64R6-NEXT: jr $ra
365 ; MIPS64R6-NEXT: dext $2, $1, 0, 32
367 ; MM32R3-LABEL: bittest_15_i64:
369 ; MM32R3-NEXT: andi16 $2, $5, 32768
370 ; MM32R3-NEXT: sltiu $3, $2, 1
371 ; MM32R3-NEXT: li16 $2, 0
372 ; MM32R3-NEXT: jrc $ra
374 ; MM32R6-LABEL: bittest_15_i64:
376 ; MM32R6-NEXT: andi16 $2, $5, 32768
377 ; MM32R6-NEXT: sltiu $3, $2, 1
378 ; MM32R6-NEXT: li16 $2, 0
379 ; MM32R6-NEXT: jrc $ra
380 %shr = lshr i64 %a, 15
381 %not = xor i64 %shr, -1
382 %and = and i64 %not, 1
386 define i64 @bittest_16_i64(i64 %a) nounwind {
387 ; MIPS-LABEL: bittest_16_i64:
389 ; MIPS-NEXT: not $1, $5
390 ; MIPS-NEXT: srl $1, $1, 16
391 ; MIPS-NEXT: andi $3, $1, 1
393 ; MIPS-NEXT: addiu $2, $zero, 0
395 ; MIPS32R2-LABEL: bittest_16_i64:
397 ; MIPS32R2-NEXT: not $1, $5
398 ; MIPS32R2-NEXT: ext $3, $1, 16, 1
399 ; MIPS32R2-NEXT: jr $ra
400 ; MIPS32R2-NEXT: addiu $2, $zero, 0
402 ; MIPS32R6-LABEL: bittest_16_i64:
404 ; MIPS32R6-NEXT: not $1, $5
405 ; MIPS32R6-NEXT: ext $3, $1, 16, 1
406 ; MIPS32R6-NEXT: jr $ra
407 ; MIPS32R6-NEXT: addiu $2, $zero, 0
409 ; MIPS64-LABEL: bittest_16_i64:
411 ; MIPS64-NEXT: daddiu $1, $zero, -1
412 ; MIPS64-NEXT: xor $1, $4, $1
413 ; MIPS64-NEXT: dsrl $1, $1, 16
414 ; MIPS64-NEXT: jr $ra
415 ; MIPS64-NEXT: andi $2, $1, 1
417 ; MIPS64R2-LABEL: bittest_16_i64:
419 ; MIPS64R2-NEXT: daddiu $1, $zero, -1
420 ; MIPS64R2-NEXT: xor $1, $4, $1
421 ; MIPS64R2-NEXT: jr $ra
422 ; MIPS64R2-NEXT: dext $2, $1, 16, 1
424 ; MIPS64R6-LABEL: bittest_16_i64:
426 ; MIPS64R6-NEXT: daddiu $1, $zero, -1
427 ; MIPS64R6-NEXT: xor $1, $4, $1
428 ; MIPS64R6-NEXT: jr $ra
429 ; MIPS64R6-NEXT: dext $2, $1, 16, 1
431 ; MM32R3-LABEL: bittest_16_i64:
433 ; MM32R3-NEXT: not16 $2, $5
434 ; MM32R3-NEXT: ext $3, $2, 16, 1
435 ; MM32R3-NEXT: li16 $2, 0
436 ; MM32R3-NEXT: jrc $ra
438 ; MM32R6-LABEL: bittest_16_i64:
440 ; MM32R6-NEXT: not16 $2, $5
441 ; MM32R6-NEXT: ext $3, $2, 16, 1
442 ; MM32R6-NEXT: li16 $2, 0
443 ; MM32R6-NEXT: jrc $ra
444 %shr = lshr i64 %a, 16
445 %not = xor i64 %shr, -1
446 %and = and i64 %not, 1
450 define i64 @bittest_31_i64(i64 %a) nounwind {
451 ; MIPS-LABEL: bittest_31_i64:
453 ; MIPS-NEXT: not $1, $5
454 ; MIPS-NEXT: srl $3, $1, 31
456 ; MIPS-NEXT: addiu $2, $zero, 0
458 ; MIPS32R2-LABEL: bittest_31_i64:
460 ; MIPS32R2-NEXT: not $1, $5
461 ; MIPS32R2-NEXT: srl $3, $1, 31
462 ; MIPS32R2-NEXT: jr $ra
463 ; MIPS32R2-NEXT: addiu $2, $zero, 0
465 ; MIPS32R6-LABEL: bittest_31_i64:
467 ; MIPS32R6-NEXT: not $1, $5
468 ; MIPS32R6-NEXT: srl $3, $1, 31
469 ; MIPS32R6-NEXT: jr $ra
470 ; MIPS32R6-NEXT: addiu $2, $zero, 0
472 ; MIPS64-LABEL: bittest_31_i64:
474 ; MIPS64-NEXT: daddiu $1, $zero, -1
475 ; MIPS64-NEXT: xor $1, $4, $1
476 ; MIPS64-NEXT: dsrl $1, $1, 31
477 ; MIPS64-NEXT: jr $ra
478 ; MIPS64-NEXT: andi $2, $1, 1
480 ; MIPS64R2-LABEL: bittest_31_i64:
482 ; MIPS64R2-NEXT: daddiu $1, $zero, -1
483 ; MIPS64R2-NEXT: xor $1, $4, $1
484 ; MIPS64R2-NEXT: jr $ra
485 ; MIPS64R2-NEXT: dext $2, $1, 31, 1
487 ; MIPS64R6-LABEL: bittest_31_i64:
489 ; MIPS64R6-NEXT: daddiu $1, $zero, -1
490 ; MIPS64R6-NEXT: xor $1, $4, $1
491 ; MIPS64R6-NEXT: jr $ra
492 ; MIPS64R6-NEXT: dext $2, $1, 31, 1
494 ; MM32R3-LABEL: bittest_31_i64:
496 ; MM32R3-NEXT: not16 $2, $5
497 ; MM32R3-NEXT: srl $3, $2, 31
498 ; MM32R3-NEXT: li16 $2, 0
499 ; MM32R3-NEXT: jrc $ra
501 ; MM32R6-LABEL: bittest_31_i64:
503 ; MM32R6-NEXT: not16 $2, $5
504 ; MM32R6-NEXT: srl $3, $2, 31
505 ; MM32R6-NEXT: li16 $2, 0
506 ; MM32R6-NEXT: jrc $ra
507 %shr = lshr i64 %a, 31
508 %not = xor i64 %shr, -1
509 %and = and i64 %not, 1
513 define i64 @bittest_32_i64(i64 %a) nounwind {
514 ; MIPS-LABEL: bittest_32_i64:
516 ; MIPS-NEXT: not $1, $4
517 ; MIPS-NEXT: andi $3, $1, 1
519 ; MIPS-NEXT: addiu $2, $zero, 0
521 ; MIPS32R2-LABEL: bittest_32_i64:
523 ; MIPS32R2-NEXT: not $1, $4
524 ; MIPS32R2-NEXT: andi $3, $1, 1
525 ; MIPS32R2-NEXT: jr $ra
526 ; MIPS32R2-NEXT: addiu $2, $zero, 0
528 ; MIPS32R6-LABEL: bittest_32_i64:
530 ; MIPS32R6-NEXT: not $1, $4
531 ; MIPS32R6-NEXT: andi $3, $1, 1
532 ; MIPS32R6-NEXT: jr $ra
533 ; MIPS32R6-NEXT: addiu $2, $zero, 0
535 ; MIPS64-LABEL: bittest_32_i64:
537 ; MIPS64-NEXT: daddiu $1, $zero, -1
538 ; MIPS64-NEXT: xor $1, $4, $1
539 ; MIPS64-NEXT: dsrl $1, $1, 32
540 ; MIPS64-NEXT: jr $ra
541 ; MIPS64-NEXT: andi $2, $1, 1
543 ; MIPS64R2-LABEL: bittest_32_i64:
545 ; MIPS64R2-NEXT: daddiu $1, $zero, -1
546 ; MIPS64R2-NEXT: xor $1, $4, $1
547 ; MIPS64R2-NEXT: jr $ra
548 ; MIPS64R2-NEXT: dextu $2, $1, 32, 1
550 ; MIPS64R6-LABEL: bittest_32_i64:
552 ; MIPS64R6-NEXT: daddiu $1, $zero, -1
553 ; MIPS64R6-NEXT: xor $1, $4, $1
554 ; MIPS64R6-NEXT: jr $ra
555 ; MIPS64R6-NEXT: dextu $2, $1, 32, 1
557 ; MM32R3-LABEL: bittest_32_i64:
559 ; MM32R3-NEXT: not16 $2, $4
560 ; MM32R3-NEXT: andi16 $3, $2, 1
561 ; MM32R3-NEXT: li16 $2, 0
562 ; MM32R3-NEXT: jrc $ra
564 ; MM32R6-LABEL: bittest_32_i64:
566 ; MM32R6-NEXT: not16 $2, $4
567 ; MM32R6-NEXT: andi16 $3, $2, 1
568 ; MM32R6-NEXT: li16 $2, 0
569 ; MM32R6-NEXT: jrc $ra
570 %shr = lshr i64 %a, 32
571 %not = xor i64 %shr, -1
572 %and = and i64 %not, 1
576 define i64 @bittest_63_i64(i64 %a) nounwind {
577 ; MIPS-LABEL: bittest_63_i64:
579 ; MIPS-NEXT: not $1, $4
580 ; MIPS-NEXT: srl $3, $1, 31
582 ; MIPS-NEXT: addiu $2, $zero, 0
584 ; MIPS32R2-LABEL: bittest_63_i64:
586 ; MIPS32R2-NEXT: not $1, $4
587 ; MIPS32R2-NEXT: srl $3, $1, 31
588 ; MIPS32R2-NEXT: jr $ra
589 ; MIPS32R2-NEXT: addiu $2, $zero, 0
591 ; MIPS32R6-LABEL: bittest_63_i64:
593 ; MIPS32R6-NEXT: not $1, $4
594 ; MIPS32R6-NEXT: srl $3, $1, 31
595 ; MIPS32R6-NEXT: jr $ra
596 ; MIPS32R6-NEXT: addiu $2, $zero, 0
598 ; MIPS64-LABEL: bittest_63_i64:
600 ; MIPS64-NEXT: daddiu $1, $zero, -1
601 ; MIPS64-NEXT: xor $1, $4, $1
602 ; MIPS64-NEXT: jr $ra
603 ; MIPS64-NEXT: dsrl $2, $1, 63
605 ; MIPS64R2-LABEL: bittest_63_i64:
607 ; MIPS64R2-NEXT: daddiu $1, $zero, -1
608 ; MIPS64R2-NEXT: xor $1, $4, $1
609 ; MIPS64R2-NEXT: jr $ra
610 ; MIPS64R2-NEXT: dsrl $2, $1, 63
612 ; MIPS64R6-LABEL: bittest_63_i64:
614 ; MIPS64R6-NEXT: daddiu $1, $zero, -1
615 ; MIPS64R6-NEXT: xor $1, $4, $1
616 ; MIPS64R6-NEXT: jr $ra
617 ; MIPS64R6-NEXT: dsrl $2, $1, 63
619 ; MM32R3-LABEL: bittest_63_i64:
621 ; MM32R3-NEXT: not16 $2, $4
622 ; MM32R3-NEXT: srl $3, $2, 31
623 ; MM32R3-NEXT: li16 $2, 0
624 ; MM32R3-NEXT: jrc $ra
626 ; MM32R6-LABEL: bittest_63_i64:
628 ; MM32R6-NEXT: not16 $2, $4
629 ; MM32R6-NEXT: srl $3, $2, 31
630 ; MM32R6-NEXT: li16 $2, 0
631 ; MM32R6-NEXT: jrc $ra
632 %shr = lshr i64 %a, 63
633 %not = xor i64 %shr, -1
634 %and = and i64 %not, 1