1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2 ; RUN: llc -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-ibm-aix < %s | FileCheck -check-prefix=AIX64 %s
3 ; RUN: llc -verify-machineinstrs -mcpu=ppc -mtriple=powerpc-ibm-aix < %s | FileCheck -check-prefix=AIX32 %s
4 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -check-prefix=LE64 %s
6 define signext i32 @leaf1_noredzone(i32 signext %a, i32 signext %b) #0 {
7 ; AIX64-LABEL: leaf1_noredzone:
8 ; AIX64: # %bb.0: # %entry
9 ; AIX64-NEXT: stdu 1, -64(1)
10 ; AIX64-NEXT: stw 3, 60(1)
11 ; AIX64-NEXT: add 3, 3, 4
12 ; AIX64-NEXT: extsw 3, 3
13 ; AIX64-NEXT: stw 4, 56(1)
14 ; AIX64-NEXT: addi 1, 1, 64
17 ; AIX32-LABEL: leaf1_noredzone:
18 ; AIX32: # %bb.0: # %entry
19 ; AIX32-NEXT: stwu 1, -32(1)
20 ; AIX32-NEXT: stw 3, 28(1)
21 ; AIX32-NEXT: add 3, 3, 4
22 ; AIX32-NEXT: stw 4, 24(1)
23 ; AIX32-NEXT: addi 1, 1, 32
26 ; LE64-LABEL: leaf1_noredzone:
27 ; LE64: # %bb.0: # %entry
28 ; LE64-NEXT: stdu 1, -48(1)
29 ; LE64-NEXT: stw 3, 44(1)
30 ; LE64-NEXT: add 3, 3, 4
31 ; LE64-NEXT: stw 4, 40(1)
32 ; LE64-NEXT: extsw 3, 3
33 ; LE64-NEXT: addi 1, 1, 48
36 %a.addr = alloca i32, align 4
37 %b.addr = alloca i32, align 4
38 store i32 %a, ptr %a.addr, align 4
39 store i32 %b, ptr %b.addr, align 4
40 %0 = load i32, ptr %a.addr, align 4
41 %1 = load i32, ptr %b.addr, align 4
42 %add = add nsw i32 %0, %1
46 define void @nonleaf1_noredzone(i32 signext %a, i32 signext %b) #0 {
47 ; AIX64-LABEL: nonleaf1_noredzone:
48 ; AIX64: # %bb.0: # %entry
50 ; AIX64-NEXT: stdu 1, -128(1)
51 ; AIX64-NEXT: std 0, 144(1)
52 ; AIX64-NEXT: stw 3, 124(1)
53 ; AIX64-NEXT: add 3, 3, 4
54 ; AIX64-NEXT: extsw 3, 3
55 ; AIX64-NEXT: stw 4, 120(1)
56 ; AIX64-NEXT: bl .leaf2[PR]
58 ; AIX64-NEXT: lwz 3, 124(1)
59 ; AIX64-NEXT: lwz 4, 120(1)
60 ; AIX64-NEXT: sub 3, 3, 4
61 ; AIX64-NEXT: extsw 3, 3
62 ; AIX64-NEXT: bl .leaf2[PR]
64 ; AIX64-NEXT: addi 1, 1, 128
65 ; AIX64-NEXT: ld 0, 16(1)
69 ; AIX32-LABEL: nonleaf1_noredzone:
70 ; AIX32: # %bb.0: # %entry
72 ; AIX32-NEXT: stwu 1, -64(1)
73 ; AIX32-NEXT: stw 0, 72(1)
74 ; AIX32-NEXT: stw 3, 60(1)
75 ; AIX32-NEXT: add 3, 3, 4
76 ; AIX32-NEXT: stw 4, 56(1)
77 ; AIX32-NEXT: bl .leaf2[PR]
79 ; AIX32-NEXT: lwz 3, 60(1)
80 ; AIX32-NEXT: lwz 4, 56(1)
81 ; AIX32-NEXT: sub 3, 3, 4
82 ; AIX32-NEXT: bl .leaf2[PR]
84 ; AIX32-NEXT: addi 1, 1, 64
85 ; AIX32-NEXT: lwz 0, 8(1)
89 ; LE64-LABEL: nonleaf1_noredzone:
90 ; LE64: # %bb.0: # %entry
92 ; LE64-NEXT: stdu 1, -48(1)
93 ; LE64-NEXT: std 0, 64(1)
94 ; LE64-NEXT: stw 3, 44(1)
95 ; LE64-NEXT: add 3, 3, 4
96 ; LE64-NEXT: extsw 3, 3
97 ; LE64-NEXT: stw 4, 40(1)
100 ; LE64-NEXT: lwz 3, 44(1)
101 ; LE64-NEXT: lwz 4, 40(1)
102 ; LE64-NEXT: sub 3, 3, 4
103 ; LE64-NEXT: extsw 3, 3
104 ; LE64-NEXT: bl leaf2
106 ; LE64-NEXT: addi 1, 1, 48
107 ; LE64-NEXT: ld 0, 16(1)
111 %a.addr = alloca i32, align 4
112 %b.addr = alloca i32, align 4
113 store i32 %a, ptr %a.addr, align 4
114 store i32 %b, ptr %b.addr, align 4
115 %0 = load i32, ptr %a.addr, align 4
116 %1 = load i32, ptr %b.addr, align 4
117 %add = add nsw i32 %0, %1
118 call void @leaf2(i32 signext %add)
119 %2 = load i32, ptr %a.addr, align 4
120 %3 = load i32, ptr %b.addr, align 4
121 %sub = sub nsw i32 %2, %3
122 call void @leaf2(i32 signext %sub)
126 declare void @leaf2(i32 signext)
128 define signext i32 @leaf3_noredzone(i32 signext %a, i32 signext %b) #0 {
129 ; AIX64-LABEL: leaf3_noredzone:
130 ; AIX64: # %bb.0: # %entry
131 ; AIX64-NEXT: stdu 1, -48(1)
132 ; AIX64-NEXT: ld 6, 0(1)
133 ; AIX64-NEXT: mr 5, 3
134 ; AIX64-NEXT: add 3, 5, 4
135 ; AIX64-NEXT: extsw 3, 3
136 ; AIX64-NEXT: stw 5, 48(6)
137 ; AIX64-NEXT: stw 4, 52(6)
138 ; AIX64-NEXT: addi 1, 1, 48
141 ; AIX32-LABEL: leaf3_noredzone:
142 ; AIX32: # %bb.0: # %entry
143 ; AIX32-NEXT: stwu 1, -32(1)
144 ; AIX32-NEXT: lwz 6, 0(1)
145 ; AIX32-NEXT: mr 5, 3
146 ; AIX32-NEXT: add 3, 3, 4
147 ; AIX32-NEXT: stw 5, 24(6)
148 ; AIX32-NEXT: stw 4, 28(6)
149 ; AIX32-NEXT: addi 1, 1, 32
152 ; LE64-LABEL: leaf3_noredzone:
153 ; LE64: # %bb.0: # %entry
154 ; LE64-NEXT: stdu 1, -32(1)
155 ; LE64-NEXT: ld 5, 0(1)
156 ; LE64-NEXT: stw 3, 48(5)
157 ; LE64-NEXT: add 3, 3, 4
158 ; LE64-NEXT: stw 4, 52(5)
159 ; LE64-NEXT: extsw 3, 3
160 ; LE64-NEXT: addi 1, 1, 32
163 %f.addr = call ptr @llvm.frameaddress(i32 1)
164 %a.addr = getelementptr ptr, ptr %f.addr, i32 6
165 %b.addr = getelementptr i32, ptr %a.addr, i32 1
166 store i32 %a, ptr %a.addr, align 4
167 store i32 %b, ptr %b.addr, align 4
168 %0 = load i32, ptr %a.addr, align 4
169 %1 = load i32, ptr %b.addr, align 4
170 %add = add nsw i32 %0, %1
174 define void @nonleaf2_noredzone(i32 signext %a, i32 signext %b) #0 {
175 ; AIX64-LABEL: nonleaf2_noredzone:
176 ; AIX64: # %bb.0: # %entry
178 ; AIX64-NEXT: stdu 1, -128(1)
179 ; AIX64-NEXT: std 0, 144(1)
180 ; AIX64-NEXT: std 31, 120(1) # 8-byte Folded Spill
181 ; AIX64-NEXT: add 5, 3, 4
182 ; AIX64-NEXT: ld 31, 0(1)
183 ; AIX64-NEXT: extsw 5, 5
184 ; AIX64-NEXT: stw 3, 48(31)
185 ; AIX64-NEXT: mr 3, 5
186 ; AIX64-NEXT: stw 4, 52(31)
187 ; AIX64-NEXT: bl .leaf2[PR]
189 ; AIX64-NEXT: lwz 3, 48(31)
190 ; AIX64-NEXT: lwz 4, 52(31)
191 ; AIX64-NEXT: sub 3, 3, 4
192 ; AIX64-NEXT: extsw 3, 3
193 ; AIX64-NEXT: bl .leaf2[PR]
195 ; AIX64-NEXT: ld 31, 120(1) # 8-byte Folded Reload
196 ; AIX64-NEXT: addi 1, 1, 128
197 ; AIX64-NEXT: ld 0, 16(1)
201 ; AIX32-LABEL: nonleaf2_noredzone:
202 ; AIX32: # %bb.0: # %entry
204 ; AIX32-NEXT: stwu 1, -64(1)
205 ; AIX32-NEXT: stw 0, 72(1)
206 ; AIX32-NEXT: add 5, 3, 4
207 ; AIX32-NEXT: stw 31, 60(1) # 4-byte Folded Spill
208 ; AIX32-NEXT: lwz 31, 0(1)
209 ; AIX32-NEXT: stw 3, 24(31)
210 ; AIX32-NEXT: mr 3, 5
211 ; AIX32-NEXT: stw 4, 28(31)
212 ; AIX32-NEXT: bl .leaf2[PR]
214 ; AIX32-NEXT: lwz 3, 24(31)
215 ; AIX32-NEXT: lwz 4, 28(31)
216 ; AIX32-NEXT: sub 3, 3, 4
217 ; AIX32-NEXT: bl .leaf2[PR]
219 ; AIX32-NEXT: lwz 31, 60(1) # 4-byte Folded Reload
220 ; AIX32-NEXT: addi 1, 1, 64
221 ; AIX32-NEXT: lwz 0, 8(1)
225 ; LE64-LABEL: nonleaf2_noredzone:
226 ; LE64: # %bb.0: # %entry
228 ; LE64-NEXT: std 30, -16(1) # 8-byte Folded Spill
229 ; LE64-NEXT: stdu 1, -48(1)
230 ; LE64-NEXT: std 0, 64(1)
231 ; LE64-NEXT: ld 30, 0(1)
232 ; LE64-NEXT: stw 3, 48(30)
233 ; LE64-NEXT: add 3, 3, 4
234 ; LE64-NEXT: stw 4, 52(30)
235 ; LE64-NEXT: extsw 3, 3
236 ; LE64-NEXT: bl leaf2
238 ; LE64-NEXT: lwz 3, 48(30)
239 ; LE64-NEXT: lwz 4, 52(30)
240 ; LE64-NEXT: sub 3, 3, 4
241 ; LE64-NEXT: extsw 3, 3
242 ; LE64-NEXT: bl leaf2
244 ; LE64-NEXT: addi 1, 1, 48
245 ; LE64-NEXT: ld 0, 16(1)
246 ; LE64-NEXT: ld 30, -16(1) # 8-byte Folded Reload
250 %f.addr = call ptr @llvm.frameaddress(i32 1)
251 %a.addr = getelementptr ptr, ptr %f.addr, i32 6
252 %b.addr = getelementptr i32, ptr %a.addr, i32 1
253 store i32 %a, ptr %a.addr, align 4
254 store i32 %b, ptr %b.addr, align 4
255 %0 = load i32, ptr %a.addr, align 4
256 %1 = load i32, ptr %b.addr, align 4
257 %add = add nsw i32 %0, %1
258 call void @leaf2(i32 signext %add)
259 %2 = load i32, ptr %a.addr, align 4
260 %3 = load i32, ptr %b.addr, align 4
261 %sub = sub nsw i32 %2, %3
262 call void @leaf2(i32 signext %sub)
266 define signext i32 @leaf1_redzone(i32 signext %a, i32 signext %b) #1 {
267 ; AIX64-LABEL: leaf1_redzone:
268 ; AIX64: # %bb.0: # %entry
269 ; AIX64-NEXT: stw 3, -4(1)
270 ; AIX64-NEXT: add 3, 3, 4
271 ; AIX64-NEXT: extsw 3, 3
272 ; AIX64-NEXT: stw 4, -8(1)
275 ; AIX32-LABEL: leaf1_redzone:
276 ; AIX32: # %bb.0: # %entry
277 ; AIX32-NEXT: stw 3, -4(1)
278 ; AIX32-NEXT: add 3, 3, 4
279 ; AIX32-NEXT: stw 4, -8(1)
282 ; LE64-LABEL: leaf1_redzone:
283 ; LE64: # %bb.0: # %entry
284 ; LE64-NEXT: stw 3, -4(1)
285 ; LE64-NEXT: add 3, 3, 4
286 ; LE64-NEXT: stw 4, -8(1)
287 ; LE64-NEXT: extsw 3, 3
290 %a.addr = alloca i32, align 4
291 %b.addr = alloca i32, align 4
292 store i32 %a, ptr %a.addr, align 4
293 store i32 %b, ptr %b.addr, align 4
294 %0 = load i32, ptr %a.addr, align 4
295 %1 = load i32, ptr %b.addr, align 4
296 %add = add nsw i32 %0, %1
300 define void @nonleaf1_redzone(i32 signext %a, i32 signext %b) #1 {
301 ; AIX64-LABEL: nonleaf1_redzone:
302 ; AIX64: # %bb.0: # %entry
304 ; AIX64-NEXT: stdu 1, -128(1)
305 ; AIX64-NEXT: std 0, 144(1)
306 ; AIX64-NEXT: stw 3, 124(1)
307 ; AIX64-NEXT: add 3, 3, 4
308 ; AIX64-NEXT: extsw 3, 3
309 ; AIX64-NEXT: stw 4, 120(1)
310 ; AIX64-NEXT: bl .leaf2[PR]
312 ; AIX64-NEXT: lwz 3, 124(1)
313 ; AIX64-NEXT: lwz 4, 120(1)
314 ; AIX64-NEXT: sub 3, 3, 4
315 ; AIX64-NEXT: extsw 3, 3
316 ; AIX64-NEXT: bl .leaf2[PR]
318 ; AIX64-NEXT: addi 1, 1, 128
319 ; AIX64-NEXT: ld 0, 16(1)
323 ; AIX32-LABEL: nonleaf1_redzone:
324 ; AIX32: # %bb.0: # %entry
326 ; AIX32-NEXT: stwu 1, -64(1)
327 ; AIX32-NEXT: stw 0, 72(1)
328 ; AIX32-NEXT: stw 3, 60(1)
329 ; AIX32-NEXT: add 3, 3, 4
330 ; AIX32-NEXT: stw 4, 56(1)
331 ; AIX32-NEXT: bl .leaf2[PR]
333 ; AIX32-NEXT: lwz 3, 60(1)
334 ; AIX32-NEXT: lwz 4, 56(1)
335 ; AIX32-NEXT: sub 3, 3, 4
336 ; AIX32-NEXT: bl .leaf2[PR]
338 ; AIX32-NEXT: addi 1, 1, 64
339 ; AIX32-NEXT: lwz 0, 8(1)
343 ; LE64-LABEL: nonleaf1_redzone:
344 ; LE64: # %bb.0: # %entry
346 ; LE64-NEXT: stdu 1, -48(1)
347 ; LE64-NEXT: std 0, 64(1)
348 ; LE64-NEXT: stw 3, 44(1)
349 ; LE64-NEXT: add 3, 3, 4
350 ; LE64-NEXT: extsw 3, 3
351 ; LE64-NEXT: stw 4, 40(1)
352 ; LE64-NEXT: bl leaf2
354 ; LE64-NEXT: lwz 3, 44(1)
355 ; LE64-NEXT: lwz 4, 40(1)
356 ; LE64-NEXT: sub 3, 3, 4
357 ; LE64-NEXT: extsw 3, 3
358 ; LE64-NEXT: bl leaf2
360 ; LE64-NEXT: addi 1, 1, 48
361 ; LE64-NEXT: ld 0, 16(1)
365 %a.addr = alloca i32, align 4
366 %b.addr = alloca i32, align 4
367 store i32 %a, ptr %a.addr, align 4
368 store i32 %b, ptr %b.addr, align 4
369 %0 = load i32, ptr %a.addr, align 4
370 %1 = load i32, ptr %b.addr, align 4
371 %add = add nsw i32 %0, %1
372 call void @leaf2(i32 signext %add)
373 %2 = load i32, ptr %a.addr, align 4
374 %3 = load i32, ptr %b.addr, align 4
375 %sub = sub nsw i32 %2, %3
376 call void @leaf2(i32 signext %sub)
380 define signext i32 @leaf3_redzone(i32 signext %a, i32 signext %b) #1 {
381 ; AIX64-LABEL: leaf3_redzone:
382 ; AIX64: # %bb.0: # %entry
383 ; AIX64-NEXT: stdu 1, -48(1)
384 ; AIX64-NEXT: ld 6, 0(1)
385 ; AIX64-NEXT: mr 5, 3
386 ; AIX64-NEXT: add 3, 5, 4
387 ; AIX64-NEXT: extsw 3, 3
388 ; AIX64-NEXT: stw 5, 48(6)
389 ; AIX64-NEXT: stw 4, 52(6)
390 ; AIX64-NEXT: addi 1, 1, 48
393 ; AIX32-LABEL: leaf3_redzone:
394 ; AIX32: # %bb.0: # %entry
395 ; AIX32-NEXT: stwu 1, -32(1)
396 ; AIX32-NEXT: lwz 6, 0(1)
397 ; AIX32-NEXT: mr 5, 3
398 ; AIX32-NEXT: add 3, 3, 4
399 ; AIX32-NEXT: stw 5, 24(6)
400 ; AIX32-NEXT: stw 4, 28(6)
401 ; AIX32-NEXT: addi 1, 1, 32
404 ; LE64-LABEL: leaf3_redzone:
405 ; LE64: # %bb.0: # %entry
406 ; LE64-NEXT: stdu 1, -32(1)
407 ; LE64-NEXT: ld 5, 0(1)
408 ; LE64-NEXT: stw 3, 48(5)
409 ; LE64-NEXT: add 3, 3, 4
410 ; LE64-NEXT: stw 4, 52(5)
411 ; LE64-NEXT: extsw 3, 3
412 ; LE64-NEXT: addi 1, 1, 32
415 %f.addr = call ptr @llvm.frameaddress(i32 1)
416 %a.addr = getelementptr ptr, ptr %f.addr, i32 6
417 %b.addr = getelementptr i32, ptr %a.addr, i32 1
418 store i32 %a, ptr %a.addr, align 4
419 store i32 %b, ptr %b.addr, align 4
420 %0 = load i32, ptr %a.addr, align 4
421 %1 = load i32, ptr %b.addr, align 4
422 %add = add nsw i32 %0, %1
426 define void @nonleaf2_redzone(i32 signext %a, i32 signext %b) #1 {
427 ; AIX64-LABEL: nonleaf2_redzone:
428 ; AIX64: # %bb.0: # %entry
430 ; AIX64-NEXT: stdu 1, -128(1)
431 ; AIX64-NEXT: std 0, 144(1)
432 ; AIX64-NEXT: std 31, 120(1) # 8-byte Folded Spill
433 ; AIX64-NEXT: add 5, 3, 4
434 ; AIX64-NEXT: ld 31, 0(1)
435 ; AIX64-NEXT: extsw 5, 5
436 ; AIX64-NEXT: stw 3, 48(31)
437 ; AIX64-NEXT: mr 3, 5
438 ; AIX64-NEXT: stw 4, 52(31)
439 ; AIX64-NEXT: bl .leaf2[PR]
441 ; AIX64-NEXT: lwz 3, 48(31)
442 ; AIX64-NEXT: lwz 4, 52(31)
443 ; AIX64-NEXT: sub 3, 3, 4
444 ; AIX64-NEXT: extsw 3, 3
445 ; AIX64-NEXT: bl .leaf2[PR]
447 ; AIX64-NEXT: ld 31, 120(1) # 8-byte Folded Reload
448 ; AIX64-NEXT: addi 1, 1, 128
449 ; AIX64-NEXT: ld 0, 16(1)
453 ; AIX32-LABEL: nonleaf2_redzone:
454 ; AIX32: # %bb.0: # %entry
456 ; AIX32-NEXT: stwu 1, -64(1)
457 ; AIX32-NEXT: stw 0, 72(1)
458 ; AIX32-NEXT: add 5, 3, 4
459 ; AIX32-NEXT: stw 31, 60(1) # 4-byte Folded Spill
460 ; AIX32-NEXT: lwz 31, 0(1)
461 ; AIX32-NEXT: stw 3, 24(31)
462 ; AIX32-NEXT: mr 3, 5
463 ; AIX32-NEXT: stw 4, 28(31)
464 ; AIX32-NEXT: bl .leaf2[PR]
466 ; AIX32-NEXT: lwz 3, 24(31)
467 ; AIX32-NEXT: lwz 4, 28(31)
468 ; AIX32-NEXT: sub 3, 3, 4
469 ; AIX32-NEXT: bl .leaf2[PR]
471 ; AIX32-NEXT: lwz 31, 60(1) # 4-byte Folded Reload
472 ; AIX32-NEXT: addi 1, 1, 64
473 ; AIX32-NEXT: lwz 0, 8(1)
477 ; LE64-LABEL: nonleaf2_redzone:
478 ; LE64: # %bb.0: # %entry
480 ; LE64-NEXT: std 30, -16(1) # 8-byte Folded Spill
481 ; LE64-NEXT: stdu 1, -48(1)
482 ; LE64-NEXT: std 0, 64(1)
483 ; LE64-NEXT: ld 30, 0(1)
484 ; LE64-NEXT: stw 3, 48(30)
485 ; LE64-NEXT: add 3, 3, 4
486 ; LE64-NEXT: stw 4, 52(30)
487 ; LE64-NEXT: extsw 3, 3
488 ; LE64-NEXT: bl leaf2
490 ; LE64-NEXT: lwz 3, 48(30)
491 ; LE64-NEXT: lwz 4, 52(30)
492 ; LE64-NEXT: sub 3, 3, 4
493 ; LE64-NEXT: extsw 3, 3
494 ; LE64-NEXT: bl leaf2
496 ; LE64-NEXT: addi 1, 1, 48
497 ; LE64-NEXT: ld 0, 16(1)
498 ; LE64-NEXT: ld 30, -16(1) # 8-byte Folded Reload
502 %f.addr = call ptr @llvm.frameaddress(i32 1)
503 %a.addr = getelementptr ptr, ptr %f.addr, i32 6
504 %b.addr = getelementptr i32, ptr %a.addr, i32 1
505 store i32 %a, ptr %a.addr, align 4
506 store i32 %b, ptr %b.addr, align 4
507 %0 = load i32, ptr %a.addr, align 4
508 %1 = load i32, ptr %b.addr, align 4
509 %add = add nsw i32 %0, %1
510 call void @leaf2(i32 signext %add)
511 %2 = load i32, ptr %a.addr, align 4
512 %3 = load i32, ptr %b.addr, align 4
513 %sub = sub nsw i32 %2, %3
514 call void @leaf2(i32 signext %sub)
518 attributes #0 = { noredzone nounwind noinline }
519 attributes #1 = { nounwind noinline }