| blob | 47ffdb4625ed3997c3408b38c4d822d0923247c8 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
3 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
4 ; RUN: FileCheck %s --check-prefix=CHECK-LE-P8
5 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
6 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-LE-P9
8 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
9 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
10 ; RUN: FileCheck %s --check-prefix=CHECK-BE-P8
11 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
12 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
13 ; RUN: FileCheck %s --check-prefix=CHECK-BE-P9
15 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
16 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
17 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P8
18 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
19 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
20 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P9
21 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
22 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
23 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P8
24 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
25 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
26 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P9
28 define void @test_none_v8i16(ptr %a0, ptr %a1, <16 x i8> %a, <8 x i16> %b, i8 %arg) {
29 ; CHECK-LE-P8-LABEL: test_none_v8i16:
30 ; CHECK-LE-P8: # %bb.0: # %entry
31 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI0_0@toc@ha
32 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
33 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI0_0@toc@l
34 ; CHECK-LE-P8-NEXT: mtvsrd v4, r3
35 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
36 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
37 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
38 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
39 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
40 ; CHECK-LE-P8-NEXT: blr
41 ;
42 ; CHECK-LE-P9-LABEL: test_none_v8i16:
43 ; CHECK-LE-P9: # %bb.0: # %entry
44 ; CHECK-LE-P9-NEXT: lxsihzx f0, 0, r3
45 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha
46 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI0_0@toc@l
47 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
48 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
49 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
50 ; CHECK-LE-P9-NEXT: blr
51 ;
52 ; CHECK-BE-P8-LABEL: test_none_v8i16:
53 ; CHECK-BE-P8: # %bb.0: # %entry
54 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
55 ; CHECK-BE-P8-NEXT: mtvsrwz v3, r3
56 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI0_0@toc@ha
57 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI0_0@toc@l
58 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
59 ; CHECK-BE-P8-NEXT: vperm v2, v2, v3, v4
60 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
61 ; CHECK-BE-P8-NEXT: blr
62 ;
63 ; CHECK-BE-P9-LABEL: test_none_v8i16:
64 ; CHECK-BE-P9: # %bb.0: # %entry
65 ; CHECK-BE-P9-NEXT: lxsihzx f0, 0, r3
66 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha
67 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI0_0@toc@l
68 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
69 ; CHECK-BE-P9-NEXT: xxperm vs0, v2, vs1
70 ; CHECK-BE-P9-NEXT: stxv vs0, 0(r3)
71 ; CHECK-BE-P9-NEXT: blr
72 ;
73 ; CHECK-AIX-64-P8-LABEL: test_none_v8i16:
74 ; CHECK-AIX-64-P8: # %bb.0: # %entry
75 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
76 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v3, r3
77 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C0(r2) # %const.0
78 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
79 ; CHECK-AIX-64-P8-NEXT: vperm v2, v2, v3, v4
80 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
81 ; CHECK-AIX-64-P8-NEXT: blr
82 ;
83 ; CHECK-AIX-64-P9-LABEL: test_none_v8i16:
84 ; CHECK-AIX-64-P9: # %bb.0: # %entry
85 ; CHECK-AIX-64-P9-NEXT: lxsihzx f0, 0, r3
86 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C0(r2) # %const.0
87 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
88 ; CHECK-AIX-64-P9-NEXT: xxperm vs0, v2, vs1
89 ; CHECK-AIX-64-P9-NEXT: stxv vs0, 0(r3)
90 ; CHECK-AIX-64-P9-NEXT: blr
91 ;
92 ; CHECK-AIX-32-P8-LABEL: test_none_v8i16:
93 ; CHECK-AIX-32-P8: # %bb.0: # %entry
94 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
95 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v3, r3
96 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C0(r2) # %const.0
97 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
98 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
99 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
100 ; CHECK-AIX-32-P8-NEXT: blr
101 ;
102 ; CHECK-AIX-32-P9-LABEL: test_none_v8i16:
103 ; CHECK-AIX-32-P9: # %bb.0: # %entry
104 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
105 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C0(r2) # %const.0
106 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
107 ; CHECK-AIX-32-P9-NEXT: xxperm vs0, v2, vs1
108 ; CHECK-AIX-32-P9-NEXT: stxv vs0, 0(r3)
109 ; CHECK-AIX-32-P9-NEXT: blr
110 entry:
111 %load0.tmp = load <2 x i8>, ptr %a0
112 %load0.tmp1 = bitcast <2 x i8> %load0.tmp to i16
113 %load0 = insertelement <8 x i16> %b, i16 %load0.tmp1, i64 0
114 %load1.tmp = insertelement <16 x i8> %a, i8 %arg, i32 0
115 %load1 = bitcast <16 x i8> %load1.tmp to <8 x i16>
116 %shuff = shufflevector <8 x i16> %load0, <8 x i16> %load1, <8 x i32> <i32 9, i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
117 store <8 x i16> %shuff, ptr undef
118 ret void
119 }
121 define void @test_v8i16_none(ptr %a0, ptr %a1, <16 x i8> %a, <8 x i16> %b, i8 %arg) {
122 ; CHECK-LE-P8-LABEL: test_v8i16_none:
123 ; CHECK-LE-P8: # %bb.0: # %entry
124 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI1_0@toc@ha
125 ; CHECK-LE-P8-NEXT: mtvsrd v4, r9
126 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
127 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI1_0@toc@l
128 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
129 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI1_1@toc@ha
130 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI1_1@toc@l
131 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
132 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
133 ; CHECK-LE-P8-NEXT: vperm v2, v2, v4, v3
134 ; CHECK-LE-P8-NEXT: mtvsrd v4, r3
135 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
136 ; CHECK-LE-P8-NEXT: vperm v2, v2, v4, v3
137 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
138 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
139 ; CHECK-LE-P8-NEXT: blr
140 ;
141 ; CHECK-LE-P9-LABEL: test_v8i16_none:
142 ; CHECK-LE-P9: # %bb.0: # %entry
143 ; CHECK-LE-P9-NEXT: lxsihzx f0, 0, r3
144 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha
145 ; CHECK-LE-P9-NEXT: mtvsrwz v3, r9
146 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI1_0@toc@l
147 ; CHECK-LE-P9-NEXT: vinsertb v2, v3, 15
148 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
149 ; CHECK-LE-P9-NEXT: xxperm vs0, v2, vs1
150 ; CHECK-LE-P9-NEXT: stxv vs0, 0(r3)
151 ; CHECK-LE-P9-NEXT: blr
152 ;
153 ; CHECK-BE-P8-LABEL: test_v8i16_none:
154 ; CHECK-BE-P8: # %bb.0: # %entry
155 ; CHECK-BE-P8-NEXT: addis r4, r2, .LCPI1_0@toc@ha
156 ; CHECK-BE-P8-NEXT: mtvsrwz v4, r9
157 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
158 ; CHECK-BE-P8-NEXT: addi r4, r4, .LCPI1_0@toc@l
159 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r4
160 ; CHECK-BE-P8-NEXT: vperm v2, v4, v2, v3
161 ; CHECK-BE-P8-NEXT: mtvsrwz v3, r3
162 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI1_1@toc@ha
163 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI1_1@toc@l
164 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
165 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
166 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
167 ; CHECK-BE-P8-NEXT: blr
168 ;
169 ; CHECK-BE-P9-LABEL: test_v8i16_none:
170 ; CHECK-BE-P9: # %bb.0: # %entry
171 ; CHECK-BE-P9-NEXT: lxsihzx f0, 0, r3
172 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha
173 ; CHECK-BE-P9-NEXT: mtvsrwz v3, r9
174 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI1_0@toc@l
175 ; CHECK-BE-P9-NEXT: vinsertb v2, v3, 0
176 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
177 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
178 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
179 ; CHECK-BE-P9-NEXT: blr
180 ;
181 ; CHECK-AIX-64-P8-LABEL: test_v8i16_none:
182 ; CHECK-AIX-64-P8: # %bb.0: # %entry
183 ; CHECK-AIX-64-P8-NEXT: ld r4, L..C1(r2) # %const.0
184 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v4, r5
185 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
186 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r4
187 ; CHECK-AIX-64-P8-NEXT: vperm v2, v4, v2, v3
188 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v3, r3
189 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C2(r2) # %const.1
190 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
191 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
192 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
193 ; CHECK-AIX-64-P8-NEXT: blr
194 ;
195 ; CHECK-AIX-64-P9-LABEL: test_v8i16_none:
196 ; CHECK-AIX-64-P9: # %bb.0: # %entry
197 ; CHECK-AIX-64-P9-NEXT: lxsihzx f0, 0, r3
198 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C1(r2) # %const.0
199 ; CHECK-AIX-64-P9-NEXT: mtvsrwz v3, r5
200 ; CHECK-AIX-64-P9-NEXT: vinsertb v2, v3, 0
201 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
202 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
203 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
204 ; CHECK-AIX-64-P9-NEXT: blr
205 ;
206 ; CHECK-AIX-32-P8-LABEL: test_v8i16_none:
207 ; CHECK-AIX-32-P8: # %bb.0: # %entry
208 ; CHECK-AIX-32-P8-NEXT: lwz r4, L..C1(r2) # %const.0
209 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v4, r5
210 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
211 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r4
212 ; CHECK-AIX-32-P8-NEXT: vperm v2, v4, v2, v3
213 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v3, r3
214 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C2(r2) # %const.1
215 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
216 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
217 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
218 ; CHECK-AIX-32-P8-NEXT: blr
219 ;
220 ; CHECK-AIX-32-P9-LABEL: test_v8i16_none:
221 ; CHECK-AIX-32-P9: # %bb.0: # %entry
222 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
223 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C1(r2) # %const.0
224 ; CHECK-AIX-32-P9-NEXT: mtvsrwz v3, r5
225 ; CHECK-AIX-32-P9-NEXT: vinsertb v2, v3, 0
226 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
227 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
228 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
229 ; CHECK-AIX-32-P9-NEXT: blr
230 entry:
231 %load0.tmp = load <2 x i8>, ptr %a0
232 %load0.tmp1 = bitcast <2 x i8> %load0.tmp to i16
233 %load0 = insertelement <8 x i16> %b, i16 %load0.tmp1, i64 0
234 %load1.tmp = insertelement <16 x i8> %a, i8 %arg, i32 0
235 %load1 = bitcast <16 x i8> %load1.tmp to <8 x i16>
236 %shuff = shufflevector <8 x i16> %load0, <8 x i16> %load1, <8 x i32> <i32 0, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14>
237 store <8 x i16> %shuff, ptr undef
238 ret void
239 }
241 define void @test_none_v4i32(ptr %ptr, ptr %ptr2, i8 %v3) local_unnamed_addr #0 {
242 ; CHECK-LE-P8-LABEL: test_none_v4i32:
243 ; CHECK-LE-P8: # %bb.0: # %entry
244 ; CHECK-LE-P8-NEXT: mtfprd f0, r5
245 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI2_0@toc@ha
246 ; CHECK-LE-P8-NEXT: lxsiwzx v4, 0, r3
247 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI2_0@toc@l
248 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
249 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
250 ; CHECK-LE-P8-NEXT: vmrglh v2, v2, v2
251 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
252 ; CHECK-LE-P8-NEXT: vperm v2, v2, v4, v3
253 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
254 ; CHECK-LE-P8-NEXT: stfdx f0, 0, r3
255 ; CHECK-LE-P8-NEXT: blr
256 ;
257 ; CHECK-LE-P9-LABEL: test_none_v4i32:
258 ; CHECK-LE-P9: # %bb.0: # %entry
259 ; CHECK-LE-P9-NEXT: lxsiwzx v2, 0, r3
260 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI2_0@toc@ha
261 ; CHECK-LE-P9-NEXT: mtfprd f0, r5
262 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI2_0@toc@l
263 ; CHECK-LE-P9-NEXT: xxswapd v3, vs0
264 ; CHECK-LE-P9-NEXT: lxv v4, 0(r3)
265 ; CHECK-LE-P9-NEXT: vmrglh v3, v3, v3
266 ; CHECK-LE-P9-NEXT: vperm v2, v3, v2, v4
267 ; CHECK-LE-P9-NEXT: xxswapd vs0, v2
268 ; CHECK-LE-P9-NEXT: stfd f0, 0(r3)
269 ; CHECK-LE-P9-NEXT: blr
270 ;
271 ; CHECK-BE-P8-LABEL: test_none_v4i32:
272 ; CHECK-BE-P8: # %bb.0: # %entry
273 ; CHECK-BE-P8-NEXT: sldi r4, r5, 56
274 ; CHECK-BE-P8-NEXT: lxsiwzx v3, 0, r3
275 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI2_0@toc@ha
276 ; CHECK-BE-P8-NEXT: mtvsrd v2, r4
277 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI2_0@toc@l
278 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
279 ; CHECK-BE-P8-NEXT: vmrghh v2, v2, v2
280 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
281 ; CHECK-BE-P8-NEXT: stxsdx v2, 0, r3
282 ; CHECK-BE-P8-NEXT: blr
283 ;
284 ; CHECK-BE-P9-LABEL: test_none_v4i32:
285 ; CHECK-BE-P9: # %bb.0: # %entry
286 ; CHECK-BE-P9-NEXT: lxsiwzx v2, 0, r3
287 ; CHECK-BE-P9-NEXT: sldi r3, r5, 56
288 ; CHECK-BE-P9-NEXT: mtvsrd v3, r3
289 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI2_0@toc@ha
290 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI2_0@toc@l
291 ; CHECK-BE-P9-NEXT: vmrghh v3, v3, v3
292 ; CHECK-BE-P9-NEXT: lxv v4, 0(r3)
293 ; CHECK-BE-P9-NEXT: vperm v2, v2, v3, v4
294 ; CHECK-BE-P9-NEXT: stxsd v2, 0(r3)
295 ; CHECK-BE-P9-NEXT: blr
296 ;
297 ; CHECK-AIX-64-P8-LABEL: test_none_v4i32:
298 ; CHECK-AIX-64-P8: # %bb.0: # %entry
299 ; CHECK-AIX-64-P8-NEXT: sldi r4, r5, 56
300 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v3, 0, r3
301 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C3(r2) # %const.0
302 ; CHECK-AIX-64-P8-NEXT: mtvsrd v2, r4
303 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
304 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v2, v2
305 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
306 ; CHECK-AIX-64-P8-NEXT: stxsdx v2, 0, r3
307 ; CHECK-AIX-64-P8-NEXT: blr
308 ;
309 ; CHECK-AIX-64-P9-LABEL: test_none_v4i32:
310 ; CHECK-AIX-64-P9: # %bb.0: # %entry
311 ; CHECK-AIX-64-P9-NEXT: lxsiwzx v2, 0, r3
312 ; CHECK-AIX-64-P9-NEXT: sldi r3, r5, 56
313 ; CHECK-AIX-64-P9-NEXT: mtvsrd v3, r3
314 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C2(r2) # %const.0
315 ; CHECK-AIX-64-P9-NEXT: vmrghh v3, v3, v3
316 ; CHECK-AIX-64-P9-NEXT: lxv v4, 0(r3)
317 ; CHECK-AIX-64-P9-NEXT: vperm v2, v2, v3, v4
318 ; CHECK-AIX-64-P9-NEXT: stxsd v2, 0(r3)
319 ; CHECK-AIX-64-P9-NEXT: blr
320 ;
321 ; CHECK-AIX-32-P8-LABEL: test_none_v4i32:
322 ; CHECK-AIX-32-P8: # %bb.0: # %entry
323 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
324 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -32
325 ; CHECK-AIX-32-P8-NEXT: stb r5, -32(r1)
326 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
327 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C3(r2) # %const.0
328 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
329 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -16
330 ; CHECK-AIX-32-P8-NEXT: vmrghh v3, v3, v3
331 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
332 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
333 ; CHECK-AIX-32-P8-NEXT: lwz r3, -12(r1)
334 ; CHECK-AIX-32-P8-NEXT: stw r3, 0(r3)
335 ; CHECK-AIX-32-P8-NEXT: lwz r3, -16(r1)
336 ; CHECK-AIX-32-P8-NEXT: stw r3, 0(r3)
337 ; CHECK-AIX-32-P8-NEXT: blr
338 ;
339 ; CHECK-AIX-32-P9-LABEL: test_none_v4i32:
340 ; CHECK-AIX-32-P9: # %bb.0: # %entry
341 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
342 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C2(r2) # %const.0
343 ; CHECK-AIX-32-P9-NEXT: stb r5, -32(r1)
344 ; CHECK-AIX-32-P9-NEXT: lxv v3, -32(r1)
345 ; CHECK-AIX-32-P9-NEXT: lxv v4, 0(r3)
346 ; CHECK-AIX-32-P9-NEXT: vmrghh v3, v3, v3
347 ; CHECK-AIX-32-P9-NEXT: vperm v2, v2, v3, v4
348 ; CHECK-AIX-32-P9-NEXT: stxv v2, -16(r1)
349 ; CHECK-AIX-32-P9-NEXT: lwz r3, -12(r1)
350 ; CHECK-AIX-32-P9-NEXT: stw r3, 0(r3)
351 ; CHECK-AIX-32-P9-NEXT: lwz r3, -16(r1)
352 ; CHECK-AIX-32-P9-NEXT: stw r3, 0(r3)
353 ; CHECK-AIX-32-P9-NEXT: blr
354 entry:
355 %0 = load <2 x i16>, ptr %ptr, align 4
356 %tmp = insertelement <4 x i8> undef, i8 %v3, i32 0
357 %tmp0 = bitcast <4 x i8> %tmp to <2 x i16>
358 %1 = shufflevector <2 x i16> %0, <2 x i16> %tmp0, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
359 store <4 x i16> %1, ptr undef, align 4
360 ret void
361 }
363 define void @test_v4i32_none(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
364 ; CHECK-LE-P8-LABEL: test_v4i32_none:
365 ; CHECK-LE-P8: # %bb.0: # %entry
366 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI3_0@toc@ha
367 ; CHECK-LE-P8-NEXT: lxsiwzx v3, 0, r3
368 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
369 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI3_0@toc@l
370 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
371 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
372 ; CHECK-LE-P8-NEXT: vperm v2, v4, v3, v2
373 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
374 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
375 ; CHECK-LE-P8-NEXT: blr
376 ;
377 ; CHECK-LE-P9-LABEL: test_v4i32_none:
378 ; CHECK-LE-P9: # %bb.0: # %entry
379 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r3
380 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha
381 ; CHECK-LE-P9-NEXT: xxlxor vs2, vs2, vs2
382 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI3_0@toc@l
383 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
384 ; CHECK-LE-P9-NEXT: xxperm vs0, vs2, vs1
385 ; CHECK-LE-P9-NEXT: stxv vs0, 0(r3)
386 ; CHECK-LE-P9-NEXT: blr
387 ;
388 ; CHECK-BE-P8-LABEL: test_v4i32_none:
389 ; CHECK-BE-P8: # %bb.0: # %entry
390 ; CHECK-BE-P8-NEXT: lxsiwzx v2, 0, r3
391 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI3_0@toc@ha
392 ; CHECK-BE-P8-NEXT: xxlxor v4, v4, v4
393 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI3_0@toc@l
394 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r3
395 ; CHECK-BE-P8-NEXT: vperm v2, v4, v2, v3
396 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
397 ; CHECK-BE-P8-NEXT: blr
398 ;
399 ; CHECK-BE-P9-LABEL: test_v4i32_none:
400 ; CHECK-BE-P9: # %bb.0: # %entry
401 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r3
402 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha
403 ; CHECK-BE-P9-NEXT: xxlxor vs2, vs2, vs2
404 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI3_0@toc@l
405 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
406 ; CHECK-BE-P9-NEXT: xxperm vs0, vs2, vs1
407 ; CHECK-BE-P9-NEXT: stxv vs0, 0(r3)
408 ; CHECK-BE-P9-NEXT: blr
409 ;
410 ; CHECK-AIX-64-P8-LABEL: test_v4i32_none:
411 ; CHECK-AIX-64-P8: # %bb.0: # %entry
412 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v2, 0, r3
413 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C4(r2) # %const.0
414 ; CHECK-AIX-64-P8-NEXT: xxlxor v4, v4, v4
415 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r3
416 ; CHECK-AIX-64-P8-NEXT: vperm v2, v4, v2, v3
417 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
418 ; CHECK-AIX-64-P8-NEXT: blr
419 ;
420 ; CHECK-AIX-64-P9-LABEL: test_v4i32_none:
421 ; CHECK-AIX-64-P9: # %bb.0: # %entry
422 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r3
423 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C3(r2) # %const.0
424 ; CHECK-AIX-64-P9-NEXT: xxlxor vs2, vs2, vs2
425 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
426 ; CHECK-AIX-64-P9-NEXT: xxperm vs0, vs2, vs1
427 ; CHECK-AIX-64-P9-NEXT: stxv vs0, 0(r3)
428 ; CHECK-AIX-64-P9-NEXT: blr
429 ;
430 ; CHECK-AIX-32-P8-LABEL: test_v4i32_none:
431 ; CHECK-AIX-32-P8: # %bb.0: # %entry
432 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
433 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C4(r2) # %const.0
434 ; CHECK-AIX-32-P8-NEXT: xxlxor v4, v4, v4
435 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
436 ; CHECK-AIX-32-P8-NEXT: vperm v2, v4, v2, v3
437 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
438 ; CHECK-AIX-32-P8-NEXT: blr
439 ;
440 ; CHECK-AIX-32-P9-LABEL: test_v4i32_none:
441 ; CHECK-AIX-32-P9: # %bb.0: # %entry
442 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r3
443 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C3(r2) # %const.0
444 ; CHECK-AIX-32-P9-NEXT: xxlxor vs2, vs2, vs2
445 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
446 ; CHECK-AIX-32-P9-NEXT: xxperm vs0, vs2, vs1
447 ; CHECK-AIX-32-P9-NEXT: stxv vs0, 0(r3)
448 ; CHECK-AIX-32-P9-NEXT: blr
449 entry:
450 %0 = load <2 x i16>, ptr %ptr1, align 1
451 %1 = load <2 x i16>, ptr %ptr2, align 1
452 %shuffle1 = shufflevector <2 x i16> %0, <2 x i16> %1, <4 x i32> <i32 1, i32 0, i32 1, i32 0>
453 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
454 store <4 x i32> %2, ptr undef, align 16
455 ret void
456 }
458 define void @test_none_v2i64(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
459 ; CHECK-LE-P8-LABEL: test_none_v2i64:
460 ; CHECK-LE-P8: # %bb.0: # %entry
461 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI4_0@toc@ha
462 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r3
463 ; CHECK-LE-P8-NEXT: addis r3, r2, .LCPI4_1@toc@ha
464 ; CHECK-LE-P8-NEXT: lxvd2x v4, 0, r4
465 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI4_0@toc@l
466 ; CHECK-LE-P8-NEXT: addi r3, r3, .LCPI4_1@toc@l
467 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
468 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
469 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r3
470 ; CHECK-LE-P8-NEXT: vperm v2, v3, v4, v2
471 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
472 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
473 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
474 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
475 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
476 ; CHECK-LE-P8-NEXT: blr
477 ;
478 ; CHECK-LE-P9-LABEL: test_none_v2i64:
479 ; CHECK-LE-P9: # %bb.0: # %entry
480 ; CHECK-LE-P9-NEXT: lfd f0, 0(r3)
481 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
482 ; CHECK-LE-P9-NEXT: lxv v2, 0(r4)
483 ; CHECK-LE-P9-NEXT: xxlxor v4, v4, v4
484 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
485 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
486 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI4_1@toc@ha
487 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI4_1@toc@l
488 ; CHECK-LE-P9-NEXT: lxv v3, 0(r3)
489 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
490 ; CHECK-LE-P9-NEXT: vperm v2, v4, v2, v3
491 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
492 ; CHECK-LE-P9-NEXT: blr
493 ;
494 ; CHECK-BE-P8-LABEL: test_none_v2i64:
495 ; CHECK-BE-P8: # %bb.0: # %entry
496 ; CHECK-BE-P8-NEXT: lxsdx v2, 0, r3
497 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI4_0@toc@ha
498 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r4
499 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI4_0@toc@l
500 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
501 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
502 ; CHECK-BE-P8-NEXT: xxlxor v3, v3, v3
503 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
504 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
505 ; CHECK-BE-P8-NEXT: blr
506 ;
507 ; CHECK-BE-P9-LABEL: test_none_v2i64:
508 ; CHECK-BE-P9: # %bb.0: # %entry
509 ; CHECK-BE-P9-NEXT: lxsd v2, 0(r3)
510 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
511 ; CHECK-BE-P9-NEXT: lxv vs0, 0(r4)
512 ; CHECK-BE-P9-NEXT: xxlxor v3, v3, v3
513 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
514 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
515 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
516 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
517 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
518 ; CHECK-BE-P9-NEXT: blr
519 ;
520 ; CHECK-AIX-64-P8-LABEL: test_none_v2i64:
521 ; CHECK-AIX-64-P8: # %bb.0: # %entry
522 ; CHECK-AIX-64-P8-NEXT: lxsdx v2, 0, r3
523 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C5(r2) # %const.0
524 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r4
525 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
526 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
527 ; CHECK-AIX-64-P8-NEXT: xxlxor v3, v3, v3
528 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
529 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
530 ; CHECK-AIX-64-P8-NEXT: blr
531 ;
532 ; CHECK-AIX-64-P9-LABEL: test_none_v2i64:
533 ; CHECK-AIX-64-P9: # %bb.0: # %entry
534 ; CHECK-AIX-64-P9-NEXT: lxsd v2, 0(r3)
535 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C4(r2) # %const.0
536 ; CHECK-AIX-64-P9-NEXT: lxv vs0, 0(r4)
537 ; CHECK-AIX-64-P9-NEXT: xxlxor v3, v3, v3
538 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
539 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
540 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
541 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
542 ; CHECK-AIX-64-P9-NEXT: blr
543 ;
544 ; CHECK-AIX-32-P8-LABEL: test_none_v2i64:
545 ; CHECK-AIX-32-P8: # %bb.0: # %entry
546 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
547 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C5(r2) # %const.0
548 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r4
549 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
550 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
551 ; CHECK-AIX-32-P8-NEXT: xxlxor v3, v3, v3
552 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
553 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
554 ; CHECK-AIX-32-P8-NEXT: blr
555 ;
556 ; CHECK-AIX-32-P9-LABEL: test_none_v2i64:
557 ; CHECK-AIX-32-P9: # %bb.0: # %entry
558 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
559 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C4(r2) # %const.0
560 ; CHECK-AIX-32-P9-NEXT: lxv vs0, 0(r4)
561 ; CHECK-AIX-32-P9-NEXT: xxlxor v3, v3, v3
562 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
563 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
564 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
565 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
566 ; CHECK-AIX-32-P9-NEXT: blr
567 entry:
568 %0 = load <4 x i16>, ptr %ptr1, align 1
569 %1 = load <4 x i32>, ptr %ptr2, align 1
570 %bc = trunc <4 x i32> %1 to <4 x i16>
571 %shuffle1 = shufflevector <4 x i16> %0, <4 x i16> %bc, <4 x i32> <i32 4, i32 5, i32 1, i32 0>
572 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
573 store <4 x i32> %2, ptr undef, align 16
574 ret void
575 }
577 define void @test_v2i64_none(ptr nocapture readonly %ptr1) {
578 ; CHECK-LE-P8-LABEL: test_v2i64_none:
579 ; CHECK-LE-P8: # %bb.0: # %entry
580 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI5_0@toc@ha
581 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r3
582 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
583 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI5_0@toc@l
584 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
585 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
586 ; CHECK-LE-P8-NEXT: vperm v2, v4, v3, v2
587 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
588 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
589 ; CHECK-LE-P8-NEXT: blr
590 ;
591 ; CHECK-LE-P9-LABEL: test_v2i64_none:
592 ; CHECK-LE-P9: # %bb.0: # %entry
593 ; CHECK-LE-P9-NEXT: lfd f0, 0(r3)
594 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha
595 ; CHECK-LE-P9-NEXT: xxlxor vs2, vs2, vs2
596 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l
597 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
598 ; CHECK-LE-P9-NEXT: xxperm vs0, vs2, vs1
599 ; CHECK-LE-P9-NEXT: stxv vs0, 0(r3)
600 ; CHECK-LE-P9-NEXT: blr
601 ;
602 ; CHECK-BE-P8-LABEL: test_v2i64_none:
603 ; CHECK-BE-P8: # %bb.0: # %entry
604 ; CHECK-BE-P8-NEXT: lxsdx v2, 0, r3
605 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI5_0@toc@ha
606 ; CHECK-BE-P8-NEXT: xxlxor v4, v4, v4
607 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI5_0@toc@l
608 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r3
609 ; CHECK-BE-P8-NEXT: vperm v2, v4, v2, v3
610 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
611 ; CHECK-BE-P8-NEXT: blr
612 ;
613 ; CHECK-BE-P9-LABEL: test_v2i64_none:
614 ; CHECK-BE-P9: # %bb.0: # %entry
615 ; CHECK-BE-P9-NEXT: lfd f0, 0(r3)
616 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha
617 ; CHECK-BE-P9-NEXT: xxlxor vs2, vs2, vs2
618 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l
619 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
620 ; CHECK-BE-P9-NEXT: xxperm vs0, vs2, vs1
621 ; CHECK-BE-P9-NEXT: stxv vs0, 0(r3)
622 ; CHECK-BE-P9-NEXT: blr
623 ;
624 ; CHECK-AIX-64-P8-LABEL: test_v2i64_none:
625 ; CHECK-AIX-64-P8: # %bb.0: # %entry
626 ; CHECK-AIX-64-P8-NEXT: lxsdx v2, 0, r3
627 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C6(r2) # %const.0
628 ; CHECK-AIX-64-P8-NEXT: xxlxor v4, v4, v4
629 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r3
630 ; CHECK-AIX-64-P8-NEXT: vperm v2, v4, v2, v3
631 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
632 ; CHECK-AIX-64-P8-NEXT: blr
633 ;
634 ; CHECK-AIX-64-P9-LABEL: test_v2i64_none:
635 ; CHECK-AIX-64-P9: # %bb.0: # %entry
636 ; CHECK-AIX-64-P9-NEXT: lfd f0, 0(r3)
637 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C5(r2) # %const.0
638 ; CHECK-AIX-64-P9-NEXT: xxlxor vs2, vs2, vs2
639 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
640 ; CHECK-AIX-64-P9-NEXT: xxperm vs0, vs2, vs1
641 ; CHECK-AIX-64-P9-NEXT: stxv vs0, 0(r3)
642 ; CHECK-AIX-64-P9-NEXT: blr
643 ;
644 ; CHECK-AIX-32-P8-LABEL: test_v2i64_none:
645 ; CHECK-AIX-32-P8: # %bb.0: # %entry
646 ; CHECK-AIX-32-P8-NEXT: li r4, 4
647 ; CHECK-AIX-32-P8-NEXT: lfiwzx f1, 0, r3
648 ; CHECK-AIX-32-P8-NEXT: xxlxor v4, v4, v4
649 ; CHECK-AIX-32-P8-NEXT: lfiwzx f0, r3, r4
650 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C6(r2) # %const.0
651 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
652 ; CHECK-AIX-32-P8-NEXT: xxspltw vs1, vs1, 1
653 ; CHECK-AIX-32-P8-NEXT: xxspltw vs0, vs0, 1
654 ; CHECK-AIX-32-P8-NEXT: xxmrghw v2, vs1, vs0
655 ; CHECK-AIX-32-P8-NEXT: vperm v2, v4, v2, v3
656 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
657 ; CHECK-AIX-32-P8-NEXT: blr
658 ;
659 ; CHECK-AIX-32-P9-LABEL: test_v2i64_none:
660 ; CHECK-AIX-32-P9: # %bb.0: # %entry
661 ; CHECK-AIX-32-P9-NEXT: li r4, 4
662 ; CHECK-AIX-32-P9-NEXT: lxvwsx vs1, 0, r3
663 ; CHECK-AIX-32-P9-NEXT: xxlxor vs2, vs2, vs2
664 ; CHECK-AIX-32-P9-NEXT: lxvwsx vs0, r3, r4
665 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C5(r2) # %const.0
666 ; CHECK-AIX-32-P9-NEXT: xxmrghw vs0, vs1, vs0
667 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
668 ; CHECK-AIX-32-P9-NEXT: xxperm vs0, vs2, vs1
669 ; CHECK-AIX-32-P9-NEXT: stxv vs0, 0(r3)
670 ; CHECK-AIX-32-P9-NEXT: blr
671 entry:
672 %0 = load <4 x i16>, ptr %ptr1, align 1
673 %shuffle1 = shufflevector <4 x i16> %0, <4 x i16> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
674 %1 = zext <4 x i16> %shuffle1 to <4 x i32>
675 store <4 x i32> %1, ptr undef, align 16
676 ret void
677 }
679 define <16 x i8> @test_v8i16_v8i16(ptr %a, ptr %b) {
680 ; CHECK-LE-P8-LABEL: test_v8i16_v8i16:
681 ; CHECK-LE-P8: # %bb.0: # %entry
682 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
683 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
684 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI6_0@toc@l
685 ; CHECK-LE-P8-NEXT: mtvsrd v3, r3
686 ; CHECK-LE-P8-NEXT: lhz r3, 0(r4)
687 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
688 ; CHECK-LE-P8-NEXT: mtvsrd v4, r3
689 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
690 ; CHECK-LE-P8-NEXT: vperm v2, v4, v3, v2
691 ; CHECK-LE-P8-NEXT: blr
692 ;
693 ; CHECK-LE-P9-LABEL: test_v8i16_v8i16:
694 ; CHECK-LE-P9: # %bb.0: # %entry
695 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
696 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI6_0@toc@ha
697 ; CHECK-LE-P9-NEXT: lxsihzx f0, 0, r4
698 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI6_0@toc@l
699 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
700 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
701 ; CHECK-LE-P9-NEXT: blr
702 ;
703 ; CHECK-BE-P8-LABEL: test_v8i16_v8i16:
704 ; CHECK-BE-P8: # %bb.0: # %entry
705 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
706 ; CHECK-BE-P8-NEXT: mtvsrwz v2, r3
707 ; CHECK-BE-P8-NEXT: lhz r3, 0(r4)
708 ; CHECK-BE-P8-NEXT: mtvsrwz v3, r3
709 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI6_0@toc@ha
710 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI6_0@toc@l
711 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
712 ; CHECK-BE-P8-NEXT: vperm v2, v2, v3, v4
713 ; CHECK-BE-P8-NEXT: blr
714 ;
715 ; CHECK-BE-P9-LABEL: test_v8i16_v8i16:
716 ; CHECK-BE-P9: # %bb.0: # %entry
717 ; CHECK-BE-P9-NEXT: lxsihzx f0, 0, r3
718 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI6_0@toc@ha
719 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r4
720 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI6_0@toc@l
721 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
722 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
723 ; CHECK-BE-P9-NEXT: blr
724 ;
725 ; CHECK-AIX-64-P8-LABEL: test_v8i16_v8i16:
726 ; CHECK-AIX-64-P8: # %bb.0: # %entry
727 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
728 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v2, r3
729 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r4)
730 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v3, r3
731 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C7(r2) # %const.0
732 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
733 ; CHECK-AIX-64-P8-NEXT: vperm v2, v2, v3, v4
734 ; CHECK-AIX-64-P8-NEXT: blr
735 ;
736 ; CHECK-AIX-64-P9-LABEL: test_v8i16_v8i16:
737 ; CHECK-AIX-64-P9: # %bb.0: # %entry
738 ; CHECK-AIX-64-P9-NEXT: lxsihzx f0, 0, r3
739 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C6(r2) # %const.0
740 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r4
741 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
742 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
743 ; CHECK-AIX-64-P9-NEXT: blr
744 ;
745 ; CHECK-AIX-32-P8-LABEL: test_v8i16_v8i16:
746 ; CHECK-AIX-32-P8: # %bb.0: # %entry
747 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
748 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v2, r3
749 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r4)
750 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v3, r3
751 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C7(r2) # %const.0
752 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
753 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
754 ; CHECK-AIX-32-P8-NEXT: blr
755 ;
756 ; CHECK-AIX-32-P9-LABEL: test_v8i16_v8i16:
757 ; CHECK-AIX-32-P9: # %bb.0: # %entry
758 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
759 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C6(r2) # %const.0
760 ; CHECK-AIX-32-P9-NEXT: lxsihzx v2, 0, r4
761 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
762 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
763 ; CHECK-AIX-32-P9-NEXT: blr
764 entry:
765 %load1 = load <2 x i8>, ptr %a
766 %load2 = load <2 x i8>, ptr %b
767 %shuffle1 = shufflevector <2 x i8> %load1, <2 x i8> %load2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
768 %shuffle2 = shufflevector <8 x i8> %shuffle1, <8 x i8> %shuffle1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
769 ret <16 x i8> %shuffle2
770 }
772 define <16 x i8> @test_v8i16_v4i32(ptr %a, ptr %b) local_unnamed_addr {
773 ; CHECK-LE-P8-LABEL: test_v8i16_v4i32:
774 ; CHECK-LE-P8: # %bb.0: # %entry
775 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
776 ; CHECK-LE-P8-NEXT: lxsiwzx v3, 0, r4
777 ; CHECK-LE-P8-NEXT: mtvsrd v2, r3
778 ; CHECK-LE-P8-NEXT: vmrghh v2, v3, v2
779 ; CHECK-LE-P8-NEXT: blr
780 ;
781 ; CHECK-LE-P9-LABEL: test_v8i16_v4i32:
782 ; CHECK-LE-P9: # %bb.0: # %entry
783 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
784 ; CHECK-LE-P9-NEXT: lxsiwzx v3, 0, r4
785 ; CHECK-LE-P9-NEXT: vmrghh v2, v3, v2
786 ; CHECK-LE-P9-NEXT: blr
787 ;
788 ; CHECK-BE-P8-LABEL: test_v8i16_v4i32:
789 ; CHECK-BE-P8: # %bb.0: # %entry
790 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
791 ; CHECK-BE-P8-NEXT: lxsiwzx v3, 0, r4
792 ; CHECK-BE-P8-NEXT: mtvsrwz v2, r3
793 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI7_0@toc@ha
794 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI7_0@toc@l
795 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
796 ; CHECK-BE-P8-NEXT: vperm v2, v2, v3, v4
797 ; CHECK-BE-P8-NEXT: blr
798 ;
799 ; CHECK-BE-P9-LABEL: test_v8i16_v4i32:
800 ; CHECK-BE-P9: # %bb.0: # %entry
801 ; CHECK-BE-P9-NEXT: lxsihzx f0, 0, r3
802 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI7_0@toc@ha
803 ; CHECK-BE-P9-NEXT: lxsiwzx v2, 0, r4
804 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI7_0@toc@l
805 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
806 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
807 ; CHECK-BE-P9-NEXT: blr
808 ;
809 ; CHECK-AIX-64-P8-LABEL: test_v8i16_v4i32:
810 ; CHECK-AIX-64-P8: # %bb.0: # %entry
811 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
812 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v3, 0, r4
813 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v2, r3
814 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C8(r2) # %const.0
815 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
816 ; CHECK-AIX-64-P8-NEXT: vperm v2, v2, v3, v4
817 ; CHECK-AIX-64-P8-NEXT: blr
818 ;
819 ; CHECK-AIX-64-P9-LABEL: test_v8i16_v4i32:
820 ; CHECK-AIX-64-P9: # %bb.0: # %entry
821 ; CHECK-AIX-64-P9-NEXT: lxsihzx f0, 0, r3
822 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C7(r2) # %const.0
823 ; CHECK-AIX-64-P9-NEXT: lxsiwzx v2, 0, r4
824 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
825 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
826 ; CHECK-AIX-64-P9-NEXT: blr
827 ;
828 ; CHECK-AIX-32-P8-LABEL: test_v8i16_v4i32:
829 ; CHECK-AIX-32-P8: # %bb.0: # %entry
830 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
831 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
832 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v2, r3
833 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C8(r2) # %const.0
834 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
835 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
836 ; CHECK-AIX-32-P8-NEXT: blr
837 ;
838 ; CHECK-AIX-32-P9-LABEL: test_v8i16_v4i32:
839 ; CHECK-AIX-32-P9: # %bb.0: # %entry
840 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
841 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C7(r2) # %const.0
842 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r4
843 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
844 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
845 ; CHECK-AIX-32-P9-NEXT: blr
846 entry:
847 %0 = load <2 x i8>, ptr %a
848 %bc1 = bitcast <2 x i8> %0 to i16
849 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
850 %1 = load <2 x i8>, ptr %b, align 4
851 %bc2 = bitcast <2 x i8> %1 to i16
852 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
853 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
854 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
855 %shuffle = shufflevector <16 x i8> %2, <16 x i8> %3, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
856 ret <16 x i8> %shuffle
857 }
859 define <16 x i8> @test_v8i16_v2i64(ptr %a, ptr %b) local_unnamed_addr {
860 ; CHECK-LE-P8-LABEL: test_v8i16_v2i64:
861 ; CHECK-LE-P8: # %bb.0: # %entry
862 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
863 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r4
864 ; CHECK-LE-P8-NEXT: mtvsrd v2, r3
865 ; CHECK-LE-P8-NEXT: vmrghh v2, v3, v2
866 ; CHECK-LE-P8-NEXT: blr
867 ;
868 ; CHECK-LE-P9-LABEL: test_v8i16_v2i64:
869 ; CHECK-LE-P9: # %bb.0: # %entry
870 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
871 ; CHECK-LE-P9-NEXT: lxsd v3, 0(r4)
872 ; CHECK-LE-P9-NEXT: vmrghh v2, v3, v2
873 ; CHECK-LE-P9-NEXT: blr
874 ;
875 ; CHECK-BE-P8-LABEL: test_v8i16_v2i64:
876 ; CHECK-BE-P8: # %bb.0: # %entry
877 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
878 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
879 ; CHECK-BE-P8-NEXT: sldi r3, r3, 48
880 ; CHECK-BE-P8-NEXT: mtvsrd v2, r3
881 ; CHECK-BE-P8-NEXT: vmrghh v2, v2, v3
882 ; CHECK-BE-P8-NEXT: blr
883 ;
884 ; CHECK-BE-P9-LABEL: test_v8i16_v2i64:
885 ; CHECK-BE-P9: # %bb.0: # %entry
886 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r3
887 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
888 ; CHECK-BE-P9-NEXT: vsplth v2, v2, 3
889 ; CHECK-BE-P9-NEXT: vmrghh v2, v2, v3
890 ; CHECK-BE-P9-NEXT: blr
891 ;
892 ; CHECK-AIX-64-P8-LABEL: test_v8i16_v2i64:
893 ; CHECK-AIX-64-P8: # %bb.0: # %entry
894 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
895 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
896 ; CHECK-AIX-64-P8-NEXT: sldi r3, r3, 48
897 ; CHECK-AIX-64-P8-NEXT: mtvsrd v2, r3
898 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v2, v3
899 ; CHECK-AIX-64-P8-NEXT: blr
900 ;
901 ; CHECK-AIX-64-P9-LABEL: test_v8i16_v2i64:
902 ; CHECK-AIX-64-P9: # %bb.0: # %entry
903 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r3
904 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
905 ; CHECK-AIX-64-P9-NEXT: vsplth v2, v2, 3
906 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v2, v3
907 ; CHECK-AIX-64-P9-NEXT: blr
908 ;
909 ; CHECK-AIX-32-P8-LABEL: test_v8i16_v2i64:
910 ; CHECK-AIX-32-P8: # %bb.0: # %entry
911 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
912 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
913 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v2, r3
914 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C9(r2) # %const.0
915 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
916 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
917 ; CHECK-AIX-32-P8-NEXT: blr
918 ;
919 ; CHECK-AIX-32-P9-LABEL: test_v8i16_v2i64:
920 ; CHECK-AIX-32-P9: # %bb.0: # %entry
921 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
922 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C8(r2) # %const.0
923 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r4
924 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
925 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
926 ; CHECK-AIX-32-P9-NEXT: blr
927 entry:
928 %0 = load <2 x i8>, ptr %a
929 %bc1 = bitcast <2 x i8> %0 to i16
930 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
931 %1 = load <2 x i8>, ptr %b, align 8
932 %bc2 = bitcast <2 x i8> %1 to i16
933 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
934 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
935 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
936 %shuffle = shufflevector <16 x i8> %2, <16 x i8> %3, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
937 ret <16 x i8> %shuffle
938 }
940 define void @test_v4i32_v4i32(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
941 ; CHECK-LE-P8-LABEL: test_v4i32_v4i32:
942 ; CHECK-LE-P8: # %bb.0: # %entry
943 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI9_0@toc@ha
944 ; CHECK-LE-P8-NEXT: lxsiwzx v3, 0, r3
945 ; CHECK-LE-P8-NEXT: addis r3, r2, .LCPI9_1@toc@ha
946 ; CHECK-LE-P8-NEXT: lxsiwzx v4, 0, r4
947 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI9_0@toc@l
948 ; CHECK-LE-P8-NEXT: addi r3, r3, .LCPI9_1@toc@l
949 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
950 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
951 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r3
952 ; CHECK-LE-P8-NEXT: vperm v2, v3, v4, v2
953 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
954 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
955 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
956 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
957 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
958 ; CHECK-LE-P8-NEXT: blr
959 ;
960 ; CHECK-LE-P9-LABEL: test_v4i32_v4i32:
961 ; CHECK-LE-P9: # %bb.0: # %entry
962 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r3
963 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI9_0@toc@ha
964 ; CHECK-LE-P9-NEXT: lxsiwzx v2, 0, r4
965 ; CHECK-LE-P9-NEXT: xxlxor v4, v4, v4
966 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI9_0@toc@l
967 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
968 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI9_1@toc@ha
969 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI9_1@toc@l
970 ; CHECK-LE-P9-NEXT: lxv v3, 0(r3)
971 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
972 ; CHECK-LE-P9-NEXT: vperm v2, v4, v2, v3
973 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
974 ; CHECK-LE-P9-NEXT: blr
975 ;
976 ; CHECK-BE-P8-LABEL: test_v4i32_v4i32:
977 ; CHECK-BE-P8: # %bb.0: # %entry
978 ; CHECK-BE-P8-NEXT: lxsiwzx v2, 0, r3
979 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI9_0@toc@ha
980 ; CHECK-BE-P8-NEXT: lxsiwzx v3, 0, r4
981 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI9_0@toc@l
982 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
983 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
984 ; CHECK-BE-P8-NEXT: xxlxor v3, v3, v3
985 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
986 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
987 ; CHECK-BE-P8-NEXT: blr
988 ;
989 ; CHECK-BE-P9-LABEL: test_v4i32_v4i32:
990 ; CHECK-BE-P9: # %bb.0: # %entry
991 ; CHECK-BE-P9-NEXT: lxsiwzx v2, 0, r3
992 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI9_0@toc@ha
993 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r4
994 ; CHECK-BE-P9-NEXT: xxlxor v3, v3, v3
995 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI9_0@toc@l
996 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
997 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
998 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
999 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
1000 ; CHECK-BE-P9-NEXT: blr
1001 ;
1002 ; CHECK-AIX-64-P8-LABEL: test_v4i32_v4i32:
1003 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1004 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v2, 0, r3
1005 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C9(r2) # %const.0
1006 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v3, 0, r4
1007 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
1008 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
1009 ; CHECK-AIX-64-P8-NEXT: xxlxor v3, v3, v3
1010 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1011 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
1012 ; CHECK-AIX-64-P8-NEXT: blr
1013 ;
1014 ; CHECK-AIX-64-P9-LABEL: test_v4i32_v4i32:
1015 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1016 ; CHECK-AIX-64-P9-NEXT: lxsiwzx v2, 0, r3
1017 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C8(r2) # %const.0
1018 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r4
1019 ; CHECK-AIX-64-P9-NEXT: xxlxor v3, v3, v3
1020 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
1021 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
1022 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1023 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
1024 ; CHECK-AIX-64-P9-NEXT: blr
1025 ;
1026 ; CHECK-AIX-32-P8-LABEL: test_v4i32_v4i32:
1027 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1028 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1029 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C10(r2) # %const.0
1030 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1031 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1032 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1033 ; CHECK-AIX-32-P8-NEXT: xxlxor v3, v3, v3
1034 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
1035 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
1036 ; CHECK-AIX-32-P8-NEXT: blr
1037 ;
1038 ; CHECK-AIX-32-P9-LABEL: test_v4i32_v4i32:
1039 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1040 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
1041 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C9(r2) # %const.0
1042 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1043 ; CHECK-AIX-32-P9-NEXT: xxlxor v3, v3, v3
1044 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1045 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1046 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
1047 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
1048 ; CHECK-AIX-32-P9-NEXT: blr
1049 entry:
1050 %0 = load <2 x i16>, ptr %ptr1, align 1
1051 %1 = load <2 x i16>, ptr %ptr2, align 1
1052 %shuffle1 = shufflevector <2 x i16> %0, <2 x i16> %1, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
1053 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
1054 store <4 x i32> %2, ptr undef, align 16
1055 ret void
1056 }
1058 define <16 x i8> @test_v4i32_v8i16(ptr %a, ptr %b) local_unnamed_addr {
1059 ; CHECK-LE-P8-LABEL: test_v4i32_v8i16:
1060 ; CHECK-LE-P8: # %bb.0: # %entry
1061 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
1062 ; CHECK-LE-P8-NEXT: lxsiwzx v3, 0, r4
1063 ; CHECK-LE-P8-NEXT: mtvsrd v2, r3
1064 ; CHECK-LE-P8-NEXT: vmrghh v2, v2, v3
1065 ; CHECK-LE-P8-NEXT: blr
1066 ;
1067 ; CHECK-LE-P9-LABEL: test_v4i32_v8i16:
1068 ; CHECK-LE-P9: # %bb.0: # %entry
1069 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
1070 ; CHECK-LE-P9-NEXT: lxsiwzx v3, 0, r4
1071 ; CHECK-LE-P9-NEXT: vmrghh v2, v2, v3
1072 ; CHECK-LE-P9-NEXT: blr
1073 ;
1074 ; CHECK-BE-P8-LABEL: test_v4i32_v8i16:
1075 ; CHECK-BE-P8: # %bb.0: # %entry
1076 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
1077 ; CHECK-BE-P8-NEXT: lxsiwzx v3, 0, r4
1078 ; CHECK-BE-P8-NEXT: mtvsrwz v2, r3
1079 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI10_0@toc@ha
1080 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI10_0@toc@l
1081 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
1082 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
1083 ; CHECK-BE-P8-NEXT: blr
1084 ;
1085 ; CHECK-BE-P9-LABEL: test_v4i32_v8i16:
1086 ; CHECK-BE-P9: # %bb.0: # %entry
1087 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r3
1088 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI10_0@toc@ha
1089 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r4
1090 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI10_0@toc@l
1091 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
1092 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
1093 ; CHECK-BE-P9-NEXT: blr
1094 ;
1095 ; CHECK-AIX-64-P8-LABEL: test_v4i32_v8i16:
1096 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1097 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
1098 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v3, 0, r4
1099 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v2, r3
1100 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C10(r2) # %const.0
1101 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
1102 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
1103 ; CHECK-AIX-64-P8-NEXT: blr
1104 ;
1105 ; CHECK-AIX-64-P9-LABEL: test_v4i32_v8i16:
1106 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1107 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r3
1108 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C9(r2) # %const.0
1109 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r4
1110 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
1111 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
1112 ; CHECK-AIX-64-P9-NEXT: blr
1113 ;
1114 ; CHECK-AIX-32-P8-LABEL: test_v4i32_v8i16:
1115 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1116 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
1117 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1118 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v2, r3
1119 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C11(r2) # %const.0
1120 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1121 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1122 ; CHECK-AIX-32-P8-NEXT: blr
1123 ;
1124 ; CHECK-AIX-32-P9-LABEL: test_v4i32_v8i16:
1125 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1126 ; CHECK-AIX-32-P9-NEXT: lxsihzx v2, 0, r3
1127 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C10(r2) # %const.0
1128 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1129 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1130 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1131 ; CHECK-AIX-32-P9-NEXT: blr
1132 entry:
1133 %0 = load <2 x i8>, ptr %a
1134 %bc1 = bitcast <2 x i8> %0 to i16
1135 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1136 %1 = load <2 x i8>, ptr %b, align 4
1137 %bc2 = bitcast <2 x i8> %1 to i16
1138 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1139 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1140 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1141 %shuffle = shufflevector <16 x i8> %3, <16 x i8> %2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1142 ret <16 x i8> %shuffle
1143 }
1145 define <16 x i8> @test_v4i32_v2i64(ptr %a, ptr %b) local_unnamed_addr {
1146 ; CHECK-LE-P8-LABEL: test_v4i32_v2i64:
1147 ; CHECK-LE-P8: # %bb.0: # %entry
1148 ; CHECK-LE-P8-NEXT: lxsiwzx v2, 0, r3
1149 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r4
1150 ; CHECK-LE-P8-NEXT: vmrghh v2, v3, v2
1151 ; CHECK-LE-P8-NEXT: blr
1152 ;
1153 ; CHECK-LE-P9-LABEL: test_v4i32_v2i64:
1154 ; CHECK-LE-P9: # %bb.0: # %entry
1155 ; CHECK-LE-P9-NEXT: lxsiwzx v2, 0, r3
1156 ; CHECK-LE-P9-NEXT: lxsd v3, 0(r4)
1157 ; CHECK-LE-P9-NEXT: vmrghh v2, v3, v2
1158 ; CHECK-LE-P9-NEXT: blr
1159 ;
1160 ; CHECK-BE-P8-LABEL: test_v4i32_v2i64:
1161 ; CHECK-BE-P8: # %bb.0: # %entry
1162 ; CHECK-BE-P8-NEXT: lfiwzx f0, 0, r3
1163 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1164 ; CHECK-BE-P8-NEXT: xxsldwi v2, f0, f0, 1
1165 ; CHECK-BE-P8-NEXT: vmrghh v2, v2, v3
1166 ; CHECK-BE-P8-NEXT: blr
1167 ;
1168 ; CHECK-BE-P9-LABEL: test_v4i32_v2i64:
1169 ; CHECK-BE-P9: # %bb.0: # %entry
1170 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r3
1171 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
1172 ; CHECK-BE-P9-NEXT: xxsldwi v2, f0, f0, 1
1173 ; CHECK-BE-P9-NEXT: vmrghh v2, v2, v3
1174 ; CHECK-BE-P9-NEXT: blr
1175 ;
1176 ; CHECK-AIX-64-P8-LABEL: test_v4i32_v2i64:
1177 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1178 ; CHECK-AIX-64-P8-NEXT: lfiwzx f0, 0, r3
1179 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1180 ; CHECK-AIX-64-P8-NEXT: xxsldwi v2, f0, f0, 1
1181 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v2, v3
1182 ; CHECK-AIX-64-P8-NEXT: blr
1183 ;
1184 ; CHECK-AIX-64-P9-LABEL: test_v4i32_v2i64:
1185 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1186 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r3
1187 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
1188 ; CHECK-AIX-64-P9-NEXT: xxsldwi v2, f0, f0, 1
1189 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v2, v3
1190 ; CHECK-AIX-64-P9-NEXT: blr
1191 ;
1192 ; CHECK-AIX-32-P8-LABEL: test_v4i32_v2i64:
1193 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1194 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1195 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C12(r2) # %const.0
1196 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1197 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1198 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
1199 ; CHECK-AIX-32-P8-NEXT: blr
1200 ;
1201 ; CHECK-AIX-32-P9-LABEL: test_v4i32_v2i64:
1202 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1203 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r3
1204 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C11(r2) # %const.0
1205 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r4
1206 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1207 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1208 ; CHECK-AIX-32-P9-NEXT: blr
1209 entry:
1210 %0 = load <2 x i8>, ptr %a, align 4
1211 %bc1 = bitcast <2 x i8> %0 to i16
1212 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1213 %1 = load <2 x i8>, ptr %b, align 8
1214 %bc2 = bitcast <2 x i8> %1 to i16
1215 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1216 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1217 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1218 %shuffle = shufflevector <16 x i8> %2, <16 x i8> %3, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1219 ret <16 x i8> %shuffle
1220 }
1222 define void @test_v2i64_v2i64(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
1223 ; CHECK-LE-P8-LABEL: test_v2i64_v2i64:
1224 ; CHECK-LE-P8: # %bb.0: # %entry
1225 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI12_0@toc@ha
1226 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r3
1227 ; CHECK-LE-P8-NEXT: addis r3, r2, .LCPI12_1@toc@ha
1228 ; CHECK-LE-P8-NEXT: lxsdx v4, 0, r4
1229 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI12_0@toc@l
1230 ; CHECK-LE-P8-NEXT: addi r3, r3, .LCPI12_1@toc@l
1231 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
1232 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
1233 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r3
1234 ; CHECK-LE-P8-NEXT: vperm v2, v3, v4, v2
1235 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
1236 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
1237 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
1238 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
1239 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
1240 ; CHECK-LE-P8-NEXT: blr
1241 ;
1242 ; CHECK-LE-P9-LABEL: test_v2i64_v2i64:
1243 ; CHECK-LE-P9: # %bb.0: # %entry
1244 ; CHECK-LE-P9-NEXT: lfd f0, 0(r3)
1245 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI12_0@toc@ha
1246 ; CHECK-LE-P9-NEXT: lxsd v2, 0(r4)
1247 ; CHECK-LE-P9-NEXT: xxlxor v4, v4, v4
1248 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI12_0@toc@l
1249 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
1250 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI12_1@toc@ha
1251 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI12_1@toc@l
1252 ; CHECK-LE-P9-NEXT: lxv v3, 0(r3)
1253 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
1254 ; CHECK-LE-P9-NEXT: vperm v2, v4, v2, v3
1255 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
1256 ; CHECK-LE-P9-NEXT: blr
1257 ;
1258 ; CHECK-BE-P8-LABEL: test_v2i64_v2i64:
1259 ; CHECK-BE-P8: # %bb.0: # %entry
1260 ; CHECK-BE-P8-NEXT: lxsdx v2, 0, r3
1261 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI12_0@toc@ha
1262 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1263 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI12_0@toc@l
1264 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
1265 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
1266 ; CHECK-BE-P8-NEXT: xxlxor v3, v3, v3
1267 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
1268 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
1269 ; CHECK-BE-P8-NEXT: blr
1270 ;
1271 ; CHECK-BE-P9-LABEL: test_v2i64_v2i64:
1272 ; CHECK-BE-P9: # %bb.0: # %entry
1273 ; CHECK-BE-P9-NEXT: lxsd v2, 0(r3)
1274 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI12_0@toc@ha
1275 ; CHECK-BE-P9-NEXT: lfd f0, 0(r4)
1276 ; CHECK-BE-P9-NEXT: xxlxor v3, v3, v3
1277 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI12_0@toc@l
1278 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
1279 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
1280 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1281 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
1282 ; CHECK-BE-P9-NEXT: blr
1283 ;
1284 ; CHECK-AIX-64-P8-LABEL: test_v2i64_v2i64:
1285 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1286 ; CHECK-AIX-64-P8-NEXT: lxsdx v2, 0, r3
1287 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C11(r2) # %const.0
1288 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1289 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
1290 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
1291 ; CHECK-AIX-64-P8-NEXT: xxlxor v3, v3, v3
1292 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1293 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
1294 ; CHECK-AIX-64-P8-NEXT: blr
1295 ;
1296 ; CHECK-AIX-64-P9-LABEL: test_v2i64_v2i64:
1297 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1298 ; CHECK-AIX-64-P9-NEXT: lxsd v2, 0(r3)
1299 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C10(r2) # %const.0
1300 ; CHECK-AIX-64-P9-NEXT: lfd f0, 0(r4)
1301 ; CHECK-AIX-64-P9-NEXT: xxlxor v3, v3, v3
1302 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
1303 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
1304 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1305 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
1306 ; CHECK-AIX-64-P9-NEXT: blr
1307 ;
1308 ; CHECK-AIX-32-P8-LABEL: test_v2i64_v2i64:
1309 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1310 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1311 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C13(r2) # %const.0
1312 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1313 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1314 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1315 ; CHECK-AIX-32-P8-NEXT: xxlxor v3, v3, v3
1316 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
1317 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
1318 ; CHECK-AIX-32-P8-NEXT: blr
1319 ;
1320 ; CHECK-AIX-32-P9-LABEL: test_v2i64_v2i64:
1321 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1322 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
1323 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C12(r2) # %const.0
1324 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1325 ; CHECK-AIX-32-P9-NEXT: xxlxor v3, v3, v3
1326 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1327 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1328 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
1329 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
1330 ; CHECK-AIX-32-P9-NEXT: blr
1331 entry:
1332 %0 = load <4 x i16>, ptr %ptr1, align 1
1333 %1 = load <4 x i16>, ptr %ptr2, align 1
1334 %shuffle1 = shufflevector <4 x i16> %0, <4 x i16> %1, <4 x i32> <i32 4, i32 5, i32 1, i32 0>
1335 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
1336 store <4 x i32> %2, ptr undef, align 16
1337 ret void
1338 }
1340 define <16 x i8> @test_v2i64_v4i32(ptr %a, ptr %b) local_unnamed_addr {
1341 ; CHECK-LE-P8-LABEL: test_v2i64_v4i32:
1342 ; CHECK-LE-P8: # %bb.0: # %entry
1343 ; CHECK-LE-P8-NEXT: lxsiwzx v2, 0, r3
1344 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r4
1345 ; CHECK-LE-P8-NEXT: vmrghh v2, v2, v3
1346 ; CHECK-LE-P8-NEXT: blr
1347 ;
1348 ; CHECK-LE-P9-LABEL: test_v2i64_v4i32:
1349 ; CHECK-LE-P9: # %bb.0: # %entry
1350 ; CHECK-LE-P9-NEXT: lxsiwzx v2, 0, r3
1351 ; CHECK-LE-P9-NEXT: lxsd v3, 0(r4)
1352 ; CHECK-LE-P9-NEXT: vmrghh v2, v2, v3
1353 ; CHECK-LE-P9-NEXT: blr
1354 ;
1355 ; CHECK-BE-P8-LABEL: test_v2i64_v4i32:
1356 ; CHECK-BE-P8: # %bb.0: # %entry
1357 ; CHECK-BE-P8-NEXT: lfiwzx f0, 0, r3
1358 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1359 ; CHECK-BE-P8-NEXT: xxsldwi v2, f0, f0, 1
1360 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
1361 ; CHECK-BE-P8-NEXT: blr
1362 ;
1363 ; CHECK-BE-P9-LABEL: test_v2i64_v4i32:
1364 ; CHECK-BE-P9: # %bb.0: # %entry
1365 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r3
1366 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
1367 ; CHECK-BE-P9-NEXT: xxsldwi v2, f0, f0, 1
1368 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1369 ; CHECK-BE-P9-NEXT: blr
1370 ;
1371 ; CHECK-AIX-64-P8-LABEL: test_v2i64_v4i32:
1372 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1373 ; CHECK-AIX-64-P8-NEXT: lfiwzx f0, 0, r3
1374 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1375 ; CHECK-AIX-64-P8-NEXT: xxsldwi v2, f0, f0, 1
1376 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1377 ; CHECK-AIX-64-P8-NEXT: blr
1378 ;
1379 ; CHECK-AIX-64-P9-LABEL: test_v2i64_v4i32:
1380 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1381 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r3
1382 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
1383 ; CHECK-AIX-64-P9-NEXT: xxsldwi v2, f0, f0, 1
1384 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1385 ; CHECK-AIX-64-P9-NEXT: blr
1386 ;
1387 ; CHECK-AIX-32-P8-LABEL: test_v2i64_v4i32:
1388 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1389 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1390 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C14(r2) # %const.0
1391 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1392 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1393 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1394 ; CHECK-AIX-32-P8-NEXT: blr
1395 ;
1396 ; CHECK-AIX-32-P9-LABEL: test_v2i64_v4i32:
1397 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1398 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
1399 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C13(r2) # %const.0
1400 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1401 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1402 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1403 ; CHECK-AIX-32-P9-NEXT: blr
1404 entry:
1405 %0 = load <2 x i8>, ptr %a, align 4
1406 %bc1 = bitcast <2 x i8> %0 to i16
1407 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1408 %1 = load <2 x i8>, ptr %b, align 8
1409 %bc2 = bitcast <2 x i8> %1 to i16
1410 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1411 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1412 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1413 %shuffle = shufflevector <16 x i8> %3, <16 x i8> %2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1414 ret <16 x i8> %shuffle
1415 }
1417 define <16 x i8> @test_v2i64_v8i16(ptr %a, ptr %b) local_unnamed_addr {
1418 ; CHECK-LE-P8-LABEL: test_v2i64_v8i16:
1419 ; CHECK-LE-P8: # %bb.0: # %entry
1420 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
1421 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r4
1422 ; CHECK-LE-P8-NEXT: mtvsrd v2, r3
1423 ; CHECK-LE-P8-NEXT: vmrghh v2, v2, v3
1424 ; CHECK-LE-P8-NEXT: blr
1425 ;
1426 ; CHECK-LE-P9-LABEL: test_v2i64_v8i16:
1427 ; CHECK-LE-P9: # %bb.0: # %entry
1428 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
1429 ; CHECK-LE-P9-NEXT: lxsd v3, 0(r4)
1430 ; CHECK-LE-P9-NEXT: vmrghh v2, v2, v3
1431 ; CHECK-LE-P9-NEXT: blr
1432 ;
1433 ; CHECK-BE-P8-LABEL: test_v2i64_v8i16:
1434 ; CHECK-BE-P8: # %bb.0: # %entry
1435 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
1436 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1437 ; CHECK-BE-P8-NEXT: sldi r3, r3, 48
1438 ; CHECK-BE-P8-NEXT: mtvsrd v2, r3
1439 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
1440 ; CHECK-BE-P8-NEXT: blr
1441 ;
1442 ; CHECK-BE-P9-LABEL: test_v2i64_v8i16:
1443 ; CHECK-BE-P9: # %bb.0: # %entry
1444 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r3
1445 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
1446 ; CHECK-BE-P9-NEXT: vsplth v2, v2, 3
1447 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1448 ; CHECK-BE-P9-NEXT: blr
1449 ;
1450 ; CHECK-AIX-64-P8-LABEL: test_v2i64_v8i16:
1451 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1452 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
1453 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1454 ; CHECK-AIX-64-P8-NEXT: sldi r3, r3, 48
1455 ; CHECK-AIX-64-P8-NEXT: mtvsrd v2, r3
1456 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1457 ; CHECK-AIX-64-P8-NEXT: blr
1458 ;
1459 ; CHECK-AIX-64-P9-LABEL: test_v2i64_v8i16:
1460 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1461 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r3
1462 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
1463 ; CHECK-AIX-64-P9-NEXT: vsplth v2, v2, 3
1464 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1465 ; CHECK-AIX-64-P9-NEXT: blr
1466 ;
1467 ; CHECK-AIX-32-P8-LABEL: test_v2i64_v8i16:
1468 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1469 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
1470 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1471 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v2, r3
1472 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C15(r2) # %const.0
1473 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1474 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1475 ; CHECK-AIX-32-P8-NEXT: blr
1476 ;
1477 ; CHECK-AIX-32-P9-LABEL: test_v2i64_v8i16:
1478 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1479 ; CHECK-AIX-32-P9-NEXT: lxsihzx v2, 0, r3
1480 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C14(r2) # %const.0
1481 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1482 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1483 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1484 ; CHECK-AIX-32-P9-NEXT: blr
1485 entry:
1486 %0 = load <2 x i8>, ptr %a
1487 %bc1 = bitcast <2 x i8> %0 to i16
1488 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1489 %1 = load <2 x i8>, ptr %b, align 8
1490 %bc2 = bitcast <2 x i8> %1 to i16
1491 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1492 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1493 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1494 %shuffle = shufflevector <16 x i8> %3, <16 x i8> %2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1495 ret <16 x i8> %shuffle
1496 }