1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=riscv32 -mattr=+d,+zfh -run-pass=instruction-select %s -o - \
4 # RUN: llc -mtriple=riscv64 -mattr=+d,+zfh -run-pass=instruction-select %s -o - \
12 tracksRegLiveness: true
17 ; CHECK-LABEL: name: fp_store_f32
18 ; CHECK: liveins: $x10, $f10_f
20 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
21 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f10_f
22 ; CHECK-NEXT: FSW [[COPY1]], [[COPY]], 0 :: (store (s32))
23 ; CHECK-NEXT: PseudoRET
24 %0:gprb(p0) = COPY $x10
25 %1:fprb(s32) = COPY $f10_f
26 G_STORE %1(s32), %0(p0) :: (store (s32))
34 tracksRegLiveness: true
39 ; CHECK-LABEL: name: fp_store_f64
40 ; CHECK: liveins: $x10, $f10_d
42 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
43 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $f10_d
44 ; CHECK-NEXT: FSD [[COPY1]], [[COPY]], 0 :: (store (s64))
45 ; CHECK-NEXT: PseudoRET
46 %0:gprb(p0) = COPY $x10
47 %1:fprb(s64) = COPY $f10_d
48 G_STORE %1(s64), %0(p0) :: (store (s64))
56 tracksRegLiveness: true
61 ; CHECK-LABEL: name: fp_load_f32
62 ; CHECK: liveins: $x10
64 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
65 ; CHECK-NEXT: [[FLW:%[0-9]+]]:fpr32 = FLW [[COPY]], 0 :: (load (s32))
66 ; CHECK-NEXT: $f10_f = COPY [[FLW]]
67 ; CHECK-NEXT: PseudoRET implicit $f10_f
68 %0:gprb(p0) = COPY $x10
69 %1:fprb(s32) = G_LOAD %0(p0) :: (load (s32))
71 PseudoRET implicit $f10_f
78 tracksRegLiveness: true
83 ; CHECK-LABEL: name: fp_load_f64
84 ; CHECK: liveins: $x10
86 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
87 ; CHECK-NEXT: [[FLD:%[0-9]+]]:fpr64 = FLD [[COPY]], 0 :: (load (s64))
88 ; CHECK-NEXT: $f10_d = COPY [[FLD]]
89 ; CHECK-NEXT: PseudoRET implicit $f10_d
90 %0:gprb(p0) = COPY $x10
91 %1:fprb(s64) = G_LOAD %0(p0) :: (load (s64))
93 PseudoRET implicit $f10_d
101 tracksRegLiveness: true
104 liveins: $x10, $f10_h
106 ; CHECK-LABEL: name: fp_store_f16
107 ; CHECK: liveins: $x10, $f10_h
109 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
110 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $f10_h
111 ; CHECK-NEXT: FSH [[COPY1]], [[COPY]], 0 :: (store (s16))
112 ; CHECK-NEXT: PseudoRET
113 %0:gprb(p0) = COPY $x10
114 %1:fprb(s16) = COPY $f10_h
115 G_STORE %1(s16), %0(p0) :: (store (s16))
122 regBankSelected: true
123 tracksRegLiveness: true
128 ; CHECK-LABEL: name: fp_load_f16
129 ; CHECK: liveins: $x10
131 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
132 ; CHECK-NEXT: [[FLH:%[0-9]+]]:fpr16 = FLH [[COPY]], 0 :: (load (s16))
133 ; CHECK-NEXT: $f10_h = COPY [[FLH]]
134 ; CHECK-NEXT: PseudoRET implicit $f10_h
135 %0:gprb(p0) = COPY $x10
136 %1:fprb(s16) = G_LOAD %0(p0) :: (load (s16))
137 $f10_h = COPY %1(s16)
138 PseudoRET implicit $f10_h