1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \
3 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
4 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \
5 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
6 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \
7 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
8 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \
9 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
11 declare <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x float>, <vscale x 1 x i1>, i32)
12 declare <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
13 declare <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
15 define <vscale x 1 x float> @vfnmsac_vv_nxv1f32(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
16 ; ZVFH-LABEL: vfnmsac_vv_nxv1f32:
18 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
19 ; ZVFH-NEXT: vfwnmsac.vv v10, v8, v9, v0.t
20 ; ZVFH-NEXT: vmv1r.v v8, v10
23 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv1f32:
25 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
26 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t
27 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t
28 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
29 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v10, v0.t
31 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
32 %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> %m, i32 %evl)
33 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
34 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
35 ret <vscale x 1 x float> %v
38 define <vscale x 1 x float> @vfnmsac_vv_nxv1f32_unmasked(<vscale x 1 x half> %a, <vscale x 1 x half> %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
39 ; ZVFH-LABEL: vfnmsac_vv_nxv1f32_unmasked:
41 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
42 ; ZVFH-NEXT: vfwnmsac.vv v10, v8, v9
43 ; ZVFH-NEXT: vmv1r.v v8, v10
46 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv1f32_unmasked:
48 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
49 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8
50 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9
51 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
52 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v10
54 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
55 %bext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
56 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
57 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %bext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
58 ret <vscale x 1 x float> %v
61 define <vscale x 1 x float> @vfnmsac_vf_nxv1f32(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
62 ; ZVFH-LABEL: vfnmsac_vf_nxv1f32:
64 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
65 ; ZVFH-NEXT: vfwnmsac.vf v9, fa0, v8, v0.t
66 ; ZVFH-NEXT: vmv1r.v v8, v9
69 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv1f32:
71 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
72 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, mf4, ta, ma
73 ; ZVFHMIN-NEXT: vmv.v.x v10, a1
74 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
75 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t
76 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t
77 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
78 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v9, v0.t
80 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
81 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
82 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
83 %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
84 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
85 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
86 ret <vscale x 1 x float> %v
89 define <vscale x 1 x float> @vfnmsac_vf_nxv1f32_commute(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
90 ; ZVFH-LABEL: vfnmsac_vf_nxv1f32_commute:
92 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
93 ; ZVFH-NEXT: vfwnmsac.vf v9, fa0, v8, v0.t
94 ; ZVFH-NEXT: vmv1r.v v8, v9
97 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv1f32_commute:
99 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
100 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, mf4, ta, ma
101 ; ZVFHMIN-NEXT: vmv.v.x v11, a1
102 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
103 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t
104 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11, v0.t
105 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
106 ; ZVFHMIN-NEXT: vfnmsub.vv v10, v8, v9, v0.t
107 ; ZVFHMIN-NEXT: vmv1r.v v8, v10
109 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
110 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
111 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> %m, i32 %evl)
112 %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 %evl)
113 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> %m, i32 %evl)
114 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %vbext, <vscale x 1 x float> %nega, <vscale x 1 x float> %c, <vscale x 1 x i1> %m, i32 %evl)
115 ret <vscale x 1 x float> %v
118 define <vscale x 1 x float> @vfnmsac_vf_nxv1f32_unmasked(<vscale x 1 x half> %a, half %b, <vscale x 1 x float> %c, i32 zeroext %evl) {
119 ; ZVFH-LABEL: vfnmsac_vf_nxv1f32_unmasked:
121 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
122 ; ZVFH-NEXT: vfwnmsac.vf v9, fa0, v8
123 ; ZVFH-NEXT: vmv1r.v v8, v9
126 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv1f32_unmasked:
128 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
129 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, mf4, ta, ma
130 ; ZVFHMIN-NEXT: vmv.v.x v10, a1
131 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
132 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8
133 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10
134 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
135 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v9
137 %elt.head = insertelement <vscale x 1 x half> poison, half %b, i32 0
138 %vb = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
139 %aext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
140 %vbext = call <vscale x 1 x float> @llvm.vp.fpext.nxv1f32.nxv1f16(<vscale x 1 x half> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
141 %nega = call <vscale x 1 x float> @llvm.vp.fneg.nxv1f32(<vscale x 1 x float> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
142 %v = call <vscale x 1 x float> @llvm.vp.fma.nxv1f32(<vscale x 1 x float> %nega, <vscale x 1 x float> %vbext, <vscale x 1 x float> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
143 ret <vscale x 1 x float> %v
146 declare <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x float>, <vscale x 2 x i1>, i32)
147 declare <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
148 declare <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half>, <vscale x 2 x i1>, i32)
150 define <vscale x 2 x float> @vfnmsac_vv_nxv2f32(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
151 ; ZVFH-LABEL: vfnmsac_vv_nxv2f32:
153 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
154 ; ZVFH-NEXT: vfwnmsac.vv v10, v8, v9, v0.t
155 ; ZVFH-NEXT: vmv1r.v v8, v10
158 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv2f32:
160 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
161 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t
162 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9, v0.t
163 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
164 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v10, v0.t
166 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
167 %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> %m, i32 %evl)
168 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
169 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
170 ret <vscale x 2 x float> %v
173 define <vscale x 2 x float> @vfnmsac_vv_nxv2f32_unmasked(<vscale x 2 x half> %a, <vscale x 2 x half> %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
174 ; ZVFH-LABEL: vfnmsac_vv_nxv2f32_unmasked:
176 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
177 ; ZVFH-NEXT: vfwnmsac.vv v10, v8, v9
178 ; ZVFH-NEXT: vmv1r.v v8, v10
181 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv2f32_unmasked:
183 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
184 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8
185 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v9
186 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
187 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v10
189 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
190 %bext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
191 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
192 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %bext, <vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
193 ret <vscale x 2 x float> %v
196 define <vscale x 2 x float> @vfnmsac_vf_nxv2f32(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
197 ; ZVFH-LABEL: vfnmsac_vf_nxv2f32:
199 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
200 ; ZVFH-NEXT: vfwnmsac.vf v9, fa0, v8, v0.t
201 ; ZVFH-NEXT: vmv1r.v v8, v9
204 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv2f32:
206 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
207 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, mf2, ta, ma
208 ; ZVFHMIN-NEXT: vmv.v.x v10, a1
209 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
210 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8, v0.t
211 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10, v0.t
212 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
213 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v9, v0.t
215 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
216 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
217 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
218 %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
219 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
220 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
221 ret <vscale x 2 x float> %v
224 define <vscale x 2 x float> @vfnmsac_vf_nxv2f32_commute(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
225 ; ZVFH-LABEL: vfnmsac_vf_nxv2f32_commute:
227 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
228 ; ZVFH-NEXT: vfwnmsac.vf v9, fa0, v8, v0.t
229 ; ZVFH-NEXT: vmv1r.v v8, v9
232 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv2f32_commute:
234 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
235 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, mf2, ta, ma
236 ; ZVFHMIN-NEXT: vmv.v.x v11, a1
237 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
238 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v10, v8, v0.t
239 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v11, v0.t
240 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
241 ; ZVFHMIN-NEXT: vfnmsub.vv v10, v8, v9, v0.t
242 ; ZVFHMIN-NEXT: vmv.v.v v8, v10
244 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
245 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
246 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> %m, i32 %evl)
247 %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 %evl)
248 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> %m, i32 %evl)
249 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %vbext, <vscale x 2 x float> %nega, <vscale x 2 x float> %c, <vscale x 2 x i1> %m, i32 %evl)
250 ret <vscale x 2 x float> %v
253 define <vscale x 2 x float> @vfnmsac_vf_nxv2f32_unmasked(<vscale x 2 x half> %a, half %b, <vscale x 2 x float> %c, i32 zeroext %evl) {
254 ; ZVFH-LABEL: vfnmsac_vf_nxv2f32_unmasked:
256 ; ZVFH-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
257 ; ZVFH-NEXT: vfwnmsac.vf v9, fa0, v8
258 ; ZVFH-NEXT: vmv1r.v v8, v9
261 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv2f32_unmasked:
263 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
264 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, mf2, ta, ma
265 ; ZVFHMIN-NEXT: vmv.v.x v10, a1
266 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
267 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v11, v8
268 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v10
269 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m1, ta, ma
270 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v11, v9
272 %elt.head = insertelement <vscale x 2 x half> poison, half %b, i32 0
273 %vb = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
274 %aext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
275 %vbext = call <vscale x 2 x float> @llvm.vp.fpext.nxv2f32.nxv2f16(<vscale x 2 x half> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
276 %nega = call <vscale x 2 x float> @llvm.vp.fneg.nxv2f32(<vscale x 2 x float> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
277 %v = call <vscale x 2 x float> @llvm.vp.fma.nxv2f32(<vscale x 2 x float> %nega, <vscale x 2 x float> %vbext, <vscale x 2 x float> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
278 ret <vscale x 2 x float> %v
281 declare <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, i32)
282 declare <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
283 declare <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half>, <vscale x 4 x i1>, i32)
285 define <vscale x 4 x float> @vfnmsac_vv_nxv4f32(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
286 ; ZVFH-LABEL: vfnmsac_vv_nxv4f32:
288 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
289 ; ZVFH-NEXT: vfwnmsac.vv v10, v8, v9, v0.t
290 ; ZVFH-NEXT: vmv2r.v v8, v10
293 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv4f32:
295 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
296 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t
297 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9, v0.t
298 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
299 ; ZVFHMIN-NEXT: vfnmsub.vv v12, v14, v10, v0.t
300 ; ZVFHMIN-NEXT: vmv.v.v v8, v12
302 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
303 %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> %m, i32 %evl)
304 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
305 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
306 ret <vscale x 4 x float> %v
309 define <vscale x 4 x float> @vfnmsac_vv_nxv4f32_unmasked(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
310 ; ZVFH-LABEL: vfnmsac_vv_nxv4f32_unmasked:
312 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
313 ; ZVFH-NEXT: vfwnmsac.vv v10, v8, v9
314 ; ZVFH-NEXT: vmv2r.v v8, v10
317 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv4f32_unmasked:
319 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
320 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8
321 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v9
322 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
323 ; ZVFHMIN-NEXT: vfnmsub.vv v12, v14, v10
324 ; ZVFHMIN-NEXT: vmv.v.v v8, v12
326 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
327 %bext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
328 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
329 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %bext, <vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
330 ret <vscale x 4 x float> %v
333 define <vscale x 4 x float> @vfnmsac_vf_nxv4f32(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
334 ; ZVFH-LABEL: vfnmsac_vf_nxv4f32:
336 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
337 ; ZVFH-NEXT: vfwnmsac.vf v10, fa0, v8, v0.t
338 ; ZVFH-NEXT: vmv2r.v v8, v10
341 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv4f32:
343 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
344 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m1, ta, ma
345 ; ZVFHMIN-NEXT: vmv.v.x v12, a1
346 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
347 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8, v0.t
348 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12, v0.t
349 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
350 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v14, v10, v0.t
352 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
353 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
354 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
355 %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
356 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
357 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
358 ret <vscale x 4 x float> %v
361 define <vscale x 4 x float> @vfnmsac_vf_nxv4f32_commute(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
362 ; ZVFH-LABEL: vfnmsac_vf_nxv4f32_commute:
364 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
365 ; ZVFH-NEXT: vfwnmsac.vf v10, fa0, v8, v0.t
366 ; ZVFH-NEXT: vmv2r.v v8, v10
369 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv4f32_commute:
371 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
372 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m1, ta, ma
373 ; ZVFHMIN-NEXT: vmv.v.x v9, a1
374 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
375 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v12, v8, v0.t
376 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v9, v0.t
377 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
378 ; ZVFHMIN-NEXT: vfnmsub.vv v12, v14, v10, v0.t
379 ; ZVFHMIN-NEXT: vmv.v.v v8, v12
381 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
382 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
383 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> %m, i32 %evl)
384 %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 %evl)
385 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> %m, i32 %evl)
386 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %vbext, <vscale x 4 x float> %nega, <vscale x 4 x float> %c, <vscale x 4 x i1> %m, i32 %evl)
387 ret <vscale x 4 x float> %v
390 define <vscale x 4 x float> @vfnmsac_vf_nxv4f32_unmasked(<vscale x 4 x half> %a, half %b, <vscale x 4 x float> %c, i32 zeroext %evl) {
391 ; ZVFH-LABEL: vfnmsac_vf_nxv4f32_unmasked:
393 ; ZVFH-NEXT: vsetvli zero, a0, e16, m1, ta, ma
394 ; ZVFH-NEXT: vfwnmsac.vf v10, fa0, v8
395 ; ZVFH-NEXT: vmv2r.v v8, v10
398 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv4f32_unmasked:
400 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
401 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m1, ta, ma
402 ; ZVFHMIN-NEXT: vmv.v.x v12, a1
403 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
404 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v14, v8
405 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v12
406 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m2, ta, ma
407 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v14, v10
409 %elt.head = insertelement <vscale x 4 x half> poison, half %b, i32 0
410 %vb = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
411 %aext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
412 %vbext = call <vscale x 4 x float> @llvm.vp.fpext.nxv4f32.nxv4f16(<vscale x 4 x half> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
413 %nega = call <vscale x 4 x float> @llvm.vp.fneg.nxv4f32(<vscale x 4 x float> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
414 %v = call <vscale x 4 x float> @llvm.vp.fma.nxv4f32(<vscale x 4 x float> %nega, <vscale x 4 x float> %vbext, <vscale x 4 x float> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
415 ret <vscale x 4 x float> %v
418 declare <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x float>, <vscale x 8 x i1>, i32)
419 declare <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
420 declare <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, i32)
422 define <vscale x 8 x float> @vfnmsac_vv_nxv8f32(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
423 ; ZVFH-LABEL: vfnmsac_vv_nxv8f32:
425 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
426 ; ZVFH-NEXT: vfwnmsac.vv v12, v8, v10, v0.t
427 ; ZVFH-NEXT: vmv4r.v v8, v12
430 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv8f32:
432 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
433 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t
434 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10, v0.t
435 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
436 ; ZVFHMIN-NEXT: vfnmsub.vv v16, v20, v12, v0.t
437 ; ZVFHMIN-NEXT: vmv.v.v v8, v16
439 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
440 %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> %m, i32 %evl)
441 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
442 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
443 ret <vscale x 8 x float> %v
446 define <vscale x 8 x float> @vfnmsac_vv_nxv8f32_unmasked(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
447 ; ZVFH-LABEL: vfnmsac_vv_nxv8f32_unmasked:
449 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
450 ; ZVFH-NEXT: vfwnmsac.vv v12, v8, v10
451 ; ZVFH-NEXT: vmv4r.v v8, v12
454 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv8f32_unmasked:
456 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
457 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8
458 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v10
459 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
460 ; ZVFHMIN-NEXT: vfnmsub.vv v16, v20, v12
461 ; ZVFHMIN-NEXT: vmv.v.v v8, v16
463 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
464 %bext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
465 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
466 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %bext, <vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
467 ret <vscale x 8 x float> %v
470 define <vscale x 8 x float> @vfnmsac_vf_nxv8f32(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
471 ; ZVFH-LABEL: vfnmsac_vf_nxv8f32:
473 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
474 ; ZVFH-NEXT: vfwnmsac.vf v12, fa0, v8, v0.t
475 ; ZVFH-NEXT: vmv4r.v v8, v12
478 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv8f32:
480 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
481 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m2, ta, ma
482 ; ZVFHMIN-NEXT: vmv.v.x v16, a1
483 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
484 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8, v0.t
485 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16, v0.t
486 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
487 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v20, v12, v0.t
489 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
490 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
491 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
492 %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
493 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
494 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
495 ret <vscale x 8 x float> %v
498 define <vscale x 8 x float> @vfnmsac_vf_nxv8f32_commute(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
499 ; ZVFH-LABEL: vfnmsac_vf_nxv8f32_commute:
501 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
502 ; ZVFH-NEXT: vfwnmsac.vf v12, fa0, v8, v0.t
503 ; ZVFH-NEXT: vmv4r.v v8, v12
506 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv8f32_commute:
508 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
509 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m2, ta, ma
510 ; ZVFHMIN-NEXT: vmv.v.x v10, a1
511 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
512 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t
513 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v10, v0.t
514 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
515 ; ZVFHMIN-NEXT: vfnmsub.vv v16, v20, v12, v0.t
516 ; ZVFHMIN-NEXT: vmv.v.v v8, v16
518 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
519 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
520 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %m, i32 %evl)
521 %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 %evl)
522 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> %m, i32 %evl)
523 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %vbext, <vscale x 8 x float> %nega, <vscale x 8 x float> %c, <vscale x 8 x i1> %m, i32 %evl)
524 ret <vscale x 8 x float> %v
527 define <vscale x 8 x float> @vfnmsac_vf_nxv8f32_unmasked(<vscale x 8 x half> %a, half %b, <vscale x 8 x float> %c, i32 zeroext %evl) {
528 ; ZVFH-LABEL: vfnmsac_vf_nxv8f32_unmasked:
530 ; ZVFH-NEXT: vsetvli zero, a0, e16, m2, ta, ma
531 ; ZVFH-NEXT: vfwnmsac.vf v12, fa0, v8
532 ; ZVFH-NEXT: vmv4r.v v8, v12
535 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv8f32_unmasked:
537 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
538 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m2, ta, ma
539 ; ZVFHMIN-NEXT: vmv.v.x v16, a1
540 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
541 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v20, v8
542 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v16
543 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m4, ta, ma
544 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v20, v12
546 %elt.head = insertelement <vscale x 8 x half> poison, half %b, i32 0
547 %vb = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
548 %aext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
549 %vbext = call <vscale x 8 x float> @llvm.vp.fpext.nxv8f32.nxv8f16(<vscale x 8 x half> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
550 %nega = call <vscale x 8 x float> @llvm.vp.fneg.nxv8f32(<vscale x 8 x float> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
551 %v = call <vscale x 8 x float> @llvm.vp.fma.nxv8f32(<vscale x 8 x float> %nega, <vscale x 8 x float> %vbext, <vscale x 8 x float> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
552 ret <vscale x 8 x float> %v
555 declare <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x float>, <vscale x 16 x i1>, i32)
556 declare <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float>, <vscale x 16 x i1>, i32)
557 declare <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half>, <vscale x 16 x i1>, i32)
559 define <vscale x 16 x float> @vfnmsac_vv_nxv16f32(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
560 ; ZVFH-LABEL: vfnmsac_vv_nxv16f32:
562 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
563 ; ZVFH-NEXT: vfwnmsac.vv v16, v8, v12, v0.t
564 ; ZVFH-NEXT: vmv8r.v v8, v16
567 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv16f32:
569 ; ZVFHMIN-NEXT: addi sp, sp, -16
570 ; ZVFHMIN-NEXT: .cfi_def_cfa_offset 16
571 ; ZVFHMIN-NEXT: csrr a1, vlenb
572 ; ZVFHMIN-NEXT: slli a1, a1, 3
573 ; ZVFHMIN-NEXT: sub sp, sp, a1
574 ; ZVFHMIN-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
575 ; ZVFHMIN-NEXT: addi a1, sp, 16
576 ; ZVFHMIN-NEXT: vs8r.v v16, (a1) # Unknown-size Folded Spill
577 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
578 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v16, v8, v0.t
579 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12, v0.t
580 ; ZVFHMIN-NEXT: addi a0, sp, 16
581 ; ZVFHMIN-NEXT: vl8r.v v8, (a0) # Unknown-size Folded Reload
582 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
583 ; ZVFHMIN-NEXT: vfnmsub.vv v24, v16, v8, v0.t
584 ; ZVFHMIN-NEXT: vmv.v.v v8, v24
585 ; ZVFHMIN-NEXT: csrr a0, vlenb
586 ; ZVFHMIN-NEXT: slli a0, a0, 3
587 ; ZVFHMIN-NEXT: add sp, sp, a0
588 ; ZVFHMIN-NEXT: .cfi_def_cfa sp, 16
589 ; ZVFHMIN-NEXT: addi sp, sp, 16
590 ; ZVFHMIN-NEXT: .cfi_def_cfa_offset 0
592 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
593 %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> %m, i32 %evl)
594 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
595 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
596 ret <vscale x 16 x float> %v
599 define <vscale x 16 x float> @vfnmsac_vv_nxv16f32_unmasked(<vscale x 16 x half> %a, <vscale x 16 x half> %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
600 ; ZVFH-LABEL: vfnmsac_vv_nxv16f32_unmasked:
602 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
603 ; ZVFH-NEXT: vfwnmsac.vv v16, v8, v12
604 ; ZVFH-NEXT: vmv8r.v v8, v16
607 ; ZVFHMIN-LABEL: vfnmsac_vv_nxv16f32_unmasked:
609 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
610 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v8
611 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v12
612 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
613 ; ZVFHMIN-NEXT: vfnmsub.vv v24, v0, v16
614 ; ZVFHMIN-NEXT: vmv.v.v v8, v24
616 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
617 %bext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %b, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
618 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
619 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %bext, <vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
620 ret <vscale x 16 x float> %v
623 define <vscale x 16 x float> @vfnmsac_vf_nxv16f32(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
624 ; ZVFH-LABEL: vfnmsac_vf_nxv16f32:
626 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
627 ; ZVFH-NEXT: vfwnmsac.vf v16, fa0, v8, v0.t
628 ; ZVFH-NEXT: vmv8r.v v8, v16
631 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv16f32:
633 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
634 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m4, ta, ma
635 ; ZVFHMIN-NEXT: vmv.v.x v4, a1
636 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
637 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t
638 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t
639 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
640 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v24, v16, v0.t
642 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
643 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
644 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
645 %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
646 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
647 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
648 ret <vscale x 16 x float> %v
651 define <vscale x 16 x float> @vfnmsac_vf_nxv16f32_commute(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 zeroext %evl) {
652 ; ZVFH-LABEL: vfnmsac_vf_nxv16f32_commute:
654 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
655 ; ZVFH-NEXT: vfwnmsac.vf v16, fa0, v8, v0.t
656 ; ZVFH-NEXT: vmv8r.v v8, v16
659 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv16f32_commute:
661 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
662 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m4, ta, ma
663 ; ZVFHMIN-NEXT: vmv.v.x v4, a1
664 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
665 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v24, v8, v0.t
666 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v4, v0.t
667 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
668 ; ZVFHMIN-NEXT: vfnmsub.vv v24, v8, v16, v0.t
669 ; ZVFHMIN-NEXT: vmv.v.v v8, v24
671 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
672 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
673 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> %m, i32 %evl)
674 %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 %evl)
675 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> %m, i32 %evl)
676 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %vbext, <vscale x 16 x float> %nega, <vscale x 16 x float> %c, <vscale x 16 x i1> %m, i32 %evl)
677 ret <vscale x 16 x float> %v
680 define <vscale x 16 x float> @vfnmsac_vf_nxv16f32_unmasked(<vscale x 16 x half> %a, half %b, <vscale x 16 x float> %c, i32 zeroext %evl) {
681 ; ZVFH-LABEL: vfnmsac_vf_nxv16f32_unmasked:
683 ; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
684 ; ZVFH-NEXT: vfwnmsac.vf v16, fa0, v8
685 ; ZVFH-NEXT: vmv8r.v v8, v16
688 ; ZVFHMIN-LABEL: vfnmsac_vf_nxv16f32_unmasked:
690 ; ZVFHMIN-NEXT: fmv.x.h a1, fa0
691 ; ZVFHMIN-NEXT: vsetvli a2, zero, e16, m4, ta, ma
692 ; ZVFHMIN-NEXT: vmv.v.x v24, a1
693 ; ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
694 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v0, v8
695 ; ZVFHMIN-NEXT: vfwcvt.f.f.v v8, v24
696 ; ZVFHMIN-NEXT: vsetvli zero, zero, e32, m8, ta, ma
697 ; ZVFHMIN-NEXT: vfnmsub.vv v8, v0, v16
699 %elt.head = insertelement <vscale x 16 x half> poison, half %b, i32 0
700 %vb = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
701 %aext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
702 %vbext = call <vscale x 16 x float> @llvm.vp.fpext.nxv16f32.nxv16f16(<vscale x 16 x half> %vb, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
703 %nega = call <vscale x 16 x float> @llvm.vp.fneg.nxv16f32(<vscale x 16 x float> %aext, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
704 %v = call <vscale x 16 x float> @llvm.vp.fma.nxv16f32(<vscale x 16 x float> %nega, <vscale x 16 x float> %vbext, <vscale x 16 x float> %c, <vscale x 16 x i1> splat (i1 -1), i32 %evl)
705 ret <vscale x 16 x float> %v
708 declare <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x double>, <vscale x 1 x i1>, i32)
709 declare <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double>, <vscale x 1 x i1>, i32)
710 declare <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float>, <vscale x 1 x i1>, i32)
712 define <vscale x 1 x double> @vfnmsac_vv_nxv1f64(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
713 ; CHECK-LABEL: vfnmsac_vv_nxv1f64:
715 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
716 ; CHECK-NEXT: vfwnmsac.vv v10, v8, v9, v0.t
717 ; CHECK-NEXT: vmv1r.v v8, v10
719 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
720 %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> %m, i32 %evl)
721 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
722 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
723 ret <vscale x 1 x double> %v
726 define <vscale x 1 x double> @vfnmsac_vv_nxv1f64_unmasked(<vscale x 1 x float> %a, <vscale x 1 x float> %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
727 ; CHECK-LABEL: vfnmsac_vv_nxv1f64_unmasked:
729 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
730 ; CHECK-NEXT: vfwnmsac.vv v10, v8, v9
731 ; CHECK-NEXT: vmv1r.v v8, v10
733 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
734 %bext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %b, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
735 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
736 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %bext, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
737 ret <vscale x 1 x double> %v
740 define <vscale x 1 x double> @vfnmsac_vf_nxv1f64(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
741 ; CHECK-LABEL: vfnmsac_vf_nxv1f64:
743 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
744 ; CHECK-NEXT: vfwnmsac.vf v9, fa0, v8, v0.t
745 ; CHECK-NEXT: vmv1r.v v8, v9
747 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
748 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
749 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
750 %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
751 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
752 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
753 ret <vscale x 1 x double> %v
756 define <vscale x 1 x double> @vfnmsac_vf_nxv1f64_commute(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
757 ; CHECK-LABEL: vfnmsac_vf_nxv1f64_commute:
759 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
760 ; CHECK-NEXT: vfwnmsac.vf v9, fa0, v8, v0.t
761 ; CHECK-NEXT: vmv1r.v v8, v9
763 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
764 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
765 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> %m, i32 %evl)
766 %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 %evl)
767 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> %m, i32 %evl)
768 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %vbext, <vscale x 1 x double> %nega, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
769 ret <vscale x 1 x double> %v
772 define <vscale x 1 x double> @vfnmsac_vf_nxv1f64_unmasked(<vscale x 1 x float> %a, float %b, <vscale x 1 x double> %c, i32 zeroext %evl) {
773 ; CHECK-LABEL: vfnmsac_vf_nxv1f64_unmasked:
775 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma
776 ; CHECK-NEXT: vfwnmsac.vf v9, fa0, v8
777 ; CHECK-NEXT: vmv1r.v v8, v9
779 %elt.head = insertelement <vscale x 1 x float> poison, float %b, i32 0
780 %vb = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
781 %aext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
782 %vbext = call <vscale x 1 x double> @llvm.vp.fpext.nxv1f64.nxv1f32(<vscale x 1 x float> %vb, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
783 %nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %aext, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
784 %v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %vbext, <vscale x 1 x double> %c, <vscale x 1 x i1> splat (i1 -1), i32 %evl)
785 ret <vscale x 1 x double> %v
788 declare <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, i32)
789 declare <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, i32)
790 declare <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float>, <vscale x 2 x i1>, i32)
792 define <vscale x 2 x double> @vfnmsac_vv_nxv2f64(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
793 ; CHECK-LABEL: vfnmsac_vv_nxv2f64:
795 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
796 ; CHECK-NEXT: vfwnmsac.vv v10, v8, v9, v0.t
797 ; CHECK-NEXT: vmv2r.v v8, v10
799 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
800 %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> %m, i32 %evl)
801 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
802 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
803 ret <vscale x 2 x double> %v
806 define <vscale x 2 x double> @vfnmsac_vv_nxv2f64_unmasked(<vscale x 2 x float> %a, <vscale x 2 x float> %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
807 ; CHECK-LABEL: vfnmsac_vv_nxv2f64_unmasked:
809 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
810 ; CHECK-NEXT: vfwnmsac.vv v10, v8, v9
811 ; CHECK-NEXT: vmv2r.v v8, v10
813 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
814 %bext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %b, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
815 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
816 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %bext, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
817 ret <vscale x 2 x double> %v
820 define <vscale x 2 x double> @vfnmsac_vf_nxv2f64(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
821 ; CHECK-LABEL: vfnmsac_vf_nxv2f64:
823 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
824 ; CHECK-NEXT: vfwnmsac.vf v10, fa0, v8, v0.t
825 ; CHECK-NEXT: vmv2r.v v8, v10
827 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
828 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
829 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
830 %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
831 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
832 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
833 ret <vscale x 2 x double> %v
836 define <vscale x 2 x double> @vfnmsac_vf_nxv2f64_commute(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 zeroext %evl) {
837 ; CHECK-LABEL: vfnmsac_vf_nxv2f64_commute:
839 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
840 ; CHECK-NEXT: vfwnmsac.vf v10, fa0, v8, v0.t
841 ; CHECK-NEXT: vmv2r.v v8, v10
843 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
844 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
845 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %evl)
846 %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 %evl)
847 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> %m, i32 %evl)
848 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %vbext, <vscale x 2 x double> %nega, <vscale x 2 x double> %c, <vscale x 2 x i1> %m, i32 %evl)
849 ret <vscale x 2 x double> %v
852 define <vscale x 2 x double> @vfnmsac_vf_nxv2f64_unmasked(<vscale x 2 x float> %a, float %b, <vscale x 2 x double> %c, i32 zeroext %evl) {
853 ; CHECK-LABEL: vfnmsac_vf_nxv2f64_unmasked:
855 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, ta, ma
856 ; CHECK-NEXT: vfwnmsac.vf v10, fa0, v8
857 ; CHECK-NEXT: vmv2r.v v8, v10
859 %elt.head = insertelement <vscale x 2 x float> poison, float %b, i32 0
860 %vb = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
861 %aext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
862 %vbext = call <vscale x 2 x double> @llvm.vp.fpext.nxv2f64.nxv2f32(<vscale x 2 x float> %vb, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
863 %nega = call <vscale x 2 x double> @llvm.vp.fneg.nxv2f64(<vscale x 2 x double> %aext, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
864 %v = call <vscale x 2 x double> @llvm.vp.fma.nxv2f64(<vscale x 2 x double> %nega, <vscale x 2 x double> %vbext, <vscale x 2 x double> %c, <vscale x 2 x i1> splat (i1 -1), i32 %evl)
865 ret <vscale x 2 x double> %v
868 declare <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x double>, <vscale x 4 x i1>, i32)
869 declare <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double>, <vscale x 4 x i1>, i32)
870 declare <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, i32)
872 define <vscale x 4 x double> @vfnmsac_vv_nxv4f64(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
873 ; CHECK-LABEL: vfnmsac_vv_nxv4f64:
875 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
876 ; CHECK-NEXT: vfwnmsac.vv v12, v8, v10, v0.t
877 ; CHECK-NEXT: vmv4r.v v8, v12
879 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
880 %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> %m, i32 %evl)
881 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
882 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
883 ret <vscale x 4 x double> %v
886 define <vscale x 4 x double> @vfnmsac_vv_nxv4f64_unmasked(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
887 ; CHECK-LABEL: vfnmsac_vv_nxv4f64_unmasked:
889 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
890 ; CHECK-NEXT: vfwnmsac.vv v12, v8, v10
891 ; CHECK-NEXT: vmv4r.v v8, v12
893 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
894 %bext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %b, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
895 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
896 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %bext, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
897 ret <vscale x 4 x double> %v
900 define <vscale x 4 x double> @vfnmsac_vf_nxv4f64(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
901 ; CHECK-LABEL: vfnmsac_vf_nxv4f64:
903 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
904 ; CHECK-NEXT: vfwnmsac.vf v12, fa0, v8, v0.t
905 ; CHECK-NEXT: vmv4r.v v8, v12
907 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
908 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
909 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
910 %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
911 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
912 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
913 ret <vscale x 4 x double> %v
916 define <vscale x 4 x double> @vfnmsac_vf_nxv4f64_commute(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 zeroext %evl) {
917 ; CHECK-LABEL: vfnmsac_vf_nxv4f64_commute:
919 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
920 ; CHECK-NEXT: vfwnmsac.vf v12, fa0, v8, v0.t
921 ; CHECK-NEXT: vmv4r.v v8, v12
923 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
924 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
925 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %m, i32 %evl)
926 %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 %evl)
927 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> %m, i32 %evl)
928 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %vbext, <vscale x 4 x double> %nega, <vscale x 4 x double> %c, <vscale x 4 x i1> %m, i32 %evl)
929 ret <vscale x 4 x double> %v
932 define <vscale x 4 x double> @vfnmsac_vf_nxv4f64_unmasked(<vscale x 4 x float> %a, float %b, <vscale x 4 x double> %c, i32 zeroext %evl) {
933 ; CHECK-LABEL: vfnmsac_vf_nxv4f64_unmasked:
935 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
936 ; CHECK-NEXT: vfwnmsac.vf v12, fa0, v8
937 ; CHECK-NEXT: vmv4r.v v8, v12
939 %elt.head = insertelement <vscale x 4 x float> poison, float %b, i32 0
940 %vb = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
941 %aext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
942 %vbext = call <vscale x 4 x double> @llvm.vp.fpext.nxv4f64.nxv4f32(<vscale x 4 x float> %vb, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
943 %nega = call <vscale x 4 x double> @llvm.vp.fneg.nxv4f64(<vscale x 4 x double> %aext, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
944 %v = call <vscale x 4 x double> @llvm.vp.fma.nxv4f64(<vscale x 4 x double> %nega, <vscale x 4 x double> %vbext, <vscale x 4 x double> %c, <vscale x 4 x i1> splat (i1 -1), i32 %evl)
945 ret <vscale x 4 x double> %v
948 declare <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x double>, <vscale x 8 x i1>, i32)
949 declare <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double>, <vscale x 8 x i1>, i32)
950 declare <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float>, <vscale x 8 x i1>, i32)
952 define <vscale x 8 x double> @vfnmsac_vv_nxv8f64(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
953 ; CHECK-LABEL: vfnmsac_vv_nxv8f64:
955 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
956 ; CHECK-NEXT: vfwnmsac.vv v16, v8, v12, v0.t
957 ; CHECK-NEXT: vmv8r.v v8, v16
959 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
960 %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> %m, i32 %evl)
961 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
962 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
963 ret <vscale x 8 x double> %v
966 define <vscale x 8 x double> @vfnmsac_vv_nxv8f64_unmasked(<vscale x 8 x float> %a, <vscale x 8 x float> %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
967 ; CHECK-LABEL: vfnmsac_vv_nxv8f64_unmasked:
969 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
970 ; CHECK-NEXT: vfwnmsac.vv v16, v8, v12
971 ; CHECK-NEXT: vmv8r.v v8, v16
973 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
974 %bext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %b, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
975 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
976 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %bext, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
977 ret <vscale x 8 x double> %v
980 define <vscale x 8 x double> @vfnmsac_vf_nxv8f64(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
981 ; CHECK-LABEL: vfnmsac_vf_nxv8f64:
983 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
984 ; CHECK-NEXT: vfwnmsac.vf v16, fa0, v8, v0.t
985 ; CHECK-NEXT: vmv8r.v v8, v16
987 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
988 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
989 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
990 %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
991 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
992 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
993 ret <vscale x 8 x double> %v
996 define <vscale x 8 x double> @vfnmsac_vf_nxv8f64_commute(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 zeroext %evl) {
997 ; CHECK-LABEL: vfnmsac_vf_nxv8f64_commute:
999 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
1000 ; CHECK-NEXT: vfwnmsac.vf v16, fa0, v8, v0.t
1001 ; CHECK-NEXT: vmv8r.v v8, v16
1003 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
1004 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
1005 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> %m, i32 %evl)
1006 %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 %evl)
1007 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> %m, i32 %evl)
1008 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %vbext, <vscale x 8 x double> %nega, <vscale x 8 x double> %c, <vscale x 8 x i1> %m, i32 %evl)
1009 ret <vscale x 8 x double> %v
1012 define <vscale x 8 x double> @vfnmsac_vf_nxv8f64_unmasked(<vscale x 8 x float> %a, float %b, <vscale x 8 x double> %c, i32 zeroext %evl) {
1013 ; CHECK-LABEL: vfnmsac_vf_nxv8f64_unmasked:
1015 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma
1016 ; CHECK-NEXT: vfwnmsac.vf v16, fa0, v8
1017 ; CHECK-NEXT: vmv8r.v v8, v16
1019 %elt.head = insertelement <vscale x 8 x float> poison, float %b, i32 0
1020 %vb = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
1021 %aext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1022 %vbext = call <vscale x 8 x double> @llvm.vp.fpext.nxv8f64.nxv8f32(<vscale x 8 x float> %vb, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1023 %nega = call <vscale x 8 x double> @llvm.vp.fneg.nxv8f64(<vscale x 8 x double> %aext, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1024 %v = call <vscale x 8 x double> @llvm.vp.fma.nxv8f64(<vscale x 8 x double> %nega, <vscale x 8 x double> %vbext, <vscale x 8 x double> %c, <vscale x 8 x i1> splat (i1 -1), i32 %evl)
1025 ret <vscale x 8 x double> %v