1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=ilp32d \
3 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZVFH
4 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfh,+v,+m -target-abi=lp64d \
5 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZVFH
6 ; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=ilp32d \
7 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32ZVFHMIN
8 ; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+zvfhmin,+v,+m -target-abi=lp64d \
9 ; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64ZVFHMIN
10 declare <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1>, <vscale x 1 x i1>, <vscale x 1 x i1>, i32)
12 define <vscale x 1 x i1> @vpmerge_nxv1i1(<vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
13 ; RV32-LABEL: vpmerge_nxv1i1:
15 ; RV32-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
16 ; RV32-NEXT: vid.v v10
17 ; RV32-NEXT: vmsltu.vx v10, v10, a0
18 ; RV32-NEXT: vmand.mm v9, v9, v10
19 ; RV32-NEXT: vmandn.mm v8, v8, v9
20 ; RV32-NEXT: vmand.mm v9, v0, v9
21 ; RV32-NEXT: vmor.mm v0, v9, v8
24 ; RV64-LABEL: vpmerge_nxv1i1:
26 ; RV64-NEXT: vsetvli a1, zero, e64, m1, ta, ma
27 ; RV64-NEXT: vid.v v10
28 ; RV64-NEXT: vmsltu.vx v10, v10, a0
29 ; RV64-NEXT: vmand.mm v9, v9, v10
30 ; RV64-NEXT: vmandn.mm v8, v8, v9
31 ; RV64-NEXT: vmand.mm v9, v0, v9
32 ; RV64-NEXT: vmor.mm v0, v9, v8
34 %v = call <vscale x 1 x i1> @llvm.vp.merge.nxv1i1(<vscale x 1 x i1> %m, <vscale x 1 x i1> %va, <vscale x 1 x i1> %vb, i32 %evl)
35 ret <vscale x 1 x i1> %v
38 declare <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1>, <vscale x 1 x i8>, <vscale x 1 x i8>, i32)
40 define <vscale x 1 x i8> @vpmerge_vv_nxv1i8(<vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
41 ; CHECK-LABEL: vpmerge_vv_nxv1i8:
43 ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, tu, ma
44 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
45 ; CHECK-NEXT: vmv1r.v v8, v9
47 %v = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, i32 %evl)
48 ret <vscale x 1 x i8> %v
51 define <vscale x 1 x i8> @vpmerge_vx_nxv1i8(i8 %a, <vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
52 ; CHECK-LABEL: vpmerge_vx_nxv1i8:
54 ; CHECK-NEXT: vsetvli zero, a1, e8, mf8, tu, ma
55 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
57 %elt.head = insertelement <vscale x 1 x i8> poison, i8 %a, i32 0
58 %va = shufflevector <vscale x 1 x i8> %elt.head, <vscale x 1 x i8> poison, <vscale x 1 x i32> zeroinitializer
59 %v = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> %va, <vscale x 1 x i8> %vb, i32 %evl)
60 ret <vscale x 1 x i8> %v
63 define <vscale x 1 x i8> @vpmerge_vi_nxv1i8(<vscale x 1 x i8> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
64 ; CHECK-LABEL: vpmerge_vi_nxv1i8:
66 ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, tu, ma
67 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
69 %v = call <vscale x 1 x i8> @llvm.vp.merge.nxv1i8(<vscale x 1 x i1> %m, <vscale x 1 x i8> splat (i8 2), <vscale x 1 x i8> %vb, i32 %evl)
70 ret <vscale x 1 x i8> %v
73 declare <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1>, <vscale x 2 x i8>, <vscale x 2 x i8>, i32)
75 define <vscale x 2 x i8> @vpmerge_vv_nxv2i8(<vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
76 ; CHECK-LABEL: vpmerge_vv_nxv2i8:
78 ; CHECK-NEXT: vsetvli zero, a0, e8, mf4, tu, ma
79 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
80 ; CHECK-NEXT: vmv1r.v v8, v9
82 %v = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, i32 %evl)
83 ret <vscale x 2 x i8> %v
86 define <vscale x 2 x i8> @vpmerge_vx_nxv2i8(i8 %a, <vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
87 ; CHECK-LABEL: vpmerge_vx_nxv2i8:
89 ; CHECK-NEXT: vsetvli zero, a1, e8, mf4, tu, ma
90 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
92 %elt.head = insertelement <vscale x 2 x i8> poison, i8 %a, i32 0
93 %va = shufflevector <vscale x 2 x i8> %elt.head, <vscale x 2 x i8> poison, <vscale x 2 x i32> zeroinitializer
94 %v = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> %va, <vscale x 2 x i8> %vb, i32 %evl)
95 ret <vscale x 2 x i8> %v
98 define <vscale x 2 x i8> @vpmerge_vi_nxv2i8(<vscale x 2 x i8> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
99 ; CHECK-LABEL: vpmerge_vi_nxv2i8:
101 ; CHECK-NEXT: vsetvli zero, a0, e8, mf4, tu, ma
102 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
104 %v = call <vscale x 2 x i8> @llvm.vp.merge.nxv2i8(<vscale x 2 x i1> %m, <vscale x 2 x i8> splat (i8 2), <vscale x 2 x i8> %vb, i32 %evl)
105 ret <vscale x 2 x i8> %v
108 declare <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1>, <vscale x 3 x i8>, <vscale x 3 x i8>, i32)
110 define <vscale x 3 x i8> @vpmerge_vv_nxv3i8(<vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) {
111 ; CHECK-LABEL: vpmerge_vv_nxv3i8:
113 ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma
114 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
115 ; CHECK-NEXT: vmv1r.v v8, v9
117 %v = call <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1> %m, <vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, i32 %evl)
118 ret <vscale x 3 x i8> %v
121 define <vscale x 3 x i8> @vpmerge_vx_nxv3i8(i8 %a, <vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) {
122 ; CHECK-LABEL: vpmerge_vx_nxv3i8:
124 ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, tu, ma
125 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
127 %elt.head = insertelement <vscale x 3 x i8> poison, i8 %a, i32 0
128 %va = shufflevector <vscale x 3 x i8> %elt.head, <vscale x 3 x i8> poison, <vscale x 3 x i32> zeroinitializer
129 %v = call <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1> %m, <vscale x 3 x i8> %va, <vscale x 3 x i8> %vb, i32 %evl)
130 ret <vscale x 3 x i8> %v
133 define <vscale x 3 x i8> @vpmerge_vi_nxv3i8(<vscale x 3 x i8> %vb, <vscale x 3 x i1> %m, i32 zeroext %evl) {
134 ; CHECK-LABEL: vpmerge_vi_nxv3i8:
136 ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma
137 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
139 %v = call <vscale x 3 x i8> @llvm.vp.merge.nxv3i8(<vscale x 3 x i1> %m, <vscale x 3 x i8> splat (i8 2), <vscale x 3 x i8> %vb, i32 %evl)
140 ret <vscale x 3 x i8> %v
143 declare <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1>, <vscale x 4 x i8>, <vscale x 4 x i8>, i32)
145 define <vscale x 4 x i8> @vpmerge_vv_nxv4i8(<vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
146 ; CHECK-LABEL: vpmerge_vv_nxv4i8:
148 ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma
149 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
150 ; CHECK-NEXT: vmv1r.v v8, v9
152 %v = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, i32 %evl)
153 ret <vscale x 4 x i8> %v
156 define <vscale x 4 x i8> @vpmerge_vx_nxv4i8(i8 %a, <vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
157 ; CHECK-LABEL: vpmerge_vx_nxv4i8:
159 ; CHECK-NEXT: vsetvli zero, a1, e8, mf2, tu, ma
160 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
162 %elt.head = insertelement <vscale x 4 x i8> poison, i8 %a, i32 0
163 %va = shufflevector <vscale x 4 x i8> %elt.head, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
164 %v = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> %va, <vscale x 4 x i8> %vb, i32 %evl)
165 ret <vscale x 4 x i8> %v
168 define <vscale x 4 x i8> @vpmerge_vi_nxv4i8(<vscale x 4 x i8> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
169 ; CHECK-LABEL: vpmerge_vi_nxv4i8:
171 ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, tu, ma
172 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
174 %v = call <vscale x 4 x i8> @llvm.vp.merge.nxv4i8(<vscale x 4 x i1> %m, <vscale x 4 x i8> splat (i8 2), <vscale x 4 x i8> %vb, i32 %evl)
175 ret <vscale x 4 x i8> %v
178 declare <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1>, <vscale x 8 x i7>, <vscale x 8 x i7>, i32)
180 define <vscale x 8 x i7> @vpmerge_vv_nxv8i7(<vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
181 ; CHECK-LABEL: vpmerge_vv_nxv8i7:
183 ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma
184 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
185 ; CHECK-NEXT: vmv1r.v v8, v9
187 %v = call <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1> %m, <vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, i32 %evl)
188 ret <vscale x 8 x i7> %v
191 define <vscale x 8 x i7> @vpmerge_vx_nxv8i7(i7 %a, <vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
192 ; CHECK-LABEL: vpmerge_vx_nxv8i7:
194 ; CHECK-NEXT: vsetvli zero, a1, e8, m1, tu, ma
195 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
197 %elt.head = insertelement <vscale x 8 x i7> poison, i7 %a, i32 0
198 %va = shufflevector <vscale x 8 x i7> %elt.head, <vscale x 8 x i7> poison, <vscale x 8 x i32> zeroinitializer
199 %v = call <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1> %m, <vscale x 8 x i7> %va, <vscale x 8 x i7> %vb, i32 %evl)
200 ret <vscale x 8 x i7> %v
203 define <vscale x 8 x i7> @vpmerge_vi_nxv8i7(<vscale x 8 x i7> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
204 ; CHECK-LABEL: vpmerge_vi_nxv8i7:
206 ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma
207 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
209 %v = call <vscale x 8 x i7> @llvm.vp.merge.nxv8i7(<vscale x 8 x i1> %m, <vscale x 8 x i7> splat (i7 2), <vscale x 8 x i7> %vb, i32 %evl)
210 ret <vscale x 8 x i7> %v
213 declare <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1>, <vscale x 8 x i8>, <vscale x 8 x i8>, i32)
215 define <vscale x 8 x i8> @vpmerge_vv_nxv8i8(<vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
216 ; CHECK-LABEL: vpmerge_vv_nxv8i8:
218 ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma
219 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
220 ; CHECK-NEXT: vmv1r.v v8, v9
222 %v = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, i32 %evl)
223 ret <vscale x 8 x i8> %v
226 define <vscale x 8 x i8> @vpmerge_vx_nxv8i8(i8 %a, <vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
227 ; CHECK-LABEL: vpmerge_vx_nxv8i8:
229 ; CHECK-NEXT: vsetvli zero, a1, e8, m1, tu, ma
230 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
232 %elt.head = insertelement <vscale x 8 x i8> poison, i8 %a, i32 0
233 %va = shufflevector <vscale x 8 x i8> %elt.head, <vscale x 8 x i8> poison, <vscale x 8 x i32> zeroinitializer
234 %v = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> %va, <vscale x 8 x i8> %vb, i32 %evl)
235 ret <vscale x 8 x i8> %v
238 define <vscale x 8 x i8> @vpmerge_vi_nxv8i8(<vscale x 8 x i8> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
239 ; CHECK-LABEL: vpmerge_vi_nxv8i8:
241 ; CHECK-NEXT: vsetvli zero, a0, e8, m1, tu, ma
242 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
244 %v = call <vscale x 8 x i8> @llvm.vp.merge.nxv8i8(<vscale x 8 x i1> %m, <vscale x 8 x i8> splat (i8 2), <vscale x 8 x i8> %vb, i32 %evl)
245 ret <vscale x 8 x i8> %v
248 declare <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1>, <vscale x 16 x i8>, <vscale x 16 x i8>, i32)
250 define <vscale x 16 x i8> @vpmerge_vv_nxv16i8(<vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
251 ; CHECK-LABEL: vpmerge_vv_nxv16i8:
253 ; CHECK-NEXT: vsetvli zero, a0, e8, m2, tu, ma
254 ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0
255 ; CHECK-NEXT: vmv2r.v v8, v10
257 %v = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, i32 %evl)
258 ret <vscale x 16 x i8> %v
261 define <vscale x 16 x i8> @vpmerge_vx_nxv16i8(i8 %a, <vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
262 ; CHECK-LABEL: vpmerge_vx_nxv16i8:
264 ; CHECK-NEXT: vsetvli zero, a1, e8, m2, tu, ma
265 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
267 %elt.head = insertelement <vscale x 16 x i8> poison, i8 %a, i32 0
268 %va = shufflevector <vscale x 16 x i8> %elt.head, <vscale x 16 x i8> poison, <vscale x 16 x i32> zeroinitializer
269 %v = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> %va, <vscale x 16 x i8> %vb, i32 %evl)
270 ret <vscale x 16 x i8> %v
273 define <vscale x 16 x i8> @vpmerge_vi_nxv16i8(<vscale x 16 x i8> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
274 ; CHECK-LABEL: vpmerge_vi_nxv16i8:
276 ; CHECK-NEXT: vsetvli zero, a0, e8, m2, tu, ma
277 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
279 %v = call <vscale x 16 x i8> @llvm.vp.merge.nxv16i8(<vscale x 16 x i1> %m, <vscale x 16 x i8> splat (i8 2), <vscale x 16 x i8> %vb, i32 %evl)
280 ret <vscale x 16 x i8> %v
283 declare <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1>, <vscale x 32 x i8>, <vscale x 32 x i8>, i32)
285 define <vscale x 32 x i8> @vpmerge_vv_nxv32i8(<vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
286 ; CHECK-LABEL: vpmerge_vv_nxv32i8:
288 ; CHECK-NEXT: vsetvli zero, a0, e8, m4, tu, ma
289 ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0
290 ; CHECK-NEXT: vmv4r.v v8, v12
292 %v = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, i32 %evl)
293 ret <vscale x 32 x i8> %v
296 define <vscale x 32 x i8> @vpmerge_vx_nxv32i8(i8 %a, <vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
297 ; CHECK-LABEL: vpmerge_vx_nxv32i8:
299 ; CHECK-NEXT: vsetvli zero, a1, e8, m4, tu, ma
300 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
302 %elt.head = insertelement <vscale x 32 x i8> poison, i8 %a, i32 0
303 %va = shufflevector <vscale x 32 x i8> %elt.head, <vscale x 32 x i8> poison, <vscale x 32 x i32> zeroinitializer
304 %v = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> %va, <vscale x 32 x i8> %vb, i32 %evl)
305 ret <vscale x 32 x i8> %v
308 define <vscale x 32 x i8> @vpmerge_vi_nxv32i8(<vscale x 32 x i8> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
309 ; CHECK-LABEL: vpmerge_vi_nxv32i8:
311 ; CHECK-NEXT: vsetvli zero, a0, e8, m4, tu, ma
312 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
314 %v = call <vscale x 32 x i8> @llvm.vp.merge.nxv32i8(<vscale x 32 x i1> %m, <vscale x 32 x i8> splat (i8 2), <vscale x 32 x i8> %vb, i32 %evl)
315 ret <vscale x 32 x i8> %v
318 declare <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1>, <vscale x 64 x i8>, <vscale x 64 x i8>, i32)
320 define <vscale x 64 x i8> @vpmerge_vv_nxv64i8(<vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {
321 ; CHECK-LABEL: vpmerge_vv_nxv64i8:
323 ; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma
324 ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0
325 ; CHECK-NEXT: vmv8r.v v8, v16
327 %v = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, i32 %evl)
328 ret <vscale x 64 x i8> %v
331 define <vscale x 64 x i8> @vpmerge_vx_nxv64i8(i8 %a, <vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {
332 ; CHECK-LABEL: vpmerge_vx_nxv64i8:
334 ; CHECK-NEXT: vsetvli zero, a1, e8, m8, tu, ma
335 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
337 %elt.head = insertelement <vscale x 64 x i8> poison, i8 %a, i32 0
338 %va = shufflevector <vscale x 64 x i8> %elt.head, <vscale x 64 x i8> poison, <vscale x 64 x i32> zeroinitializer
339 %v = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> %va, <vscale x 64 x i8> %vb, i32 %evl)
340 ret <vscale x 64 x i8> %v
343 define <vscale x 64 x i8> @vpmerge_vi_nxv64i8(<vscale x 64 x i8> %vb, <vscale x 64 x i1> %m, i32 zeroext %evl) {
344 ; CHECK-LABEL: vpmerge_vi_nxv64i8:
346 ; CHECK-NEXT: vsetvli zero, a0, e8, m8, tu, ma
347 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
349 %v = call <vscale x 64 x i8> @llvm.vp.merge.nxv64i8(<vscale x 64 x i1> %m, <vscale x 64 x i8> splat (i8 2), <vscale x 64 x i8> %vb, i32 %evl)
350 ret <vscale x 64 x i8> %v
353 declare <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1>, <vscale x 128 x i8>, <vscale x 128 x i8>, i32)
355 define <vscale x 128 x i8> @vpmerge_vv_nxv128i8(<vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) {
356 ; CHECK-LABEL: vpmerge_vv_nxv128i8:
358 ; CHECK-NEXT: addi sp, sp, -16
359 ; CHECK-NEXT: .cfi_def_cfa_offset 16
360 ; CHECK-NEXT: csrr a1, vlenb
361 ; CHECK-NEXT: slli a1, a1, 3
362 ; CHECK-NEXT: sub sp, sp, a1
363 ; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
364 ; CHECK-NEXT: vmv1r.v v7, v0
365 ; CHECK-NEXT: vmv8r.v v24, v16
366 ; CHECK-NEXT: addi a1, sp, 16
367 ; CHECK-NEXT: vs8r.v v8, (a1) # Unknown-size Folded Spill
368 ; CHECK-NEXT: csrr a1, vlenb
369 ; CHECK-NEXT: vsetvli a4, zero, e8, m8, ta, ma
370 ; CHECK-NEXT: vlm.v v0, (a2)
371 ; CHECK-NEXT: slli a1, a1, 3
372 ; CHECK-NEXT: add a2, a0, a1
373 ; CHECK-NEXT: sub a4, a3, a1
374 ; CHECK-NEXT: vl8r.v v16, (a2)
375 ; CHECK-NEXT: sltu a2, a3, a4
376 ; CHECK-NEXT: vl8r.v v8, (a0)
377 ; CHECK-NEXT: addi a2, a2, -1
378 ; CHECK-NEXT: and a2, a2, a4
379 ; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma
380 ; CHECK-NEXT: vmerge.vvm v16, v16, v24, v0
381 ; CHECK-NEXT: bltu a3, a1, .LBB28_2
382 ; CHECK-NEXT: # %bb.1:
383 ; CHECK-NEXT: mv a3, a1
384 ; CHECK-NEXT: .LBB28_2:
385 ; CHECK-NEXT: vmv1r.v v0, v7
386 ; CHECK-NEXT: addi a0, sp, 16
387 ; CHECK-NEXT: vl8r.v v24, (a0) # Unknown-size Folded Reload
388 ; CHECK-NEXT: vsetvli zero, a3, e8, m8, tu, ma
389 ; CHECK-NEXT: vmerge.vvm v8, v8, v24, v0
390 ; CHECK-NEXT: csrr a0, vlenb
391 ; CHECK-NEXT: slli a0, a0, 3
392 ; CHECK-NEXT: add sp, sp, a0
393 ; CHECK-NEXT: .cfi_def_cfa sp, 16
394 ; CHECK-NEXT: addi sp, sp, 16
395 ; CHECK-NEXT: .cfi_def_cfa_offset 0
397 %v = call <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1> %m, <vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, i32 %evl)
398 ret <vscale x 128 x i8> %v
401 define <vscale x 128 x i8> @vpmerge_vx_nxv128i8(i8 %a, <vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) {
402 ; CHECK-LABEL: vpmerge_vx_nxv128i8:
404 ; CHECK-NEXT: vmv1r.v v24, v0
405 ; CHECK-NEXT: vsetvli a3, zero, e8, m8, ta, ma
406 ; CHECK-NEXT: vlm.v v0, (a1)
407 ; CHECK-NEXT: csrr a1, vlenb
408 ; CHECK-NEXT: slli a1, a1, 3
409 ; CHECK-NEXT: sub a3, a2, a1
410 ; CHECK-NEXT: sltu a4, a2, a3
411 ; CHECK-NEXT: addi a4, a4, -1
412 ; CHECK-NEXT: and a3, a4, a3
413 ; CHECK-NEXT: vsetvli zero, a3, e8, m8, tu, ma
414 ; CHECK-NEXT: vmerge.vxm v16, v16, a0, v0
415 ; CHECK-NEXT: bltu a2, a1, .LBB29_2
416 ; CHECK-NEXT: # %bb.1:
417 ; CHECK-NEXT: mv a2, a1
418 ; CHECK-NEXT: .LBB29_2:
419 ; CHECK-NEXT: vmv1r.v v0, v24
420 ; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma
421 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
423 %elt.head = insertelement <vscale x 128 x i8> poison, i8 %a, i32 0
424 %va = shufflevector <vscale x 128 x i8> %elt.head, <vscale x 128 x i8> poison, <vscale x 128 x i32> zeroinitializer
425 %v = call <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1> %m, <vscale x 128 x i8> %va, <vscale x 128 x i8> %vb, i32 %evl)
426 ret <vscale x 128 x i8> %v
429 define <vscale x 128 x i8> @vpmerge_vi_nxv128i8(<vscale x 128 x i8> %vb, <vscale x 128 x i1> %m, i32 zeroext %evl) {
430 ; CHECK-LABEL: vpmerge_vi_nxv128i8:
432 ; CHECK-NEXT: vmv1r.v v24, v0
433 ; CHECK-NEXT: vsetvli a2, zero, e8, m8, ta, ma
434 ; CHECK-NEXT: vlm.v v0, (a0)
435 ; CHECK-NEXT: csrr a0, vlenb
436 ; CHECK-NEXT: slli a0, a0, 3
437 ; CHECK-NEXT: sub a2, a1, a0
438 ; CHECK-NEXT: sltu a3, a1, a2
439 ; CHECK-NEXT: addi a3, a3, -1
440 ; CHECK-NEXT: and a2, a3, a2
441 ; CHECK-NEXT: vsetvli zero, a2, e8, m8, tu, ma
442 ; CHECK-NEXT: vmerge.vim v16, v16, 2, v0
443 ; CHECK-NEXT: bltu a1, a0, .LBB30_2
444 ; CHECK-NEXT: # %bb.1:
445 ; CHECK-NEXT: mv a1, a0
446 ; CHECK-NEXT: .LBB30_2:
447 ; CHECK-NEXT: vmv1r.v v0, v24
448 ; CHECK-NEXT: vsetvli zero, a1, e8, m8, tu, ma
449 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
451 %v = call <vscale x 128 x i8> @llvm.vp.merge.nxv128i8(<vscale x 128 x i1> %m, <vscale x 128 x i8> splat (i8 2), <vscale x 128 x i8> %vb, i32 %evl)
452 ret <vscale x 128 x i8> %v
455 declare <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1>, <vscale x 1 x i16>, <vscale x 1 x i16>, i32)
457 define <vscale x 1 x i16> @vpmerge_vv_nxv1i16(<vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
458 ; CHECK-LABEL: vpmerge_vv_nxv1i16:
460 ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma
461 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
462 ; CHECK-NEXT: vmv1r.v v8, v9
464 %v = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, i32 %evl)
465 ret <vscale x 1 x i16> %v
468 define <vscale x 1 x i16> @vpmerge_vx_nxv1i16(i16 %a, <vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
469 ; CHECK-LABEL: vpmerge_vx_nxv1i16:
471 ; CHECK-NEXT: vsetvli zero, a1, e16, mf4, tu, ma
472 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
474 %elt.head = insertelement <vscale x 1 x i16> poison, i16 %a, i32 0
475 %va = shufflevector <vscale x 1 x i16> %elt.head, <vscale x 1 x i16> poison, <vscale x 1 x i32> zeroinitializer
476 %v = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> %va, <vscale x 1 x i16> %vb, i32 %evl)
477 ret <vscale x 1 x i16> %v
480 define <vscale x 1 x i16> @vpmerge_vi_nxv1i16(<vscale x 1 x i16> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
481 ; CHECK-LABEL: vpmerge_vi_nxv1i16:
483 ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma
484 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
486 %v = call <vscale x 1 x i16> @llvm.vp.merge.nxv1i16(<vscale x 1 x i1> %m, <vscale x 1 x i16> splat (i16 2), <vscale x 1 x i16> %vb, i32 %evl)
487 ret <vscale x 1 x i16> %v
490 declare <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1>, <vscale x 2 x i16>, <vscale x 2 x i16>, i32)
492 define <vscale x 2 x i16> @vpmerge_vv_nxv2i16(<vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
493 ; CHECK-LABEL: vpmerge_vv_nxv2i16:
495 ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma
496 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
497 ; CHECK-NEXT: vmv1r.v v8, v9
499 %v = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, i32 %evl)
500 ret <vscale x 2 x i16> %v
503 define <vscale x 2 x i16> @vpmerge_vx_nxv2i16(i16 %a, <vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
504 ; CHECK-LABEL: vpmerge_vx_nxv2i16:
506 ; CHECK-NEXT: vsetvli zero, a1, e16, mf2, tu, ma
507 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
509 %elt.head = insertelement <vscale x 2 x i16> poison, i16 %a, i32 0
510 %va = shufflevector <vscale x 2 x i16> %elt.head, <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer
511 %v = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> %va, <vscale x 2 x i16> %vb, i32 %evl)
512 ret <vscale x 2 x i16> %v
515 define <vscale x 2 x i16> @vpmerge_vi_nxv2i16(<vscale x 2 x i16> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
516 ; CHECK-LABEL: vpmerge_vi_nxv2i16:
518 ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma
519 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
521 %v = call <vscale x 2 x i16> @llvm.vp.merge.nxv2i16(<vscale x 2 x i1> %m, <vscale x 2 x i16> splat (i16 2), <vscale x 2 x i16> %vb, i32 %evl)
522 ret <vscale x 2 x i16> %v
525 declare <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1>, <vscale x 4 x i16>, <vscale x 4 x i16>, i32)
527 define <vscale x 4 x i16> @vpmerge_vv_nxv4i16(<vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
528 ; CHECK-LABEL: vpmerge_vv_nxv4i16:
530 ; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma
531 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
532 ; CHECK-NEXT: vmv1r.v v8, v9
534 %v = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, i32 %evl)
535 ret <vscale x 4 x i16> %v
538 define <vscale x 4 x i16> @vpmerge_vx_nxv4i16(i16 %a, <vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
539 ; CHECK-LABEL: vpmerge_vx_nxv4i16:
541 ; CHECK-NEXT: vsetvli zero, a1, e16, m1, tu, ma
542 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
544 %elt.head = insertelement <vscale x 4 x i16> poison, i16 %a, i32 0
545 %va = shufflevector <vscale x 4 x i16> %elt.head, <vscale x 4 x i16> poison, <vscale x 4 x i32> zeroinitializer
546 %v = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> %va, <vscale x 4 x i16> %vb, i32 %evl)
547 ret <vscale x 4 x i16> %v
550 define <vscale x 4 x i16> @vpmerge_vi_nxv4i16(<vscale x 4 x i16> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
551 ; CHECK-LABEL: vpmerge_vi_nxv4i16:
553 ; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma
554 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
556 %v = call <vscale x 4 x i16> @llvm.vp.merge.nxv4i16(<vscale x 4 x i1> %m, <vscale x 4 x i16> splat (i16 2), <vscale x 4 x i16> %vb, i32 %evl)
557 ret <vscale x 4 x i16> %v
560 declare <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1>, <vscale x 8 x i16>, <vscale x 8 x i16>, i32)
562 define <vscale x 8 x i16> @vpmerge_vv_nxv8i16(<vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
563 ; CHECK-LABEL: vpmerge_vv_nxv8i16:
565 ; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma
566 ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0
567 ; CHECK-NEXT: vmv2r.v v8, v10
569 %v = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, i32 %evl)
570 ret <vscale x 8 x i16> %v
573 define <vscale x 8 x i16> @vpmerge_vx_nxv8i16(i16 %a, <vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
574 ; CHECK-LABEL: vpmerge_vx_nxv8i16:
576 ; CHECK-NEXT: vsetvli zero, a1, e16, m2, tu, ma
577 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
579 %elt.head = insertelement <vscale x 8 x i16> poison, i16 %a, i32 0
580 %va = shufflevector <vscale x 8 x i16> %elt.head, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
581 %v = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> %va, <vscale x 8 x i16> %vb, i32 %evl)
582 ret <vscale x 8 x i16> %v
585 define <vscale x 8 x i16> @vpmerge_vi_nxv8i16(<vscale x 8 x i16> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
586 ; CHECK-LABEL: vpmerge_vi_nxv8i16:
588 ; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma
589 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
591 %v = call <vscale x 8 x i16> @llvm.vp.merge.nxv8i16(<vscale x 8 x i1> %m, <vscale x 8 x i16> splat (i16 2), <vscale x 8 x i16> %vb, i32 %evl)
592 ret <vscale x 8 x i16> %v
595 declare <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1>, <vscale x 16 x i16>, <vscale x 16 x i16>, i32)
597 define <vscale x 16 x i16> @vpmerge_vv_nxv16i16(<vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
598 ; CHECK-LABEL: vpmerge_vv_nxv16i16:
600 ; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma
601 ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0
602 ; CHECK-NEXT: vmv4r.v v8, v12
604 %v = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, i32 %evl)
605 ret <vscale x 16 x i16> %v
608 define <vscale x 16 x i16> @vpmerge_vx_nxv16i16(i16 %a, <vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
609 ; CHECK-LABEL: vpmerge_vx_nxv16i16:
611 ; CHECK-NEXT: vsetvli zero, a1, e16, m4, tu, ma
612 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
614 %elt.head = insertelement <vscale x 16 x i16> poison, i16 %a, i32 0
615 %va = shufflevector <vscale x 16 x i16> %elt.head, <vscale x 16 x i16> poison, <vscale x 16 x i32> zeroinitializer
616 %v = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> %va, <vscale x 16 x i16> %vb, i32 %evl)
617 ret <vscale x 16 x i16> %v
620 define <vscale x 16 x i16> @vpmerge_vi_nxv16i16(<vscale x 16 x i16> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
621 ; CHECK-LABEL: vpmerge_vi_nxv16i16:
623 ; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma
624 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
626 %v = call <vscale x 16 x i16> @llvm.vp.merge.nxv16i16(<vscale x 16 x i1> %m, <vscale x 16 x i16> splat (i16 2), <vscale x 16 x i16> %vb, i32 %evl)
627 ret <vscale x 16 x i16> %v
630 declare <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1>, <vscale x 32 x i16>, <vscale x 32 x i16>, i32)
632 define <vscale x 32 x i16> @vpmerge_vv_nxv32i16(<vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
633 ; CHECK-LABEL: vpmerge_vv_nxv32i16:
635 ; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma
636 ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0
637 ; CHECK-NEXT: vmv8r.v v8, v16
639 %v = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, i32 %evl)
640 ret <vscale x 32 x i16> %v
643 define <vscale x 32 x i16> @vpmerge_vx_nxv32i16(i16 %a, <vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
644 ; CHECK-LABEL: vpmerge_vx_nxv32i16:
646 ; CHECK-NEXT: vsetvli zero, a1, e16, m8, tu, ma
647 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
649 %elt.head = insertelement <vscale x 32 x i16> poison, i16 %a, i32 0
650 %va = shufflevector <vscale x 32 x i16> %elt.head, <vscale x 32 x i16> poison, <vscale x 32 x i32> zeroinitializer
651 %v = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> %va, <vscale x 32 x i16> %vb, i32 %evl)
652 ret <vscale x 32 x i16> %v
655 define <vscale x 32 x i16> @vpmerge_vi_nxv32i16(<vscale x 32 x i16> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
656 ; CHECK-LABEL: vpmerge_vi_nxv32i16:
658 ; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma
659 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
661 %v = call <vscale x 32 x i16> @llvm.vp.merge.nxv32i16(<vscale x 32 x i1> %m, <vscale x 32 x i16> splat (i16 2), <vscale x 32 x i16> %vb, i32 %evl)
662 ret <vscale x 32 x i16> %v
665 declare <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1>, <vscale x 1 x i32>, <vscale x 1 x i32>, i32)
667 define <vscale x 1 x i32> @vpmerge_vv_nxv1i32(<vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
668 ; CHECK-LABEL: vpmerge_vv_nxv1i32:
670 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma
671 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
672 ; CHECK-NEXT: vmv1r.v v8, v9
674 %v = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, i32 %evl)
675 ret <vscale x 1 x i32> %v
678 define <vscale x 1 x i32> @vpmerge_vx_nxv1i32(i32 %a, <vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
679 ; CHECK-LABEL: vpmerge_vx_nxv1i32:
681 ; CHECK-NEXT: vsetvli zero, a1, e32, mf2, tu, ma
682 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
684 %elt.head = insertelement <vscale x 1 x i32> poison, i32 %a, i32 0
685 %va = shufflevector <vscale x 1 x i32> %elt.head, <vscale x 1 x i32> poison, <vscale x 1 x i32> zeroinitializer
686 %v = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> %va, <vscale x 1 x i32> %vb, i32 %evl)
687 ret <vscale x 1 x i32> %v
690 define <vscale x 1 x i32> @vpmerge_vi_nxv1i32(<vscale x 1 x i32> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
691 ; CHECK-LABEL: vpmerge_vi_nxv1i32:
693 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma
694 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
696 %v = call <vscale x 1 x i32> @llvm.vp.merge.nxv1i32(<vscale x 1 x i1> %m, <vscale x 1 x i32> splat (i32 2), <vscale x 1 x i32> %vb, i32 %evl)
697 ret <vscale x 1 x i32> %v
700 declare <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1>, <vscale x 2 x i32>, <vscale x 2 x i32>, i32)
702 define <vscale x 2 x i32> @vpmerge_vv_nxv2i32(<vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
703 ; CHECK-LABEL: vpmerge_vv_nxv2i32:
705 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma
706 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
707 ; CHECK-NEXT: vmv1r.v v8, v9
709 %v = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, i32 %evl)
710 ret <vscale x 2 x i32> %v
713 define <vscale x 2 x i32> @vpmerge_vx_nxv2i32(i32 %a, <vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
714 ; CHECK-LABEL: vpmerge_vx_nxv2i32:
716 ; CHECK-NEXT: vsetvli zero, a1, e32, m1, tu, ma
717 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
719 %elt.head = insertelement <vscale x 2 x i32> poison, i32 %a, i32 0
720 %va = shufflevector <vscale x 2 x i32> %elt.head, <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
721 %v = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> %va, <vscale x 2 x i32> %vb, i32 %evl)
722 ret <vscale x 2 x i32> %v
725 define <vscale x 2 x i32> @vpmerge_vi_nxv2i32(<vscale x 2 x i32> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
726 ; CHECK-LABEL: vpmerge_vi_nxv2i32:
728 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma
729 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
731 %v = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> %m, <vscale x 2 x i32> splat (i32 2), <vscale x 2 x i32> %vb, i32 %evl)
732 ret <vscale x 2 x i32> %v
735 declare <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>, i32)
737 define <vscale x 4 x i32> @vpmerge_vv_nxv4i32(<vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
738 ; CHECK-LABEL: vpmerge_vv_nxv4i32:
740 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
741 ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0
742 ; CHECK-NEXT: vmv2r.v v8, v10
744 %v = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, i32 %evl)
745 ret <vscale x 4 x i32> %v
748 define <vscale x 4 x i32> @vpmerge_vx_nxv4i32(i32 %a, <vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
749 ; CHECK-LABEL: vpmerge_vx_nxv4i32:
751 ; CHECK-NEXT: vsetvli zero, a1, e32, m2, tu, ma
752 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
754 %elt.head = insertelement <vscale x 4 x i32> poison, i32 %a, i32 0
755 %va = shufflevector <vscale x 4 x i32> %elt.head, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
756 %v = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> %va, <vscale x 4 x i32> %vb, i32 %evl)
757 ret <vscale x 4 x i32> %v
760 define <vscale x 4 x i32> @vpmerge_vi_nxv4i32(<vscale x 4 x i32> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
761 ; CHECK-LABEL: vpmerge_vi_nxv4i32:
763 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
764 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
766 %v = call <vscale x 4 x i32> @llvm.vp.merge.nxv4i32(<vscale x 4 x i1> %m, <vscale x 4 x i32> splat (i32 2), <vscale x 4 x i32> %vb, i32 %evl)
767 ret <vscale x 4 x i32> %v
770 declare <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1>, <vscale x 8 x i32>, <vscale x 8 x i32>, i32)
772 define <vscale x 8 x i32> @vpmerge_vv_nxv8i32(<vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
773 ; CHECK-LABEL: vpmerge_vv_nxv8i32:
775 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma
776 ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0
777 ; CHECK-NEXT: vmv4r.v v8, v12
779 %v = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, i32 %evl)
780 ret <vscale x 8 x i32> %v
783 define <vscale x 8 x i32> @vpmerge_vx_nxv8i32(i32 %a, <vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
784 ; CHECK-LABEL: vpmerge_vx_nxv8i32:
786 ; CHECK-NEXT: vsetvli zero, a1, e32, m4, tu, ma
787 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
789 %elt.head = insertelement <vscale x 8 x i32> poison, i32 %a, i32 0
790 %va = shufflevector <vscale x 8 x i32> %elt.head, <vscale x 8 x i32> poison, <vscale x 8 x i32> zeroinitializer
791 %v = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> %va, <vscale x 8 x i32> %vb, i32 %evl)
792 ret <vscale x 8 x i32> %v
795 define <vscale x 8 x i32> @vpmerge_vi_nxv8i32(<vscale x 8 x i32> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
796 ; CHECK-LABEL: vpmerge_vi_nxv8i32:
798 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma
799 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
801 %v = call <vscale x 8 x i32> @llvm.vp.merge.nxv8i32(<vscale x 8 x i1> %m, <vscale x 8 x i32> splat (i32 2), <vscale x 8 x i32> %vb, i32 %evl)
802 ret <vscale x 8 x i32> %v
805 declare <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1>, <vscale x 16 x i32>, <vscale x 16 x i32>, i32)
807 define <vscale x 16 x i32> @vpmerge_vv_nxv16i32(<vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
808 ; CHECK-LABEL: vpmerge_vv_nxv16i32:
810 ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma
811 ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0
812 ; CHECK-NEXT: vmv8r.v v8, v16
814 %v = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, i32 %evl)
815 ret <vscale x 16 x i32> %v
818 define <vscale x 16 x i32> @vpmerge_vx_nxv16i32(i32 %a, <vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
819 ; CHECK-LABEL: vpmerge_vx_nxv16i32:
821 ; CHECK-NEXT: vsetvli zero, a1, e32, m8, tu, ma
822 ; CHECK-NEXT: vmerge.vxm v8, v8, a0, v0
824 %elt.head = insertelement <vscale x 16 x i32> poison, i32 %a, i32 0
825 %va = shufflevector <vscale x 16 x i32> %elt.head, <vscale x 16 x i32> poison, <vscale x 16 x i32> zeroinitializer
826 %v = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> %va, <vscale x 16 x i32> %vb, i32 %evl)
827 ret <vscale x 16 x i32> %v
830 define <vscale x 16 x i32> @vpmerge_vi_nxv16i32(<vscale x 16 x i32> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
831 ; CHECK-LABEL: vpmerge_vi_nxv16i32:
833 ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma
834 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
836 %v = call <vscale x 16 x i32> @llvm.vp.merge.nxv16i32(<vscale x 16 x i1> %m, <vscale x 16 x i32> splat (i32 2), <vscale x 16 x i32> %vb, i32 %evl)
837 ret <vscale x 16 x i32> %v
840 declare <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1>, <vscale x 1 x i64>, <vscale x 1 x i64>, i32)
842 define <vscale x 1 x i64> @vpmerge_vv_nxv1i64(<vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
843 ; CHECK-LABEL: vpmerge_vv_nxv1i64:
845 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma
846 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
847 ; CHECK-NEXT: vmv1r.v v8, v9
849 %v = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, i32 %evl)
850 ret <vscale x 1 x i64> %v
853 define <vscale x 1 x i64> @vpmerge_vx_nxv1i64(i64 %a, <vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
854 ; RV32-LABEL: vpmerge_vx_nxv1i64:
856 ; RV32-NEXT: addi sp, sp, -16
857 ; RV32-NEXT: .cfi_def_cfa_offset 16
858 ; RV32-NEXT: sw a0, 8(sp)
859 ; RV32-NEXT: sw a1, 12(sp)
860 ; RV32-NEXT: addi a0, sp, 8
861 ; RV32-NEXT: vsetvli zero, a2, e64, m1, tu, mu
862 ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t
863 ; RV32-NEXT: addi sp, sp, 16
864 ; RV32-NEXT: .cfi_def_cfa_offset 0
867 ; RV64-LABEL: vpmerge_vx_nxv1i64:
869 ; RV64-NEXT: vsetvli zero, a1, e64, m1, tu, ma
870 ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0
872 %elt.head = insertelement <vscale x 1 x i64> poison, i64 %a, i32 0
873 %va = shufflevector <vscale x 1 x i64> %elt.head, <vscale x 1 x i64> poison, <vscale x 1 x i32> zeroinitializer
874 %v = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> %va, <vscale x 1 x i64> %vb, i32 %evl)
875 ret <vscale x 1 x i64> %v
878 define <vscale x 1 x i64> @vpmerge_vi_nxv1i64(<vscale x 1 x i64> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
879 ; CHECK-LABEL: vpmerge_vi_nxv1i64:
881 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma
882 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
884 %v = call <vscale x 1 x i64> @llvm.vp.merge.nxv1i64(<vscale x 1 x i1> %m, <vscale x 1 x i64> splat (i64 2), <vscale x 1 x i64> %vb, i32 %evl)
885 ret <vscale x 1 x i64> %v
888 declare <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>, <vscale x 2 x i64>, i32)
890 define <vscale x 2 x i64> @vpmerge_vv_nxv2i64(<vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
891 ; CHECK-LABEL: vpmerge_vv_nxv2i64:
893 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma
894 ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0
895 ; CHECK-NEXT: vmv2r.v v8, v10
897 %v = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, i32 %evl)
898 ret <vscale x 2 x i64> %v
901 define <vscale x 2 x i64> @vpmerge_vx_nxv2i64(i64 %a, <vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
902 ; RV32-LABEL: vpmerge_vx_nxv2i64:
904 ; RV32-NEXT: addi sp, sp, -16
905 ; RV32-NEXT: .cfi_def_cfa_offset 16
906 ; RV32-NEXT: sw a0, 8(sp)
907 ; RV32-NEXT: sw a1, 12(sp)
908 ; RV32-NEXT: addi a0, sp, 8
909 ; RV32-NEXT: vsetvli zero, a2, e64, m2, tu, mu
910 ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t
911 ; RV32-NEXT: addi sp, sp, 16
912 ; RV32-NEXT: .cfi_def_cfa_offset 0
915 ; RV64-LABEL: vpmerge_vx_nxv2i64:
917 ; RV64-NEXT: vsetvli zero, a1, e64, m2, tu, ma
918 ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0
920 %elt.head = insertelement <vscale x 2 x i64> poison, i64 %a, i32 0
921 %va = shufflevector <vscale x 2 x i64> %elt.head, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
922 %v = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> %va, <vscale x 2 x i64> %vb, i32 %evl)
923 ret <vscale x 2 x i64> %v
926 define <vscale x 2 x i64> @vpmerge_vi_nxv2i64(<vscale x 2 x i64> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
927 ; CHECK-LABEL: vpmerge_vi_nxv2i64:
929 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma
930 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
932 %v = call <vscale x 2 x i64> @llvm.vp.merge.nxv2i64(<vscale x 2 x i1> %m, <vscale x 2 x i64> splat (i64 2), <vscale x 2 x i64> %vb, i32 %evl)
933 ret <vscale x 2 x i64> %v
936 declare <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1>, <vscale x 4 x i64>, <vscale x 4 x i64>, i32)
938 define <vscale x 4 x i64> @vpmerge_vv_nxv4i64(<vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
939 ; CHECK-LABEL: vpmerge_vv_nxv4i64:
941 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma
942 ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0
943 ; CHECK-NEXT: vmv4r.v v8, v12
945 %v = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, i32 %evl)
946 ret <vscale x 4 x i64> %v
949 define <vscale x 4 x i64> @vpmerge_vx_nxv4i64(i64 %a, <vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
950 ; RV32-LABEL: vpmerge_vx_nxv4i64:
952 ; RV32-NEXT: addi sp, sp, -16
953 ; RV32-NEXT: .cfi_def_cfa_offset 16
954 ; RV32-NEXT: sw a0, 8(sp)
955 ; RV32-NEXT: sw a1, 12(sp)
956 ; RV32-NEXT: addi a0, sp, 8
957 ; RV32-NEXT: vsetvli zero, a2, e64, m4, tu, mu
958 ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t
959 ; RV32-NEXT: addi sp, sp, 16
960 ; RV32-NEXT: .cfi_def_cfa_offset 0
963 ; RV64-LABEL: vpmerge_vx_nxv4i64:
965 ; RV64-NEXT: vsetvli zero, a1, e64, m4, tu, ma
966 ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0
968 %elt.head = insertelement <vscale x 4 x i64> poison, i64 %a, i32 0
969 %va = shufflevector <vscale x 4 x i64> %elt.head, <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
970 %v = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> %va, <vscale x 4 x i64> %vb, i32 %evl)
971 ret <vscale x 4 x i64> %v
974 define <vscale x 4 x i64> @vpmerge_vi_nxv4i64(<vscale x 4 x i64> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
975 ; CHECK-LABEL: vpmerge_vi_nxv4i64:
977 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma
978 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
980 %v = call <vscale x 4 x i64> @llvm.vp.merge.nxv4i64(<vscale x 4 x i1> %m, <vscale x 4 x i64> splat (i64 2), <vscale x 4 x i64> %vb, i32 %evl)
981 ret <vscale x 4 x i64> %v
984 declare <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1>, <vscale x 8 x i64>, <vscale x 8 x i64>, i32)
986 define <vscale x 8 x i64> @vpmerge_vv_nxv8i64(<vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
987 ; CHECK-LABEL: vpmerge_vv_nxv8i64:
989 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma
990 ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0
991 ; CHECK-NEXT: vmv8r.v v8, v16
993 %v = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, i32 %evl)
994 ret <vscale x 8 x i64> %v
997 define <vscale x 8 x i64> @vpmerge_vx_nxv8i64(i64 %a, <vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
998 ; RV32-LABEL: vpmerge_vx_nxv8i64:
1000 ; RV32-NEXT: addi sp, sp, -16
1001 ; RV32-NEXT: .cfi_def_cfa_offset 16
1002 ; RV32-NEXT: sw a0, 8(sp)
1003 ; RV32-NEXT: sw a1, 12(sp)
1004 ; RV32-NEXT: addi a0, sp, 8
1005 ; RV32-NEXT: vsetvli zero, a2, e64, m8, tu, mu
1006 ; RV32-NEXT: vlse64.v v8, (a0), zero, v0.t
1007 ; RV32-NEXT: addi sp, sp, 16
1008 ; RV32-NEXT: .cfi_def_cfa_offset 0
1011 ; RV64-LABEL: vpmerge_vx_nxv8i64:
1013 ; RV64-NEXT: vsetvli zero, a1, e64, m8, tu, ma
1014 ; RV64-NEXT: vmerge.vxm v8, v8, a0, v0
1016 %elt.head = insertelement <vscale x 8 x i64> poison, i64 %a, i32 0
1017 %va = shufflevector <vscale x 8 x i64> %elt.head, <vscale x 8 x i64> poison, <vscale x 8 x i32> zeroinitializer
1018 %v = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> %va, <vscale x 8 x i64> %vb, i32 %evl)
1019 ret <vscale x 8 x i64> %v
1022 define <vscale x 8 x i64> @vpmerge_vi_nxv8i64(<vscale x 8 x i64> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1023 ; CHECK-LABEL: vpmerge_vi_nxv8i64:
1025 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma
1026 ; CHECK-NEXT: vmerge.vim v8, v8, 2, v0
1028 %v = call <vscale x 8 x i64> @llvm.vp.merge.nxv8i64(<vscale x 8 x i1> %m, <vscale x 8 x i64> splat (i64 2), <vscale x 8 x i64> %vb, i32 %evl)
1029 ret <vscale x 8 x i64> %v
1032 declare <vscale x 1 x half> @llvm.vp.merge.nxv1f16(<vscale x 1 x i1>, <vscale x 1 x half>, <vscale x 1 x half>, i32)
1034 define <vscale x 1 x half> @vpmerge_vv_nxv1f16(<vscale x 1 x half> %va, <vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1035 ; CHECK-LABEL: vpmerge_vv_nxv1f16:
1037 ; CHECK-NEXT: vsetvli zero, a0, e16, mf4, tu, ma
1038 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
1039 ; CHECK-NEXT: vmv1r.v v8, v9
1041 %v = call <vscale x 1 x half> @llvm.vp.merge.nxv1f16(<vscale x 1 x i1> %m, <vscale x 1 x half> %va, <vscale x 1 x half> %vb, i32 %evl)
1042 ret <vscale x 1 x half> %v
1045 define <vscale x 1 x half> @vpmerge_vf_nxv1f16(half %a, <vscale x 1 x half> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1046 ; RV32ZVFH-LABEL: vpmerge_vf_nxv1f16:
1047 ; RV32ZVFH: # %bb.0:
1048 ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, mf4, tu, ma
1049 ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1050 ; RV32ZVFH-NEXT: ret
1052 ; RV64ZVFH-LABEL: vpmerge_vf_nxv1f16:
1053 ; RV64ZVFH: # %bb.0:
1054 ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, mf4, tu, ma
1055 ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1056 ; RV64ZVFH-NEXT: ret
1058 ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv1f16:
1059 ; RV32ZVFHMIN: # %bb.0:
1060 ; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0
1061 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
1062 ; RV32ZVFHMIN-NEXT: vmv.v.x v9, a1
1063 ; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, tu, ma
1064 ; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0
1065 ; RV32ZVFHMIN-NEXT: ret
1067 ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv1f16:
1068 ; RV64ZVFHMIN: # %bb.0:
1069 ; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0
1070 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf4, ta, ma
1071 ; RV64ZVFHMIN-NEXT: vmv.v.x v9, a1
1072 ; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf4, tu, ma
1073 ; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0
1074 ; RV64ZVFHMIN-NEXT: ret
1075 %elt.head = insertelement <vscale x 1 x half> poison, half %a, i32 0
1076 %va = shufflevector <vscale x 1 x half> %elt.head, <vscale x 1 x half> poison, <vscale x 1 x i32> zeroinitializer
1077 %v = call <vscale x 1 x half> @llvm.vp.merge.nxv1f16(<vscale x 1 x i1> %m, <vscale x 1 x half> %va, <vscale x 1 x half> %vb, i32 %evl)
1078 ret <vscale x 1 x half> %v
1081 declare <vscale x 2 x half> @llvm.vp.merge.nxv2f16(<vscale x 2 x i1>, <vscale x 2 x half>, <vscale x 2 x half>, i32)
1083 define <vscale x 2 x half> @vpmerge_vv_nxv2f16(<vscale x 2 x half> %va, <vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1084 ; CHECK-LABEL: vpmerge_vv_nxv2f16:
1086 ; CHECK-NEXT: vsetvli zero, a0, e16, mf2, tu, ma
1087 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
1088 ; CHECK-NEXT: vmv1r.v v8, v9
1090 %v = call <vscale x 2 x half> @llvm.vp.merge.nxv2f16(<vscale x 2 x i1> %m, <vscale x 2 x half> %va, <vscale x 2 x half> %vb, i32 %evl)
1091 ret <vscale x 2 x half> %v
1094 define <vscale x 2 x half> @vpmerge_vf_nxv2f16(half %a, <vscale x 2 x half> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1095 ; RV32ZVFH-LABEL: vpmerge_vf_nxv2f16:
1096 ; RV32ZVFH: # %bb.0:
1097 ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, mf2, tu, ma
1098 ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1099 ; RV32ZVFH-NEXT: ret
1101 ; RV64ZVFH-LABEL: vpmerge_vf_nxv2f16:
1102 ; RV64ZVFH: # %bb.0:
1103 ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, mf2, tu, ma
1104 ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1105 ; RV64ZVFH-NEXT: ret
1107 ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv2f16:
1108 ; RV32ZVFHMIN: # %bb.0:
1109 ; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0
1110 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
1111 ; RV32ZVFHMIN-NEXT: vmv.v.x v9, a1
1112 ; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, tu, ma
1113 ; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0
1114 ; RV32ZVFHMIN-NEXT: ret
1116 ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv2f16:
1117 ; RV64ZVFHMIN: # %bb.0:
1118 ; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0
1119 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
1120 ; RV64ZVFHMIN-NEXT: vmv.v.x v9, a1
1121 ; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, mf2, tu, ma
1122 ; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0
1123 ; RV64ZVFHMIN-NEXT: ret
1124 %elt.head = insertelement <vscale x 2 x half> poison, half %a, i32 0
1125 %va = shufflevector <vscale x 2 x half> %elt.head, <vscale x 2 x half> poison, <vscale x 2 x i32> zeroinitializer
1126 %v = call <vscale x 2 x half> @llvm.vp.merge.nxv2f16(<vscale x 2 x i1> %m, <vscale x 2 x half> %va, <vscale x 2 x half> %vb, i32 %evl)
1127 ret <vscale x 2 x half> %v
1130 declare <vscale x 4 x half> @llvm.vp.merge.nxv4f16(<vscale x 4 x i1>, <vscale x 4 x half>, <vscale x 4 x half>, i32)
1132 define <vscale x 4 x half> @vpmerge_vv_nxv4f16(<vscale x 4 x half> %va, <vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1133 ; CHECK-LABEL: vpmerge_vv_nxv4f16:
1135 ; CHECK-NEXT: vsetvli zero, a0, e16, m1, tu, ma
1136 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
1137 ; CHECK-NEXT: vmv1r.v v8, v9
1139 %v = call <vscale x 4 x half> @llvm.vp.merge.nxv4f16(<vscale x 4 x i1> %m, <vscale x 4 x half> %va, <vscale x 4 x half> %vb, i32 %evl)
1140 ret <vscale x 4 x half> %v
1143 define <vscale x 4 x half> @vpmerge_vf_nxv4f16(half %a, <vscale x 4 x half> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1144 ; RV32ZVFH-LABEL: vpmerge_vf_nxv4f16:
1145 ; RV32ZVFH: # %bb.0:
1146 ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m1, tu, ma
1147 ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1148 ; RV32ZVFH-NEXT: ret
1150 ; RV64ZVFH-LABEL: vpmerge_vf_nxv4f16:
1151 ; RV64ZVFH: # %bb.0:
1152 ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m1, tu, ma
1153 ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1154 ; RV64ZVFH-NEXT: ret
1156 ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv4f16:
1157 ; RV32ZVFHMIN: # %bb.0:
1158 ; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0
1159 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
1160 ; RV32ZVFHMIN-NEXT: vmv.v.x v9, a1
1161 ; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, tu, ma
1162 ; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0
1163 ; RV32ZVFHMIN-NEXT: ret
1165 ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv4f16:
1166 ; RV64ZVFHMIN: # %bb.0:
1167 ; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0
1168 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m1, ta, ma
1169 ; RV64ZVFHMIN-NEXT: vmv.v.x v9, a1
1170 ; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m1, tu, ma
1171 ; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v9, v0
1172 ; RV64ZVFHMIN-NEXT: ret
1173 %elt.head = insertelement <vscale x 4 x half> poison, half %a, i32 0
1174 %va = shufflevector <vscale x 4 x half> %elt.head, <vscale x 4 x half> poison, <vscale x 4 x i32> zeroinitializer
1175 %v = call <vscale x 4 x half> @llvm.vp.merge.nxv4f16(<vscale x 4 x i1> %m, <vscale x 4 x half> %va, <vscale x 4 x half> %vb, i32 %evl)
1176 ret <vscale x 4 x half> %v
1179 declare <vscale x 8 x half> @llvm.vp.merge.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, i32)
1181 define <vscale x 8 x half> @vpmerge_vv_nxv8f16(<vscale x 8 x half> %va, <vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1182 ; CHECK-LABEL: vpmerge_vv_nxv8f16:
1184 ; CHECK-NEXT: vsetvli zero, a0, e16, m2, tu, ma
1185 ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0
1186 ; CHECK-NEXT: vmv2r.v v8, v10
1188 %v = call <vscale x 8 x half> @llvm.vp.merge.nxv8f16(<vscale x 8 x i1> %m, <vscale x 8 x half> %va, <vscale x 8 x half> %vb, i32 %evl)
1189 ret <vscale x 8 x half> %v
1192 define <vscale x 8 x half> @vpmerge_vf_nxv8f16(half %a, <vscale x 8 x half> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1193 ; RV32ZVFH-LABEL: vpmerge_vf_nxv8f16:
1194 ; RV32ZVFH: # %bb.0:
1195 ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m2, tu, ma
1196 ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1197 ; RV32ZVFH-NEXT: ret
1199 ; RV64ZVFH-LABEL: vpmerge_vf_nxv8f16:
1200 ; RV64ZVFH: # %bb.0:
1201 ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m2, tu, ma
1202 ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1203 ; RV64ZVFH-NEXT: ret
1205 ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv8f16:
1206 ; RV32ZVFHMIN: # %bb.0:
1207 ; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0
1208 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
1209 ; RV32ZVFHMIN-NEXT: vmv.v.x v10, a1
1210 ; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, tu, ma
1211 ; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v10, v0
1212 ; RV32ZVFHMIN-NEXT: ret
1214 ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv8f16:
1215 ; RV64ZVFHMIN: # %bb.0:
1216 ; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0
1217 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m2, ta, ma
1218 ; RV64ZVFHMIN-NEXT: vmv.v.x v10, a1
1219 ; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m2, tu, ma
1220 ; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v10, v0
1221 ; RV64ZVFHMIN-NEXT: ret
1222 %elt.head = insertelement <vscale x 8 x half> poison, half %a, i32 0
1223 %va = shufflevector <vscale x 8 x half> %elt.head, <vscale x 8 x half> poison, <vscale x 8 x i32> zeroinitializer
1224 %v = call <vscale x 8 x half> @llvm.vp.merge.nxv8f16(<vscale x 8 x i1> %m, <vscale x 8 x half> %va, <vscale x 8 x half> %vb, i32 %evl)
1225 ret <vscale x 8 x half> %v
1228 declare <vscale x 16 x half> @llvm.vp.merge.nxv16f16(<vscale x 16 x i1>, <vscale x 16 x half>, <vscale x 16 x half>, i32)
1230 define <vscale x 16 x half> @vpmerge_vv_nxv16f16(<vscale x 16 x half> %va, <vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1231 ; CHECK-LABEL: vpmerge_vv_nxv16f16:
1233 ; CHECK-NEXT: vsetvli zero, a0, e16, m4, tu, ma
1234 ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0
1235 ; CHECK-NEXT: vmv4r.v v8, v12
1237 %v = call <vscale x 16 x half> @llvm.vp.merge.nxv16f16(<vscale x 16 x i1> %m, <vscale x 16 x half> %va, <vscale x 16 x half> %vb, i32 %evl)
1238 ret <vscale x 16 x half> %v
1241 define <vscale x 16 x half> @vpmerge_vf_nxv16f16(half %a, <vscale x 16 x half> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1242 ; RV32ZVFH-LABEL: vpmerge_vf_nxv16f16:
1243 ; RV32ZVFH: # %bb.0:
1244 ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m4, tu, ma
1245 ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1246 ; RV32ZVFH-NEXT: ret
1248 ; RV64ZVFH-LABEL: vpmerge_vf_nxv16f16:
1249 ; RV64ZVFH: # %bb.0:
1250 ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m4, tu, ma
1251 ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1252 ; RV64ZVFH-NEXT: ret
1254 ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv16f16:
1255 ; RV32ZVFHMIN: # %bb.0:
1256 ; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0
1257 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
1258 ; RV32ZVFHMIN-NEXT: vmv.v.x v12, a1
1259 ; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, tu, ma
1260 ; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v12, v0
1261 ; RV32ZVFHMIN-NEXT: ret
1263 ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv16f16:
1264 ; RV64ZVFHMIN: # %bb.0:
1265 ; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0
1266 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m4, ta, ma
1267 ; RV64ZVFHMIN-NEXT: vmv.v.x v12, a1
1268 ; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m4, tu, ma
1269 ; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v12, v0
1270 ; RV64ZVFHMIN-NEXT: ret
1271 %elt.head = insertelement <vscale x 16 x half> poison, half %a, i32 0
1272 %va = shufflevector <vscale x 16 x half> %elt.head, <vscale x 16 x half> poison, <vscale x 16 x i32> zeroinitializer
1273 %v = call <vscale x 16 x half> @llvm.vp.merge.nxv16f16(<vscale x 16 x i1> %m, <vscale x 16 x half> %va, <vscale x 16 x half> %vb, i32 %evl)
1274 ret <vscale x 16 x half> %v
1277 declare <vscale x 32 x half> @llvm.vp.merge.nxv32f16(<vscale x 32 x i1>, <vscale x 32 x half>, <vscale x 32 x half>, i32)
1279 define <vscale x 32 x half> @vpmerge_vv_nxv32f16(<vscale x 32 x half> %va, <vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
1280 ; CHECK-LABEL: vpmerge_vv_nxv32f16:
1282 ; CHECK-NEXT: vsetvli zero, a0, e16, m8, tu, ma
1283 ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0
1284 ; CHECK-NEXT: vmv8r.v v8, v16
1286 %v = call <vscale x 32 x half> @llvm.vp.merge.nxv32f16(<vscale x 32 x i1> %m, <vscale x 32 x half> %va, <vscale x 32 x half> %vb, i32 %evl)
1287 ret <vscale x 32 x half> %v
1290 define <vscale x 32 x half> @vpmerge_vf_nxv32f16(half %a, <vscale x 32 x half> %vb, <vscale x 32 x i1> %m, i32 zeroext %evl) {
1291 ; RV32ZVFH-LABEL: vpmerge_vf_nxv32f16:
1292 ; RV32ZVFH: # %bb.0:
1293 ; RV32ZVFH-NEXT: vsetvli zero, a0, e16, m8, tu, ma
1294 ; RV32ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1295 ; RV32ZVFH-NEXT: ret
1297 ; RV64ZVFH-LABEL: vpmerge_vf_nxv32f16:
1298 ; RV64ZVFH: # %bb.0:
1299 ; RV64ZVFH-NEXT: vsetvli zero, a0, e16, m8, tu, ma
1300 ; RV64ZVFH-NEXT: vfmerge.vfm v8, v8, fa0, v0
1301 ; RV64ZVFH-NEXT: ret
1303 ; RV32ZVFHMIN-LABEL: vpmerge_vf_nxv32f16:
1304 ; RV32ZVFHMIN: # %bb.0:
1305 ; RV32ZVFHMIN-NEXT: fmv.x.h a1, fa0
1306 ; RV32ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma
1307 ; RV32ZVFHMIN-NEXT: vmv.v.x v16, a1
1308 ; RV32ZVFHMIN-NEXT: vsetvli zero, zero, e16, m8, tu, ma
1309 ; RV32ZVFHMIN-NEXT: vmerge.vvm v8, v8, v16, v0
1310 ; RV32ZVFHMIN-NEXT: ret
1312 ; RV64ZVFHMIN-LABEL: vpmerge_vf_nxv32f16:
1313 ; RV64ZVFHMIN: # %bb.0:
1314 ; RV64ZVFHMIN-NEXT: fmv.x.h a1, fa0
1315 ; RV64ZVFHMIN-NEXT: vsetvli zero, a0, e16, m8, ta, ma
1316 ; RV64ZVFHMIN-NEXT: vmv.v.x v16, a1
1317 ; RV64ZVFHMIN-NEXT: vsetvli zero, zero, e16, m8, tu, ma
1318 ; RV64ZVFHMIN-NEXT: vmerge.vvm v8, v8, v16, v0
1319 ; RV64ZVFHMIN-NEXT: ret
1320 %elt.head = insertelement <vscale x 32 x half> poison, half %a, i32 0
1321 %va = shufflevector <vscale x 32 x half> %elt.head, <vscale x 32 x half> poison, <vscale x 32 x i32> zeroinitializer
1322 %v = call <vscale x 32 x half> @llvm.vp.merge.nxv32f16(<vscale x 32 x i1> %m, <vscale x 32 x half> %va, <vscale x 32 x half> %vb, i32 %evl)
1323 ret <vscale x 32 x half> %v
1326 declare <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1>, <vscale x 1 x float>, <vscale x 1 x float>, i32)
1328 define <vscale x 1 x float> @vpmerge_vv_nxv1f32(<vscale x 1 x float> %va, <vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1329 ; CHECK-LABEL: vpmerge_vv_nxv1f32:
1331 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma
1332 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
1333 ; CHECK-NEXT: vmv1r.v v8, v9
1335 %v = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %va, <vscale x 1 x float> %vb, i32 %evl)
1336 ret <vscale x 1 x float> %v
1339 define <vscale x 1 x float> @vpmerge_vf_nxv1f32(float %a, <vscale x 1 x float> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1340 ; CHECK-LABEL: vpmerge_vf_nxv1f32:
1342 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, tu, ma
1343 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1345 %elt.head = insertelement <vscale x 1 x float> poison, float %a, i32 0
1346 %va = shufflevector <vscale x 1 x float> %elt.head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
1347 %v = call <vscale x 1 x float> @llvm.vp.merge.nxv1f32(<vscale x 1 x i1> %m, <vscale x 1 x float> %va, <vscale x 1 x float> %vb, i32 %evl)
1348 ret <vscale x 1 x float> %v
1351 declare <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1>, <vscale x 2 x float>, <vscale x 2 x float>, i32)
1353 define <vscale x 2 x float> @vpmerge_vv_nxv2f32(<vscale x 2 x float> %va, <vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1354 ; CHECK-LABEL: vpmerge_vv_nxv2f32:
1356 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma
1357 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
1358 ; CHECK-NEXT: vmv1r.v v8, v9
1360 %v = call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> %m, <vscale x 2 x float> %va, <vscale x 2 x float> %vb, i32 %evl)
1361 ret <vscale x 2 x float> %v
1364 define <vscale x 2 x float> @vpmerge_vf_nxv2f32(float %a, <vscale x 2 x float> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1365 ; CHECK-LABEL: vpmerge_vf_nxv2f32:
1367 ; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma
1368 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1370 %elt.head = insertelement <vscale x 2 x float> poison, float %a, i32 0
1371 %va = shufflevector <vscale x 2 x float> %elt.head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
1372 %v = call <vscale x 2 x float> @llvm.vp.merge.nxv2f32(<vscale x 2 x i1> %m, <vscale x 2 x float> %va, <vscale x 2 x float> %vb, i32 %evl)
1373 ret <vscale x 2 x float> %v
1376 declare <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, i32)
1378 define <vscale x 4 x float> @vpmerge_vv_nxv4f32(<vscale x 4 x float> %va, <vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1379 ; CHECK-LABEL: vpmerge_vv_nxv4f32:
1381 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
1382 ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0
1383 ; CHECK-NEXT: vmv2r.v v8, v10
1385 %v = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> %m, <vscale x 4 x float> %va, <vscale x 4 x float> %vb, i32 %evl)
1386 ret <vscale x 4 x float> %v
1389 define <vscale x 4 x float> @vpmerge_vf_nxv4f32(float %a, <vscale x 4 x float> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1390 ; CHECK-LABEL: vpmerge_vf_nxv4f32:
1392 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
1393 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1395 %elt.head = insertelement <vscale x 4 x float> poison, float %a, i32 0
1396 %va = shufflevector <vscale x 4 x float> %elt.head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
1397 %v = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> %m, <vscale x 4 x float> %va, <vscale x 4 x float> %vb, i32 %evl)
1398 ret <vscale x 4 x float> %v
1401 declare <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1>, <vscale x 8 x float>, <vscale x 8 x float>, i32)
1403 define <vscale x 8 x float> @vpmerge_vv_nxv8f32(<vscale x 8 x float> %va, <vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1404 ; CHECK-LABEL: vpmerge_vv_nxv8f32:
1406 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma
1407 ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0
1408 ; CHECK-NEXT: vmv4r.v v8, v12
1410 %v = call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> %m, <vscale x 8 x float> %va, <vscale x 8 x float> %vb, i32 %evl)
1411 ret <vscale x 8 x float> %v
1414 define <vscale x 8 x float> @vpmerge_vf_nxv8f32(float %a, <vscale x 8 x float> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1415 ; CHECK-LABEL: vpmerge_vf_nxv8f32:
1417 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, tu, ma
1418 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1420 %elt.head = insertelement <vscale x 8 x float> poison, float %a, i32 0
1421 %va = shufflevector <vscale x 8 x float> %elt.head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
1422 %v = call <vscale x 8 x float> @llvm.vp.merge.nxv8f32(<vscale x 8 x i1> %m, <vscale x 8 x float> %va, <vscale x 8 x float> %vb, i32 %evl)
1423 ret <vscale x 8 x float> %v
1426 declare <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1>, <vscale x 16 x float>, <vscale x 16 x float>, i32)
1428 define <vscale x 16 x float> @vpmerge_vv_nxv16f32(<vscale x 16 x float> %va, <vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1429 ; CHECK-LABEL: vpmerge_vv_nxv16f32:
1431 ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma
1432 ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0
1433 ; CHECK-NEXT: vmv8r.v v8, v16
1435 %v = call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> %m, <vscale x 16 x float> %va, <vscale x 16 x float> %vb, i32 %evl)
1436 ret <vscale x 16 x float> %v
1439 define <vscale x 16 x float> @vpmerge_vf_nxv16f32(float %a, <vscale x 16 x float> %vb, <vscale x 16 x i1> %m, i32 zeroext %evl) {
1440 ; CHECK-LABEL: vpmerge_vf_nxv16f32:
1442 ; CHECK-NEXT: vsetvli zero, a0, e32, m8, tu, ma
1443 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1445 %elt.head = insertelement <vscale x 16 x float> poison, float %a, i32 0
1446 %va = shufflevector <vscale x 16 x float> %elt.head, <vscale x 16 x float> poison, <vscale x 16 x i32> zeroinitializer
1447 %v = call <vscale x 16 x float> @llvm.vp.merge.nxv16f32(<vscale x 16 x i1> %m, <vscale x 16 x float> %va, <vscale x 16 x float> %vb, i32 %evl)
1448 ret <vscale x 16 x float> %v
1451 declare <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1>, <vscale x 1 x double>, <vscale x 1 x double>, i32)
1453 define <vscale x 1 x double> @vpmerge_vv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1454 ; CHECK-LABEL: vpmerge_vv_nxv1f64:
1456 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma
1457 ; CHECK-NEXT: vmerge.vvm v9, v9, v8, v0
1458 ; CHECK-NEXT: vmv1r.v v8, v9
1460 %v = call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> %m, <vscale x 1 x double> %va, <vscale x 1 x double> %vb, i32 %evl)
1461 ret <vscale x 1 x double> %v
1464 define <vscale x 1 x double> @vpmerge_vf_nxv1f64(double %a, <vscale x 1 x double> %vb, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1465 ; CHECK-LABEL: vpmerge_vf_nxv1f64:
1467 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma
1468 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1470 %elt.head = insertelement <vscale x 1 x double> poison, double %a, i32 0
1471 %va = shufflevector <vscale x 1 x double> %elt.head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
1472 %v = call <vscale x 1 x double> @llvm.vp.merge.nxv1f64(<vscale x 1 x i1> %m, <vscale x 1 x double> %va, <vscale x 1 x double> %vb, i32 %evl)
1473 ret <vscale x 1 x double> %v
1476 declare <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, i32)
1478 define <vscale x 2 x double> @vpmerge_vv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1479 ; CHECK-LABEL: vpmerge_vv_nxv2f64:
1481 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma
1482 ; CHECK-NEXT: vmerge.vvm v10, v10, v8, v0
1483 ; CHECK-NEXT: vmv2r.v v8, v10
1485 %v = call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> %m, <vscale x 2 x double> %va, <vscale x 2 x double> %vb, i32 %evl)
1486 ret <vscale x 2 x double> %v
1489 define <vscale x 2 x double> @vpmerge_vf_nxv2f64(double %a, <vscale x 2 x double> %vb, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1490 ; CHECK-LABEL: vpmerge_vf_nxv2f64:
1492 ; CHECK-NEXT: vsetvli zero, a0, e64, m2, tu, ma
1493 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1495 %elt.head = insertelement <vscale x 2 x double> poison, double %a, i32 0
1496 %va = shufflevector <vscale x 2 x double> %elt.head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
1497 %v = call <vscale x 2 x double> @llvm.vp.merge.nxv2f64(<vscale x 2 x i1> %m, <vscale x 2 x double> %va, <vscale x 2 x double> %vb, i32 %evl)
1498 ret <vscale x 2 x double> %v
1501 declare <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1>, <vscale x 4 x double>, <vscale x 4 x double>, i32)
1503 define <vscale x 4 x double> @vpmerge_vv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1504 ; CHECK-LABEL: vpmerge_vv_nxv4f64:
1506 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma
1507 ; CHECK-NEXT: vmerge.vvm v12, v12, v8, v0
1508 ; CHECK-NEXT: vmv4r.v v8, v12
1510 %v = call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> %m, <vscale x 4 x double> %va, <vscale x 4 x double> %vb, i32 %evl)
1511 ret <vscale x 4 x double> %v
1514 define <vscale x 4 x double> @vpmerge_vf_nxv4f64(double %a, <vscale x 4 x double> %vb, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1515 ; CHECK-LABEL: vpmerge_vf_nxv4f64:
1517 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, tu, ma
1518 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1520 %elt.head = insertelement <vscale x 4 x double> poison, double %a, i32 0
1521 %va = shufflevector <vscale x 4 x double> %elt.head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
1522 %v = call <vscale x 4 x double> @llvm.vp.merge.nxv4f64(<vscale x 4 x i1> %m, <vscale x 4 x double> %va, <vscale x 4 x double> %vb, i32 %evl)
1523 ret <vscale x 4 x double> %v
1526 declare <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1>, <vscale x 8 x double>, <vscale x 8 x double>, i32)
1528 define <vscale x 8 x double> @vpmerge_vv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1529 ; CHECK-LABEL: vpmerge_vv_nxv8f64:
1531 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma
1532 ; CHECK-NEXT: vmerge.vvm v16, v16, v8, v0
1533 ; CHECK-NEXT: vmv8r.v v8, v16
1535 %v = call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> %m, <vscale x 8 x double> %va, <vscale x 8 x double> %vb, i32 %evl)
1536 ret <vscale x 8 x double> %v
1539 define <vscale x 8 x double> @vpmerge_vf_nxv8f64(double %a, <vscale x 8 x double> %vb, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1540 ; CHECK-LABEL: vpmerge_vf_nxv8f64:
1542 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, tu, ma
1543 ; CHECK-NEXT: vfmerge.vfm v8, v8, fa0, v0
1545 %elt.head = insertelement <vscale x 8 x double> poison, double %a, i32 0
1546 %va = shufflevector <vscale x 8 x double> %elt.head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
1547 %v = call <vscale x 8 x double> @llvm.vp.merge.nxv8f64(<vscale x 8 x i1> %m, <vscale x 8 x double> %va, <vscale x 8 x double> %vb, i32 %evl)
1548 ret <vscale x 8 x double> %v