1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mcpu=z13 -O3 -misched=ilpmin -systemz-subreg-liveness -verify-machineinstrs -start-before register-coalescer %s -mtriple s390x-ibm-linux -stop-after machine-scheduler -o - | FileCheck %s
4 # Check that when the register coalescer rematerializes a register to set
5 # only a sub register, it sets the subranges of the unused lanes as being dead
6 # at the definition point.
8 # The way that test exercises that comes in two steps:
9 # - First, we need the register coalescer to rematerialize something.
10 # In that test, %0 is rematerializable and will be rematerialized in
11 # %1 since %1 and %0 cannot be directly coalesced (they interfere).
12 # - Second, we indirectly check that the subranges are valid for %1
13 # when, in the machine scheduler, we move the instructions that define %1
14 # closer to the return instruction (i.e., we move MSFI and the rematerialized
15 # definition of %0 (i.e., %1 = LGHI 25) down). When doing that displacement,
16 # the scheduler updates the live-ranges of %1. When the subrange for the
17 # unused lane (here the subrange for %1.subreg_h32) was not correct, the
18 # scheduler would hit an assertion or access some invalid memory location
19 # making the compiler crash.
21 # Bottom line, this test checks what was intended if at the end, both %0 and %1
22 # are defined with `LGHI 25` and the instructions defining %1 are right before
23 # the return instruction.
28 tracksRegLiveness: true
33 ; CHECK-LABEL: name: main
34 ; CHECK: [[LGHI:%[0-9]+]]:gr64bit = LGHI 25
35 ; CHECK: CHIMux [[LGHI]].subreg_l32, 0, implicit-def $cc
36 ; CHECK: [[LGHI1:%[0-9]+]]:gr64bit = LGHI 25
37 ; CHECK: undef [[LGHI1]].subreg_l32:gr64bit = MSFI [[LGHI1]].subreg_l32, -117440512
38 ; CHECK: Return implicit [[LGHI1]].subreg_l32
40 %1:gr32bit = COPY %0.subreg_l32
41 %1:gr32bit = MSFI %1, -117440512
42 %2:grx32bit = COPY %0.subreg_l32
43 CHIMux killed %2, 0, implicit-def $cc
44 %3:gr32bit = COPY killed %1