1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=thumbv7-none-eabi | FileCheck %s
3 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
5 define i32 @test(i32 %n) nounwind {
7 ; CHECK: @ %bb.0: @ %entry
8 ; CHECK-NEXT: .save {r4, lr}
9 ; CHECK-NEXT: push {r4, lr}
10 ; CHECK-NEXT: subs r4, r0, #1
12 ; CHECK-NEXT: popeq {r4, pc}
13 ; CHECK-NEXT: .LBB0_1: @ %bb
14 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
17 ; CHECK-NEXT: subs r4, #1
18 ; CHECK-NEXT: bne .LBB0_1
19 ; CHECK-NEXT: @ %bb.2: @ %return
20 ; CHECK-NEXT: pop {r4, pc}
22 %0 = icmp eq i32 %n, 1 ; <i1> [#uses=1]
23 br i1 %0, label %return, label %bb.nph
25 bb.nph: ; preds = %entry
26 %tmp = add i32 %n, -1 ; <i32> [#uses=1]
29 bb: ; preds = %bb.nph, %bb
30 %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb ] ; <i32> [#uses=1]
31 %u.05 = phi i64 [ undef, %bb.nph ], [ %ins, %bb ] ; <i64> [#uses=1]
32 %1 = tail call i32 @f() nounwind ; <i32> [#uses=1]
33 %tmp4 = zext i32 %1 to i64 ; <i64> [#uses=1]
34 %mask = and i64 %u.05, -4294967296 ; <i64> [#uses=1]
35 %ins = or i64 %tmp4, %mask ; <i64> [#uses=2]
36 tail call void @g(i64 %ins) nounwind
37 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
38 %exitcond = icmp eq i32 %indvar.next, %tmp ; <i1> [#uses=1]
39 br i1 %exitcond, label %return, label %bb
41 return: ; preds = %bb, %entry
45 define i32 @test_dead_cycle(i32 %n) nounwind {
46 ; also check for duplicate induction variables (radar 7645034)
47 ; CHECK-LABEL: test_dead_cycle:
48 ; CHECK: @ %bb.0: @ %entry
49 ; CHECK-NEXT: .save {r4, lr}
50 ; CHECK-NEXT: push {r4, lr}
51 ; CHECK-NEXT: subs r4, r0, #1
53 ; CHECK-NEXT: popeq {r4, pc}
54 ; CHECK-NEXT: .LBB1_1: @ %bb
55 ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
56 ; CHECK-NEXT: cmp r4, #2
57 ; CHECK-NEXT: blt .LBB1_3
58 ; CHECK-NEXT: @ %bb.2: @ %bb1
59 ; CHECK-NEXT: @ in Loop: Header=BB1_1 Depth=1
62 ; CHECK-NEXT: .LBB1_3: @ %bb2
63 ; CHECK-NEXT: @ in Loop: Header=BB1_1 Depth=1
64 ; CHECK-NEXT: subs r4, #1
65 ; CHECK-NEXT: bne .LBB1_1
66 ; CHECK-NEXT: @ %bb.4: @ %return
67 ; CHECK-NEXT: pop {r4, pc}
69 %0 = icmp eq i32 %n, 1 ; <i1> [#uses=1]
70 br i1 %0, label %return, label %bb.nph
72 bb.nph: ; preds = %entry
73 %tmp = add i32 %n, -1 ; <i32> [#uses=2]
76 bb: ; preds = %bb.nph, %bb2
77 %indvar = phi i32 [ 0, %bb.nph ], [ %indvar.next, %bb2 ] ; <i32> [#uses=2]
78 %u.17 = phi i64 [ undef, %bb.nph ], [ %u.0, %bb2 ] ; <i64> [#uses=2]
79 %tmp9 = sub i32 %tmp, %indvar ; <i32> [#uses=1]
80 %1 = icmp sgt i32 %tmp9, 1 ; <i1> [#uses=1]
81 br i1 %1, label %bb1, label %bb2
84 %2 = tail call i32 @f() nounwind ; <i32> [#uses=1]
85 %tmp6 = zext i32 %2 to i64 ; <i64> [#uses=1]
86 %mask = and i64 %u.17, -4294967296 ; <i64> [#uses=1]
87 %ins = or i64 %tmp6, %mask ; <i64> [#uses=1]
88 tail call void @g(i64 %ins) nounwind
91 bb2: ; preds = %bb1, %bb
92 %u.0 = phi i64 [ %ins, %bb1 ], [ %u.17, %bb ] ; <i64> [#uses=2]
93 %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
94 %exitcond = icmp eq i32 %indvar.next, %tmp ; <i1> [#uses=1]
95 br i1 %exitcond, label %return, label %bb
97 return: ; preds = %bb2, %entry