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[RISCV] Add shrinkwrap test cases showing gaps in current impl
[llvm-project.git]
/
llvm
/
test
/
CodeGen
/
X86
/
2012-07-16-fp2ui-i1.ll
blob
7e78d70921f9b96bcc209bf392b698ccf8b426d2
1
; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7
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define void @autogen_SD3100() {
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BB:
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%FC123 = fptoui float 0x40693F5D00000000 to i1
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br i1 %FC123, label %V, label %W
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V:
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ret void
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W:
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ret void
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}